mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 15:14:43 +00:00
Various DM fixes
Addition of ofnode_get_addr_size_index() -----BEGIN PGP SIGNATURE----- iQFFBAABCgAvFiEEslwAIq+Gp8wWVbYnfxc6PpAIreYFAlzlSngRHHNqZ0BjaHJv bWl1bS5vcmcACgkQfxc6PpAIreZq5QgAiBfKSJU2x+JW9THEsb7iDe3BM10mX7np ewSdBCcgz0koncV7OpXyHAbCBasMB9XrsVhXZ+D3wHUkZYfSD4fMJ3Dl74qIblu/ a76AfiT/zXIg5uwVUURsGZ2DPxOvos1u6ekgTnPi7eIbf+gDaYWJZs22Hi0jCw7x croFHk6iQD/icqd5WbpkyPRmcZf/dWxTT3+jOIPqByMR1ZOQ0qQMoEhrNWXk4/b7 ElJjpqVZjeIqNZbyOZvH0KwK9RaVa5wH9GzbOmuBzqrUas0ppoUc/E4dAo85IKMK sALFDAMd71Z0Fzn3SVQlCcbWsBWWcL1oGrMBpSCZ2jnWF1k0/CU83w== =6f4t -----END PGP SIGNATURE----- Merge tag 'dm-pull-22may19' of git://git.denx.de/u-boot-dm Various DM fixes Addition of ofnode_get_addr_size_index()
This commit is contained in:
commit
40920bdecc
11 changed files with 151 additions and 47 deletions
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@ -722,11 +722,6 @@ int fdt_increase_size(void *fdt, int add_len)
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#include <jffs2/load_kernel.h>
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#include <mtd_node.h>
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struct reg_cell {
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unsigned int r0;
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unsigned int r1;
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};
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static int fdt_del_subnodes(const void *blob, int parent_offset)
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{
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int off, ndepth;
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@ -785,15 +780,22 @@ int fdt_node_set_part_info(void *blob, int parent_offset,
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{
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struct list_head *pentry;
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struct part_info *part;
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struct reg_cell cell;
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int off, ndepth = 0;
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int part_num, ret;
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int sizecell;
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char buf[64];
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ret = fdt_del_partitions(blob, parent_offset);
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if (ret < 0)
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return ret;
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/*
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* Check if size/address is 1 or 2 cells.
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* We assume #address-cells and #size-cells have same value.
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*/
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sizecell = fdt_getprop_u32_default_node(blob, parent_offset,
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0, "#size-cells", 1);
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/*
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* Check if it is nand {}; subnode, adjust
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* the offset in this case
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@ -842,10 +844,21 @@ add_ro:
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goto err_prop;
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}
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cell.r0 = cpu_to_fdt32(part->offset);
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cell.r1 = cpu_to_fdt32(part->size);
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add_reg:
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ret = fdt_setprop(blob, newoff, "reg", &cell, sizeof(cell));
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if (sizecell == 2) {
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ret = fdt_setprop_u64(blob, newoff,
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"reg", part->offset);
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if (!ret)
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ret = fdt_appendprop_u64(blob, newoff,
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"reg", part->size);
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} else {
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ret = fdt_setprop_u32(blob, newoff,
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"reg", part->offset);
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if (!ret)
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ret = fdt_appendprop_u32(blob, newoff,
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"reg", part->size);
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}
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if (ret == -FDT_ERR_NOSPACE) {
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ret = fdt_increase_size(blob, 512);
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if (!ret)
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@ -39,7 +39,7 @@ int ofnode_read_u32(ofnode node, const char *propname, u32 *outp)
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return 0;
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}
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int ofnode_read_u32_default(ofnode node, const char *propname, u32 def)
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u32 ofnode_read_u32_default(ofnode node, const char *propname, u32 def)
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{
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assert(ofnode_valid(node));
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ofnode_read_u32(node, propname, &def);
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@ -251,7 +251,7 @@ int ofnode_read_size(ofnode node, const char *propname)
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return -EINVAL;
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}
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fdt_addr_t ofnode_get_addr_index(ofnode node, int index)
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fdt_addr_t ofnode_get_addr_size_index(ofnode node, int index, fdt_size_t *size)
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{
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int na, ns;
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@ -260,7 +260,7 @@ fdt_addr_t ofnode_get_addr_index(ofnode node, int index)
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uint flags;
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prop_val = of_get_address(ofnode_to_np(node), index,
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NULL, &flags);
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(u64 *)size, &flags);
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if (!prop_val)
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return FDT_ADDR_T_NONE;
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@ -277,12 +277,19 @@ fdt_addr_t ofnode_get_addr_index(ofnode node, int index)
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ns = ofnode_read_simple_size_cells(ofnode_get_parent(node));
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return fdtdec_get_addr_size_fixed(gd->fdt_blob,
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ofnode_to_offset(node), "reg",
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index, na, ns, NULL, true);
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index, na, ns, size, true);
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}
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return FDT_ADDR_T_NONE;
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}
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fdt_addr_t ofnode_get_addr_index(ofnode node, int index)
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{
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fdt_size_t size;
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return ofnode_get_addr_size_index(node, index, &size);
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}
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fdt_addr_t ofnode_get_addr(ofnode node)
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{
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return ofnode_get_addr_index(node, 0);
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@ -342,7 +342,7 @@ int dm_extended_scan_fdt(const void *blob, bool pre_reloc_only)
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{
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int ret;
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ret = dm_scan_fdt(gd->fdt_blob, pre_reloc_only);
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ret = dm_scan_fdt(blob, pre_reloc_only);
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if (ret) {
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debug("dm_scan_fdt() failed: %d\n", ret);
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return ret;
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@ -13,6 +13,24 @@ config MISC
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set of generic read, write and ioctl methods may be used to
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access the device.
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config SPL_MISC
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bool "Enable Driver Model for Misc drivers in SPL"
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depends on SPL_DM
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help
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Enable driver model for miscellaneous devices. This class is
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used only for those do not fit other more general classes. A
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set of generic read, write and ioctl methods may be used to
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access the device.
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config TPL_MISC
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bool "Enable Driver Model for Misc drivers in TPL"
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depends on TPL_DM
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help
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Enable driver model for miscellaneous devices. This class is
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used only for those do not fit other more general classes. A
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set of generic read, write and ioctl methods may be used to
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access the device.
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config ALTERA_SYSID
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bool "Altera Sysid support"
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depends on MISC
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@ -68,6 +86,24 @@ config CROS_EC
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control access to the battery and main PMIC depending on the
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device. You can use the 'crosec' command to access it.
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config SPL_CROS_EC
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bool "Enable Chrome OS EC in SPL"
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help
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Enable access to the Chrome OS EC in SPL. This is a separate
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microcontroller typically available on a SPI bus on Chromebooks. It
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provides access to the keyboard, some internal storage and may
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control access to the battery and main PMIC depending on the
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device. You can use the 'crosec' command to access it.
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config TPL_CROS_EC
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bool "Enable Chrome OS EC in TPL"
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help
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Enable access to the Chrome OS EC in TPL. This is a separate
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microcontroller typically available on a SPI bus on Chromebooks. It
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provides access to the keyboard, some internal storage and may
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control access to the battery and main PMIC depending on the
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device. You can use the 'crosec' command to access it.
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config CROS_EC_I2C
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bool "Enable Chrome OS EC I2C driver"
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depends on CROS_EC
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@ -86,6 +122,24 @@ config CROS_EC_LPC
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through a legacy port interface, so on x86 machines the main
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function of the EC is power and thermal management.
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config SPL_CROS_EC_LPC
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bool "Enable Chrome OS EC LPC driver in SPL"
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depends on CROS_EC
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help
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Enable I2C access to the Chrome OS EC. This is used on x86
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Chromebooks such as link and falco. The keyboard is provided
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through a legacy port interface, so on x86 machines the main
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function of the EC is power and thermal management.
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config TPL_CROS_EC_LPC
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bool "Enable Chrome OS EC LPC driver in TPL"
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depends on CROS_EC
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help
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Enable I2C access to the Chrome OS EC. This is used on x86
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Chromebooks such as link and falco. The keyboard is provided
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through a legacy port interface, so on x86 machines the main
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function of the EC is power and thermal management.
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config CROS_EC_SANDBOX
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bool "Enable Chrome OS EC sandbox driver"
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depends on CROS_EC && SANDBOX
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@ -95,6 +149,24 @@ config CROS_EC_SANDBOX
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EC flash read/write/erase support and a few other things. It is
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enough to perform a Chrome OS verified boot on sandbox.
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config SPL_CROS_EC_SANDBOX
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bool "Enable Chrome OS EC sandbox driver in SPL"
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depends on SPL_CROS_EC && SANDBOX
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help
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Enable a sandbox emulation of the Chrome OS EC in SPL. This supports
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keyboard (use the -l flag to enable the LCD), verified boot context,
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EC flash read/write/erase support and a few other things. It is
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enough to perform a Chrome OS verified boot on sandbox.
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config TPL_CROS_EC_SANDBOX
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bool "Enable Chrome OS EC sandbox driver in TPL"
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depends on TPL_CROS_EC && SANDBOX
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help
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Enable a sandbox emulation of the Chrome OS EC in TPL. This supports
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keyboard (use the -l flag to enable the LCD), verified boot context,
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EC flash read/write/erase support and a few other things. It is
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enough to perform a Chrome OS verified boot on sandbox.
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config CROS_EC_SPI
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bool "Enable Chrome OS EC SPI driver"
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depends on CROS_EC
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@ -4,11 +4,13 @@
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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obj-$(CONFIG_MISC) += misc-uclass.o
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obj-$(CONFIG_$(SPL_TPL_)CROS_EC) += cros_ec.o
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obj-$(CONFIG_$(SPL_TPL_)CROS_EC_SANDBOX) += cros_ec_sandbox.o
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obj-$(CONFIG_$(SPL_TPL_)CROS_EC_LPC) += cros_ec_lpc.o
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ifndef CONFIG_SPL_BUILD
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obj-$(CONFIG_CROS_EC) += cros_ec.o
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obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o
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obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
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obj-$(CONFIG_CROS_EC_SANDBOX) += cros_ec_sandbox.o
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obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
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endif
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@ -224,7 +224,7 @@ static inline int ofnode_read_s32(ofnode node, const char *propname,
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* @def: default value to return if the property has no value
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* @return property value, or @def if not found
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*/
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int ofnode_read_u32_default(ofnode ref, const char *propname, u32 def);
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u32 ofnode_read_u32_default(ofnode ref, const char *propname, u32 def);
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/**
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* ofnode_read_s32_default() - Read a 32-bit integer from a property
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@ -354,6 +354,20 @@ ofnode ofnode_get_by_phandle(uint phandle);
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*/
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int ofnode_read_size(ofnode node, const char *propname);
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/**
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* ofnode_get_addr_size_index() - get an address/size from a node
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* based on index
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*
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* This reads the register address/size from a node based on index
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*
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* @node: node to read from
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* @index: Index of address to read (0 for first)
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* @size: Pointer to size of the address
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* @return address, or FDT_ADDR_T_NONE if not present or invalid
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*/
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phys_addr_t ofnode_get_addr_size_index(ofnode node, int index,
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fdt_size_t *size);
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/**
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* ofnode_get_addr_index() - get an address from a node
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*
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@ -24,30 +24,6 @@
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typedef phys_addr_t fdt_addr_t;
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typedef phys_size_t fdt_size_t;
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static inline fdt32_t fdt_addr_unpack(fdt_addr_t addr, fdt32_t *upper)
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{
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if (upper)
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#ifdef CONFIG_PHYS_64BIT
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*upper = addr >> 32;
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#else
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*upper = 0;
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#endif
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return addr;
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}
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static inline fdt32_t fdt_size_unpack(fdt_size_t size, fdt32_t *upper)
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{
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if (upper)
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#ifdef CONFIG_PHYS_64BIT
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*upper = size >> 32;
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#else
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*upper = 0;
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#endif
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return size;
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}
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#ifdef CONFIG_PHYS_64BIT
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#define FDT_ADDR_T_NONE (-1U)
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#define fdt_addr_to_cpu(reg) be64_to_cpu(reg)
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7
include/stdint.h
Normal file
7
include/stdint.h
Normal file
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@ -0,0 +1,7 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Dummy file to allow libraries linked with U-Boot to include stdint.h without
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* getting the system version.
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*
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* U-Boot uses linux types (linux/types.h) so does not make use of stdint.h
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*/
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@ -1300,6 +1300,7 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename,
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fdt32_t cells[4] = {}, *ptr = cells;
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uint32_t upper, lower, phandle;
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int parent, node, na, ns, err;
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fdt_size_t size;
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char name[64];
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/* create an empty /reserved-memory node if one doesn't exist */
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@ -1340,7 +1341,8 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename,
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* Unpack the start address and generate the name of the new node
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* base on the basename and the unit-address.
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*/
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lower = fdt_addr_unpack(carveout->start, &upper);
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upper = upper_32_bits(carveout->start);
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lower = lower_32_bits(carveout->start);
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if (na > 1 && upper > 0)
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snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
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@ -1374,7 +1376,9 @@ int fdtdec_add_reserved_memory(void *blob, const char *basename,
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*ptr++ = cpu_to_fdt32(lower);
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/* store one or two size cells */
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lower = fdt_size_unpack(carveout->end - carveout->start + 1, &upper);
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size = carveout->end - carveout->start + 1;
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upper = upper_32_bits(size);
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lower = lower_32_bits(size);
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if (ns > 1)
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*ptr++ = cpu_to_fdt32(upper);
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@ -155,11 +155,13 @@ static int make_fdt_carveout_device(void *fdt, uint32_t na, uint32_t ns)
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};
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fdt32_t cells[4], *ptr = cells;
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uint32_t upper, lower;
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fdt_size_t size;
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char name[32];
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int offset;
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/* store one or two address cells */
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lower = fdt_addr_unpack(carveout.start, &upper);
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upper = upper_32_bits(carveout.start);
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lower = lower_32_bits(carveout.start);
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if (na > 1 && upper > 0)
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snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
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@ -173,7 +175,9 @@ static int make_fdt_carveout_device(void *fdt, uint32_t na, uint32_t ns)
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*ptr++ = cpu_to_fdt32(lower);
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/* store one or two size cells */
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lower = fdt_size_unpack(carveout.end - carveout.start + 1, &upper);
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size = carveout.end - carveout.start + 1;
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upper = upper_32_bits(size);
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lower = lower_32_bits(size);
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if (ns > 1)
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*ptr++ = cpu_to_fdt32(upper);
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|
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@ -673,7 +673,12 @@ class Builder:
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environment = {}
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if os.path.exists(done_file):
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with open(done_file, 'r') as fd:
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return_code = int(fd.readline())
|
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try:
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||||
return_code = int(fd.readline())
|
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except ValueError:
|
||||
# The file may be empty due to running out of disk space.
|
||||
# Try a rebuild
|
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return_code = 1
|
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err_lines = []
|
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err_file = self.GetErrFile(commit_upto, target)
|
||||
if os.path.exists(err_file):
|
||||
|
|
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