Add a new Kconfig option for the command line. This is enabled by default,
but when disabled it will remove the command line.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
There are already two FIT options in Kconfig but the CONFIG options are
still in the header files. We need to do a proper move to fix this.
Move these options to Kconfig and tidy up board configuration:
CONFIG_FIT
CONFIG_OF_BOARD_SETUP
CONFIG_OF_SYSTEM_SETUP
CONFIG_FIT_SIGNATURE
CONFIG_FIT_BEST_MATCH
CONFIG_FIT_VERBOSE
CONFIG_OF_STDOUT_VIA_ALIAS
CONFIG_RSA
Unfortunately the first one is a little complicated. We need to make sure
this option is not enabled in SPL by this change. Also this option is
enabled automatically in the host builds by defining CONFIG_FIT in the
image.h file. To solve this, add a new IMAGE_USE_FIT #define which can
be used in files that are built on the host but must also build for U-Boot
and SPL.
Note: Masahiro's moveconfig.py script is amazing.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Add microblaze change, various configs/ re-applies]
Signed-off-by: Tom Rini <trini@konsulko.com>
There is currently one config option (CONFIG_NET_RETRY_COUNT) that
is available to tune the retries of the network stack.
Unfortunately, it is global to all protocols, and the value is
interpreted differently in all of them.
Add a new environment variable that directly sets the retry period for
BOOTP timeouts. If this new value is not set, the period is still derived
from the default number of retries, or from CONFIG_NET_RETRY_COUNT if
defined. When both the new variable is set and CONFIG_NET_RETRY_COUNT
is defined, the variable has precedence.
Signed-off-by: Alexandre Messier <amessier@tycoint.com>
Add trivial support for changing the U-Boot command prompt string
by setting PS1 and PS2 environment variables. Only static variables
are supported.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Add support for TPM ST33ZP24 spi.
The ST33ZP24 does have a spi interface.
The transport protocol is proprietary.
For spi we are relying only on DM_SPI.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Add support for TPM ST33ZP24 family with i2c.
For i2c we are relying only on DM_I2C.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
clang-3.8 reports that these functions are unused, remove them. As this
is the last part of CONFIG_MODEM_SUPPORT_DEBUG, drop that from README.
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Enabling this function always removes some class of string saftey issues.
The size change here in general is about 400 bytes and this seems a reasonable
trade-off.
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Peter Robinson <pbrobinson@gmail.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Adrian Alonso <aalonso@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
* There is no boards.cfg anymore, so drop (1).
* Creating flash.c and u-boot.lds seems not mandatory as well.
* Adjusting the enumerators for the above implicitly fixed for
double items numbered (3).
Signed-off-by: Phil Sutter <phil@nwl.cc>
Acked-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
First (small) pass at tidying up the README file, including:
* remove references to obsolete CREDITS file
* remove (some) references to obsolete boards.cfg file
* remove at least one reference to a "scrapped" board
* cut down unnecessarily detailed directory hierarchy
* bunch of grammar and spelling tweaks
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
MC and debug server are not board-specific. Move reserving memory to SoC
file, using the new board_reserve_ram_top function. Reduce debug server
memory by 2MB to make room for secure memory.
In the system with MC and debug server, the top of u-boot memory
is not the end of memory. PRAM is not used for this reservation.
Signed-off-by: York Sun <yorksun@freescale.com>
As the name may be confusing, the CONFIG_SYS_MEM_TOP_HIDE reserves
some memory from the end of ram, tracked by gd->ram_size. It is not
always the top of u-boot visible memory. Rewrite the macro with a
weak function to provide flexibility for complex calcuation. Legacy
use of this macro is still supported.
Signed-off-by: York Sun <yorksun@freescale.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Secure memory is at the end of memory, separated and reserved
from OS, tracked by gd->secure_ram. Secure memory can host
MMU tables, security monitor, etc. This is different from PRAM
used to reserve private memory. PRAM offers memory at the top
of u-boot memory, not necessarily the real end of memory for
systems with very large DDR. Using the end of memory simplifies
MMU setup and avoid memory fragmentation.
"bdinfo" command shows gd->secure_ram value if this memory is
marked as secured.
Signed-off-by: York Sun <yorksun@freescale.com>
LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP
personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc.
So renaming existing LS2085A code base to reflect LS2080A (Prime personality)
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: Dropped #ifdef in cpu.c for cpu_type_list]
Reviewed-by: York Sun <yorksun@freescale.com>
This macro is no longer used, so just reap it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Now that i8042 uses driver model, adjust other mentions of it and remove old
code that is no-longer used. Update the README and unify the keyboard text
into one place.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
CONFIG_CONSOLE_CURSOR, CONFIG_SYS_CONSOLE_BLINK_COUNT and
CONFIG_CONSOLE_TIME are not used by any board. The implementation is not
great and stands in the way of a refactor of i8042. Drop these for now.
They can be re-introduced quite easily later, perhaps with driver-model
real-time-clock (RTC) support.
When reintroducing, it might be useful to make a few changes:
- Blink time would be more useful than blink count
- The confusing #ifdefs should be avoided
- The time functions should support driver model
- It would be best keyed off console_tstc() or some similar idle loop
rather than a particular input driver (i8042 in this case)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Adjust the cros_ec keyboard driver to support driver model. Make this the
default for all Exynos boards so that those that use a keyboard will build
correctly with this driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Prior to commit 5ba534d247 ("arm: Switch 32-bit ARM to using generic
global_data setup") we used to have assembly code that configured the
malloc_base address.
Since this commit we use the board_init_f_mem() function in C to setup
malloc_base address.
In board_init_f_mem() there was a deliberate choice to support only
early malloc() or full malloc() in SPL, but not both.
Adapt this logic to allow both to be used, one after the other, in SPL.
This issue has been observed in a Congatec board, where we need to
retrieve the manufacturing information from the SPI NOR (the SPI API
calls malloc) prior to configuring the DRAM. In this case as malloc_base
was not configured we always see malloc to fail.
With this change we are able to use malloc in SPL prior to DRAM gets
initialized.
Also update the CONFIG_SYS_SPL_MALLOC_START entry in the README file.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
TFTP source and destination port variable names are
'tftpsrcp' and 'tftpdstp' in the code, but 'tftpsrcport'
and 'tftpdstport' in the README file. Fix the README.
Add environment variable 'tftptimeoutcountmax'. As per the
comments about the global variable tftp_timeout_count_max,
make sure tftptimeoutcountmax is nonnegative.
Introduce configuration option CONFIG_NET_TFTP_VARS,
which controls whether environment variables tftpblocksize,
tftptimeout, and tftptimoueoutcountmax are read by the TFTP
client code. CONFIG_NET_TFTP_VARS defaults to y but can be
set to n by targets with to tight size contraints.
Make bf527-ezkit set CONFIG_NET_TFTP_VARS to n to keep the
target size below limit.
sync with linux v4.2
commit 64291f7db5bd8150a74ad2036f1037e6a0428df2
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date: Sun Aug 30 11:34:09 2015 -0700
Linux 4.2
This update is needed, as it turned out, that fastmap
was in experimental/broken state in kernel v3.15, which
was the last base for U-Boot.
Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
As there is no TCG specification or recommendation for i2c TPM 1.2,
move tpm_tis_i2c driver to tpm_i2c_infineon. Other tpm vendors like Atmel
or STMicroelectronics may have a different transport protocol for i2c.
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
So far VxWorks bootline can be contructed from various environment
variables, but when these variables do not exist we get these from
corresponding config macros. This is not helpful as it requires
rebuilding U-Boot, and to make sure these config macros take effect
we should not have these environment variables. This is a little
bit complex and confusing.
Now we change the logic to always contruct the bootline from
environments (the only single source), by adding two new variables
"bootdev" and "othbootargs", and adding some comments about network
related settings mentioning they are optional. The doc about the
bootline handling is also updated.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
We run 4 Arndale boards in our automated test framework, they have
been running quite happily for quite some time using a Debian Wheezy
userspace.
However when upgrading to a Debian Jessie we started seeing frequent
segmentation faults from gcc when building the kernel, to the extent
that it is unable to successfully build the kernel twice in a row, and
often fails on the first attempt.
Searching around I found https://bugs.launchpad.net/arndale/+bug/1081417
which pointed towards http://www.spinics.net/lists/kvm-arm/msg03723.html
and CPU Errata 773022 and 774769.
This errata needs to be applied to all processors in an SMP system,
meaning that the usual strategy of applying them in
arch/arm/cpu/armv7/start.S is not appropriate (since that applies to
the boot processor only). Instead we apply these errata in the secure
monitor which is code that is traversed by all processors as they are
brought up.
The net affect on Arndale is that ACTLR changes from 0x40 to
0x2000042. I ran 17 kernel compile iterations overnight with no
segfaults.
Runtime testing was done on our v2014.10 based branch and forward
ported (with only minimal and trivial contextual conflicts) to current
master, where it has been build tested only.
I suppose in theory these errata apply to any Exynos5250 based boards,
but Arndale is the only one I have access to and I have therefore
chosen to be conservative and only apply it there.
Also, reorder CONFIG_ARM_ERRATA_794072 in README to make the list
numerically sorted.
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
The driver assumed that I2C1 and I2C2 were always enabled,
and if they were not, then an asynchronous abort was (silently)
raised, to be caught much later on in the Linux kernel.
Fix this by making I2C1 and I2C2 optional just like I2C3 and I2C4
are.
To make the change binary-invariant, declare I2C1 and I2C2 in
every include/configs/ file which defines CONFIG_SYS_I2C_MXC.
Also, while updating README about CONFIG_SYS_I2C_MXC_I2C1 and
CONFIG_SYS_I2C_MXC_I2C2, add missing descriptions for I2C4 speed
(CONFIG_SYS_MXC_I2C4_SPEED) and slave (CONFIG_SYS_MXC_I2C4_SLAVE)
config options.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
This arch does not seem to be supported / used at all in the current
U-Boot mainline source tree any more. So lets remove the core u8500 code
and code that was only referenced by this platform.
Please note that this patch also removes these config options:
- CONFIG_PL011_SERIAL_RLCR
- CONFIG_PL011_SERIAL_FLUSH_ON_INIT
As they only seem to be referenced by u8500 based boards. Without any
such board in the current code, these config option don't make sense
any more. Lets remove them as well.
If someone still wants to use this platform, then please send patches
to re-enable support by adding at least one board that references this
code.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: John Rigby <john.rigby@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The address of the I2C TPM is now defined in the device tree so there is no
need for the CONFIG options.
Remove them from the README and board config to avoid confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Add Kconfig options in preparation for moving boards to use Kconfig.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Add workaround for Cortex-A15 ARM erratum 801819 which says in summary
that "A livelock can occur in the L2 cache arbitration that might
prevent a snoop from completing. Under certain conditions this can
cause the system to deadlock. "
Recommended workaround is as follows:
Do both of the following:
1) Do not use the write-back no-allocate memory type.
2) Do not issue write-back cacheable stores at any time when the cache
is disabled (SCTLR.C=0) and the MMU is enabled (SCTLR.M=1). Because it
is implementation defined whether cacheable stores update the cache when
the cache is disabled it is not expected that any portable code will
execute cacheable stores when the cache is disabled.
For implementations of Cortex-A15 configured without the “L2 arbitration
register slice” option (typically one or two core systems), you must
also do the following:
3) Disable write-streaming in each CPU by setting ACTLR[28:25] = 0b1111
So, we provide an option to disable write streaming on OMAP5 and DRA7.
It is a rare condition to occur and may be enabled selectively based
on platform acceptance of risk.
Applies to: A15 revisions r2p0, r2p1, r2p2, r2p3 or r2p4 and REVIDR[3]
is set to 0.
Note: certain unicore SoCs *might* not have REVIDR[3] not set, but
might not meet the condition for the erratum to occur when they donot
have ACP (Accelerator Coherency Port) hooked to ACE (AXI Coherency
Extensions). Such SoCs will need the work around handled in the SoC
specific manner, since there is no ARM generic manner to detect such
configurations.
Based on ARM errata Document revision 18.0 (22 Nov 2013)
Suggested-by: Richard Woodruff <r-woodruff2@ti.com>
Suggested-by: Brad Griffis <bgriffis@ti.com>
Reviewed-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
In order to achieve reproducible builds in U-Boot, timestamps that are defined
at build-time have to be somewhat eliminated. The SOURCE_DATE_EPOCH environment
variable allows setting a fixed value for those timestamps.
Simply by setting SOURCE_DATE_EPOCH to a fixed value, a number of targets can be
built reproducibly. This is the case for e.g. sunxi devices.
However, some other devices might need some more tweaks, especially regarding
the image generation tools.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
FASTBOOT is defined both by CONFIG_USB_FUNCTION_FASTBOOT AND CONFIG_CMD_FASTBOOT, so it doesn't
make much sense to have a CONFIG_USB_FASTBOOT prefix for fastboot-specific options, especially
given that other config options for fastboot use the CONFIG_FASTBOOT prefix.
This replaces the CONFIG_USB_FASTBOOT prefix with CONFIG_FASTBOOT, for consistency.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
USB download gadget functions such as thor and dfu have a separate config option
for the USB gadget part of the code, independent from the command part.
This switches the fastboot USB gadget to the same scheme, for better
consistency.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210)
This introduces a coherent scheme for naming USB download gadget and functions
config options. The download USB gadget config option is moved to
CONFIG_USB_GADGET_DOWNLOAD for better consistency with other gadgets and each
function's config option is moved to a CONFIG_USB_FUNCTION_ prefix.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Test HW: Odroid_XU3 (Exynos5422), trats (Exynos4210)
The agreed split of the top of memory is 256M for debug server and 256M
for MC. This patch implements the split.
In addition, the MC mem must be 512MB aligned, so the amount of memory
to hide must be 512MB to achieve that alignment.
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Add MTD layer driver for spi, original patch from:
http://git.denx.de/?p=u-boot/u-boot-mips.git;a=commitdiff;h=bb246819cdc90493dd7089eaa51b9e639765cced
Changes from Heiko Schocher against this patch:
- Remove compile error if not defining CONFIG_SPI_FLASH_MTD:
LD drivers/mtd/spi/built-in.o
drivers/mtd/spi/sf_probe.o: In function `spi_flash_mtd_unregister':
/home/hs/abb/imx6/u-boot/drivers/mtd/spi/sf_internal.h:168: multiple definition of `spi_flash_mtd_unregister'
drivers/mtd/spi/sf_params.o:/home/hs/abb/imx6/u-boot/drivers/mtd/spi/sf_internal.h:168: first defined here
drivers/mtd/spi/sf_ops.o: In function `spi_flash_mtd_unregister':
/home/hs/abb/imx6/u-boot/drivers/mtd/spi/sf_internal.h:168: multiple definition of `spi_flash_mtd_unregister'
drivers/mtd/spi/sf_params.o:/home/hs/abb/imx6/u-boot/drivers/mtd/spi/sf_internal.h:168: first defined here
make[1]: *** [drivers/mtd/spi/built-in.o] Fehler 1
make: *** [drivers/mtd/spi] Fehler 2
- Add a README entry.
- Add correct writebufsize, to fit with Linux v3.14
MTD, UBI/UBIFS sync.
Note (From Jagan): For testing raw mtd parition erase/read/write operations
using cmd_sf, sf_mtd should be required to register the spi flash device to
MTD layer but the sf_mtd_info ops were not required until and unless if we
use any flash filesystem layer say for example UBI. Due to this the foot-print
got increased ~290bytes in non-UBI case here that should be acceptible.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Jagannadh Teki <jteki@openedev.com>
Reviewed-by: Jagannadh Teki <jteki@openedev.com>
This sets the default commands Kconfig to match
include/config_cmd_default.h commands in the common/Kconfig and removes
them from include/configs.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
[trini: rastaban, am43xx_evm_usbhost_boot, am43xx_evm_ethboot updates]
Signed-off-by: Tom Rini <trini@konsulko.com>
Unlike most configuration options defining this actually disables
support for a feature (parallel flash). Eventually the logic behind this
should probably be flipped so that '#ifndef CONFIG_SYS_NO_FLASH' becomes
'#ifdef CONFIG_HAS_PARALLEL_FLASH' but for now lets document the
existing behaviour.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
These defines for a 2nd autoboot stop and delay string are nearly unused. Only
sc3 defines CONFIG_AUTOBOOT_DELAY_STR2. And a patch to remove this most likely
unmaintained board is also posted to the list.
By removing these defines the code will become cleaner and moving the remaining
compile options to Kconfig will get easier.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Allow the features that use env_attrs to specify regexs for the name
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We really don't want boards defining fixed MAC addresses in their config
so we just remove the option to set it in a fixed way. If you must have
a MAC address that was not provisioned, then use the random MAC address
functionality.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Implement the random ethaddr fallback in eth.c so it is in a common
place and not reimplemented in each board or driver that wants this
behavior.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
On my A10 OlinuxIno Lime I noticed a huge (5+ seconds) delay coming from
console_init_r. This turns out to be caused by the preconsole buffer flushing
to the cfb_console. The Lime only has a 16 bit memory bus and that is already
heavy used to scan out the 1920x1080 framebuffer.
The problem is that print_pre_console_buffer() was printing the buffer once
character at a time and the cfb_console code then ends up doing a cache-flush
for touched display lines for each character.
This commit fixes this by first building a 0 terminated buffer and then
printing it in one puts() call, avoiding unnecessary cache flushes.
This changes the time for the flush from 5+ seconds to not noticable.
The downside of this approach is that the pre-console buffer needs to fit
on the stack, this is not that much to ask since we are talking about plain
text here. This commit also adjusts the sunxi CONFIG_PRE_CON_BUF_SZ to
actually fit on the stack. Sunxi currently is the only user of the pre-console
code so no other boards need to be adjusted.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The timer clock is system clock divided by 4, not fixed 12MHz.
This is common to the SoC, not board specific. Primary core is
fixed when u-boot still runs in board_f. Secondary cores are
fixed by reading a variable set by u-boot.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Mark Rutland <mark.rutland@arm.com>
Add built-in memory test to catch errors after DDR is initialized, before
any other transactions. To enable this test, define CONFIG_FSL_DDR_BIST.
An environmental variable "ddr_bist" is checked before starting test.
It takes a while (several seconds) depending on system memory size.
Signed-off-by: York Sun <yorksun@freescale.com>
Some SoCs have more than two I2C busses. Instead of adding ifdef
to the driver, macros are put into board header file where
CONFIG_SYS_I2C_MXC is defined.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Heiko Schocher <hs@denx.de>
This reverts commit 562f8df18d.
Note: Even un-reverting this patch couldn't works as expected, based
on the latest testing from Heiko Schocher.
Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Finish eliminating CamelCase from net.c and other failures
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
Sometimes, for example if the display is mounted in portrait mode or even if it
is mounted landscape but rotated by 180 degrees, we need to rotate our content
of the display respectively the framebuffer, so that user can read the messages
which are printed out.
For this we introduce the feature called "CONFIG_LCD_ROTATION", this may be
defined in the board-configuration if needed. After this the lcd_console will
be initialized with a given rotation from "vl_rot" out of "vidinfo_t" which is
provided by the board specific code.
If CONFIG_LCD_ROTATION is not defined, the console will be initialized with
0 degrees rotation.
Signed-off-by: Hannes Petermaier <hannes.petermaier@br-automation.com>
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Acked-by: Nikita Kiryanov <nikita@compulab.co.il>
[agust: fixed 'struct vidinfo' has no member named 'vl_rot' errors]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
introduce CONFIG_SPL_PANIC_ON_RAW_IMAGE.
An SPL which define this will panic() if the
image it has loaded does not have a mkimage
signature.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
The CONFIG_MTD_NAND_VERIFY_WRITE has been removed from Linux for some
time and a more generic method of NAND verification now exists in U-Boot.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>
The Driver Model description in README was removed by commit
65eb659e56 (README: remove description about driver model
configuration options), and was revived by mistake by commit
b79dadf846 when resolving the conflict.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
621766: Under a specific set of conditions, executing a sequence of
NEON or vfp load instructions can cause processor deadlock
Impacts: Every Cortex-A8 processors with revision lower than r2p1
Work around: Set L1NEON to 1
Based on ARM errata Document revision 20.0 (13 Nov 2010)
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Matt Porter <mporter@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
430973: Stale prediction on replaced inter working branch causes
Cortex-A8 to execute in the wrong ARM/Thumb state
Impacts: Every Cortex-A8 processors with revision lower than r2p1
Work around: Set IBE to 1
Based on ARM errata Document revision 20.0 (13 Nov 2010)
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Matt Porter <mporter@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
454179: Stale prediction may inhibit target address misprediction on
next predicted taken branch
Impacts: Every Cortex-A8 processors with revision lower than r2p1
Work around: Set IBE and disable branch size mispredict to 1
Also provide a hook for SoC specific handling to take place if needed.
Based on ARM errata Document revision 20.0 (13 Nov 2010)
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Matt Porter <mporter@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add workaround for Cortex-A15 ARM erratum 798870 which says
"If back-to-back speculative cache line fills (fill A and fill B) are
issued from the L1 data cache of a CPU to the L2 cache, the second
request (fill B) is then cancelled, and the second request would have
detected a hazard against a recent write or eviction (write B) to the
same cache line as fill B then the L2 logic might deadlock."
Implementations for SoC families such as Exynos, OMAP5/DRA7 etc
will be widely different.
Every SoC has slightly different manner of setting up access to L2ACLR
and similar registers since the Secure Monitor handling of Secure
Monitor Call(smc) is diverse. Hence an weak function is introduced
which may be overriden to implement SoC specific accessor implementation.
Based on ARM errata Document revision 18.0 (22 Nov 2013)
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Matt Porter <mporter@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
All the DM-related configuration options are described in Kconfig
helps. They should not be duplicated in README.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
At present SPL uses a single stack, either CONFIG_SPL_STACK or
CONFIG_SYS_INIT_SP_ADDR. Since some SPL features (such as MMC and
environment) require a lot of stack, some boards set CONFIG_SPL_STACK to
point into SDRAM. They then set up SDRAM very early, before board_init_f(),
so that the larger stack can be used.
This is an abuse of lowlevel_init(). That function should only be used for
essential start-up code which cannot be delayed. An example of a valid use is
when only part of the SPL code is visible/executable, and the SoC must be set
up so that board_init_f() can be reached. It should not be used for SDRAM
init, console init, etc.
Add a CONFIG_SPL_STACK_R option, which allows the stack to be moved to a new
address before board_init_r() is called in SPL.
The expected SPL flow (for CONFIG_SPL_FRAMEWORK) is documented in the README.
Signed-off-by: Simon Glass <sjg@chromium.org>
For version 1:
Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
When the CPU is in non-secure (NS) mode (when running U-Boot under a
secure monitor), certain actions cannot be taken, since they would need
to write to secure-only registers. One example is configuring the ARM
architectural timer's CNTFRQ register.
We could support this in one of two ways:
1) Compile twice, once for secure mode (in which case anything goes) and
once for non-secure mode (in which case certain actions are disabled).
This complicates things, since everyone needs to keep track of
different U-Boot binaries for different situations.
2) Detect NS mode at run-time, and optionally skip any impossible actions.
This has the advantage of a single U-Boot binary working in all cases.
(2) is not possible on ARM in general, since there's no architectural way
to detect secure-vs-non-secure. However, there is a Tegra-specific way to
detect this.
This patches uses that feature to detect secure vs. NS mode on Tegra, and
uses that to:
* Skip the ARM arch timer initialization.
* Set/clear an environment variable so that boot scripts can take
different action depending on which mode the CPU is in. This might be
something like:
if CPU is secure:
load secure monitor code into RAM.
boot secure monitor.
secure monitor will restart (a new copy of) U-Boot in NS mode.
else:
execute normal boot process
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Currently only normal hashing is supported using hardware acceleration.
Added support for progressive hashing using hardware.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <yorksun@freescale.com>
Add sync of refresh for multiple DDR controllers. DDRC initialization
needs to complete first. Code is re-ordered to keep refresh close.
Signed-off-by: York Sun <yorksun@freescale.com>
A SoC like the i.MX6 supports more then one i2c bus. In oder to be
able to use the eeprom command add a new define to specify the
i2c bus to use. If CONFIG_SYS_I2C_EEPROM_BUS is not defined there
is no functional change, else a call to i2c_set_bus_num(..) is
done before calling i2c_read(..) and i2c_write(..).
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Modify rsa_verify to use the rsa driver of DM library .The tools
will continue to use the same RSA sw library.
CONFIG_RSA is now dependent on CONFIG_DM. All configurations which
enable FIT based signatures have been modified to enable CONFIG_DM
by default.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
CC: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Some image types, like "KeyStone GP", do not have magic numbers to
distinguish them from other image types. Thus, the automatic image
type discovery does not work correctly.
This patch also fix some integer type mismatches.
Signed-off-by: Guilherme Maciel Ferreira <guilherme.maciel.ferreira@gmail.com>
All the 74xx_7xx boards are still non-generic boards:
P3G4, ZUMA, ppmc7xx, ELPPC, mpc7448hpc2
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: York Sun <yorksun@freescale.com>
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Nye Liu <nyet@zumanetworks.com>
Cc: Roy Zang <tie-fei.zang@freescale.com>
Fix various spelling and grammatical errors in the README.
Signed-off-by: Jeremiah Mahler <jmmahler@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
All the MPC824X boards are still non-generic boards:
A3000, CPC45, CU824, eXalion, MVBLUE, MUSENKI, Sandpoint824x, utx8245
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Josef Wagner <Wagner@Microsys.de>
Cc: Torsten Demke <torsten.demke@fci.com>
Cc: Jim Thompson <jim@musenki.com>
Cc: Greg Allen <gallen@arlut.utexas.edu>
Implement an API that can be used by drivers to allocate memory from a
pool that is mapped uncached. This is useful if drivers would otherwise
need to do extensive cache maintenance (or explicitly maintaining the
cache isn't safe).
The API is protected using the new CONFIG_SYS_NONCACHED_MEMORY setting.
Boards can set this to the size to be used for the non-cached area. The
area will typically be right below the malloc() area, but architectures
should take care of aligning the beginning and end of the area to honor
any mapping restrictions. Architectures must also ensure that mappings
established for this area do not overlap with the malloc() area (which
should remain cached for improved performance).
While the API is currently only implemented for ARM v7, it should be
generic enough to allow other architectures to implement it as well.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Implement a feature to allow fastboot to write the downloaded image
to the space reserved for the Protective MBR and the Primary GUID
Partition Table.
Additionally, prepare and write the Backup GUID Partition Table.
Signed-off-by: Steve Rae <srae@broadcom.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
[Test HW: Exynos4412 - Trats2]
Raw images of U-Boot can be stored inside MMC partitions, so it makes sense to
read the partition table, looking for a partition number instead of using
a fixed sector address.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@ti.com>
[trini: Only add mmc_load_image_raw_partition() when
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION to avoid warning, add missing
conversion in spl_mmc_load_image()]
Signed-off-by: Tom Rini <trini@ti.com>
When device is configured to load RCW from NAND flash IFC_A[16:31] are driven
low after RCW loading. Hence Devices connected on IFC_CS[1:7] and using
IFC_A[16:31] lines are not accessible.
Workaround is already in-place.
Put the errata number to adhere errata handling framework.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION ought to be called
CONFIG_SYS_MMCSD_FS_BOOT_PARTITION to keep it consistent with other config
options such as: CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR.
In addition, it is not related to raw mode booting but to fs mode instead.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-by: Tom Rini <trini@ti.com>
The README file states that the macros beginning with "CONFIG_SYS_"
depend on the hardware etc. and should not be meddled with if you do
not what you're doing.
We have already screwed up with this policy; we have given the prefix
"CONFIG_SYS_" to many user-selectable configurations.
Here, "CONFIG_SYS_HUSH_PARSER" is one of them. Users can enable it
if they want to use a more powerful command line parser, or disable it
if they only need a simple one.
This commit attempts to rename CONFIG_SYS_HUSH_PARSER to
CONFIG_HUSH_PARSER and move it to Kconfig.
Every board maintainer is expected to enable CONFIG_HUSH_PARSER
(= add "CONFIG_HUSH_PARSER=y" to his defconfig file) and remove
"#define CONFIG_SYS_HUSH_PARSER" from his header file.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Some filesystems have a UUID stored in its superblock. To
allow using root=UUID=... for the kernel command line we
need a way to read-out the filesystem UUID.
changes rfc -> v1:
- make the environment variable an option parameter. If not
given, the UUID is printed out. If given, it is stored in the env
variable.
- corrected typos
- return error codes
changes v1 -> v2:
- fix return code of do_fs_uuid(..)
- document do_fs_uuid(..)
- implement fs_uuid_unsuported(..) be more consistent with the
way other optional functionality works
changes v2 -> v3:
- change ext4fs_uuid(..) to make use of #if .. #else .. #endif
construct to get rid of unreachable code
Hit any key to stop autoboot: 0
=> fsuuid
fsuuid - Look up a filesystem UUID
Usage:
fsuuid <interface> <dev>:<part>
- print filesystem UUID
fsuuid <interface> <dev>:<part> <varname>
- set environment variable to filesystem UUID
=> fsuuid mmc 0:1
d9f9fc05-45ae-4a36-a616-fccce0e4f887
=> fsuuid mmc 0:2
eb3db83c-7b28-499f-95ce-9e0bb21cda81
=> fsuuid mmc 0:1 uuid1
=> fsuuid mmc 0:2 uuid2
=> printenv uuid1
uuid1=d9f9fc05-45ae-4a36-a616-fccce0e4f887
=> printenv uuid2
uuid2=eb3db83c-7b28-499f-95ce-9e0bb21cda81
=>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Add an additional function for adding information to the device tree before
booting. This permits additions which are not board-specific.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Tom Rini <trini@ti.com>
enable to boot only a raw u-boot.bin image from nand with the
CONFIG_SPL_NAND_RAW_ONLY define. This option saves space on
boards where spl space is low.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Update documentation according to the EXT SPL support patch set.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Tom Rini <trini@ti.com>
There's a definition in stdint.h (provided by gcc) which will be more correct
if available.
Define CONFIG_USE_STDINT to use this feature, or USE_STDINT=1 on the 'make'
commmand.
This adjusts the settings for x86 and sandbox, with both have 64-bit options.
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Reviewed-by: Bill Richardson <wfrichar@google.com>
Rewritten to be an option, since stdint.h is often available only in glibc.
Changed to preserve a clear boundary between stdint and non-stdint
Signed-off-by: Simon Glass <sjg@chromium.org>
CONFIG_SYS_HZ is always defined as 1000 in config_fallbacks.h
(but some boards still have redundant definitions).
This commit moves the definition and the document in README to
Kconfig. Since lib/Kconfig can assure that CONFIG_SYS_HZ is 1000,
the sanity check in lib/time.c should be removed.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add target to build it automatically upon "make" / MAKEALL. This can/should
be set by board / cpu specific headers if a special U-Boot image is
required for this SoC / board.
E.g. used by Marvell Armada XP to automatically build the u-boot.kwb
target.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
This is the USB host controller used on the Altera SoCFPGA and Raspbery Pi.
This code has three checkpatch warnings, but to make sure it stays at least
readable and clear, these are not fixed. These bugs are in the USB request
handling combinatorial logic, so any abstracting of those is out of question.
Tested on DENX MCV (Altera SoCFPGA 5CSFXC6C6U23C8N) and RPi B+ (BCM2835).
Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Cc: Vince Bridgers <vbridger@altera.com>
Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com>
SEC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of SEC IP.
So update acessor functions with common SEC acessor functions to take care
both type of endianness.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
U-boot has been initializing DDR for the main memory. The presumption
is the memory stays as a big continuous block, either linear or
interleaved. This change is to support putting some DDR controllers
to separated space without counting into main memory. The standalone
memory controller could use different number of DIMM slots.
Signed-off-by: York Sun <yorksun@freescale.com>
- implement 'fastboot flash' for eMMC devices
Signed-off-by: Steve Rae <srae@broadcom.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Reviewed-by: Marek Vasut <marex@denx.de>
- Use _defconfig instead of _config, but still _config is working.
- Corrected README.sandbox path in ./README
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
The default format for arm64 Linux kernels is the "Image" format,
described in Documentation/arm64/booting.txt. This, along with an
optional gzip compression on top is all that is generated by default.
The Image format has a magic number within the header for verification,
a text_offset where the Image must be run from, an image_size that
includes the BSS and reserved fields.
This does not support automatic detection of a gzip compressed image.
Signed-off-by: Tom Rini <trini@ti.com>
resync ubi subsystem with linux:
commit 455c6fdbd219161bd09b1165f11699d6d73de11c
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date: Sun Mar 30 20:40:15 2014 -0700
Linux 3.14
A nice side effect of this, is we introduce UBI Fastmap support
to U-Boot.
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Sergey Lapin <slapin@ossfans.org>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Joerg Krause <jkrause@posteo.de>
It's not unusual for DHCP servers to take a couple hundred milliseconds
to respond to DHCP discover messages. One possible reason for the delay
can be that the server checks (typically using an ARP request) that the
IP it's about to hand out isn't in use yet. To make matters worse, some
servers may also queue up requests and process them sequentially, which
can cause excessively long delays if clients retry too fast.
Commit f59be6e850 ("net: BOOTP retry timeout improvements") shortened
the retry timeouts significantly, but the BOOTP/DHCP implementation in
U-Boot doesn't handle that well because it will ignore incoming replies
to earlier requests. In one particular setup this increases the time it
takes to obtain a DHCP lease from 630 ms to 8313 ms.
This commit attempts to fix this in two ways. First it increases the
initial retry timeout from 10 ms to 250 ms to give DHCP servers some
more time to respond. At the same time a cache of outstanding DHCP
request IDs is kept so that the implementation will know to continue
transactions even after a retransmission of the DISCOVER message. The
maximum retry timeout is also increased from 1 second to 2 seconds. An
ID cache of size 4 will keep DHCP requests around for 8 seconds (once
the maximum retry timeout has been reached) before dropping them. This
should give servers plenty of time to respond. If it ever turns out
that this isn't enough, the size of the cache can easily be increased.
With this commit the DHCP lease on the above-mentioned setup still takes
longer (1230 ms) than originally, but that's an acceptable compromise to
improve DHCP lease acquisition time for a broader range of setups.
To make it easier to benchmark DHCP in the future, this commit also adds
the time it took to obtain a lease to the final "DHCP client bound to
address x.x.x.x" message.
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
CONFIG_BOARD_SIZE_LIMIT was introduced by f3a14d37 [Makefile: allow
boards to check file size limits] and is in use by several boards, but
never got documented.
Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de>
if status register do never set MXC_CSPICTRL_TC, spi_xchg_single
endless loops. Add a timeout here to prevent endless hang.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Dirk Behme <dirk.behme@gmail.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Set up and zero global data before board_init_f() is called so that we can
remove the need for CONFIG_SYS_GENERIC_GLOBAL_DATA.
Signed-off-by: Simon Glass <sjg@chromium.org>
If we are to have driver model before relocation we need to support some
way of calling memory allocation routines.
The standard malloc() is pretty complicated:
1. It uses some BSS memory for its state, and BSS is not available before
relocation
2. It supports algorithms for reducing memory fragmentation and improving
performace of free(). Before relocation we could happily just not support
free().
3. It includes about 4KB of code (Thumb 2) and 1KB of data. However since
this has been loaded anyway this is not really a problem.
The simplest way to support pre-relocation malloc() is to reserve an area
of memory and allocate it in increasing blocks as needed. This
implementation does this.
To enable it, you need to define the size of the malloc() pool as described
in the README. It will be located above the pre-relocation stack on
supported architectures.
Note that this implementation is only useful on machines which have some
memory available before dram_init() is called - this includes those that
do no DRAM init (like tegra) and those that do it in SPL (quite a few
boards). Enabling driver model preior to relocation for the rest of the
boards is left for a later exercise.
Signed-off-by: Simon Glass <sjg@chromium.org>
enable the W#/Vpp signal to disable writing to the status
register on ST MICRON flashes like the N25Q128 thorugh
the new config option CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
add basic support for the pwm modul found on imx6.
Pieces of this code are based on linux code from drivers/pwm/pwm-imx.c
Commit "cd3de83f1476 Linux 3.16-rc4"
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
IHS I2C master support was merely a hack in the osd driver.
Now it is a proper u-boot I2C framework driver, supporting the
v2.00 master features.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
The option can be used to save the environment in spi flash.
Implementation code is already exist in command/env_sf.c. But
the documentation is missing.
This patch add the details for this option to the README file.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
In README file, add document for the missing configuration option:
CONFIG_ENV_IS_IN_FAT.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Adding support to load and start the Layerscape Management Complex (MC)
firmware. First, the MC GCR register is set to 0 to reset all cores. MC
firmware and DPL images are copied from their location in NOR flash to
DDR. MC registers are updated with the location of these images.
Deasserting the reset bit of MC GCR register releases core 0 to run.
Core 1 will be released by MC firmware. Stop bits are not touched for
this step. U-boot waits for MC until it boots up. In case of a failure,
device tree is updated accordingly. The MC firmware image uses FIT format.
Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com>
Signed-off-by: Shruti Kanetkar <Shruti@Freescale.com>
When debugging drivers it is useful to see what I/O accesses were done
and in what order.
Even if the individual accesses are of little interest it can be useful to
verify that the access pattern is consistent each time an operation is
performed. In this case a checksum can be used to characterise the operation
of a driver. The checksum can be compared across different runs of the
operation to verify that the driver is working properly.
In particular, when performing major refactoring of the driver, where the
access pattern should not change, the checksum provides assurance that the
refactoring work has not broken the driver.
Add an I/O tracing feature and associated commands to provide this facility.
It works by sneaking into the io.h heder for an architecture and redirecting
I/O accesses through its tracing mechanism.
For now no commands are provided to examine the trace buffer. The format is
fairly simple, so 'md' is a reasonable substitute.
Note: The checksum feature is only useful for I/O regions where the contents
do not change outside of software control. Where this is not suitable you can
fall back to manually comparing the addresses. It might be useful to enhance
tracing to only checksum the accesses and not the data read/written.
Signed-off-by: Simon Glass <sjg@chromium.org>
make the use of legacy image format configurable through
the config define CONFIG_IMAGE_FORMAT_LEGACY.
When relying on signed FIT images with required signature check
the legacy image format should be disabled. Therefore introduce
this new define and enable legacy image format if CONFIG_FIT_SIGNATURE
is not set. If CONFIG_FIT_SIGNATURE is set disable per default
the legacy image format.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Lars Steubesand <lars.steubesand@philips.com>
Cc: Mike Pearce <mike@kaew.be>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Michal Simek <monstr@monstr.eu>
Acked-by: Simon Glass <sjg@chromium.org>
Define the MAX_CLUSTSIZE to default of 65536 only if
CONFIG_FS_FAT_MAX_CLUSTSIZE is not defined.
This option has been provided to save memory in some
memory constrained cases.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Acked-by: Michal Simek <monstr@monstr.eu>
Now that we wait the correct specification-mandated time at the end of
usb_hub_power_on(), I suspect that CONFIG_USB_HUB_MIN_POWER_ON_DELAY has
no purpose.
For cm_t35.h, we already wait longer than the original MIN_POWER_ON_DELAY,
so this change is safe.
For gw_ventana.h, we will wait as long as the original MIN_POWER_ON_DELAY
iff pgood_delay was at least 200ms. I'm not sure if this is the case or
not, hence I've CC'd relevant people to test this change.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This board has been orphan for a while.
(Emails to its maintainer have been bouncing.)
Because MPC82xx family is old enough, nobody would pick up
the maintainership on it.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denx <wd@denx.de>
This sub-command adds support for the RPMB partition of an eMMC:
* mmc rpmb key <address of the authentication key>
Programs the authentication key in the eMMC This key can not
be overwritten.
* mmc rpmb read <address> <block> <#count> [address of key]
Reads <#count> blocks of 256 bytes in the RPMB partition
beginning at block number <block>. If the optionnal
address of the authentication key is provided, the
Message Authentication Code (MAC) is verified on each
block.
* mmc rpmb write <address> <block> <#count> <address of key>
Writes <#count> blocks of 256 bytes in the RPMB partition
beginning at block number <block>. The datas are signed
with the key provided.
* mmc rpmb counter
Returns the 'Write counter' of the RPMB partition.
The sub-command is conditional on compilation flag CONFIG_SUPPORT_EMMC_RPMB
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
CC: Wolfgang Denk <wd@denx.de>
Added support to load partial bitstreams.
The partial bitstreams can be loaded using the below commands
Commands:
fpga loadp <dev> <addr> <size>
fpga loadbp <dev> <addr> <size>
The full bit streams can be loaded using the
old commands(fpga load and fpga loadb).
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Guard the LOADMK functionality with config to provide
an option to enable or disable it.
Enable it for all platforms in mainline which enable CONFIG_CMD_FPGA.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Some platforms (tested on mpc85xx, mpc86xx) use global data before calling
function baord_inti_f(). The data should not be cleared later. Any arch
which uses global data in generic board board_init_f() should define
CONFIG_SYS_GENERIC_GLOBAL_DATA.
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Scott Wood <scottwood@freescale.com>
CC: Simon Glass <sjg@chromium.org>
CC: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Simon Glass <sjg@chromium.org>
keystone serial hw support hw flow control. This patch
enables hw flow control for keystone EVMs as an optional
feature based on CONFIG_SERIAL_HW_FLOW_CONTROL.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Now that sandbox has a good base of features, the README is quite out of
date. Update it, and document the new features.
Signed-off-by: Simon Glass <sjg@chromium.org>
This patch contains an implementation of the fastboot protocol on the
device side and documentation. This is based on USB download gadget
infrastructure. The fastboot function implements the getvar, reboot,
download and reboot commands. What is missing is the flash handling i.e.
writting the image to media.
v3 (Rob Herring):
This is based on http://patchwork.ozlabs.org/patch/126798/ with the
following changes:
- Rebase to current mainline and updates for current gadget API
- Use SPDX identifiers for licenses
- Traced the history and added missing copyright to cmd_fastboot.c
- Use load_addr/load_size for transfer buffer
- Allow vendor strings to be optional
- Set vendor/product ID from config defines
- Allow Ctrl-C to exit fastboot mode
v4:
- Major re-write to use the USB download gadget. Consolidated function
code to a single file.
- Moved globals into single struct.
- Use puts and putc as appropriate.
- Added CONFIG_USB_FASTBOOT_BUF_ADDR and CONFIG_USB_FASTBOOT_BUF_SIZE to
set the fastboot transfer buffer.
v5:
- Add CONFIG option documentation to README
- Rebase using new downloader registration
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Rob Herring <robh@kernel.org>
Former usb_cable_connected() patch broke compilation of boards which do
not support this feature.
I've renamed usb_cable_connected() to g_dnl_usb_cable_connected() and added
its default implementation to gadget downloader driver code. There's
only one driver of this kind and it's unlikely there'll be another, so
there's no point in keeping it in /common.
Previously this function was declared in usb.h. I've moved it, since
it's more appropriate to keep it in g_dnl.h - usb.h seems to be intended
for USB host implementation.
Existing code, confronted with default -EOPNOTSUPP return value,
continues as if the cable was connected.
CONFIG_USB_CABLE_CHECK was removed.
Change-Id: Ib9198621adee2811b391c64512f14646cefd0369
Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Objective of this target to have concatenate binary having
- SPL binary in PBL command format
- U-boot binary
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Current SPL code base has BSS section placed after reset_vector. This means
they have to relocate to use the global variables. This put an implicit
requirement of having SPL size = Memory/2.
To avoid relocation:
- Move bss_section within SPL range
- Modify relocate_code()
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
When T104x soc wakes up from deep sleep, control is passed to the
primary core that starts executing uboot. After re-initialized some
IP blocks, like DDRC, kernel will take responsibility to continue
to restore environment it leaves before.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
CONFIG_SYS_QE_FMAN_FW_ADDR is used to both Fman and QE for microcode address.
Now using CONFIG_SYS_FMAN_FW_ADDR for Fman microcode address,
and CONFIG_SYS_QE_FW_ADDR for QE microcode address.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Changes:
1. L2 cache is being invalidated by Boot ROM code for e6500 core.
So removing the invalidation from start.S
2. Clear the LAW and corresponding configuration for CPC. Boot ROM
code uses it as hosekeeping area.
3. For Secure boot, CPC is configured as SRAM and used as house
keeping area. This configuration is to be disabled once in uboot.
Earlier this disabling of CPC as SRAM was happening in cpu_init_r.
As a result cache invalidation function was getting skipped in
case CPC is configured as SRAM.This was causing random crashes.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Commit 54e458de deleted qi_lb60 board support
because of the incompatible license issue.
There is no board with XBurst CPU.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch introduces a configurable mechanism to disable
subpage writes in the DaVinci NAND driver.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Tom Rini <trini@ti.com>
This mainly converts the am335x_spl_bch driver to the "normal" format
which means a slight change to nand_info within the driver.
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Tom Rini <trini@ti.com>
Full cache line writes to the same memory region from at least two
processors might deadlock the processor. Exists on r1, r2, r3
revisions.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
A short loop including a DMB instruction might cause a denial of
service on another processor which executes a CP15 broadcast operation.
Exists on r1, r2, r3, r4 revisions.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Those commands basis on implementation of random UUID generator version 4
which is described in RFC4122. The same algorithm is used for generation
both ids but string representation is different as below.
char: 0 9 14 19 24 36
xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx
UUID: be be be be be
GUID: le le le be be
Commands usage:
- uuid [<varname>]
- guid [<varname>]
The result is saved in environment as a "varname" variable if argument is given,
if not then it is printed.
New config:
- CONFIG_CMD_UUID
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: trini@ti.com
on nand flash using ubi, after the download of the new image into
the flash, the "rest" of the nand sectors get erased while flushing
the medium. With current u-boot version dfu-util may show:
Starting download: [##################################################] finished!
state(7) = dfuMANIFEST, status(0) = No error condition is present
unable to read DFU status
as get_status is not answered while erasing sectors, if erasing
needs some time.
So do the following changes to prevent this:
- introduce dfuManifest state
According to dfu specification
( http://www.usb.org/developers/devclass_docs/usbdfu10.pdf ) section 7:
"the device enters the dfuMANIFEST-SYNC state and awaits the solicitation
of the status report by the host. Upon receipt of the anticipated
DFU_GETSTATUS, the device enters the dfuMANIFEST state, where it
completes its reprogramming operations."
- when stepping into dfuManifest state, sending a PollTimeout
DFU_MANIFEST_POLL_TIMEOUT in ms, to the host, so the host
(dfu-util) waits the PollTimeout before sending a get_status again.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Add simple 'aes' command, which allows using the AES-128-CBC encryption
and decryption functions from U-Boot command line.
Signed-off-by: Marek Vasut <marex@denx.de>
Add 64-bit data for memory commands, such as md, mw, mm, cmp. The new
size ".q " is introduced.
For 64-bit architecture, 64-bit data is enabled by default, by detecting
compiler __LP64__. It is optional for other architectures.
Signed-off-by: York Sun <yorksun@freescale.com>
When we tell the compiler to optimize for ARMv7 (and ARMv6 for that
matter) it assumes a default of SCTRL.A being cleared and unaligned
accesses being allowed and fast at the hardware level. We set this bit
and must pass along -mno-unaligned-access so that the compiler will
still breakdown accesses and not trigger a data abort.
To better help understand the requirements of the project with respect
to unaligned memory access, the
Documentation/unaligned-memory-access.txt file has been added as
doc/README.unaligned-memory-access.txt and is taken from the v3.14-rc1
tag of the kernel.
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Mans Rullgard <mans@mansr.com>
Signed-off-by: Tom Rini <trini@ti.com>
Remove the last uses of symbol offsets in ARM U-Boot.
Remove some needless uses of _TEXT_BASE.
Remove all _TEXT_BASE definitions.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Freescale LayerScape SoCs support controller interleaving on 256 byte size.
This interleaving is mandoratory.
Signed-off-by: York Sun <yorksun@freescale.com>
DDR base address has been the same from the view of core and DDR
controllers. This has changed for Freescale ARM-based SoCs. Controllers
setup DDR memory in a contiguous space and cores view it at separated
locations.
Signed-off-by: York Sun <yorksun@freescale.com>
Initially it was believed the DDR controller on Freescale ARM would have
big endian. But some platform will have little endian.
Signed-off-by: York Sun <yorksun@freescale.com>
Conflicts:
Makefile
drivers/net/npe/Makefile
These two conflicts arise from commit 0b2d3f20
("ARM: NET: Remove the IXP NPE ethernet driver") and are
resolved by deleting the drivers/net/npe/Makefile file
and removing the CONFIG_IXP4XX_NPE line from Makefile.
This enables generic filesystem commands such as load and ls, which
automatically work with multiple filesystem types, without having to
be told which is present, unlike e.g. ext2load, fatls.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The architecture is unmaintained and dead, remove it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michael Schwingen <michael@schwingen.org>
Cc: Tom Rini <trini@ti.com>
Command provides just dump subcommand for showing clock
frequencies in a soc.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stefano Babic <sbabic@denx.de>
IFC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of IFC IP.
So update acessor functions with common IFC acessor functions to take care
both type of endianness.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Rename CONFIG_PBLRCW_CONFIG and CONFIG_PBLRCW_CONFIG.
Also add their details in README.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
This config will use for defining greater than single flash support.
currently - DUAL_STACKED and DUAL_PARALLEL.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Single-source clocking is new feature introduced in T1040.
In this mode, a single differential clock is supplied to the
DIFF_SYSCLK_P/N inputs to the processor, which in turn is
used to supply clocks to the sysclock, ddrclock and usbclock.
So, both ddrclock and syclock are driven by same differential
sysclock in single-source clocking mode whereas in normal clocking
mode, generally separate DDRCLK and SYSCLK pins provides
reference clock for sysclock and ddrclock
DDR_REFCLK_SEL rcw bit is used to determine DDR clock source
-If DDR_REFCLK_SEL rcw bit is 0, then DDR PLLs are driven in
normal clocking mode by DDR_Reference clock
-If DDR_REFCLK_SEL rcw bit is 1, then DDR PLLs are driven in
single source clocking mode by DIFF_SYSCLK
Add code to determine ddrclock based on DDR_REFCLK_SEL rcw bit.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
CONFIG_SPL_NAND_MINIMAL should not be used as it was defined for temporary
review purpose.
So, use CONFIG_SPL_NAND_BOOT config.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Given a multi-file image created through the mkimage's -d option:
$ mkimage -A x86 -O linux -T multi -n x86 -d vmlinuz:initrd.img:System.map \
multi.img
Image Name: x86
Created: Thu Jul 25 10:29:13 2013
Image Type: Intel x86 Linux Multi-File Image (gzip compressed)
Data Size: 13722956 Bytes = 13401.32 kB = 13.09 MB
Load Address: 00000000
Entry Point: 00000000
Contents:
Image 0: 4040128 Bytes = 3945.44 kB = 3.85 MB
Image 1: 7991719 Bytes = 7804.41 kB = 7.62 MB
Image 2: 1691092 Bytes = 1651.46 kB = 1.61 MB
It is possible to perform the innverse operation -- extracting any file from
the image -- by using the dumpimage's -i option:
$ dumpimage -i multi.img -p 2 System.map
Although it's feasible to retrieve "data files" from image through scripting,
the requirement to embed tools such 'dd', 'awk' and 'sed' for this sole purpose
is cumbersome and unreliable -- once you must keep track of file sizes inside
the image. Furthermore, extracting data files using "dumpimage" tool is faster
than through scripting.
Signed-off-by: Guilherme Maciel Ferreira <guilherme.maciel.ferreira@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
This patch adds the U_BOOT_I2C_ADAP_COMPLETE defines for channels
on Exynos5420 and Exynos5250 and also adds support for init function
for hsi2c channels
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.
Signed-off-by: York Sun <yorksun@freescale.com>
Some GPIO connected LEDs have inverted polarity.
Introduce new config option: CONFIG_GPIO_LED_INVERTED_TABLE for the
specifying the inverted GPIO LEDs list and add support for this in the
gpio_led driver.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Ilya Ledvich <ilya@compulab.co.il>
The CONFIG_GPIO_LED symbol does not have any documentation in the README
file. Document the CONFIG_GPIO_LED symbol.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
- add zync i2c driver to new multibus/multiadpater support
- adapted all config files, which uses this driver
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Michal Simek <michal.simek@xilinx.com>
- add omap24xx driver to new multibus/multiadpater support
- adapted all config files, which uses this driver
Tested on the am335x based siemens boards rut, dxr2 and pxm2
posted here:
http://patchwork.ozlabs.org/patch/263211/
Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Tom Rini <trini@ti.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Steve Sakoman <sakoman@gmail.com>
Cc: Thomas Weber <weber@corscience.de>
Cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Grazvydas Ignotas <notasas@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Ilya Yanok <yanok@emcraft.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Nishanth Menon <nm@ti.com>
Cc: Pali Rohár <pali.rohar@gmail.com>
Cc: Peter Barada <peter.barada@logicpd.com>
Cc: Nagendra T S <nagendra@mistralsolutions.com>
Cc: Michael Jones <michael.jones@matrix-vision.de>
Cc: Raphael Assenat <raph@8d.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Stefano Babic <sbabic@denx.de>
This updates to new I2C framwwork on sh_i2c.
And this also updates boards(kzm9g and ecovec) that using sh_i2c.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
As
http://www.denx.de/wiki/view/U-Boot/DesignPrinciples#2_Keep_it_Fast
states:
"Initialize devices only when they are needed within U-Boot"
enable the RTC32K OSC only, if CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is
enabled. Enable this in ti_am335x_common.h, so all boards in mainline
should work as before.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
If no softreset save registers are found on the hardware
"bootcount" is stored in the environment. To prevent a
saveenv on all reboots, the environment variable
"upgrade_available" is introduced. If "upgrade_available" is
0, "bootcount" is always 0 therefore no need to save the
environment on u-boot boot, if "upgrade_available" is 1 "bootcount"
is incremented in the environment and environment gets written
on u-boot start.
So the Userspace Applikation must set the "upgrade_available"
and "bootcount" variable to 0 (for example with fw_setenv),
if a boot was successfully.
Signed-off-by: Heiko Schocher <hs@denx.de>
This patch allows exiting from UMS mode to u-boot prompt
by detaching usb cable or by pressing ctrl+c.
Add new config: CONFIG_USB_CABLE_CHECK. If defined then board
file should provide function: usb_cable_connected() (include/usb.h)
that return 1 if cable is connected and 0 otherwise.
Changes v2:
- add a note to the README
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Marek Vasut <marex@denx.de>
There is no CONFIG_PCA953X_INFO symbol.
U-Boot uses CONFIG_CMD_PCA953X_INFO instead, which is described in
"Monitor Functions" section and thus no need to be repeated in the
"GPIO Support" section.
Remove the whole line.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
env exists is a way to test (in hush) if an environment variable
exists. A workaround existed using printenv but this new command
doesn't require all the stdout/stderr redirection to prevent
printing information to the screen.
Example:
$ set testexists 1
$ env exists testexists && echo "yes"
yes
$ env exists testexists || echo "no"
$ set testexists
$ env exists testexists && echo "yes"
$ env exists testexists || echo "no"
no
$
Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
make CONSOLE_BG_COL/CONSOLE_FG_COL configurable through board config file.
Clear video screen in video_init().
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
omap1510inn is orphan and has been for years now.
Reove it and, as it was the only arm925t target,
also remove arm925t support.
Update doc/README.scrapyard accordingly.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
DFU spec mentions it as a method to upgrade firmware (software stored
in writable non-volatile memory). It also says other potential uses of
DFU is beyond scope of the spec.
Here such a beyond the scope use is being attempted - directly pumping
binary images from host via USB to RAM. This facility is a developer
centric one in that it gives advantage over upgrading non-volatile
memory for testing new images every time during development and/or
testing.
Directly putting image onto RAM would speed up upgrade process. This and
convenience was the initial thoughts that led to doing this, speed
improvement over MMC was only 1 second though - 6 sec on RAM as opposed
to 7 sec on MMC in beagle bone, perhaps enabling cache and/or optimizing
DFU framework to avoid multiple copy for ram (if worth) may help, and
on other platforms and other boot media like NAND maybe improvement
would be higher.
And for a platform that doesn't yet have proper DFU suppport for
non-volatile media's, DFU to RAM can be used.
Another minor advantage would be to increase life of mmc/nand as it
would be less used during development/testing.
usage: <image name> ram <start address> <size>
eg. kernel ram 0x81000000 0x1000000
Downloading images to RAM using DFU is not something new, this is
acheived in openmoko also.
DFU on RAM can be used for extracting RAM contents to host using dfu
upload. Perhaps this can be extended to io for squeezing out register
dump through usb, if it is worth.
Signed-off-by: Afzal Mohammed <afzal.mohd.ma@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Gerhard Sittig <gsi@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Heiko Schocher <hs@denx.de>
Besides the change of this patchset it also updates the
README to reflect that GOT-generated relocations are no
longer supported on ARM.
cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Fix various misspellings of things like "environment", "kernel",
"default" and "volatile", and throw in a couple grammar fixes.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Because commit 5dc5f36 removed B2 board support,
arch/arm/cpu/s3c44b0/* and arch/arm/include/asm/arch-s3c44b0/*
are not necessary anymore.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Andrea Scian <andrea.scian@dave-tech.it>
Put all informations about targets, including state (active or
orphan) and maintainers, in boards.cfg; remove MAINTAINERS;
adjust the build system accordingly.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
This adds the missing compression config items to the README.
Signed-off-by: Kees Cook <keescook@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Due to the nand SPL on some board(e.g. P1022DS)has a size limit, it can
not be more than 4K. So, the SPL cannot initialize the DDR with the SPD
code. This patch introduces TPL to enable a loader stub that is loaded
by the code from the SPL. It initializes the DDR with the SPD or other
operations.
The TPL's size is sizeable, the maximum size is decided by the memory's
size that TPL runs. It initializes the DDR through SPD code, and copys
final uboot image to DDR. So there are three stage uboot images:
* spl_boot, * tpl_boot, * final uboot image
Signed-off-by: Ying Zhang <b40530@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
The code from the internal on-chip ROM. It loads the final uboot image
into DDR, then jump to it to begin execution.
The SPL's size is sizeable, the maximum size must not exceed the size of L2
SRAM. It initializes the DDR through SPD code, and copys final uboot image
to DDR. So there are two stage uboot images:
* spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that
ddr spd code can get the interleaving mode setting in env. It loads
final uboot image from offset 96KB.
* final uboot image, size is variable depends on the functions enabled.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Fixup an easy conflict over adding the clk_get prototype and USB_OTG
defines for am33xx having moved.
Conflicts:
arch/arm/include/asm/arch-am33xx/hardware.h
Signed-off-by: Tom Rini <trini@ti.com>
At present the console for linux is silent if the U-Boot console is silent,
unless CONFIG_SILENT_U_BOOT_ONLY is set. I wonder if a better way would be
to have an environment variable to control this? Then we can control the
verbosity from scripts, and set the variable to 'no' for those boards that
want Linux to boot with console output.
Signed-off-by: Simon Glass <sjg@chromium.org>
BSC9132QDS is a Freescale Reference Design Board for BSC9132 SoC which is a
integrated device that contains two powerpc e500v2 cores and two DSP
starcores.
To support DSP starcore
-Creating LAW and TLB for DSP-CCSR space.
-Creating LAW for DSP-core subsystem M2 and M3 memory
-Creating LAW for 1GB DDR which is connected exclusively to DSP-cores
Signed-off-by: Manish Jaggi <manish.jaggi@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Prepare for emulator support for mpc85xx parts.
Disable DDR training and skip wrlvl_cntl_2 and wrlvl_cntl_3 registers.
These two registers improve stability but not supported by emulator.
Add CONFIG_FSL_TBCLK_EXTRA_DIV for possible adjustment to time base.
Signed-off-by: York Sun <yorksun@freescale.com>
CONFIG_CMD_HDMIDETECT
CONFIG_CMD_BMODE
Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
The sandburst-specific i2c drivers have been deleted, conflict was just
over the SPDX conversion.
Conflicts:
board/sandburst/common/ppc440gx_i2c.c
board/sandburst/common/ppc440gx_i2c.h
Signed-off-by: Tom Rini <trini@ti.com>
Like many other projects, U-Boot has a tradition of including big
blocks of License headers in all files. This not only blows up the
source code with mostly redundant information, but also makes it very
difficult to generate License Clearing Reports. An additional problem
is that even the same lincenses are referred to by a number of
slightly varying text blocks (full, abbreviated, different
indentation, line wrapping and/or white space, with obsolete address
information, ...) which makes automatic processing a nightmare.
To make this easier, such license headers in the source files will be
replaced with a single line reference to Unique Lincense Identifiers
as defined by the Linux Foundation's SPDX project [1]. For example,
in a source file the full "GPL v2.0 or later" header text will be
replaced by a single line:
SPDX-License-Identifier: GPL-2.0+
We use the SPDX Unique Lincense Identifiers here; these are available
at [2].
Note: From the legal point of view, this patch is supposed to be only
a change to the textual representation of the license information,
but in no way any change to the actual license terms. With this patch
applied, all files will still be licensed under the same terms they
were before.
Note 2: The apparent difference between the old "COPYING" and the new
"Licenses/gpl-2.0.txt" only results from switching to the upstream
version of the license which is differently formatted; there are not
any actual changes to the content.
Note 3: There are some recurring questions about linense issues, such
as:
- Is a "All Rights Reserved" clause a problem in GPL code?
- Are files without any license header a problem?
- Do we need license headers at all?
The following excerpt from an e-mail by Daniel B. Ravicher should help
with these:
| Message-ID: <4ADF8CAA.5030808@softwarefreedom.org>
| Date: Wed, 21 Oct 2009 18:35:22 -0400
| From: "Daniel B. Ravicher" <ravicher@softwarefreedom.org>
| To: Wolfgang Denk <wd@denx.de>
| Subject: Re: GPL and license cleanup questions
|
| Mr. Denk,
|
| Wolfgang Denk wrote:
| > - There are a number of files which do not include any specific
| > license information at all. Is it correct to assume that these files
| > are automatically covered by the "GPL v2 or later" clause as
| > specified by the COPYING file in the top level directory of the
| > U-Boot source tree?
|
| That is a very fact specific analysis and could be different across the
| various files. However, if the contributor could reasonably be expected
| to have known that the project was licensed GPLv2 or later at the time
| she made her contribution, then a reasonably implication is that she
| consented to her contributions being distributed under those terms.
|
| > - Do such files need any clean up, for example should we add GPL
| > headers to them, or is this not needed?
|
| If the project as a whole is licensed under clear terms, you need not
| identify those same terms in each file, although there is no harm in
| doing so.
|
| > - There are other files, which include both a GPL license header
| > _plus_ some copyright note with an "All Rights Reserved" clause. It
| > has been my understanding that this is a conflict, and me must ask
| > the copyright holders to remove such "All Rights Reserved" clauses.
| > But then, some people claim that "All Rights Reserved" is a no-op
| > nowadays. License checking tools (like OSLC) seem to indicate this is
| > a problem, but then we see quite a lot of "All rights reserved" in
| > BSD-licensed files in gcc and glibc. So what is the correct way to
| > deal with such files?
|
| It is not a conflict to grant a license and also reserve all rights, as
| implicit in that language is that you are reserving all "other" rights
| not granted in the license. Thus, a file with "Licensed under GPL, All
| Rights Reserved" would mean that it is licensed under the GPL, but no
| other rights are given to copy, modify or redistribute it.
|
| Warm regards,
| --Dan
|
| Daniel B. Ravicher, Legal Director
| Software Freedom Law Center (SFLC) and Moglen Ravicher LLC
| 1995 Broadway, 17th Fl., New York, NY 10023
| (212) 461-1902 direct (212) 580-0800 main (212) 580-0898 fax
| ravicher@softwarefreedom.org www.softwarefreedom.org
[1] http://spdx.org/
[2] http://spdx.org/licenses/
Signed-off-by: Wolfgang Denk <wd@denx.de>
This enables CONFIG_SYS_I2C on Tegra, updating existing boards and the Tegra
i2c driver to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Heiko Schocher <hs@denx.de>
CONFIG_I2C_MUX is replaced through the new i2c multibus/multiadapter
framework, configured through CONFIG_SYS_I2C. As CONFIG_I2C_MUX
is only used on the keymile boards, and they are now completely
moved to the new framework, remove CONFIG_I2C_MUX.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Holger Brunck <holger.brunck@keymile.com>
Tested-By: Holger Brunck <holger.brunck@keymile.com>
- added to fsl_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
- added to soft_i2c driver new multibus/multiadpater support
- adapted all config files, which uses this driver
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Add support for Atmel TPM devices with two wire interface.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Extend the tpm library with support for single authorized (AUTH1) commands
as specified in the TCG Main Specification 1.2. (The internally used helper
functions are implemented in a way that they could also be used for double
authorized commands if someone needs it.)
Provide enums with the return codes from the TCG Main specification.
For now only a single OIAP session is supported.
OIAP authorized version of the commands TPM_LoadKey2 and TPM_GetPubKey are
provided. Both features are available using the 'tpm' command, too.
Authorized commands are enabled with CONFIG_TPM_AUTH_SESSIONS. (Note that
this also requires CONFIG_SHA1 to be enabled.)
Signed-off-by: Reinhard Pfau <reinhard.pfau@gdsys.cc>
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Acked-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Remove CONFIG_SPLASH_SCREEN_PREPARE from README
Add doc/README.splashprepare to document functionality
Signed-off-by: Robert Winkler <robert.winkler@boundarydevices.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Dfu transfer uses a buffer before writing data to the
raw storage device. Make the size (in bytes) of this buffer
configurable through environment variable "dfu_bufsiz".
Defaut value is configurable through CONFIG_SYS_DFU_DATA_BUF_SIZE
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@ti.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Tom Rini <trini@ti.com>
Align the list of default commands mentioned in the configuration options
paragraph of the README with the actual definitions found in
include/config_cmd_default.h
Signed-off-by: Vincent Stehlé <vincent.stehle@freescale.com>
RSA provides a public key encryption facility which is ideal for image
signing and verification.
Images are signed using a private key by mkimage. Then at run-time, the
images are verified using a private key.
This implementation uses openssl for the host part (mkimage). To avoid
bringing large libraries into the U-Boot binary, the RSA public key
is encoded using a simple numeric representation in the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
This patch adds the driver for keyboard that's controlled by ChromeOS EC.
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Hung-ying Tyan <tyanh@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Defined bank addr code on CONFIG_SPI_FLASH_BAR macro, to reduce the
size for existing boards which has < 16Mbytes SPI flashes.
It's upto user which has provision to use the bank addr code for
flashes which has > 16Mbytes.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There will need the environment in SPL for reasons other than network
support (in particular, hwconfig contains info for how to set up DDR).
Add a new symbol CONFIG_SPL_ENV_SUPPORT to replace CONFIG_SPL_NET_SUPPORT
for environment in common/Makefile.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Reviewed-by: Tom Rini <trini@ti.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
For SD/SPI 2-stage bootloader, the On-Chip Rom code loads the SPL into L2 SRAM,
then jump to it to begin execution. After that, the SPL loads the final uboot
image into DDR, then jump to it to begin execution. The segment .resetvec in
the SPL and in final U-boot is useless.
So, add new symbols CONFIG_SYS_MPC85XX_NO_RESETVEC for this application.
If CONFIG_SYS_MPC85XX_NO_RESETVEC is set, the segment .resetvec is excluded
and the segment .bootpg is placed in the previous 4K of the segment .text.
Signed-off-by: Ying Zhang <b40530@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Currently, the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" can enable
the master module of Boot from SRIO and PCIE on a platform. But this
is not a silicon feature, it's just a specific booting mode based on
the SRIO and PCIE interfaces. So it's inappropriate to put the macro
into the file arch/powerpc/include/asm/config_mpc85xx.h.
Change the macro "CONFIG_SYS_FSL_SRIO_PCIE_BOOT_MASTER" to
"CONFIG_SRIO_PCIE_BOOT_MASTER", remove them from
arch/powerpc/include/asm/config_mpc85xx.h file, and add those macros
in configuration header file of each board which can support the
master module of Boot from SRIO and PCIE.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
BSC9131RDB is a Freescale Reference Design Board for
BSC9131 SoC which is a integrated device that contains
one powerpc e500v2 core and one DSP starcore.
To support DSP starcore
-Creating LAW and TLB for DSP-CCSR space.
-Creating LAW for DSP-core subsystem M2 memory
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
IFC errata A003399 is valid for IFC NOR boot i.e.if no on-board NOR flash or
no NOR boot, do not compile its workaround.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
A negative value of CONFIG_ENV_OFFSET is treated as a backwards offset
from the end of the eMMC device/partition, rather than a forwards offset
from the start.
This is useful when a single board may be stuffed with different eMMC
devices, each of which has a different capacity, and you always want the
environment to be stored at the very end of the device (or eMMC boot
partition for example).
One example of this case is NVIDIA's Ventana reference board.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Describe the meaning of CONFIG_ENV_IS_IN_MMC, and all related defines that
must or can be set when using that option.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Peter Korsgaard <jacmet@sunsite.dk>
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This patch makes the minimum power-on delay for USB HUB
become configurable. The original design waits at least
100 msec here, but some EHCI controlers(e.g. Faraday EHCI)
are known to require much longer delay interval.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
The pci_indirect.c file is always compiled when
CONFIG_PCI is defined although the indirect PCI
bridge support is not needed by every board.
Introduce a new CONFIG_PCI_INDIRECT_BRIDGE
config option and only compile indirect PCI
bridge support if this options is enabled.
Also add the new option into the configuration
files of the boards which needs that.
Compile tested for powerpc, x86, arm and nds32.
MAKEALL results:
powerpc:
--------------------- SUMMARY ----------------------------
Boards compiled: 641
Boards with warnings but no errors: 2 ( ELPPC MPC8323ERDB )
----------------------------------------------------------
Note: the warnings for ELPPC and MPC8323ERDB are present even
without the actual patch.
x86:
--------------------- SUMMARY ----------------------------
Boards compiled: 1
----------------------------------------------------------
arm:
--------------------- SUMMARY ----------------------------
Boards compiled: 311
----------------------------------------------------------
nds32:
--------------------- SUMMARY ----------------------------
Boards compiled: 3
----------------------------------------------------------
Cc: Tom Rini <trini@ti.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
If Falcon mode support is enabled (and the system isn't directed into
booting u-boot), it will instead try to load kernel from sector
CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR and
CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS of kernel argument parameters
starting from sector CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR.
Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
If Falcon mode support is enabled (and the system isn't directed into
booting u-boot), it will instead try to load kernel from
CONFIG_SPL_FAT_LOAD_KERNEL_NAME file and kernel argument parameters from
CONFIG_SPL_FAT_LOAD_ARGS_NAME, both from the same partition as u-boot.
Signed-off-by: Peter Korsgaard <peter.korsgaard@barco.com>
This patch does a similar code reogranzation from
http://patchwork.ozlabs.org/patch/132179/
which is based on an old version of code (fdt support and bus selection
still not in). It merges this tidy-up on top of the recent code. It does
not make any logical change.
tpm.c implements the interface defined in tpm.h based on underlying
LPC or I2C TPM driver. tpm.c and the underlying driver communicate
throught tpm_private.h.
Note: Merging the LPC driver with tpm.c is left to future patches.
Change-Id: Ie1384f5f9e3935d3bc9a44adf8de80c5a70a5f2b
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
The new name is more aligned with Linux kernel's naming of TPM driver.
Signed-off-by: Peter Huewe <peter.huewe@infineon.com>
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Wai-Hong Tam <waihong@chromium.org>
The Freescale MPC8220 Power Architecture processors have long reached
EOL; Freescale does not even list these any more on their web site.
Remove the code to avoid wasting maitaining efforts on dead stuff.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andy Fleming <afleming@gmail.com>
This code is very large, and in SPL it isn't always useful to print
out image information (in fact there might not even be a console
active). So disable this feature unless this option is set.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add softswitch_output command for bf609-ezkit to enable softswitches.
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Warm reset on OMAP5 freezes when USB cable is connected.
Fix requires PRM_RSTTIME.RSTTIME1 to be programmed
with the time for which reset should be held low for the
voltages and the oscillator to reach stable state.
There are 3 parameters to be considered for calculating
the time, which are mostly board and PMIC dependent.
-1- Time taken by the Oscillator to shut + restart
-2- PMIC OTP times
-3- Voltage rail ramp times, which inturn depends on the
PMIC slew rate and value of the voltage ramp needed.
In order to keep the code in u-boot simple, have a way
for boards to specify a pre computed time directly using
the 'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC'
option. If boards fail to specify the time, use a default
as specified by 'CONFIG_DEFAULT_OMAP_RESET_TIME_MAX_USEC' instead.
Using the default value translates into some ~22ms and should work in
all cases.
However in order to avoid this large delay hiding other bugs,
its recommended that all boards look at their respective data
sheets and specify a pre computed and optimal value using
'CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC'
In order to help future board additions to compute this
config option value, add a README at doc/README.omap-reset-time
which explains how to compute the value. Also update the toplevel
README with the additional option and pointers to
doc/README.omap-reset-time.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[rnayak@ti.com: Updated changelog and added the README]
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Downloaded from http://slre.sourceforge.net/
and adapted for U-Boot environment.
Used to implement regex operations on environment variables.
Code size is ~ 3.5 KiB on PPC.
To enable this code, define the CONFIG_REGEX option in your board
config file.
Note: There are more recent versions of the SLRE library available at
http://slre.googlecode.com ; unfortunately, the new code has a heavily
reorked API which makes it less usable for our purposes:
- the return code is strings, which are more difficult to process
- we don't get any information any more which sub-string of the data
was matched by the given regex
- it is much more cumbersome to work with arbitrary expressions, where
for example the number of substrings for capturing are not known at
compile time
Also, there does not seem to be any real changes or improvements of
the functionality.
Because of this, we deliberately stick with the older code.
Note 2: the test code (built when SLRE_TEST is defined) was modified
to allow for more extensive testing; now we can test the regexp
matching on all lines on a text file (instead of the whole data in the
file as a single block).
Signed-off-by: Wolfgang Denk <wd@denx.de>
Sometimes it might make sense to verify the written data to NOR flash.
This patch adds this feature. To enable this verify-after-write, you
need to define CONFIG_FLASH_VERIFY in your board config header.
Please note that this option is useless in nearly all cases,
since such flash programming errors usually are detected earlier
while unprotecting/erasing/programming. Please only enable
this option if you really know what you are doing.
Signed-off-by: Stefan Roese <sr@denx.de>
Remove SPL-related ASSERT() in arch/arm/cpu/u-boot.lds
as this file is never used for SPL builds.
Rewrite the ASSERT() in arch/arm/cpu/u-boot-spl.lds
to separately test image (text,data,rodata...) size,
BSS size, and full footprint each against its own max,
and make Tegra boards check full footprint.
Also, output section mmutable is not used in SPL builds.
Remove it.
Finally, update README regarding the (now homogeneous)
semantics of CONFIG_SPL_[BSS_]MAX_SIZE and add the new
CONFIG_SPL_MAX_FOOTPRINT macro.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reported-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Change CONFIG_SPL_PAD_TO from a link address to an image offset since this is
more handy and closer to the purpose of this config.
Automatically define CONFIG_SPL_PAD_TO to CONFIG_SPL_MAX_SIZE (or 0 without
CONFIG_SPL_MAX_SIZE).
Test that CONFIG_SPL_PAD_TO >= CONFIG_SPL_MAX_SIZE if CONFIG_SPL_PAD_TO is
non-zero.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Currently is_16bit_nand() is a per SoC function and it decides the bus nand
width by reading some boot related registers.
This method works when NAND is the boot medium, but does not work if another
boot medium is used. For example: booting from a SD card and then using NAND
to store the environment variables, would lead to the following error:
NAND bus width 16 instead 8 bit
No NAND device found!!!
0 MiB
Use CONFIG_SYS_NAND_BUSWIDTH_16BIT symbol to decide the bus width.
If it is defined in the board file, then consider 16-bit NAND bus-width,
otherwise assume 8-bit NAND is used.
This also aligns with Documentation/devicetree/bindings/mtd/nand.txt, which
states:
nand-bus-width : 8 or 16 bus width if not present 8
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND controller
drivers could use it when a 16-bit NAND is deployed.
drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that
other NAND drivers could reuse the same symbol.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
UBI is a better place for the environment on NAND devices because it
handles wear-leveling and bad blocks.
Gluebi is needed in Linux to access the env as an MTD partition.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Support for NAND storage devices to work with the DFU framework.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Previously we didn't support upload/download larger than available
memory. This is pretty bad when you have to update your root filesystem
for example.
This patch removes that limitation (and the crashes when you transfered
any file larger than 4MB) by making raw image writes be done in chunks
and making file maximum size be configurable.
The sequence number is a 16 bit counter; make sure we handle rollover
correctly. This fixes the wrong transfers for large (> 256MB) images.
Also utilize a variable to handle initialization, so that we don't rely
on just the counter sent by the host.
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Tom Rini <trini@ti.com>
Add documentation for the current DFU config options. DFU is a standard
USB device class so more information is available from usb.org
Signed-off-by: Tom Rini <trini@ti.com>
Flush UART3 xmit on enable if TEMT is broken
On some OMAP3 devices when UART3 is configured for boot mode before SPL starts
only THRE bit is set. We have to empty the transmitter before initialization
starts. This patch avoids the use of CONFIG_SYS_NS16550_BROKEN_TEMT.
Signed-off-by: Manfred Huber <man.huber@arcor.de>
Tested-by: Javier Martinez Canillas <javier@dowhile0.org>
Tested-by: Andreas Bießmann <andreas.devel@googlemail.com>
CONFIG_SYS_HZ must be 1000, and get_timer() must therefore return ms.
Document this.
README text provided by Tom Rini.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
'bool' is defined in random places. This patch consolidates them into a
single header file include/linux/types.h, using stdbool.h introduced in C99.
All other #define, typedef and enum are removed. They are all consistent with
true = 1, false = 0.
Replace FALSE, False with false. Replace TRUE, True with true.
Skip *.py, *.php, lib/* files.
Signed-off-by: York Sun <yorksun@freescale.com>
Allow AM335x MPU core clock speed to be specified in the board config file.
To use, add the following to the board's config file:-
#define CONFIG_SYS_MPUCLK <desired clock freq in MHz>
Signed-off-by: Mark Jackson <mpfj@newflow.co.uk>
Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
Albert's rework of the linker scripts conflicted with Simon's making
everyone use __bss_end. We also had a minor conflict over
README.scrapyard being added to in mainline and enhanced in
u-boot-arm/master with proper formatting.
Conflicts:
arch/arm/cpu/ixp/u-boot.lds
arch/arm/cpu/u-boot.lds
arch/arm/lib/Makefile
board/actux1/u-boot.lds
board/actux2/u-boot.lds
board/actux3/u-boot.lds
board/dvlhost/u-boot.lds
board/freescale/mx31ads/u-boot.lds
doc/README.scrapyard
include/configs/tegra-common.h
Build tested for all of ARM and run-time tested on am335x_evm.
Signed-off-by: Tom Rini <trini@ti.com>
Link symbols as created by the link script can either be absolute or
relative to the text start. This option switches between the two options
so that we can support both.
As we convert architectures over to generic board, we can see if this
option is actually needed, or whether it is possible to unify this feature
also.
Signed-off-by: Simon Glass <sjg@chromium.org>
We are introducing a new unified board setup. Add a check to make sure that
board config files do not define CONFIG_SYS_GENERIC_BOARD unless their
architecture defines __HAVE_ARCH_GENERIC_BOARD
__HAVE_ARCH_GENERIC_BOARD will currently not be the default setting, but
we can switch this later when most architecture support generic board.
Signed-off-by: Simon Glass <sjg@chromium.org>
Various errata exist in the Cortex-A9 CPU, and may be worked around by
setting some bits in a CP15 diagnostic register. Add code to implement
the workarounds, enabled by new CONFIG_ options.
This code was taken from the Linux kernel, v3.8, arch/arm/mm/proc-v7.S,
and modified to remove the logic to conditionally apply the WAR (since we
know exactly which CPU we're running on given the U-Boot configuration),
and use r0 instead of r10 for consistency with the rest of U-Boot's
cpu_init_cp15().
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
The "mtest" command is of little practical use (if any), and
experience has shown that a large number of board configurations
define useless or even dangerous start and end addresses. If not even
the board maintainers are able to figure out which memory range can be
reliably tested, how can we expect such from the end users? As this
problem comes up repeatedly, we rather do not enable this command by
default, so only people who know what they are doing will be
confronted with it.
As this changes the user interface, we allow for a grace period
before this change takes effect. For now, we make "mtest"
configurable through the CONFIG_CMD_MEMTEST variable, which is defined
in include/config_cmd_default.h; we also add an entry to
doc/feature-removal-schedule.txt which announces the removal of this
default setting in two releases from now, i. e. with v2013.07.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Tom Rini <trini@ti.com>
In master we had already taken a patch to fix the davinci GPIO code for
CONFIG_SOC_DM646X and in u-boot-ti we have additional patches to support
DA830 (which is CONFIG_SOC_DA8XX && !CONFIG_SOC_DA850). Resolve these
conflicts manually and comment the #else/#endif lines for clarity.
Conflicts:
arch/arm/include/asm/arch-davinci/gpio.h
drivers/gpio/da8xx_gpio.c
Signed-off-by: Tom Rini <trini@ti.com>
On some architectures certain values of splashimage will lead to
a data abort exception.
Document the problem, and implement a callback for splashimage to
reject such values.
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Currently there is no logical place to put the code that prepares the
splash image data. The splash image data should be ready in memory
before bmp_display() is called, and after the environment is ready
(since lcd.c looks for the splash image in an address specified by
the environment variable "splashimage").
Our window of opportunity in board_init_r() is therefore: between
env_relocate() and bmp_display(), and from the available options
only the lcd related functions in drv_lcd_init() seem appropriate
for such lcd oriented code.
Add the option to prepare the splash image data in lcd_logo() right
before it is sent to be displayed.
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Jeroen Hofstee <jeroen@myspectrum.nl>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
The new 'sb' command is intended to deal with sandbox-specific features
that have no parallel in other archs. This commit adds two sub-commands
to list a directory and read a file from the host filesystem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@ti.com>
Sandbox doesn't actually provide U-Boot access to the machine's physical
memory. Instead it provides a RAM buffer of configurable size, and all
memory accesses are within that buffer. Sandbox memory starts at 0 and
is CONFIG_DRAM_SIZE bytes in size. Allowing access outside this buffer
might produce unpredictable results in the event of an error, and would
expose the host machine's memory architecture to the sandbox U-Boot.
Most U-Boot functions assume that they can just access memory at given
address. For sandbox this is not true.
Add a map_sysmem() call which converts a U-Boot address to a system
address. In most cases this is a NOP, but for sandbox it returns a
pointer to that memory inside the RAM buffer.
To get a U-Boot feature to work correctly within sandbox, you should call
map_sysmem() to get a pointer to the address, and then use that address for
any U-Boot memory accesses.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code is pretty old and we want to support only 32-bit systems now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
Invert the polarity of this option to simplify the Makefile logic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Gabe Black <gabeblack@chromium.org>
Some platforms (e.g. IGEPv2 board) has a broken ns16550 UART that
does not set the TEMT bit when the transmitter is empty in SPL.
This makes U-Boot to hang while waiting for TEMT to be set.
Add a new option to avoid this:
CONFIG_SYS_NS16550_BROKEN_TEMT
16550 UART set the Transmitter Empty (TEMT) Bit when all output
has finished and the transmitter is totally empty. U-Boot waits
for this bit to be set to initialize the serial console. On some
broken platforms this bit is not set in SPL making U-Boot to
hang while waiting for TEMT. Define this option to avoid it.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Some boards want to report more than just memory size. For example, it
might be useful to display the memory type (DDR2, DDR3) or manufacturer.
Add a weak function to support this requirement, accessed through a new
'meminfo' command.
Any example of the DRAM: output is below, just for illustration:
SMDK5250 # meminfo
DRAM: 2 GiB Elpida DDR3 @ 800MHz
Signed-off-by: Simon Glass <sjg@chromium.org>
This option displays board info after stdio is running, so that it will
appear on the LCD. If it is displayed earlier, the board info will appear
on the serial console but not on the LCD.
Here follows a blow-by-blow description.
1a. Without CONFIG_DISPLAY_BOARDINFO_LATE, on serial:
U-Boot 2011.12-02550-g037e1c5-dirty (Nov 15 2012 - 14:29:42) for SMDK5250
CPU: S5PC520 @ 1700MHz
Board: Google Snow, rev 0
I2C: ready
DRAM: 2 GiB Elpida DDR3 @ 800MHz
MMC: S5P MSHC0: 0, S5P MSHC1: 1
SF: Detected W25Q32 with page size 4 KiB, total 4 MiB
*** Warning - bad CRC, using default environment
In: mkbp-keyb
Out: lcd
Err: lcd
Net: No ethernet found.
Hit any key to stop autoboot: 0
SMDK5250 #
1b. Without CONFIG_DISPLAY_BOARDINFO_LATE, on LCD (note machine info
is missing):
In: mkbp-keyb
Out: lcd
Err: lcd
Net: No ethernet found.
Hit any key to stop autoboot: 0
SMDK5250 #
2a. With CONFIG_DISPLAY_BOARDINFO_LATE, on serial:
U-Boot 2011.12-02550-g037e1c5 (Nov 15 2012 - 14:27:40) for SMDK5250
CPU: S5PC520 @ 1700MHz
I2C: ready
DRAM: 2 GiB Elpida DDR3 @ 800MHz
MMC: S5P MSHC0: 0, S5P MSHC1: 1
SF: Detected W25Q32 with page size 4 KiB, total 4 MiB
*** Warning - bad CRC, using default environment
Model: Google Snow
In: mkbp-keyb
Out: lcd
Err: lcd
Net: No ethernet found.
Hit any key to stop autoboot: 0
SMDK5250 #
2b. With CONFIG_DISPLAY_BOARDINFO_LATE, on LCD (note machine info is present):
Model: Google Snow
In: mkbp-keyb
Out: lcd
Err: lcd
Net: No ethernet found.
Hit any key to stop autoboot: 0
SMDK5250 #
Since the LCD is all that a typical user sees, it is useful to display
the model there.
We may be able to rearrange things some other way one day, but at
present this seems like a convenient way of getting the required
behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org>
This option delays loading of the environment until later, so that only the
default environment will be available to U-Boot.
This can address the security risk of untrusted data being used during boot.
Any time you load untrusted data you expose yourself to a bug in the
code. The attacker gets to choose the data so can sometimes carefully
craft it to exploit a bug. We try to avoid touching user-controlled
data during a verified boot unless strictly necessary. Since the
default environment is good enough in this case (or you would just
change it), this gets around the problem by just not loading the
environment.
When CONFIG_DELAY_ENVIRONMENT is defined, it is convenient to have a
run-time way of enabling loading of the environment. Add this to the
fdt as /config/delay-environment.
Note: This patch depends on http://patchwork.ozlabs.org/patch/194342/
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Doug Anderson <dianders@chromium.org>
This adds arch support for PPC mpc83xx to boot "minimal" (4K) SPLs
using the new infrastructure.
Existing nand_spl targets are updated to deal with the name change
from nand_init.c to spl_minimal.c (as in theory this isn't limited
to NAND anymore).
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
This was already used by some SPL targets, and allows the pad amount to
be specified by board config headers rather than only in makefile
fragments.
Also supply a pad-to of zero if the variable is undefined. It works
without this, but this avoids relying on undocumented behavior.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
It is useful to have a basic SPI flash test, which tests that the SPI chip,
the SPI bus and the driver are behaving.
This test erases part of the flash, writes data and reads it back as a
sanity check that all is well.
Use CONFIG_SF_TEST to enable it.
Signed-off-by: Simon Glass <sjg@chromium.org>
CONFIG_SYS_TFTP_LOADADDR is defined on severals boards,
but it's never used. So we can safely removed it.
Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
Similar to the env callback command, this will show details about the
options available, the static list, and the currently active variables.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Currently just validates variable types as decimal, hexidecimal,
boolean, ip address, and mac address.
If the entry is not found in the env ".flags", then look in the static
one. This allows the env to override the static definitions, but prevents
the need to have every definition in the environment distracting you.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
The callbacks can be bound, but are otherwise invisible. Add a command
to show what callbacks are available.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
!!! fix callback command
Add support for per-variable callbacks to the "hashtable" functions.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
!!!fix comment in callback
Add a single command to read the EDID information over I2C.
For example:
SMDK5250 # i2c dev 7
Setting bus to 7
SMDK5250 # i2c edid 50
EDID version: 1.4
Product ID code: 305c
Manufacturer: AUO
Serial number: 00000000
Manufactured in week: 0 year: 2011
Video input definition: digital signal, voltage level 0, blank to black
Monitor is non-RGB
Maximum visible display size: 26 cm x 14 cm
Power management features: no active off, no suspend, no standby
Estabilished timings:
Standard timings:
1366x768 60 Hz (detailed)
1366x768 60 Hz (detailed)
Monitor ID: 2VD2K.B116XW
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
This new command supports hashing SHA1 and SHA256. It could be extended
to others such as MD5 and the CRC algorithms. The syntax is modeled on
those:
hash <algorithm> <address> <length> [*<dest_addr> | <dest_envvar>]
to calculate a hash, and:
hash -v <algorithm> <address> <length> [*<verify_addr> | <verify_envvar>]
to verify a hash.
Use CONFIG_CMD_HASH to enable the command, CONFIG_SHA1 to enable SHA1 and
CONFIG_SHA256 to enable SHA256.
The existing sha1sum command remains.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes data is on a block device and within a partition, but not in a
particular filesystem.
This commands permits reading raw data from a partition.
Signed-off-by: Kenneth Waters <kwaters@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Gettime returns the current timer value. If CONFIG_SYS_HZ is defined
then the timer value is also converted to seconds.
Tegra20 (SeaBoard) # gettime
Timer val: 7754
Seconds : 7
Remainder : 754
sys_hz = 1000
There has been some discussion about whether this is useful enough to
be included in U-Boot. The following boards do not have CONFIG_SYS_HZ
defined:
M52277EVB
M52277EVB_stmicro
M53017EVB
M54418TWR
M54418TWR_nand_mii
M54418TWR_nand_rmii
M54418TWR_nand_rmii_lowfreq
M54418TWR_serial_mii
M54418TWR_serial_rmii
Signed-off-by: Anton Staaf <robotboy@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
The default implementation of this function is just memset, but other
implementations will be needed when physical memory isn't accessible by
U-Boot using normal addressing mechanisms.
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Since the top-level README file refers the reader to the CHANGELOG,
it's worth mentioning how to generate it.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
We don't want this for coreboot, so provide a way of compiling it out.
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
When running from coreboot we don't want this code.
This version works by ifdef-ing out all of the code that would go
into those sections and all the code that refers to it. The sections are
then empty, and the linker will either leave them empty for the loader
to ignore or remove them entirely.
Signed-off-by: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Document parameters used for specifying the NAND image to be loaded.
Also fix the definition of CONFIG_SPL_NAND_SIMPLE -- it's only
nand_spl_simple.c, not the entire nand directory. The word "simple" is
there for a reason. :-)
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
v2: updated for makefile changes earlier in patchset
Some small SPLs do not use nand_base.c, and a subset of those also
require a special driver. Some SPLs need software ECC but others can't
fit it.
All existing boards that specify CONFIG_SPL_NAND_SUPPORT have these
symbols added to preserve existing behavior.
Signed-off-by: Scott Wood <scottwood@freescale.com>
--
v2: use positive logic for including bits of NAND, rather than
a MINIMAL symbol that excludes things.
Introduces CONFIG_SPL_RELOC_TEXT_BASE and CONFIG_SPL_RELOC_STACK.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
cpu_init_nand.c is renamed to spl_minimal.c as it is not really NAND-specific.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
v2: factor out START, and change cpu_init_nand.c to spl_minimal.c
Cc: Andy Fleming <afleming@freescale.com>
Currently the SPL target is specified in a CPU-specific makefile
fragment. While some targets may need something more complicated than a
simple target name, targets which don't need this shouldn't have to provide a makefile fragment just for this.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
v2: Removed default target as it's been pointed out to me how existing platforms
cause the SPL to be built.
When the cursor position gets to the end of the LCD console we normally
scroll by one line. This adds an option to increase that value.
Console scrolling is often slow, and if a large amount of output is
being sent, increasing this option to 10 or so will speed things up
considerably.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The normal alignment is PAGE_SIZE, but if this is defined, we can support
other alignments.
The motivation for this change is to make the display section-aligned on
ARM so that we can easily turn off data caching for the frame buffer region
without resorting to level 2 page tables.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
When booting a fit image with multiple configurations, the user either has to
specify which configuration to use explicitly, or there has to be a default
defined which is chosen automatically. This change adds an option to change
that behavior so that a configuration can be selected explicitly, or the
configuration which has the device tree that claims to be compatible with the
earliest item in U-Boot's device tree.
In other words, if U-Boot claimed to be compatible with A, B, and then C, and
the configurations claimed to be compatible with A, D and B, D and D, E, the
first configuration, A, D, would be chosen. Both the first and second
configurations match, but the first one matches a more specific entry in
U-Boot's device tree. The order in the kernel's device tree is ignored.
Signed-off-by: Gabe Black <gabeblack@google.com>
Commit-Ready: Gabe Black <gabeblack@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for drawing compressed RLE8 bitmaps.
Reference: http://www.digicamsoft.com/bmp/bmp.html
Signed-off-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Che-Liang Chiou <clchiou@chromium.org>
[agust: fix some minor style issues and build warnings]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Add a new function to find out the number of available SCSI disks. Also
set the 'scsidevs' environment variable after each scan.
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
This option is intended to be set by boards which will set the
board_name and board_rev environment variables. These are to be used
when the U-Boot binary can support more than one board type at run-time
and the user needs an easy way (for example for scripting to determine
what device tree to load) to determine what board they are on.
Signed-off-by: Tom Rini <trini@ti.com>
Add optional support for some ANSI escape sequences to the
cfb_console driver. Define CONFIG_CFB_CONSOLE_ANSI to enable
cursor moving, color reverting and clearing the cfb console
via ANSI escape codes.
Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This makes the FAT and ext4 filesystem implementations build if
CONFIG_FS_{FAT,EXT4} are defined, rather than basing the build on
whether CONFIG_CMD_{FAT,EXT*} are defined. This will allow the
filesystems to be built separately from the filesystem-specific commands
that use them. This paves the way for the creation of filesystem-generic
commands that used the filesystems, without requiring the filesystem-
specific commands.
Minor documentation changes are made for this change.
The new config options are automatically selected by the old config
options to retain backwards-compatibility.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
These boards have long reached EOL, and there has been no indication
of any active users of such hardware for years. Get rid of the dead
weight.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Wolfgang Grandegger <wg@denx.de>
Move spin table to cached memory to comply with ePAPR v1.1.
Load R3 with 64-bit value if CONFIG_SYS_PPC64 is defined.
'M' bit is set for DDR TLB to maintain cache coherence.
See details in doc/README.mpc85xx-spin-table.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
This change adds CBFS support and some commands to use it to u-boot. These
commands are:
cbfsinit - Initialize CBFS support and pull all metadata into RAM. The end of
the ROM is an optional parameter which defaults to the standard 0xffffffff and
can be used to support multiple CBFSes in a system. The last one set up with
cbfsinit is the one that will be used.
cbfsinfo - Print information from the CBFS header.
cbfsls - Print out the size, type, and name of all the files in the current
CBFS. Recognized types are translated into symbolic names.
cbfsload - Load a file from CBFS into memory. Like the similar command for fat
filesystems, you can optionally provide a maximum size.
Support for CBFS is compiled in when the CONFIG_CMD_CBFS option is specified.
The CBFS driver can also be used programmatically from within u-boot.
If u-boot needs something out of CBFS very early before the heap is
configured, it won't be able to use the normal CBFS support which caches some
information in memory it allocates from the heap. The
cbfs_file_find_uncached function searches a CBFS instance without touching
the heap.
Signed-off-by: Gabe Black <gabeblack@google.com>
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
This adds the required code to set up a ULPI USB port. It is
mostly a port of the Linux ULPI setup code with some tweaks
added for more correctness, discovered along the way of
debugging this.
To use this both CONFIG_USB_ULPI and CONFIG_USB_ULPI_VIEWPORT
have to be set in the board configuration file.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Two sub-commands... start and get.
* start sets the reference.
* get prints out the time since the last start (in "<sec>.<msec>" format).
If get is called without start, returns time since boot.
Simple way to benchmark an operation: "timer start;<commands-to-measure>;timer get"
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
This allows you to read ini-formatted data from anywhere and then
import one of the sections into the environment
This is based on rev 16 at http://code.google.com/p/inih/
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Define the new "-2" value for bootdelay to mean autoboot with no delay
and don't check for an abort key (while "0" value means do check).
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Now that there are a few features, add a bootstage command to access them.
bootstage report - prints a report
bootstage stash/unstash - stashes bootstage records in memory, reads them back
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an option, CONFIG_BOOTSTAGE_FDT to pass boot timings to the kernel
in the device tree, if available. To use this, you must have
CONFIG_OF_LIBFDT defined.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a new flag, CONFIG_SPL_FRAMEWORK to opt into the common/spl SPL
framework, enable on all of the previously using boards. We move the
spl_ymodem.c portion to common/ and spl_mmc.c to drivers/mmc/. We leave
the NAND one in-place as we plan to replace it later in this series.
We use common/spl to avoid linker problems with respect to merging
constant strings in objects. Otherwise all strings in common/ will be
linked in and kept which grows SPL in size too much.
Signed-off-by: Tom Rini <trini@ti.com>
Only omap4/5 currently have a meaningful set of display text and overo
had been adding a function to display nothing. Change how this works to
be opt-in and only turned on for omap4/5 now.
Signed-off-by: Tom Rini <trini@ti.com>
Commit 155cb01 replaced the read-only property of the ver env var
with an auto-restoring behavior. Update the README file accordingly.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Wolfgang Denk <wd@denx.de>
Introduce CONFIG_PCI_ENUM_ONLY variable for platforms that just want a
quick enumberation of the PCI devices, but don't need any setup work done.
This is very beneficial on platforms that have u-boot loaded by another
boot loader which does a more sophisticated job of setup of PCI devices
than u-boot. That way, u-boot can just read what's there and get on
with life. This is what SeaBIOS does.
Signed-off-by: Andrew Sharp <andywyse6@gmail.com>
All usage of config_cmd_default.h uses <> for the include statement.
Update the README to do the same, rather than using "".
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Erratum A004510 says that under certain load conditions, modified
cache lines can be discarded, causing data corruption.
To work around this, several CCSR and DCSR register updates need to be
made in a careful manner, so that there is no other transaction in
corenet when the update is made.
The update is made from a locked cacheline, with a delay before to flush
any previous activity, and a delay after to flush the CCSR/DCSR update.
We can't use a readback because that would be another corenet
transaction, which is not allowed.
We lock the subsequent cacheline to prevent it from being fetched while
we're executing the previous cacheline. It is filled with nops so that a
branch doesn't cause us to fetch another cacheline.
Ordinarily we are running in a cache-inhibited mapping at this point, so
we temporarily change that. We make it guarded so that we should never
see a speculative load, and we never do an explicit load. Thus, only the
I-cache should ever fill from this mapping, and we flush/unlock it
afterward. Thus we should avoid problems from any potential cache
aliasing between inhibited and non-inhibited mappings.
NOTE that if PAMU is used with this patch, it will need to use a
dedicated LAW as described in the erratum. This is the responsibility
of the OS that sets up PAMU.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Added descriptions about boot from PCIE in the files README and
doc/README.srio-pcie-boot-corenet, and changed the name of the
doc/README.srio-boot-corenet to doc/README.srio-pcie-boot-corenet.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
NFS_TIMEOUT is constant value defined in net/nfs.c. But sometimes it needs to adjust.
This patch enables to override NFS_TIMEOUT by defining CONFIG_NFS_TIMEOUT in a board specific config file.
Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
This can be useful for generic scripts. For example, rather than hard-
coding a script to ext2load tegra-harmony.dtb, it could load
${soc}-${board}.dtb and hence not need adjustments to run on multiple
boards.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This describes requirement of e500 and e500v2 processor to support external
debugger.
It also provide an insight of the configuration switch required and their
description.
Signed-off-by: Radu Lazarescu <radu.lazarescu@freescale.com>
Signed-off-by: Marius Grigoras <marius.grigoras@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
This is useful if you want to look for a DHCP server, but try some
other settings if not available.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
Enable Thumb build and ARM-Thumb interworking based on the new
config flag CONFIG_SYS_THUMB_BUILD
Signed-off-by: Aneesh V <aneesh@ti.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
* 'master' of git://git.denx.de/u-boot-mpc85xx:
powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR
powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot
cmd_bdinfo: display the address map size (32-bit vs. 36-bit)
PowerPC: correct the SATA for p1/p2 rdb-pc platform
powerpc/corenet_ds: Slave core in holdoff when boot from SRIO
powerpc/corenet_ds: Slave reads ENV from master when boot from SRIO
powerpc/corenet_ds: Slave uploads ucode when boot from SRIO
powerpc/corenet_ds: Slave module for boot from SRIO
powerpc/corenet_ds: Master module for boot from SRIO
powerpc/corenet_ds: Document for the boot from SRIO
powerpc/corenet_ds: Correct the compilation errors about ENV
powerpc/srio: Rewrite the struct ccsr_rio
powerpc/85xx:Fix lds for nand boot debug info
powerpc/p2041rdb: add env in NAND support
powerpc/p2041rdb: add NAND and NAND boot support
powerpc/mpc8xxx: Fix CONFIG_DDR_RAW_TIMING for two boards
powerpc/85xx:Avoid vector table compilation for nand_spl
powerpc/85xx:Fix IVORs addr after vector table relocation
powerpc/85xx:Avoid hardcoded vector address for IVORs
powerpc/p1023rds: Disable nor flash node and enable nand flash node
When boot from SRIO, slave's ENV can be stored in master's memory space,
then slave can fetch the ENV through SRIO interface.
NOTE: Because the slave can not erase, write master's NOR flash by SRIO
interface, so it can not modify the ENV parameters stored in
master's NOR flash using "saveenv" or other commands.
Master needs to:
1. Put the slave's ENV into it's own memory space.
2. Set an inbound SRIO window covered slave's ENV stored in master's
memory space.
Slave needs to:
1. Set a specific TLB entry in order to fetch ucode and ENV from master.
2. Set a LAW entry with the TargetID SRIO1 or SRIO2 for ucode and ENV.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
For the powerpc processors with SRIO interface, boot location can be configured
from SRIO1 or SRIO2 by RCW. The processor booting from SRIO can do without flash
for u-boot image. The image can be fetched from another processor's memory
space by SRIO link connected between them.
The processor boots from SRIO is slave, the processor boots from normal flash
memory space and can help slave to boot from its memory space is master.
They are different environments and requirements:
master:
1. NOR flash for its own u-boot image, ucode and ENV space.
2. Slave's u-boot image in master NOR flash.
3. Normally boot from local NOR flash.
4. Configure SRIO switch system if needed.
slave:
1. Just has EEPROM for RCW. No flash for u-boot image, ucode and ENV.
2. Boot location should be set to SRIO1 or SRIO2 by RCW.
3. RCW should configure the SerDes, SRIO interfaces correctly.
4. Slave must be powered on after master's boot.
5. Must define CONFIG_SYS_QE_FMAN_FW_IN_REMOTE because of no ucode
locally.
For the slave module, need to finish these processes:
1. Set the boot location to SRIO1 or SRIO2 by RCW.
2. Set a specific TLB entry for the boot process.
3. Set a LAW entry with the TargetID SRIO1 or SRIO2 for the boot.
4. Slave's u-boot image should be generated specifically by
make xxxx_SRIOBOOT_SLAVE_config.
This will set SYS_TEXT_BASE=0xFFF80000 and other configurations.
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Make endianess of target CPU configurable. Use the new config
option for dbau1550_el and pb1000 boards.
Adapt linking of standalone applications to pass through
endianess options to LD.
Build tested with:
- ELDK 4 mips_4KC- and mips4KCle
- Sourcery CodeBench Lite 2011.03-93
With this patch all 26 MIPS boards can be compiled now in one step by
running "MAKEALL -a mips".
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
This patch allows loading RAW ramdisk via bootz command. The raw ramdisk is
loaded only in case it's size is specified:
bootz <kernel addr> <ramdisk addr>:<ramdisk size> <fdt addr>
For example:
bootz 0x42000000 0x43000000:0x12345 0x44000000
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Tom Warren <TWarren@nvidia.com>
Cc: albert.u.boot@aribaud.net
Cc: afleming@gmail.com
Cc: Simon Glass <sjg@chromium.org>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
This command boots Linux zImage from where the zImage is loaded to. Passing
initrd and fdt is supported.
Tested on i.MX28 based DENX M28EVK
Tested on PXA270 based Voipac PXA270.
NOTE: This currently only supports ARM, but other architectures can be easily
added by defining bootz_setup().
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Tom Warren <TWarren@nvidia.com>
Cc: albert.u.boot@aribaud.net
Cc: afleming@gmail.com,
Cc: Simon Glass <sjg@chromium.org>,
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Nicolas Pitre <nico@fluxnic.net>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
* 'agust@denx.de' of git://git.denx.de/u-boot-staging:
lzma: fix printf warnings
Remove CONFIG_SYS_EXTBDINFO from snapper9260.h
cmd_pxe.c: fix strict-aliasing warnings
net: smc91111: use mdelay()
doc: Fix some typos in different files
disk/part.c: Fix device enumeration through API
mkenvimage: Really set the redundant byte when applicable
mkenvimage: Don't try to detect comments in the input file
mkenvimage: Use mmap() when reading from a regular file
mkenvimage: Read/Write from/to stdin/out by default or if the filename is "-"
mkenvimage: More error handling
mkenvimage: Correct an include and add a missing one
mkenvimage: correct and clarify comments and error messages
MAKEALL: display SPL size if present
ARMV7/Vexpress: add missing get_ticks() and get_tbclk()
mkenvimage: fix usage message
cmd_fat: add FAT write command
fs/fat/fat_write.c: Fix GCC 4.6 warnings
FAT write: Fix compile errors
CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the txfilltuning
field in the EHCI controller on reset.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This patch adds the support for high speed in usb device framework and usbtty
driver. This feature has been kept within a macro CONFIG_USBD_HS, so the board
configuration files have to define this macro to enable high speed support.
Along with that specific peripheral drivers also need to define a function to
let the framework know that the enumeration has happened at high speed.
This function prototype is "int is_usbd_high_speed(void)"
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Once CONFIG_FAT_WRITE is defined, users can invoke 'fatwrite' command
that saves data in RAM as a FAT file.
This patch was originally part of
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/121847
Signed-off-by: Donggeun Kim <dg77.kim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Maximilian Schwerin <mvs@tigris.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This reverts commit 295d3942b8.
It turns that this really doesn't work very nicely. Instead we should
have a pre-console panic function so that we know that further execution
is impossible and we don't need to worry about trampling on UARTs, etc.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Wolfgang Denk <wd@denx.de>
This defines the basics of a new boot time measurement feature. This allows
logging of very accurate time measurements as the boot proceeds, by using
an available microsecond counter.
To enable the feature, define CONFIG_BOOTSTAGE in your board config file.
Also available is CONFIG_BOOTSTAGE_REPORT which will cause a report to be
printed just before handing off to the OS.
Most IDs are not named at this stage. For that I would first like to
renumber them all.
Timer summary in microseconds:
Mark Elapsed Stage
0 0 reset
205,000 205,000 board_init_f
6,053,000 5,848,000 bootm_start
6,053,000 0 id=1
6,058,000 5,000 id=101
6,058,000 0 id=100
6,061,000 3,000 id=103
6,064,000 3,000 id=104
6,093,000 29,000 id=107
6,093,000 0 id=106
6,093,000 0 id=105
6,093,000 0 id=108
7,089,000 996,000 id=7
7,089,000 0 id=15
7,089,000 0 id=8
7,097,000 8,000 start_kernel
Signed-off-by: Simon Glass <sjg@chromium.org>
The commit message of a28afca (Add uboot "fdt_high" enviroment variable)
states that fdt_high behaves similarly to the existing initrd_high.
But fdt_high actually has an outstanding difference from initrd_high.
The former specifies the start address, while the later specifies the
end address.
As fdt_high and initrd_high will likely be used together, it'd be nice
to have them behave same. The patch changes the behavior of fdt_high
to have it aligned with initrd_high.
The document of fdt_high in README is updated with an example to
demonstrate the usage of this environment variable.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
* 'sf' of git://git.denx.de/u-boot-blackfin:
README: Add description of SPI Flash (SF) command configuration
sf command: allow default bus and chip selects
sf: eeprom_m95xxx: set a sane default timeout
sf: eeprom_m95xxx: fix up style
Acked-by: Jason Liu <jason.hui@linaro.org>
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The V bit of the c1 register of CP15 should not be cleared on DA850
SoCs since they have no valid memory at 0x00000000. This patch
introduces a configuration option CONFIG_SYS_EXCEPTION_VECTORS_HIGH
that allows setting the correct value for the V bit.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Reported-by: Sughosh Ganu <urwithsughosh@gmail.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Sughosh Ganu <urwithsughosh@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
This adds ethernet driver for Calxeda xgmac found on Highbank SOC.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Fix: WARNING: __aligned(size) is preferred over
__attribute__((aligned(size)))
Signed-off-by: Wolfgang Denk <wd@denx.de>
From: Sonny Rao <sonnyrao@chromium.org>
These functions are useful in U-Boot because they allow a graceful failure
rather than an unpredictable stack overflow when printf() buffers are
exceeded.
Mostly copied from the Linux kernel. I copied vscnprintf and
scnprintf so we can change printf and vprintf to use the safe
implementation but still return the correct values.
(Simon Glass <sjg@chromium.org> modified this commit a little)
Signed-off-by: Sonny Rao <sonnyrao@chromium.org>
This patch adds support for console output before the console is inited.
The main purpose of this is to deal with a very early panic() which would
otherwise cause a silent hang.
A new board_pre_console_putc() function is added to the board API. If
provided by the board it will be called in the event of console output
before the console is ready. This function should turn on all UARTs and
spray the character out if it possibly can.
The feature is controlled by a new CONFIG_PRE_CONSOLE_PUTC option.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
The BAB7xx boards are almost deceased. They cause build warnings, an
it's not worth the effort to fix these. Remove the dead body.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Frank Gottschling <fgottschling@eltec.de>
TPM (Trusted Platform Module) is an integrated circuit and
software platform that provides computer manufacturers with the
core components of a subsystem used to assure authenticity,
integrity and confidentiality.
This driver supports version 1.2 of the TCG (Trusted Computing
Group) specifications.
The TCG specification defines several so called localities in a
TPM chip, to be controlled by different software layers. When
used on a typical x86 platform during the firmware phase, only
locality 0 can be accessed by the CPU, so this driver even while
supporting the locality concept presumes that only locality zero
is used.
This implementation is loosely based on the article "Writing a
TPM Device Driver" published on http://ptgmedia.pearsoncmg.com
Compiling this driver with DEBUG defined will generate trace of
all accesses to TMP registers.
This driver has been tested and is being used in three different
functional ChromeOS machines (Pinetrail and Sandy Bridge Intel
chipsets) all using the same Infineon SLB 9635 TT 1.2 device.
A u-boot cli command allowing access to the TPM was also
implemented and is being submitted as a second patch.
Change-Id: I22a33c3e5b2e20eec9557a7621bd463b30389d73
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
CC: Wolfgang Denk <wd@denx.de>
Several macros are used to identify and locate the microcode binary image
that U-boot needs to upload to the QE or Fman. Both the QE and the Fman
use the QE Firmware binary format to package their respective microcode data,
which is why the same macros are used for both. A given SOC will only have
a QE or an Fman, so this is safe.
Unfortunately, the current macro definition and usage has inconsistencies.
For example, CONFIG_SYS_FMAN_FW_ADDR was used to define the address of Fman
firmware in NOR flash, but CONFIG_SYS_QE_FW_IN_NAND contains the address
of NAND. There's no way to know by looking at a variable how it's supposed
to be used.
In the future, the code which uploads QE firmware and Fman firmware will
be merged.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
since commits:
davinci: emac: add support for more than 1 PHYs
062fe7d332
davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM
fb1d6332b5
I get following warning on the enbw_cmc board:
Err: serial
Net: 5 ETH PHY detected
miiphy_register: non unique device name 'KSZ8873 @ 0x01'
DaVinci-EMAC
Hit any key to stop autoboot: 0
Also I see some debug printfs:
=> run load
+ emac_close
+ emac_ch_teardown
- emac_ch_teardown
+ emac_ch_teardown
- emac_ch_teardown
- emac_close
+ emac_open
- emac_open
Using DaVinci-EMAC device
reason is 062fe7d332 new define MAX_PHY.
This is set to 3! I get on this board 5 active phys, so
this leads in wrong memory writes ...
so I changed:
- define CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT to set
the MAX_PHY value, add a description in README
for the new CONFIG_SYS option.
- print an error message if more then MAX_PHYs are
detected.
- fill the active_phy_addr array in a for loop with
0xff
- changed printf() in debug_emac()
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Manjunath Hadli <manjunath.hadli@ti.com>
Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Tom Rini <tom.rini@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
similiar to commit dc7cd8e59b, only
adapted for the new spl framework.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Tom Rini <trini@ti.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Rename mc13783-rtc so that it can be used for both MC13783 and MC13892 PMICs.
efikamx board, for example, does use a MC13892 PMIC, but the RTC selection is currently made as:
#define CONFIG_RTC_MC13783
,which is not very obvious.
Let the MC13783 and MC13892 RTC be selected by:
#define CONFIG_RTC_MC13XXX
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
As a part of the manufacturing process for some of our custom hardware,
we are programming the EEPROMs attached to our Intel 82571EB controllers
from software using U-Boot and Linux.
This code provides several conditionally-compiled features to assist in
our manufacturing process:
CONFIG_CMD_E1000:
This is a basic "e1000" command which allows querying the controller
and (if other config options are set) performing EEPROM programming.
In particular, with CONFIG_E1000_SPI this allows you to display a
hex-dump of the EEPROM, copy to/from main memory, and verify/update
the software checksum.
CONFIG_E1000_SPI_GENERIC:
Build a generic SPI driver providing the standard U-Boot SPI driver
interface. This allows commands such as "sspi" to access the bus
attached to the E1000 controller. Additionally, some E1000 chipsets
can support user data in a reserved space in the E1000 EEPROM which
could be used for U-Boot environment storage.
CONFIG_E1000_SPI:
The core SPI access code used by the above interfaces.
For example, the following commands allow you to program the EEPROM from
a USB device (assumes CONFIG_E1000_SPI and CONFIG_CMD_E1000 are enabled):
usb start
fatload usb 0 $loadaddr 82571EB_No_Mgmt_Discrete-LOM.bin
e1000 0 spi program $loadaddr 0 1024
e1000 0 spi checksum update
Please keep in mind that the Intel-provided .eep files are organized as
16-bit words. When converting them to binary form for programming you
must byteswap each 16-bit word so that it is in little-endian form.
This means that when reading and writing words to the SPI EEPROM, the
bit ordering for each word looks like this on the wire:
Time >>>
------------------------------------------------------------------
... [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8], ...
------------------------------------------------------------------
(MSB is 15, LSB is 0).
Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
This renames BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT.
Along the way it removes some leftover
#define BOARD_LATE_INIT 1
and adds some basic documentation for board specific
callbacks in README.
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
Acked-by: Stefano Babic <sbabic@denx.de>
Add documentation for CONFIG_GATEWAYIP and CONFIG_NETMASK;
also add information which environment variables are set.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
In some cases, saving data in RAM as a file with FAT format is required.
This patch allows the file to be written in FAT formatted partition.
The usage is similar with reading a file.
First, fat_register_device function is called before file_fat_write function
in order to set target partition.
Then, file_fat_write function is invoked with desired file name,
start ram address for writing data, and file size.
Signed-off-by: Donggeun Kim <dg77.kim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
This adds support for a new environment variable called 'fdtcontroladdr'. If
defined, the hex address is used as the address of the control fdt for U-Boot.
Note: I have not changed CONFIG_PRAM section as I already have an
outstanding patch on that.
Signed-off-by: Simon Glass <sjg@chromium.org>
This adds support for an FDT to be build as a separate binary file called
u-boot.dtb. This can be concatenated with the U-Boot binary to provide a
device tree located at run-time by U-Boot. The Makefile is modified to
provide this file in u-boot-dtb.bin.
Signed-off-by: Simon Glass <sjg@chromium.org>
This new option allows U-Boot to embed a binary device tree into its image
to allow run-time control of peripherals. This device tree is for U-Boot's
own use and is not necessarily the same one as is passed to the kernel.
The device tree compiler output should be placed in the $(obj)
rooted tree. Since $(OBJCOPY) insists on adding the path to the
generated symbol names, to ensure consistency it should be
invoked from the directory where the .dtb file is located and
given the input file name without the path.
This commit contains my entry for the ugliest Makefile / shell interaction
competition.
Signed-off-by: Simon Glass <sjg@chromium.org>
This adds a device tree pointer to the global data. It can be set by
board code. A later commit will add support for making a device
tree binary blob available to U-Boot for run-time configuration.
Signed-off-by: Simon Glass <sjg@chromium.org>
Documents and READMEs for NDS32 architecture.
It patch also provides usage of SoC AG101 and board ADP-AG101.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
With these documented, we can start pushing towards standardizing their
use across boards.
Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Jz4740 is a multimedia application processor targeting for mobile
devices like e-Dictionary, eBook, portable media player (PMP) and
GPS navigator. Jz4740 is powered by Ingenic 360 MHz XBurst CPU core
(JzRISC), in which RISC/SIMD/DSP hybrid instruction set architecture
provides high integration, high performance and low power consumption.
JzRISC incorporated in Jz4740 is the advanced and power-efficient
32-bit RISC core, compatible with MIPS32, with 16K I-Cache and 16K
D-Cache, and can operate at speeds up to 400 MHz.
On-chip modules such as LCD controller, embedded audio codec, multi-
channel SAR-ADC, AC97/I2S controller and camera I/F offer a rich
suite of peripherals for multimedia application. NAND controller
(SLC/MLC), USB (host 1.1 and device 2.0), UART, I2C, SPI, etc. are
also available.
For more info about Ingenic XBurst Jz4740:
http://en.ingenic.cn/eng/http://www.linux-mips.org/wiki/Ingenic
This patch introduces XBurst CPU support in U-Boot. It's compatible
with MIPS32, but requires a bit different cache maintenance, timer
routines, and boot mechanism using USB boot tool, so XBurst support
can go into a separate new home, cpu/xburst/.
Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net>
Acked-by: Daniel <zpxu@ingenic.cn>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Interactive DDR debugging provides a user interface to view and modify SPD,
DIMM parameters, board options and DDR controller registers before DDR is
initialized. With this feature, developers can fine-tune DDR for board
bringup and other debugging without frequently having to reprogram the flash.
To enable this feature, define CONFIG_FSL_DDR_INTERACTIVE in board header
file and set an environment variable to activate it. Syntax:
setenv ddr_interactive on
After reset, U-boot prompts before initializing DDR controllers
FSL DDR>
The available commands are
print print SPD and intermediate computed data
reset reboot machine
recompute reload SPD and options to default and recompute regs
edit modify spd, parameter, or option
compute recompute registers from current next_step to end
next_step shows current next_step
help this message
go program the memory controller and continue with u-boot
The first command should be "compute", which reads data from DIMM SPDs and
board options, performs the calculation then stops before setting DDR
controller. A user can use "print" and "edit" commands to view and modify
anything. "Go" picks up from current step with any modification and
compltes the calculation then enables the DDR controller to continue u-boot.
"Recompute" does it over from fresh reading.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Some previous changes added code right in the middle of the
description of CONFIG_SHOW_BOOT_PROGRESS. Move this text down.
Fix formatting while we are at it.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This is long over due. All but two net drivers have been converted, but
those have now been dropped.
The only thing left to do is actually delete all references to NET_MULTI
and code that is compiled when that is not defined. So here we scrub the
core code.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Allow redirection of console output prior to console initialisation to a
temporary buffer.
To enable this functionality, the board (or arch) must define:
- CONFIG_PRE_CONSOLE_BUFFER - Enable pre-console buffer
- CONFIG_PRE_CON_BUF_ADDR - Base address of pre-console buffer
- CONFIG_PRE_CON_BUF_SZ - Size of pre-console buffer (in bytes)
The pre-console buffer will buffer the last CONFIG_PRE_CON_BUF_SZ bytes
Any earlier characters are silently dropped.
