mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 15:14:43 +00:00
Merge remote-tracking branch 'mpc83xx/next'
This commit is contained in:
Kim Phillips
commit
a6187dccd8
14 changed files with 96 additions and 149 deletions
6
Makefile
6
Makefile
|
|
@ -486,8 +486,12 @@ $(obj)u-boot.sha1: $(obj)u-boot.bin
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|||
$(obj)u-boot.dis: $(obj)u-boot
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||||
$(OBJDUMP) -d $< > $@
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||||
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||||
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||||
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$(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
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$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $(obj)spl/u-boot-spl $(obj)spl/u-boot-spl-pad.bin
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$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(or $(CONFIG_SPL_PAD_TO),0) \
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-O binary $(obj)spl/u-boot-spl \
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$(obj)spl/u-boot-spl-pad.bin
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cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin > $@
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rm $(obj)spl/u-boot-spl-pad.bin
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|
|
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10
README
10
README
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@ -2819,6 +2819,12 @@ FIT uImage format:
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CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME
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Filename to read to load U-Boot when reading from FAT
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CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
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Set this for NAND SPL on PPC mpc83xx targets, so that
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start.S waits for the rest of the SPL to load before
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continuing (the hardware starts execution after just
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loading the first page rather than the full 4K).
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CONFIG_SPL_NAND_BASE
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Include nand_base.c in the SPL. Requires
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CONFIG_SPL_NAND_DRIVERS.
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@ -2876,6 +2882,10 @@ FIT uImage format:
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CONFIG_SPL_LIBGENERIC_SUPPORT
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Support for lib/libgeneric.o in SPL binary
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CONFIG_SPL_PAD_TO
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Linker address to which the SPL should be padded before
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appending the SPL payload.
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CONFIG_SPL_TARGET
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Final target image containing SPL and payload. Some SPLs
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use an arch-specific makefile fragment instead, for
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|
|
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@ -27,8 +27,22 @@ include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(CPU).o
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MINIMAL=
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ifdef CONFIG_SPL_BUILD
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ifdef CONFIG_SPL_INIT_MINIMAL
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MINIMAL=y
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endif
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endif
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START = start.o
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ifdef MINIMAL
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COBJS-y += spl_minimal.o
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else
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COBJS-y += traps.o
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COBJS-y += cpu.o
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COBJS-y += cpu_init.o
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@ -51,6 +65,8 @@ COBJS-y += spd_sdram.o
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endif
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COBJS-$(CONFIG_FSL_DDR2) += law.o
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endif # not minimal
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COBJS := $(COBJS-y)
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SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) $(addprefix $(obj),$(COBJS_LN-y:.o=.c))
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS) $(COBJS_LN-y))
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|
|
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@ -58,7 +58,13 @@
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#define MSR_KERNEL (MSR_FP|MSR_ME|MSR_RI)
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#endif
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#if !defined(CONFIG_NAND_SPL) && !defined(CONFIG_SYS_RAMBOOT)
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#if defined(CONFIG_NAND_SPL) || \
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(defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL))
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#define MINIMAL_SPL
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#endif
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#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NAND_SPL) && \
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!defined(CONFIG_SYS_RAMBOOT)
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#define CONFIG_SYS_FLASHBOOT
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#endif
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@ -72,7 +78,7 @@
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GOT_ENTRY(__bss_start)
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GOT_ENTRY(__bss_end__)
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#ifndef CONFIG_NAND_SPL
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#ifndef MINIMAL_SPL
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GOT_ENTRY(_FIXUP_TABLE_)
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GOT_ENTRY(_start)
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GOT_ENTRY(_start_of_vectors)
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@ -206,7 +212,8 @@ _start: /* time t 0 */
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/* Initialise the E300 processor core */
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/*------------------------------------------*/
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#ifdef CONFIG_NAND_SPL
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#if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MPC83XX_WAIT_FOR_NAND)) || \
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defined(CONFIG_NAND_SPL)
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/* The FCM begins execution after only the first page
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* is loaded. Wait for the rest before branching
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* to another flash page.
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|
@ -292,7 +299,7 @@ in_flash:
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|||
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/* NOTREACHED - board_init_f() does not return */
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#ifndef CONFIG_NAND_SPL
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#ifndef MINIMAL_SPL
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/*
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* Vector Table
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*/
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|
@ -467,7 +474,7 @@ int_return:
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lwz r1,GPR1(r1)
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SYNC
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rfi
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#endif /* !CONFIG_NAND_SPL */
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#endif /* !MINIMAL_SPL */
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/*
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* This code initialises the E300 processor core
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|
@ -724,7 +731,7 @@ setup_bats:
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* Note: requires that all cache bits in
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* HID0 are in the low half word.
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*/
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#ifndef CONFIG_NAND_SPL
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#ifndef MINIMAL_SPL
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.globl icache_enable
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icache_enable:
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mfspr r3, HID0
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@ -753,7 +760,7 @@ icache_status:
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mfspr r3, HID0
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rlwinm r3, r3, (31 - HID0_ICE_SHIFT + 1), 31, 31
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blr
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#endif /* !CONFIG_NAND_SPL */
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#endif /* !MINIMAL_SPL */
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.globl dcache_enable
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dcache_enable:
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@ -936,7 +943,7 @@ in_ram:
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stw r0,0(r3)
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2: bdnz 1b
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#ifndef CONFIG_NAND_SPL
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#ifndef MINIMAL_SPL
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/*
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* Now adjust the fixups and the pointers to the fixups
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* in case we need to move ourselves again.
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@ -991,7 +998,7 @@ clear_bss:
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mr r4, r10 /* Destination Address */
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bl board_init_r
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|
||||
#ifndef CONFIG_NAND_SPL
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#ifndef MINIMAL_SPL
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||||
/*
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* Copy exception vector code to low memory
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||||
*
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||||
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|
@ -1061,7 +1068,7 @@ trap_init:
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mtlr r4 /* restore link register */
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blr
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#endif /* !CONFIG_NAND_SPL */
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#endif /* !MINIMAL_SPL */
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|
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#ifdef CONFIG_SYS_INIT_RAM_LOCK
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lock_ram_in_cache:
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@ -1085,7 +1092,7 @@ lock_ram_in_cache:
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sync
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blr
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#ifndef CONFIG_NAND_SPL
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#ifndef MINIMAL_SPL
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.globl unlock_ram_in_cache
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unlock_ram_in_cache:
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/* invalidate the INIT_RAM section */
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@ -1111,7 +1118,7 @@ unlock_ram_in_cache:
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sync
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mtspr HID0, r3 /* no invalidate, unlock */
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blr
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#endif /* !CONFIG_NAND_SPL */
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||||
#endif /* !MINIMAL_SPL */
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#endif /* CONFIG_SYS_INIT_RAM_LOCK */
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||||
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#ifdef CONFIG_SYS_FLASHBOOT
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|
|
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|||
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@ -47,7 +47,8 @@ endif
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endif
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||||
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ifdef MINIMAL
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COBJS-y += cache.o
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COBJS-y += cache.o time.o
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SOBJS-y += ticks.o
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else
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SOBJS-y += ppcstring.o
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||||
|
|
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|||
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@ -8,7 +8,7 @@
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|||
#
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#Provide at least 16MB spacing between us and the Linux Kernel image
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PAD_TO := 12320
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CONFIG_SPL_PAD_TO := 12320
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UBL_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/ublimage.cfg
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ifndef CONFIG_SPL_BUILD
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ALL-y += $(obj)u-boot.ubl
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|
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@ -31,7 +31,7 @@
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#include <vsc7385.h>
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#include <ns16550.h>
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#include <nand.h>
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#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL)
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#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD)
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#include <asm/gpio.h>
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#endif
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@ -45,7 +45,7 @@ int board_early_init_f(void)
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if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)
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gd->flags |= GD_FLG_SILENT;
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#endif
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#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL)
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#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD)
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mpc83xx_gpio_init_f();
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#endif
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@ -54,7 +54,7 @@ int board_early_init_f(void)
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int board_early_init_r(void)
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{
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#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_NAND_SPL)
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#if defined(CONFIG_MPC83XX_GPIO) && !defined(CONFIG_SPL_BUILD)
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mpc83xx_gpio_init_r();
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#endif
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@ -67,7 +67,7 @@ int checkboard(void)
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return 0;
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}
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#ifndef CONFIG_NAND_SPL
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#ifndef CONFIG_SPL_BUILD
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static struct pci_region pci_regions[] = {
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{
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.bus_start = CONFIG_SYS_PCI1_MEM_BASE,
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@ -140,7 +140,7 @@ void ft_board_setup(void *blob, bd_t *bd)
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#endif
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}
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#endif
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#else /* CONFIG_NAND_SPL */
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#else /* CONFIG_SPL_BUILD */
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void board_init_f(ulong bootflag)
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{
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board_early_init_f();
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|
|
|
|||
|
|
@ -661,8 +661,8 @@ vme8349 powerpc mpc83xx vme8349 esd
|
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MPC8308RDB powerpc mpc83xx mpc8308rdb freescale
|
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MPC8313ERDB_33 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_33MHZ
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MPC8313ERDB_66 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_66MHZ
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MPC8313ERDB_NAND_33 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_33MHZ,NAND_U_BOOT
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MPC8313ERDB_NAND_66 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_66MHZ,NAND_U_BOOT
|
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MPC8313ERDB_NAND_33 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_33MHZ,NAND
|
||||
MPC8313ERDB_NAND_66 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_66MHZ,NAND
|
||||
MPC8315ERDB powerpc mpc83xx mpc8315erdb freescale - MPC8315ERDB
|
||||
MPC8315ERDB_NAND powerpc mpc83xx mpc8315erdb freescale - MPC8315ERDB:NAND_U_BOOT
|
||||
MPC8323ERDB powerpc mpc83xx mpc8323erdb freescale
|
||||
|
|
|
|||
|
|
@ -35,6 +35,25 @@
|
|||
#define CONFIG_MPC8313 1
|
||||
#define CONFIG_MPC8313ERDB 1
|
||||
|
||||
#ifdef CONFIG_NAND
|
||||
#define CONFIG_SPL
|
||||
#define CONFIG_SPL_INIT_MINIMAL
|
||||
#define CONFIG_SPL_SERIAL_SUPPORT
|
||||
#define CONFIG_SPL_NAND_SUPPORT
|
||||
#define CONFIG_SPL_NAND_MINIMAL
|
||||
#define CONFIG_SPL_FLUSH_IMAGE
|
||||
#define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
|
||||
#define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND
|
||||
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
#define CONFIG_NS16550_MIN_FUNCTIONS
|
||||
#endif
|
||||
|
||||
#define CONFIG_SYS_TEXT_BASE 0x00100000 /* CONFIG_SYS_NAND_U_BOOT_DST */
|
||||
#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
|
||||
#define CONFIG_SPL_MAX_SIZE (4 * 1024)
|
||||
#define CONFIG_SPL_PAD_TO 0xfff04000
|
||||
|
||||
#define CONFIG_SYS_NAND_U_BOOT_SIZE (512 << 10)
|
||||
#define CONFIG_SYS_NAND_U_BOOT_DST 0x00100000
|
||||
#define CONFIG_SYS_NAND_U_BOOT_START 0x00100100
|
||||
|
|
@ -42,13 +61,11 @@
|
|||
#define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000
|
||||
#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000)
|
||||
|
||||
#ifdef CONFIG_NAND_U_BOOT
|
||||
#define CONFIG_SYS_TEXT_BASE 0x00100000 /* CONFIG_SYS_NAND_U_BOOT_DST */
|
||||
#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
|
||||
#ifdef CONFIG_NAND_SPL
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
|
||||
#endif /* CONFIG_NAND_SPL */
|
||||
#endif /* CONFIG_NAND_U_BOOT */
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_NAND */
|
||||
|
||||
#ifndef CONFIG_SYS_TEXT_BASE
|
||||
#define CONFIG_SYS_TEXT_BASE 0xFE000000
|
||||
|
|
@ -87,7 +104,7 @@
|
|||
|
||||
#define CONFIG_SYS_IMMR 0xE0000000
|
||||
|
||||
#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
|
||||
#if defined(CONFIG_NAND) && !defined(CONFIG_SPL_BUILD)
|
||||
#define CONFIG_DEFAULT_IMMR CONFIG_SYS_IMMR
|
||||
#endif
|
||||
|
||||
|
|
@ -227,7 +244,7 @@
|
|||
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
|
||||
|
||||
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) && \
|
||||
!defined(CONFIG_NAND_SPL)
|
||||
!defined(CONFIG_SPL_BUILD)
|
||||
#define CONFIG_SYS_RAMBOOT
|
||||
#endif
|
||||
|
||||
|
|
@ -256,7 +273,7 @@
|
|||
#define CONFIG_SYS_LBC_MRTPR 0x20000000 /*TODO */
|
||||
|
||||
/* drivers/mtd/nand/nand.c */
|
||||
#ifdef CONFIG_NAND_SPL
|
||||
#if defined(CONFIG_NAND) && defined(CONFIG_SPL_BUILD)
|
||||
#define CONFIG_SYS_NAND_BASE 0xFFF00000
|
||||
#else
|
||||
#define CONFIG_SYS_NAND_BASE 0xE2800000
|
||||
|
|
@ -292,7 +309,7 @@
|
|||
| OR_FCM_EHTR)
|
||||
/* 0xFFFF8396 */
|
||||
|
||||
#ifdef CONFIG_NAND_U_BOOT
|
||||
#ifdef CONFIG_NAND
|
||||
#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM
|
||||
#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM
|
||||
#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NOR_BR_PRELIM
|
||||
|
|
@ -449,7 +466,7 @@
|
|||
/*
|
||||
* Environment
|
||||
*/
|
||||
#if defined(CONFIG_NAND_U_BOOT)
|
||||
#if defined(CONFIG_NAND)
|
||||
#define CONFIG_ENV_IS_IN_NAND 1
|
||||
#define CONFIG_ENV_OFFSET (512 * 1024)
|
||||
#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
|
||||
|
|
@ -496,7 +513,7 @@
|
|||
#define CONFIG_CMD_DATE
|
||||
#define CONFIG_CMD_PCI
|
||||
|
||||
#if defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_NAND_U_BOOT)
|
||||
#if defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_NAND)
|
||||
#undef CONFIG_CMD_SAVEENV
|
||||
#undef CONFIG_CMD_LOADS
|
||||
#endif
|
||||
|
|
@ -570,7 +587,7 @@
|
|||
HRCWH_TSEC2M_IN_RGMII |\
|
||||
HRCWH_BIG_ENDIAN)
|
||||
|
||||
#ifdef CONFIG_NAND_SPL
|
||||
#ifdef CONFIG_NAND
|
||||
#define CONFIG_SYS_HRCW_HIGH (CONFIG_SYS_HRCW_HIGH_BASE |\
|
||||
HRCWH_FROM_0XFFF00100 |\
|
||||
HRCWH_ROM_LOC_NAND_SP_8BIT |\
|
||||
|
|
|
|||
|
|
@ -1,108 +0,0 @@
|
|||
#
|
||||
# (C) Copyright 2007
|
||||
# Stefan Roese, DENX Software Engineering, sr@denx.de.
|
||||
# (C) Copyright 2008 Freescale Semiconductor
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
NAND_SPL := y
|
||||
PAD_TO := 0xfff04000
|
||||
|
||||
include $(TOPDIR)/config.mk
|
||||
|
||||
nandobj := $(OBJTREE)/nand_spl/
|
||||
|
||||
LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
|
||||
LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE_SPL) \
|
||||
$(LDFLAGS) $(LDFLAGS_FINAL)
|
||||
AFLAGS += -DCONFIG_NAND_SPL
|
||||
CFLAGS += -DCONFIG_NAND_SPL
|
||||
|
||||
SOBJS = start.o ticks.o
|
||||
COBJS = nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o nand_init.o \
|
||||
time.o cache.o
|
||||
|
||||
SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
|
||||
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
|
||||
__OBJS := $(SOBJS) $(COBJS)
|
||||
LNDIR := $(nandobj)board/$(BOARDDIR)
|
||||
|
||||
ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
|
||||
|
||||
all: $(obj).depend $(ALL)
|
||||
|
||||
$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
|
||||
$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
|
||||
|
||||
$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
|
||||
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
|
||||
|
||||
$(nandobj)u-boot-spl: $(OBJS) $(nandobj)u-boot.lds
|
||||
cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \
|
||||
-Map $(nandobj)u-boot-spl.map \
|
||||
-o $(nandobj)u-boot-spl
|
||||
|
||||
$(nandobj)u-boot.lds: $(LDSCRIPT)
|
||||
$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
|
||||
|
||||
# create symbolic links for common files
|
||||
|
||||
$(obj)start.S:
|
||||
ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc83xx/start.S $(obj)start.S
|
||||
|
||||
$(obj)nand_boot_fsl_elbc.c:
|
||||
ln -sf $(SRCTREE)/nand_spl/nand_boot_fsl_elbc.c \
|
||||
$(obj)nand_boot_fsl_elbc.c
|
||||
|
||||
$(obj)sdram.c:
|
||||
ln -sf $(SRCTREE)/board/$(BOARDDIR)/sdram.c $(obj)sdram.c
|
||||
|
||||
$(obj)$(BOARD).c:
|
||||
ln -sf $(SRCTREE)/board/$(BOARDDIR)/$(BOARD).c $(obj)$(BOARD).c
|
||||
|
||||
$(obj)ns16550.c:
|
||||
ln -sf $(SRCTREE)/drivers/serial/ns16550.c $(obj)ns16550.c
|
||||
|
||||
$(obj)nand_init.c:
|
||||
ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc83xx/nand_init.c $(obj)nand_init.c
|
||||
|
||||
$(obj)cache.c:
|
||||
ln -sf $(SRCTREE)/arch/powerpc/lib/cache.c $(obj)cache.c
|
||||
|
||||
$(obj)time.c:
|
||||
ln -sf $(SRCTREE)/arch/powerpc/lib/time.c $(obj)time.c
|
||||
|
||||
$(obj)ticks.S:
|
||||
ln -sf $(SRCTREE)/arch/powerpc/lib/ticks.S $(obj)ticks.S
|
||||
|
||||
#########################################################################
|
||||
|
||||
$(obj)%.o: $(obj)%.S
|
||||
$(CC) $(AFLAGS) -c -o $@ $<
|
||||
|
||||
$(obj)%.o: $(obj)%.c
|
||||
$(CC) $(CFLAGS) -c -o $@ $<
|
||||
|
||||
# defines $(obj).depend target
|
||||
include $(SRCTREE)/rules.mk
|
||||
|
||||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
|
@ -36,7 +36,7 @@ AFLAGS += -DCONFIG_NAND_SPL
|
|||
CFLAGS += -DCONFIG_NAND_SPL
|
||||
|
||||
SOBJS = start.o ticks.o
|
||||
COBJS = nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o nand_init.o \
|
||||
COBJS = nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o spl_minimal.o \
|
||||
time.o cache.o
|
||||
|
||||
SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
|
||||
|
|
@ -80,8 +80,8 @@ $(obj)$(BOARD).c:
|
|||
$(obj)ns16550.c:
|
||||
ln -sf $(SRCTREE)/drivers/serial/ns16550.c $(obj)ns16550.c
|
||||
|
||||
$(obj)nand_init.c:
|
||||
ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc83xx/nand_init.c $(obj)nand_init.c
|
||||
$(obj)spl_minimal.c:
|
||||
ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc83xx/spl_minimal.c $(obj)spl_minimal.c
|
||||
|
||||
$(obj)cache.c:
|
||||
ln -sf $(SRCTREE)/arch/powerpc/lib/cache.c $(obj)cache.c
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@ AFLAGS += -DCONFIG_NAND_SPL
|
|||
CFLAGS += -DCONFIG_NAND_SPL
|
||||
|
||||
SOBJS = start.o ticks.o
|
||||
COBJS = nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o nand_init.o \
|
||||
COBJS = nand_boot_fsl_elbc.o $(BOARD).o sdram.o ns16550.o spl_minimal.o \
|
||||
time.o cache.o
|
||||
|
||||
SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
|
||||
|
|
@ -84,9 +84,9 @@ $(obj)ns16550.c:
|
|||
@rm -f $@
|
||||
ln -s $(SRCTREE)/drivers/serial/ns16550.c $@
|
||||
|
||||
$(obj)nand_init.c:
|
||||
$(obj)spl_minimal.c:
|
||||
@rm -f $@
|
||||
ln -s $(SRCTREE)/arch/powerpc/cpu/mpc83xx/nand_init.c $@
|
||||
ln -s $(SRCTREE)/arch/powerpc/cpu/mpc83xx/spl_minimal.c $@
|
||||
|
||||
$(obj)cache.c:
|
||||
@rm -f $@
|
||||
|
|
|
|||
Loading…
Reference in a new issue