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i2c, soft-i2c: switch to new multibus/multiadapter support
- added to soft_i2c driver new multibus/multiadpater support - adapted all config files, which uses this driver Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Stephen Warren <swarren@wwwdotorg.org>
This commit is contained in:
parent
3f4978c713
commit
ea818dbbcd
168 changed files with 555 additions and 501 deletions
45
README
45
README
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@ -1954,6 +1954,19 @@ CBFS (Coreboot Filesystem) support
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interface.
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ported i2c driver to the new framework:
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- drivers/i2c/soft_i2c.c:
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- activate first bus with CONFIG_SYS_I2C_SOFT define
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CONFIG_SYS_I2C_SOFT_SPEED and CONFIG_SYS_I2C_SOFT_SLAVE
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for defining speed and slave address
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- activate second bus with I2C_SOFT_DECLARATIONS2 define
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CONFIG_SYS_I2C_SOFT_SPEED_2 and CONFIG_SYS_I2C_SOFT_SLAVE_2
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for defining speed and slave address
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- activate third bus with I2C_SOFT_DECLARATIONS3 define
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CONFIG_SYS_I2C_SOFT_SPEED_3 and CONFIG_SYS_I2C_SOFT_SLAVE_3
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for defining speed and slave address
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- activate fourth bus with I2C_SOFT_DECLARATIONS4 define
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CONFIG_SYS_I2C_SOFT_SPEED_4 and CONFIG_SYS_I2C_SOFT_SLAVE_4
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for defining speed and slave address
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additional defines:
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@ -1992,18 +2005,18 @@ CBFS (Coreboot Filesystem) support
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which defines
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bus 0 on adapter 0 without a mux
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bus 1 on adapter 0 without a PCA9547 on address 0x70 port 1
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bus 2 on adapter 0 without a PCA9547 on address 0x70 port 2
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bus 3 on adapter 0 without a PCA9547 on address 0x70 port 3
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bus 4 on adapter 0 without a PCA9547 on address 0x70 port 4
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bus 5 on adapter 0 without a PCA9547 on address 0x70 port 5
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bus 1 on adapter 0 with a PCA9547 on address 0x70 port 1
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bus 2 on adapter 0 with a PCA9547 on address 0x70 port 2
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bus 3 on adapter 0 with a PCA9547 on address 0x70 port 3
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bus 4 on adapter 0 with a PCA9547 on address 0x70 port 4
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bus 5 on adapter 0 with a PCA9547 on address 0x70 port 5
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bus 6 on adapter 1 without a mux
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bus 7 on adapter 1 without a PCA9544 on address 0x72 port 1
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bus 8 on adapter 1 without a PCA9544 on address 0x72 port 2
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bus 7 on adapter 1 with a PCA9544 on address 0x72 port 1
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bus 8 on adapter 1 with a PCA9544 on address 0x72 port 2
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If you do not have i2c muxes on your board, omit this define.
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- Legacy I2C Support: CONFIG_HARD_I2C | CONFIG_SOFT_I2C
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- Legacy I2C Support: CONFIG_HARD_I2C
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NOTE: It is intended to move drivers to CONFIG_SYS_I2C which
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provides the following compelling advantages:
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@ -2014,9 +2027,9 @@ CBFS (Coreboot Filesystem) support
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** Please consider updating your I2C driver now. **
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These enable legacy I2C serial bus commands. Defining either of
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(but not both of) CONFIG_HARD_I2C or CONFIG_SOFT_I2C will
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include the appropriate I2C driver for the selected CPU.
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These enable legacy I2C serial bus commands. Defining
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CONFIG_HARD_I2C will include the appropriate I2C driver
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for the selected CPU.
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This will allow you to use i2c commands at the u-boot
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command line (as long as you set CONFIG_CMD_I2C in
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@ -2026,12 +2039,8 @@ CBFS (Coreboot Filesystem) support
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CONFIG_HARD_I2C selects a hardware I2C controller.
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CONFIG_SOFT_I2C configures u-boot to use a software (aka
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bit-banging) driver instead of CPM or similar hardware
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support for I2C.
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There are several other quantities that must also be
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defined when you define CONFIG_HARD_I2C or CONFIG_SOFT_I2C.
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defined when you define CONFIG_HARD_I2C.
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In both cases you will need to define CONFIG_SYS_I2C_SPEED
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to be the frequency (in Hz) at which you wish your i2c bus
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@ -2053,7 +2062,7 @@ CBFS (Coreboot Filesystem) support
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That's all that's required for CONFIG_HARD_I2C.
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If you use the software i2c interface (CONFIG_SOFT_I2C)
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If you use the software i2c interface (CONFIG_SYS_I2C_SOFT)
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then the following macros need to be defined (examples are
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from include/configs/lwmon.h):
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@ -3672,7 +3681,7 @@ to save the current settings.
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I2C muxes, you can define here, how to reach this
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EEPROM. For example:
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#define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0"
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#define CONFIG_I2C_ENV_EEPROM_BUS 1
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EEPROM which holds the environment, is reached over
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a pca9547 i2c mux with address 0x70, channel 3.
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@ -144,7 +144,7 @@
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* I2C related stuff
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*/
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#ifdef CONFIG_CMD_I2C
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#ifndef CONFIG_SOFT_I2C
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#ifndef CONFIG_SYS_I2C_SOFT
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#define CONFIG_I2C_MVTWSI
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#endif
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#define CONFIG_SYS_I2C_SLAVE 0x0
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@ -69,7 +69,6 @@ extern void dataflash_print_info(void);
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#endif
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#if defined(CONFIG_HARD_I2C) || \
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defined(CONFIG_SOFT_I2C) || \
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defined(CONFIG_SYS_I2C)
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#include <i2c.h>
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#endif
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@ -166,7 +165,7 @@ static int display_dram_config(void)
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return (0);
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}
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
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static int init_func_i2c(void)
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{
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puts("I2C: ");
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@ -273,7 +272,7 @@ init_fnc_t *init_sequence[] = {
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#if defined(CONFIG_DISPLAY_BOARDINFO)
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checkboard, /* display board info */
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#endif
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
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init_func_i2c,
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#endif
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dram_init, /* configure available RAM banks */
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@ -56,7 +56,7 @@
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#include <version.h>
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#if defined(CONFIG_HARD_I2C) || \
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defined(CONFIG_SOFT_I2C)
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defined(CONFIG_SYS_I2C)
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#include <i2c.h>
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#endif
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@ -142,8 +142,7 @@ static int init_func_ram (void)
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/***********************************************************************/
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) || \
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defined(CONFIG_SYS_I2C)
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
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static int init_func_i2c (void)
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{
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puts ("I2C: ");
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@ -183,8 +182,7 @@ init_fnc_t *init_sequence[] = {
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display_options,
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checkcpu,
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checkboard,
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) || \
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defined(CONFIG_SYS_I2C)
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
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init_func_i2c,
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#endif
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#if defined(CONFIG_HARD_SPI)
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@ -98,8 +98,7 @@ extern void sc3_read_eeprom(void);
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#if defined(CONFIG_CMD_DOC)
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void doc_init(void);
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#endif
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#if defined(CONFIG_HARD_I2C) || \
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defined(CONFIG_SOFT_I2C)
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
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#include <i2c.h>
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#endif
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#include <spi.h>
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@ -214,8 +213,7 @@ static int init_func_ram(void)
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/***********************************************************************/
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) || \
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defined(CONFIG_SYS_I2C)
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
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static int init_func_i2c(void)
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{
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puts("I2C: ");
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@ -312,8 +310,7 @@ static init_fnc_t *init_sequence[] = {
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misc_init_f,
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#endif
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INIT_FUNC_WATCHDOG_RESET
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) || \
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defined(CONFIG_SYS_I2C)
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
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init_func_i2c,
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#endif
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#if defined(CONFIG_HARD_SPI)
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@ -288,7 +288,7 @@ int drv_video_init(void)
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}
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#endif
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#ifdef CONFIG_SOFT_I2C
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#ifdef CONFIG_SYS_I2C_SOFT
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void i2c_init_board(void)
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{
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@ -323,7 +323,7 @@ int board_eth_init(bd_t *bis)
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return rc;
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}
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#ifdef CONFIG_SOFT_I2C
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#ifdef CONFIG_SYS_I2C_SOFT
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void i2c_init_board(void)
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{
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u32 pin;
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@ -170,7 +170,7 @@ const iop_conf_t iop_conf_tab[4][32] = {
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/* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */
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/* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */
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/* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */
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#if defined(CONFIG_SOFT_I2C)
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#if defined(CONFIG_SYS_I2C_SOFT)
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/* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
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/* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
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#else
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@ -145,7 +145,7 @@ int board_init(void)
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/* Initialise peripherals */
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at91_seriald_hw_init();
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i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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i2c_set_bus_num(0);
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nand_hw_init();
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macb_hw_init();
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@ -325,7 +325,7 @@ int board_early_init_r(void)
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#ifdef CONFIG_MISC_INIT_R
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int misc_init_r(void)
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{
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
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#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
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uchar buf[6];
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char str[18];
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char hostname[MODULE_NAME_MAXLEN];
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" device at address %02X:%04X\n", CONFIG_SYS_I2C_EEPROM,
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CONFIG_MAC_OFFSET);
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}
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#endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) */
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#endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT) */
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if (!getenv("ethaddr"))
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printf(LOG_PREFIX "MAC address not set, networking is not "
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"operational\n");
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@ -161,7 +161,7 @@ const iop_conf_t iop_conf_tab[4][32] = {
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/* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */
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/* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */
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/* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */
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#if defined(CONFIG_SOFT_I2C)
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#if defined(CONFIG_SYS_I2C_SOFT)
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/* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
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/* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
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#else
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@ -163,7 +163,7 @@ const iop_conf_t iop_conf_tab[4][32] = {
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/* PD18 */ { 0, 0, 0, 0, 0, 0 }, /* PD18 */
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/* PD17 */ { 0, 0, 0, 0, 0, 0 }, /* PD17 */
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/* PD16 */ { 0, 0, 0, 0, 0, 0 }, /* PD16 */
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#if defined(CONFIG_SOFT_I2C)
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#if defined(CONFIG_SYS_I2C_SOFT)
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/* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
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/* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
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#else
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@ -245,7 +245,7 @@ int board_eth_init(bd_t *bis)
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* However i2c_get_bus_num() cannot be called before
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* relocation.
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*/
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#ifdef CONFIG_SOFT_I2C
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#ifdef CONFIG_SYS_I2C_SOFT
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void iic_init(void)
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{
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/* ports are now initialized in board_early_init_f() */
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@ -253,7 +253,7 @@ void iic_init(void)
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int iic_read(void)
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{
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switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
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switch (I2C_ADAP_HWNR) {
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case 0:
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return at91_get_pio_value(I2C0_PORT, SDA0_PIN);
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case 1:
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@ -264,7 +264,7 @@ int iic_read(void)
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void iic_sda(int bit)
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{
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switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
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switch (I2C_ADAP_HWNR) {
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case 0:
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at91_set_pio_value(I2C0_PORT, SDA0_PIN, bit);
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break;
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@ -276,7 +276,7 @@ void iic_sda(int bit)
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void iic_scl(int bit)
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{
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switch ((gd->flags & GD_FLG_RELOC) ? i2c_get_bus_num() : 0) {
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switch (I2C_ADAP_HWNR) {
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case 0:
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at91_set_pio_value(I2C0_PORT, SCL0_PIN, bit);
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break;
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@ -73,7 +73,7 @@ int board_eth_init(bd_t *bis)
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}
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#endif
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#ifdef CONFIG_SOFT_I2C
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#ifdef CONFIG_SYS_I2C_SOFT
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void i2c_init_board(void)
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{
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u32 pin;
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@ -84,7 +84,7 @@ CONFIG_MCFPIT -- define to use PIT timer
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CONFIG_FSL_I2C -- define to use FSL common I2C driver
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CONFIG_HARD_I2C -- define for I2C hardware support
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CONFIG_SOFT_I2C -- define for I2C bit-banged
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CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
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CONFIG_SYS_I2C_SPEED -- define for I2C speed
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CONFIG_SYS_I2C_SLAVE -- define for I2C slave address
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CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset
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@ -92,7 +92,7 @@ CONFIG_MCFPIT -- define to use PIT timer
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CONFIG_FSL_I2C -- define to use FSL common I2C driver
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CONFIG_HARD_I2C -- define for I2C hardware support
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CONFIG_SOFT_I2C -- define for I2C bit-banged
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CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
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CONFIG_SYS_I2C_SPEED -- define for I2C speed
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CONFIG_SYS_I2C_SLAVE -- define for I2C slave address
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CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset
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@ -91,7 +91,7 @@ CONFIG_MCFPIT -- define to use PIT timer
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CONFIG_FSL_I2C -- define to use FSL common I2C driver
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CONFIG_HARD_I2C -- define for I2C hardware support
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CONFIG_SOFT_I2C -- define for I2C bit-banged
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CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
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CONFIG_SYS_I2C_SPEED -- define for I2C speed
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CONFIG_SYS_I2C_SLAVE -- define for I2C slave address
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CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset
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@ -114,7 +114,7 @@ CONFIG_MCFPIT -- define to use PIT timer
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CONFIG_FSL_I2C -- define to use FSL common I2C driver
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CONFIG_HARD_I2C -- define for I2C hardware support
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CONFIG_SOFT_I2C -- define for I2C bit-banged
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CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
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CONFIG_SYS_I2C_SPEED -- define for I2C speed
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CONFIG_SYS_I2C_SLAVE -- define for I2C slave address
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CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset
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@ -99,7 +99,7 @@ CONFIG_SLTTMR -- define to use SLT timer
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CONFIG_FSL_I2C -- define to use FSL common I2C driver
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CONFIG_HARD_I2C -- define for I2C hardware support
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CONFIG_SOFT_I2C -- define for I2C bit-banged
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CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
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CONFIG_SYS_I2C_SPEED -- define for I2C speed
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CONFIG_SYS_I2C_SLAVE -- define for I2C slave address
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CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset
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@ -51,7 +51,7 @@ const iop_conf_t iop_conf_tab[4][32] = {
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/* PA27 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXDV */
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/* PA26 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 RXER */
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/* PA25 */ { 0, 0, 0, 0, 1, 0 }, /* 8247_P0 */
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#if defined(CONFIG_SOFT_I2C)
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#if defined(CONFIG_SYS_I2C_SOFT)
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/* PA24 */ { 1, 0, 0, 0, 1, 1 }, /* I2C_SDA2 */
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/* PA23 */ { 1, 0, 0, 1, 1, 1 }, /* I2C_SCL2 */
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#else /* normal I/O port pins */
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@ -318,10 +318,14 @@ int ivm_read_eeprom(void)
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I2C_MUX_DEVICE *dev = NULL;
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#endif
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uchar i2c_buffer[CONFIG_SYS_IVM_EEPROM_MAX_LEN];
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uchar *buf;
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char *buf;
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unsigned long dev_addr = CONFIG_SYS_IVM_EEPROM_ADR;
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||||
int ret;
|
||||
|
||||
#if defined(CONFIG_SYS_I2C)
|
||||
buf = getenv("EEprom_ivm");
|
||||
i2c_set_bus_num(buf ? (int)simple_strtol(buf, NULL, 10) : 0);
|
||||
#else
|
||||
#if defined(CONFIG_I2C_MUX)
|
||||
/* First init the Bus, select the Bus */
|
||||
buf = (unsigned char *) getenv("EEprom_ivm");
|
||||
|
|
|
@ -63,7 +63,7 @@ static const u32 kwmpp_config[] = {
|
|||
MPP5_NF_IO7,
|
||||
MPP6_SYSRST_OUTn,
|
||||
MPP7_PEX_RST_OUTn,
|
||||
#if defined(CONFIG_SOFT_I2C)
|
||||
#if defined(CONFIG_SYS_I2C_SOFT)
|
||||
MPP8_GPIO, /* SDA */
|
||||
MPP9_GPIO, /* SCL */
|
||||
#endif
|
||||
|
@ -234,7 +234,7 @@ int misc_init_r(void)
|
|||
|
||||
int board_early_init_f(void)
|
||||
{
|
||||
#if defined(CONFIG_SOFT_I2C)
|
||||
#if defined(CONFIG_SYS_I2C_SOFT)
|
||||
u32 tmp;
|
||||
|
||||
/* set the 2 bitbang i2c pins as output gpios */
|
||||
|
@ -260,7 +260,7 @@ int board_init(void)
|
|||
kw_gpio_set_valid(KM_FLASH_GPIO_PIN, 1);
|
||||
kw_gpio_direction_output(KM_FLASH_GPIO_PIN, 1);
|
||||
|
||||
#if defined(CONFIG_SOFT_I2C)
|
||||
#if defined(CONFIG_SYS_I2C_SOFT)
|
||||
/*
|
||||
* Reinit the GPIO for I2C Bitbang driver so that the now
|
||||
* available gpio framework is consistent. The calls to
|
||||
|
@ -440,7 +440,7 @@ int hush_init_var(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SOFT_I2C)
|
||||
#if defined(CONFIG_SYS_I2C_SOFT)
|
||||
void set_sda(int state)
|
||||
{
|
||||
I2C_ACTIVE;
|
||||
|
|
|
@ -480,7 +480,7 @@ static void kbd_init (void)
|
|||
uchar val, errcd;
|
||||
int i;
|
||||
|
||||
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
|
||||
i2c_set_bus_num(0);
|
||||
|
||||
gd->arch.kbd_status = 0;
|
||||
|
||||
|
|
|
@ -104,7 +104,7 @@ int pcmcia_hardware_enable(int slot)
|
|||
|
||||
/* switch VCC on */
|
||||
val |= MAX1604_OP_SUS | MAX1604_VCCBON;
|
||||
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
|
||||
i2c_set_bus_num(0);
|
||||
i2c_write (CONFIG_SYS_I2C_POWER_A_ADDR, 0, 0, &val, 1);
|
||||
|
||||
udelay(500000);
|
||||
|
@ -193,7 +193,7 @@ int pcmcia_voltage_set(int slot, int vcc, int vpp)
|
|||
*/
|
||||
debug ("PCMCIA power OFF\n");
|
||||
val = MAX1604_VCCBHIZ | MAX1604_VPPBHIZ;
|
||||
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
|
||||
i2c_set_bus_num(0);
|
||||
i2c_write (CONFIG_SYS_I2C_POWER_A_ADDR, 0, 0, &val, 1);
|
||||
|
||||
val = 0;
|
||||
|
|
|
@ -169,7 +169,7 @@ const iop_conf_t iop_conf_tab[4][32] = {
|
|||
/* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
|
||||
/* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* PD17 */
|
||||
/* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* PD16 */
|
||||
#if defined(CONFIG_SOFT_I2C)
|
||||
#if defined(CONFIG_SYS_I2C_SOFT)
|
||||
/* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
|
||||
/* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
|
||||
#else
|
||||
|
|
|
@ -169,7 +169,7 @@ const iop_conf_t iop_conf_tab[4][32] = {
|
|||
/* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
|
||||
/* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* PD17 */
|
||||
/* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* PD16 */
|
||||
#if defined(CONFIG_SOFT_I2C)
|
||||
#if defined(CONFIG_SYS_I2C_SOFT)
|
||||
/* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
|
||||
/* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
|
||||
#else
|
||||
|
|
|
@ -187,7 +187,7 @@ const iop_conf_t iop_conf_tab[4][32] = {
|
|||
/* PD17 */ { CONF, SPEC, 1, DOUT, ACTV, 0 }, /* SPI_MOSI */
|
||||
/* PD16 */ { CONF, SPEC, 1, DIN, ACTV, 0 }, /* SPI_MISO */
|
||||
#endif
|
||||
#if defined(CONFIG_SOFT_I2C)
|
||||
#if defined(CONFIG_SYS_I2C_SOFT)
|
||||
/* PD15 */ { CONF, GPIO, 0, DOUT, OPEN, 1 }, /* I2C_SDA */
|
||||
/* PD14 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* I2C_SCL */
|
||||
#else
|
||||
|
|
|
@ -32,7 +32,6 @@
|
|||
#include <spd_sdram.h>
|
||||
#include <i2c.h>
|
||||
#include "../common/sb_common.h"
|
||||
#include "../common/ppc440gx_i2c.h"
|
||||
#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) || \
|
||||
defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
|
||||
#include <net.h>
|
||||
|
|
|
@ -160,7 +160,7 @@ const iop_conf_t iop_conf_tab[4][32] = {
|
|||
/* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
|
||||
/* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
|
||||
/* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
|
||||
#if defined(CONFIG_SOFT_I2C)
|
||||
#if defined(CONFIG_SYS_I2C_SOFT)
|
||||
/* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
|
||||
/* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
|
||||
#else
|
||||
|
|
|
@ -180,7 +180,7 @@ const iop_conf_t iop_conf_tab[4][32] = {
|
|||
/* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
|
||||
/* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
|
||||
/* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
|
||||
#if defined(CONFIG_SOFT_I2C)
|
||||
#if defined(CONFIG_SYS_I2C_SOFT)
|
||||
/* PD15 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SDA */
|
||||
/* PD14 */ { 1, 0, 0, 1, 1, 1 }, /* I2C SCL */
|
||||
#else
|
||||
|
|
|
@ -50,4 +50,4 @@ typedef struct{
|
|||
|
||||
static HWIB_INFO hwinf = {0, 0, 1, 0, 1, 0, 0, 0, 0, 8272, 0 ,0,
|
||||
0, 0, 0, 0, 0, 0};
|
||||
#endif
|
||||
#endif /* __CONFIG_H */
|
||||
|
|
|
@ -261,8 +261,7 @@ void __dram_init_banksize(void)
|
|||
void dram_init_banksize(void)
|
||||
__attribute__((weak, alias("__dram_init_banksize")));
|
||||
|
||||
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) || \
|
||||
defined(CONFIG_SYS_I2C)
|
||||
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
|
||||
static int init_func_i2c(void)
|
||||
{
|
||||
puts("I2C: ");
|
||||
|
@ -920,8 +919,7 @@ static init_fnc_t init_sequence_f[] = {
|
|||
misc_init_f,
|
||||
#endif
|
||||
INIT_FUNC_WATCHDOG_RESET
|
||||
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) || \
|
||||
defined(CONFIG_SYS_I2C)
|
||||
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
|
||||
init_func_i2c,
|
||||
#endif
|
||||
#if defined(CONFIG_HARD_SPI)
|
||||
|
|
|
@ -406,8 +406,7 @@ void eeprom_init (void)
|
|||
#if defined(CONFIG_SPI) && !defined(CONFIG_ENV_EEPROM_IS_ON_I2C)
|
||||
spi_init_f ();
|
||||
#endif
|
||||
#if defined(CONFIG_HARD_I2C) || \
|
||||
defined(CONFIG_SOFT_I2C)
|
||||
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C_SOFT)
|
||||
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
|
||||
#endif
|
||||
}
|
||||
|
|
|
@ -34,8 +34,8 @@
|
|||
#ifdef CONFIG_LOGBUFFER
|
||||
#include <logbuff.h>
|
||||
#endif
|
||||
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) || \
|
||||
defined(CONFIG_SYS_I2C_ADAPTERS)
|
||||
|
||||
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C)
|
||||
#include <i2c.h>
|
||||
#endif
|
||||
|
||||
|
@ -216,11 +216,9 @@ int stdio_init (void)
|
|||
drv_arm_dcc_init ();
|
||||
#endif
|
||||
#ifdef CONFIG_SYS_I2C
|
||||
#ifdef CONFIG_SYS_I2C_ADAPTERS
|
||||
i2c_init_all();
|
||||
#endif
|
||||
#else
|
||||
#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
|
||||
#if defined(CONFIG_HARD_I2C)
|
||||
i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
|
||||
#endif
|
||||
#endif
|
||||
|
|
|
@ -40,13 +40,13 @@ COBJS-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o
|
|||
COBJS-$(CONFIG_PPC4XX_I2C) += ppc4xx_i2c.o
|
||||
COBJS-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o
|
||||
COBJS-$(CONFIG_S3C44B0_I2C) += s3c44b0_i2c.o
|
||||
COBJS-$(CONFIG_SOFT_I2C) += soft_i2c.o
|
||||
COBJS-$(CONFIG_TEGRA_I2C) += tegra_i2c.o
|
||||
COBJS-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
|
||||
COBJS-$(CONFIG_U8500_I2C) += u8500_i2c.o
|
||||
COBJS-$(CONFIG_SH_I2C) += sh_i2c.o
|
||||
COBJS-$(CONFIG_SH_SH7734_I2C) += sh_sh7734_i2c.o
|
||||
COBJS-$(CONFIG_SYS_I2C) += i2c_core.o
|
||||
COBJS-$(CONFIG_SYS_I2C_SOFT) += soft_i2c.o
|
||||
COBJS-$(CONFIG_ZYNQ_I2C) += zynq_i2c.o
|
||||
|
||||
COBJS := $(COBJS-y)
|
||||
|
|
|
@ -1,4 +1,8 @@
|
|||
/*
|
||||
* (C) Copyright 2009
|
||||
* Heiko Schocher, DENX Software Engineering, hs@denx.de.
|
||||
* Changes for multibus/multiadapter I2C support.
|
||||
*
|
||||
* (C) Copyright 2001, 2002
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
|
@ -103,14 +107,30 @@
|
|||
|
||||
/* #define DEBUG_I2C */
|
||||
|
||||
#ifdef DEBUG_I2C
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
#ifndef I2C_SOFT_DECLARATIONS
|
||||
# if defined(CONFIG_MPC8260)
|
||||
# define I2C_SOFT_DECLARATIONS volatile ioport_t *iop = \
|
||||
ioport_addr((immap_t *)CONFIG_SYS_IMMR, I2C_PORT);
|
||||
# elif defined(CONFIG_8xx)
|
||||
# define I2C_SOFT_DECLARATIONS volatile immap_t *immr = \
|
||||
(immap_t *)CONFIG_SYS_IMMR;
|
||||
# else
|
||||
# define I2C_SOFT_DECLARATIONS
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#if !defined(CONFIG_SYS_SOFT_I2C_SPEED)
|
||||
#define CONFIG_SYS_SOFT_I2C_SPEED CONFIG_SYS_I2C_SPEED
|
||||
#endif
|
||||
#if !defined(CONFIG_SYS_SOFT_I2C_SLAVE)
|
||||
#define CONFIG_SYS_SOFT_I2C_SLAVE CONFIG_SYS_I2C_SLAVE
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Definitions
|
||||
*/
|
||||
|
||||
#define RETRIES 0
|
||||
|
||||
#define I2C_ACK 0 /* PD_SDA level to ack a byte */
|
||||
|
@ -125,10 +145,6 @@ DECLARE_GLOBAL_DATA_PTR;
|
|||
#define PRINTD(fmt,args...)
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_I2C_MULTI_BUS)
|
||||
static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
|
||||
#endif /* CONFIG_I2C_MULTI_BUS */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Local functions
|
||||
*/
|
||||
|
@ -267,39 +283,6 @@ static int write_byte(uchar data)
|
|||
return(nack); /* not a nack is an ack */
|
||||
}
|
||||
|
||||
#if defined(CONFIG_I2C_MULTI_BUS)
|
||||
/*
|
||||
* Functions for multiple I2C bus handling
|
||||
*/
|
||||
unsigned int i2c_get_bus_num(void)
|
||||
{
|
||||
return i2c_bus_num;
|
||||
}
|
||||
|
||||
int i2c_set_bus_num(unsigned int bus)
|
||||
{
|
||||
#if defined(CONFIG_I2C_MUX)
|
||||
if (bus < CONFIG_SYS_MAX_I2C_BUS) {
|
||||
i2c_bus_num = bus;
|
||||
} else {
|
||||
int ret;
|
||||
|
||||
ret = i2x_mux_select_mux(bus);
|
||||
i2c_init_board();
|
||||
if (ret == 0)
|
||||
i2c_bus_num = bus;
|
||||
else
|
||||
return ret;
|
||||
}
|
||||
#else
|
||||
if (bus >= CONFIG_SYS_MAX_I2C_BUS)
|
||||
return -1;
|
||||
i2c_bus_num = bus;
|
||||
#endif
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* if ack == I2C_ACK, ACK the byte so can continue reading, else
|
||||
* send I2C_NOACK to end the read.
|
||||
|
@ -330,14 +313,10 @@ static uchar read_byte(int ack)
|
|||
return(data);
|
||||
}
|
||||
|
||||
/*=====================================================================*/
|
||||
/* Public Functions */
|
||||
/*=====================================================================*/
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Initialization
|
||||
*/
|
||||
void i2c_init (int speed, int slaveaddr)
|
||||
static void soft_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
|
||||
{
|
||||
#if defined(CONFIG_SYS_I2C_INIT_BOARD)
|
||||
/* call board specific i2c bus reset routine before accessing the */
|
||||
|
@ -360,7 +339,7 @@ void i2c_init (int speed, int slaveaddr)
|
|||
* completion of EEPROM writes since the chip stops responding until
|
||||
* the write completes (typically 10mSec).
|
||||
*/
|
||||
int i2c_probe(uchar addr)
|
||||
static int soft_i2c_probe(struct i2c_adapter *adap, uint8_t addr)
|
||||
{
|
||||
int rc;
|
||||
|
||||
|
@ -378,7 +357,8 @@ int i2c_probe(uchar addr)
|
|||
/*-----------------------------------------------------------------------
|
||||
* Read bytes
|
||||
*/
|
||||
int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
|
||||
static int soft_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
|
||||
int alen, uchar *buffer, int len)
|
||||
{
|
||||
int shift;
|
||||
PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
|
||||
|
@ -452,7 +432,8 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
|
|||
/*-----------------------------------------------------------------------
|
||||
* Write bytes
|
||||
*/
|
||||
int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
|
||||
static int soft_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
|
||||
int alen, uchar *buffer, int len)
|
||||
{
|
||||
int shift, failures = 0;
|
||||
|
||||
|
@ -482,3 +463,32 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
|
|||
send_stop();
|
||||
return(failures);
|
||||
}
|
||||
|
||||
/*
|
||||
* Register soft i2c adapters
|
||||
*/
|
||||
U_BOOT_I2C_ADAP_COMPLETE(soft0, soft_i2c_init, soft_i2c_probe,
|
||||
soft_i2c_read, soft_i2c_write, NULL,
|
||||
CONFIG_SYS_I2C_SOFT_SPEED, CONFIG_SYS_I2C_SOFT_SLAVE,
|
||||
0)
|
||||
#if defined(I2C_SOFT_DECLARATIONS2)
|
||||
U_BOOT_I2C_ADAP_COMPLETE(soft1, soft_i2c_init, soft_i2c_probe,
|
||||
soft_i2c_read, soft_i2c_write, NULL,
|
||||
CONFIG_SYS_I2C_SOFT_SPEED_2,
|
||||
CONFIG_SYS_I2C_SOFT_SLAVE_2,
|
||||
1)
|
||||
#endif
|
||||
#if defined(I2C_SOFT_DECLARATIONS3)
|
||||
U_BOOT_I2C_ADAP_COMPLETE(soft2, soft_i2c_init, soft_i2c_probe,
|
||||
soft_i2c_read, soft_i2c_write, NULL,
|
||||
CONFIG_SYS_I2C_SOFT_SPEED_3,
|
||||
CONFIG_SYS_I2C_SOFT_SLAVE_3,
|
||||
2)
|
||||
#endif
|
||||
#if defined(I2C_SOFT_DECLARATIONS4)
|
||||
U_BOOT_I2C_ADAP_COMPLETE(soft3, soft_i2c_init, soft_i2c_probe,
|
||||
soft_i2c_read, soft_i2c_write, NULL,
|
||||
CONFIG_SYS_I2C_SOFT_SPEED_4,
|
||||
CONFIG_SYS_I2C_SOFT_SLAVE_4,
|
||||
3)
|
||||
#endif
|
||||
|
|
|
@ -86,8 +86,8 @@
|
|||
* PCI stuff
|
||||
*-----------------------------------------------------------------------
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* To enable I2C support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_HARD_I2C 1 /* To enable I2C support */
|
||||
#undef CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
||||
|
|
|
@ -277,7 +277,6 @@ extern unsigned long get_sdram_size(void);
|
|||
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_I2C_CMD_TREE
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address*/
|
||||
|
|
|
@ -180,6 +180,7 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C EEPROM (CAT24WC08) for environment
|
||||
*/
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
|
|
|
@ -129,10 +129,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C/EEPROM/RTC configuration
|
||||
*/
|
||||
#define CONFIG_SOFT_I2C /* Software I2C support enabled */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 50000
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
|
||||
|
||||
# define CONFIG_SYS_I2C_SPEED 50000
|
||||
# define CONFIG_SYS_I2C_SLAVE 0xFE
|
||||
/*
|
||||
* Software (bit-bang) I2C driver configuration
|
||||
*/
|
||||
|
|
|
@ -133,10 +133,11 @@
|
|||
/*-----------------------------------------------------------------------
|
||||
* I2C/EEPROM/RTC configuration
|
||||
*/
|
||||
#define CONFIG_SOFT_I2C /* Software I2C support enabled */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 50000
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
|
||||
|
||||
# define CONFIG_SYS_I2C_SPEED 50000
|
||||
# define CONFIG_SYS_I2C_SLAVE 0xFE
|
||||
/*
|
||||
* Software (bit-bang) I2C driver configuration
|
||||
*/
|
||||
|
|
|
@ -171,7 +171,6 @@
|
|||
* I2C
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
|
|
@ -158,26 +158,33 @@
|
|||
/*
|
||||
* Enable I2C and select the hardware/software driver
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* CPM based I2C */
|
||||
#undef CONFIG_SOFT_I2C /* Bit-banged I2C */
|
||||
#define CONFIG_HARD_I2C 1 /* CPM based I2C */
|
||||
#undef CONFIG_SYS_I2C_SOFT /* Bit-banged I2C */
|
||||
|
||||
#ifdef CONFIG_HARD_I2C
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* clock speed in Hz */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0xFE /* I2C slave address */
|
||||
#define CONFIG_SYS_I2C_SPEED 100000 /* clock speed in Hz */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0xFE /* I2C slave address */
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SOFT_I2C
|
||||
#define PB_SCL 0x00000020 /* PB 26 */
|
||||
#define PB_SDA 0x00000010 /* PB 27 */
|
||||
#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
|
||||
#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
|
||||
#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
|
||||
#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
|
||||
#define I2C_SDA(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
|
||||
else immr->im_cpm.cp_pbdat &= ~PB_SDA
|
||||
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
|
||||
else immr->im_cpm.cp_pbdat &= ~PB_SCL
|
||||
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
|
||||
#ifdef CONFIG_SYS_I2C_SOFT
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 50000
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
|
||||
#define PB_SCL 0x00000020 /* PB 26 */
|
||||
#define PB_SDA 0x00000010 /* PB 27 */
|
||||
#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
|
||||
#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
|
||||
#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
|
||||
#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
|
||||
#define I2C_SDA(bit) if (bit) \
|
||||
immr->im_cpm.cp_pbdat |= PB_SDA; \
|
||||
else \
|
||||
immr->im_cpm.cp_pbdat &= ~PB_SDA
|
||||
#define I2C_SCL(bit) if (bit) \
|
||||
immr->im_cpm.cp_pbdat |= PB_SCL; \
|
||||
else \
|
||||
immr->im_cpm.cp_pbdat &= ~PB_SCL
|
||||
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
|
@ -169,12 +169,15 @@
|
|||
* configuration items that the driver uses to drive the port pins.
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* To enable I2C support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#undef CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
||||
#ifdef CONFIG_SOFT_I2C
|
||||
#ifdef CONFIG_SYS_I2C_SOFT
|
||||
#error "Soft I2C is not configured properly. Please review!"
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 50000
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
|
||||
#define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */
|
||||
#define I2C_ACTIVE (iop->pdir |= 0x00010000)
|
||||
#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
|
||||
|
@ -184,7 +187,7 @@
|
|||
#define I2C_SCL(bit) if(bit) iop->pdat |= 0x00020000; \
|
||||
else iop->pdat &= ~0x00020000
|
||||
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
|
||||
#endif /* CONFIG_SOFT_I2C */
|
||||
#endif /* CONFIG_SYS_I2C_SOFT */
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 /* EEPROM IS24C02 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
|
|
@ -106,12 +106,10 @@
|
|||
#define CONFIG_DOS_PARTITION
|
||||
|
||||
/* enable I2C and select the hardware/software driver */
|
||||
#undef CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
|
||||
# define CONFIG_SYS_I2C_SPEED 50000
|
||||
# define CONFIG_SYS_I2C_SLAVE 0xFE
|
||||
# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
|
||||
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 50000
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
|
||||
/*
|
||||
* Software (bit-bang) I2C driver configuration
|
||||
*/
|
||||
|
@ -133,6 +131,9 @@
|
|||
|
||||
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
|
||||
|
||||
|
||||
/*
|
||||
* Command line configuration.
|
||||
|
|
|
@ -73,11 +73,10 @@
|
|||
#define CONFIG_MISC_INIT_R 1
|
||||
|
||||
/* enable I2C and select the hardware/software driver */
|
||||
#undef CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 400000
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
|
||||
/*
|
||||
* Software (bit-bang) I2C driver configuration
|
||||
*/
|
||||
|
|
|
@ -62,8 +62,10 @@
|
|||
|
||||
|
||||
/* enable I2C and select the hardware/software driver */
|
||||
#undef CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 50000
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
|
||||
/*
|
||||
* Software (bit-bang) I2C driver configuration
|
||||
*/
|
||||
|
@ -80,9 +82,6 @@
|
|||
else immr->im_cpm.cp_pbdat &= ~PB_SCL
|
||||
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
|
||||
|
||||
|
||||
# define CONFIG_SYS_I2C_SPEED 50000
|
||||
# define CONFIG_SYS_I2C_SLAVE 0xFE
|
||||
# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM X24C16 */
|
||||
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
|
||||
/* mask of address bits that overflow into the "EEPROM chip address" */
|
||||
|
|
|
@ -110,15 +110,13 @@
|
|||
* If the software driver is chosen, there are some additional
|
||||
* configuration items that the driver uses to drive the port pins.
|
||||
*/
|
||||
#undef CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 400000
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7F
|
||||
/*
|
||||
* Software (bit-bang) I2C driver configuration
|
||||
*/
|
||||
#ifdef CONFIG_SOFT_I2C
|
||||
#define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */
|
||||
#define I2C_ACTIVE (iop->pdir |= 0x00010000)
|
||||
#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
|
||||
|
@ -128,7 +126,6 @@
|
|||
#define I2C_SCL(bit) if(bit) iop->pdat |= 0x00020000; \
|
||||
else iop->pdat &= ~0x00020000
|
||||
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
|
||||
#endif /* CONFIG_SOFT_I2C */
|
||||
|
||||
|
||||
/*
|
||||
|
|
|
@ -211,7 +211,6 @@
|
|||
#define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
|
||||
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
|
|
@ -134,7 +134,6 @@
|
|||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C !bit-banged */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed 400kHz */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
|
||||
|
|
|
@ -106,13 +106,11 @@
|
|||
/*
|
||||
* enable I2C and select the hardware/software driver
|
||||
*/
|
||||
#undef CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 93000 /* 93 kHz is supposed to work */
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
|
||||
|
||||
#define CONFIG_SYS_I2C_SPEED 93000 /* 93 kHz is supposed to work */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0xFE
|
||||
|
||||
#ifdef CONFIG_SOFT_I2C
|
||||
/*
|
||||
* Software (bit-bang) I2C driver configuration
|
||||
*/
|
||||
|
@ -128,7 +126,6 @@
|
|||
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
|
||||
else immr->im_cpm.cp_pbdat &= ~PB_SCL
|
||||
#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
|
||||
#endif /* CONFIG_SOFT_I2C */
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* I2C Configuration
|
||||
|
|
|
@ -114,13 +114,13 @@
|
|||
/*
|
||||
* enable I2C and select the hardware/software driver
|
||||
*/
|
||||
#undef CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
|
||||
#define CONFIG_SYS_I2C_SPEED 93000 /* 93 kHz is supposed to work */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0xFE
|
||||
#ifdef CONFIG_SYS_I2C_SOFT
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 93000 /* 93 kHz is supposed to work */
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
|
||||
|
||||
#ifdef CONFIG_SOFT_I2C
|
||||
/*
|
||||
* Software (bit-bang) I2C driver configuration
|
||||
*/
|
||||
|
@ -136,7 +136,7 @@
|
|||
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
|
||||
else immr->im_cpm.cp_pbdat &= ~PB_SCL
|
||||
#define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */
|
||||
#endif /* CONFIG_SOFT_I2C */
|
||||
#endif /* CONFIG_SYS_I2C_SOFT */
|
||||
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
|
|
|
@ -84,7 +84,6 @@
|
|||
/* I2C */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_HARD_I2C /* I2C with hw support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 80000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_OFFSET 0x58000
|
||||
|
|
|
@ -147,7 +147,6 @@
|
|||
/* I2c */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 80000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_OFFSET 0x58000
|
||||
|
|
|
@ -101,7 +101,6 @@
|
|||
/* I2C */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_HARD_I2C /* I2C with hw support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 80000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_OFFSET 0x00000300
|
||||
|
|
|
@ -111,7 +111,6 @@
|
|||
/* I2C */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_HARD_I2C /* I2C with hw support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 80000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_OFFSET 0x00000300
|
||||
|
|
|
@ -111,7 +111,6 @@
|
|||
/* I2C */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_HARD_I2C /* I2C with hw support */
|
||||
#undef CONFIG_SOFT_I2C
|
||||
#define CONFIG_SYS_I2C_SPEED 80000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_OFFSET 0x00000300
|
||||
|
|
|
@ -103,7 +103,6 @@
|
|||
/* I2C */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_HARD_I2C /* I2C with hw support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 80000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_OFFSET 0x58000
|
||||
|
|
|
@ -97,7 +97,6 @@
|
|||
/* I2C */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_HARD_I2C /* I2C with hw support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 80000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_OFFSET 0x58000
|
||||
|
|
|
@ -97,7 +97,6 @@
|
|||
/* I2C */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_HARD_I2C /* I2C with hw support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 80000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_OFFSET 0x58000
|
||||
|
|
|
@ -215,7 +215,7 @@
|
|||
/* I2c */
|
||||
#undef CONFIG_FSL_I2C
|
||||
#undef CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#undef CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
/* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SPEED 80000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
|
|
@ -158,7 +158,6 @@
|
|||
/* I2c */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 80000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_OFFSET 0x58000
|
||||
|
|
|
@ -191,7 +191,6 @@
|
|||
/* I2c */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 80000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_OFFSET 0x58000
|
||||
|
|
|
@ -122,7 +122,6 @@
|
|||
/* I2C */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_HARD_I2C /* I2C with hw support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 80000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_OFFSET 0x00008F00
|
||||
|
|
|
@ -119,7 +119,6 @@
|
|||
/* I2C */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_HARD_I2C /* I2C with hw support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 80000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_OFFSET 0x00008F00
|
||||
|
|
|
@ -196,7 +196,6 @@
|
|||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C !bit-banged */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed 400kHz */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
|
||||
|
|
|
@ -73,8 +73,10 @@
|
|||
#undef CONFIG_UCODE_PATCH
|
||||
|
||||
/* enable I2C and select the hardware/software driver */
|
||||
#undef CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 50000
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
|
||||
/*
|
||||
* Software (bit-bang) I2C driver configuration
|
||||
*/
|
||||
|
@ -91,8 +93,6 @@
|
|||
else immr->im_cpm.cp_pbdat &= ~PB_SCL
|
||||
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
|
||||
|
||||
#define CONFIG_SYS_I2C_SPEED 50000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0xFE
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM X24C04 */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
|
||||
/* mask of address bits that overflow into the "EEPROM chip address" */
|
||||
|
|
|
@ -234,7 +234,6 @@
|
|||
|
||||
/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
|
|
@ -327,7 +327,6 @@
|
|||
|
||||
/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
|
|
@ -355,7 +355,6 @@
|
|||
|
||||
/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
|
|
|
@ -131,8 +131,6 @@
|
|||
#define I2C_8574_PCI66 0x20 /* 0=33MHz PCI, 1=66MHz PCI */
|
||||
#define I2C_8574_FLASHSIDE 0x40 /* 0=Reset vector from U4, 1=from U7*/
|
||||
|
||||
#undef CONFIG_SOFT_I2C
|
||||
|
||||
#endif
|
||||
|
||||
/* Compact Flash */
|
||||
|
|
|
@ -424,7 +424,6 @@
|
|||
|
||||
/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
|
|
@ -288,7 +288,6 @@
|
|||
|
||||
/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
|
|
|
@ -342,7 +342,6 @@
|
|||
|
||||
/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
|
|
@ -368,7 +368,6 @@
|
|||
|
||||
/* I2C */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_FSL_I2C
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
|
|
@ -436,7 +436,6 @@
|
|||
*/
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
|
|
@ -262,7 +262,6 @@
|
|||
*/
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
|
|
|
@ -285,7 +285,6 @@ extern unsigned long get_clock_freq(void);
|
|||
*/
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
|
|
|
@ -234,7 +234,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
|
|||
/* I2C */
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
|
|
@ -360,8 +360,7 @@ extern unsigned long get_clock_freq(void);
|
|||
*/
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
#define CONFIG_SYS_I2C_OFFSET 0x3000
|
||||
|
|
|
@ -283,7 +283,6 @@ extern unsigned long get_clock_freq(void);
|
|||
*/
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
|
|
|
@ -256,7 +256,6 @@
|
|||
*/
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
|
|
|
@ -268,7 +268,6 @@ extern unsigned long get_clock_freq(void);
|
|||
*/
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
|
||||
|
|
|
@ -304,7 +304,6 @@ extern unsigned long get_clock_freq(void);
|
|||
*/
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
|
|
@ -433,7 +433,6 @@
|
|||
/* I2C */
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57
|
||||
|
|
|
@ -254,7 +254,6 @@
|
|||
*/
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
|
|
|
@ -300,7 +300,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
|
|||
*/
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support*/
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
|
||||
|
|
|
@ -491,7 +491,6 @@ extern unsigned long get_sdram_size(void);
|
|||
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_I2C_CMD_TREE
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address*/
|
||||
|
|
|
@ -315,7 +315,6 @@ extern unsigned long get_clock_freq(void);
|
|||
/* I2C */
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x51
|
||||
|
|
|
@ -369,7 +369,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
|
|||
/* I2C */
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_I2C_CMD_TREE
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address*/
|
||||
|
|
|
@ -227,7 +227,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
|
|||
/* I2C */
|
||||
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
|
||||
#define CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_I2C_MULTI_BUS
|
||||
#define CONFIG_I2C_CMD_TREE
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address*/
|
||||
|
|
|
@ -57,10 +57,10 @@
|
|||
"bootm"
|
||||
|
||||
/* enable I2C and select the hardware/software driver */
|
||||
#undef CONFIG_HARD_I2C
|
||||
#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
|
||||
# define CONFIG_SYS_I2C_SPEED 50000
|
||||
# define CONFIG_SYS_I2C_SLAVE 0xFE
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 50000
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
|
||||
/*
|
||||
* Software (bit-bang) I2C driver configuration
|
||||
*/
|
||||
|
|
|
@ -57,10 +57,10 @@
|
|||
"bootm"
|
||||
|
||||
/* enable I2C and select the hardware/software driver */
|
||||
#undef CONFIG_HARD_I2C
|
||||
#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
|
||||
# define CONFIG_SYS_I2C_SPEED 50000
|
||||
# define CONFIG_SYS_I2C_SLAVE 0xFE
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 50000
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
|
||||
/*
|
||||
* Software (bit-bang) I2C driver configuration
|
||||
*/
|
||||
|
|
|
@ -226,7 +226,6 @@
|
|||
* I2C
|
||||
*----------------------------------------------------------------------*/
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
|
|
@ -97,10 +97,13 @@
|
|||
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
|
||||
|
||||
#define CONFIG_HARD_I2C 1 /* To I2C with hardware support */
|
||||
#undef CONFIG_SORT_I2C /* To I2C with software support */
|
||||
#undef CONFIG_SYS_I2C_SOFT /* To I2C with software support */
|
||||
#define CONFIG_SYS_I2C_SPEED 4700 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
|
||||
#if defined(CONFIG_SYS_I2C_SOFT)
|
||||
#define CONFIG_SYS_SYS_I2C_SOFT_SPEED 4700 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_SYS_I2C_SOFT_SLAVE 0x7F
|
||||
/*
|
||||
* Software (bit-bang) I2C driver configuration
|
||||
*/
|
||||
|
@ -116,6 +119,7 @@
|
|||
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
|
||||
else immr->im_cpm.cp_pbdat &= ~PB_SCL
|
||||
#define I2C_DELAY udelay(50)
|
||||
#endif /* #define(CONFIG_SYS_I2C_SOFT) */
|
||||
|
||||
#define CONFIG_SYS_I2C_LCD_ADDR 0x8 /* LCD Control */
|
||||
#define CONFIG_SYS_I2C_KEY_ADDR 0x9 /* Keyboard coprocessor */
|
||||
|
|
|
@ -148,14 +148,16 @@
|
|||
* I2C Configuration
|
||||
*-----------------------------------------------------------------------------
|
||||
*/
|
||||
#define CONFIG_I2C 1
|
||||
#define CONFIG_SYS_I2C_SPEED 50000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x34
|
||||
#define CONFIG_SYS_I2C_SPEED 50000
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x34
|
||||
|
||||
|
||||
/* enable I2C and select the hardware/software driver */
|
||||
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#undef CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
|
||||
#if defined(CONFIG_SYS_I2C_SOFT)
|
||||
#define CONFIG_SYS_I2C 1
|
||||
/*
|
||||
* Software (bit-bang) I2C driver configuration
|
||||
*/
|
||||
|
@ -170,8 +172,10 @@
|
|||
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
|
||||
|
||||
|
||||
# define CONFIG_SYS_I2C_SPEED 50000
|
||||
# define CONFIG_SYS_I2C_SLAVE 0x34
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 50000
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0x34
|
||||
#endif
|
||||
|
||||
# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM X24C16 */
|
||||
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
|
||||
/* mask of address bits that overflow into the "EEPROM chip address" */
|
||||
|
|
|
@ -62,6 +62,36 @@
|
|||
#undef CONFIG_SYS_LOADS_BAUD_CHANGE /* don't allow baudrate change */
|
||||
|
||||
#define CONFIG_BZIP2 /* Include support for bzip2 compressed images */
|
||||
|
||||
/* enable I2C and select the hardware/software driver */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 40000 /* 40 kHz is supposed to work */
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
|
||||
/* Software (bit-bang) I2C driver configuration */
|
||||
#define PB_SCL 0x00000020 /* PB 26 */
|
||||
#define PB_SDA 0x00000010 /* PB 27 */
|
||||
|
||||
#define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
|
||||
#define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
|
||||
#define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
|
||||
#define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
|
||||
#define I2C_SDA(bit) if (bit) \
|
||||
immr->im_cpm.cp_pbdat |= PB_SDA; \
|
||||
else \
|
||||
immr->im_cpm.cp_pbdat &= ~PB_SDA
|
||||
#define I2C_SCL(bit) if (bit) \
|
||||
immr->im_cpm.cp_pbdat |= PB_SCL; \
|
||||
else \
|
||||
immr->im_cpm.cp_pbdat &= ~PB_SCL
|
||||
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
|
||||
|
||||
/* M41T11 Serial Access Timekeeper(R) SRAM */
|
||||
#define CONFIG_RTC_M41T11 1
|
||||
#define CONFIG_SYS_I2C_RTC_ADDR 0x68
|
||||
/* play along with the linux driver */
|
||||
#define CONFIG_SYS_M41T11_BASE_YEAR 1900
|
||||
|
||||
#undef CONFIG_WATCHDOG /* watchdog disabled */
|
||||
|
||||
/*
|
||||
|
|
|
@ -122,13 +122,10 @@
|
|||
#endif
|
||||
|
||||
/* enable I2C and select the hardware/software driver */
|
||||
#undef CONFIG_HARD_I2C /* I2C with hardware support */
|
||||
#define CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
|
||||
# define CONFIG_SYS_I2C_SPEED 50000 /* 50 kHz is supposed to work */
|
||||
# define CONFIG_SYS_I2C_SLAVE 0xFE
|
||||
|
||||
#ifdef CONFIG_SOFT_I2C
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 50000
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
|
||||
/*
|
||||
* Software (bit-bang) I2C driver configuration
|
||||
*/
|
||||
|
@ -144,7 +141,6 @@
|
|||
#define I2C_SCL(bit) if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
|
||||
else immr->im_cpm.cp_pbdat &= ~PB_SCL
|
||||
#define I2C_DELAY udelay(1) /* 1/4 I2C clock duration */
|
||||
#endif /* CONFIG_SOFT_I2C */
|
||||
|
||||
|
||||
/*
|
||||
|
|
|
@ -121,7 +121,10 @@
|
|||
|
||||
#define CONFIG_RTC_DS1306 /* Dallas 1306 real time clock */
|
||||
|
||||
#define CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 50000
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
|
||||
/*
|
||||
* Software (bit-bang) I2C driver configuration
|
||||
*/
|
||||
|
@ -138,8 +141,6 @@
|
|||
else immr->im_cpm.cp_pbdat &= ~PB_SCL
|
||||
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
|
||||
|
||||
# define CONFIG_SYS_I2C_SPEED 50000
|
||||
# define CONFIG_SYS_I2C_SLAVE 0xFE
|
||||
# define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Atmel 24C64 */
|
||||
# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* two byte address */
|
||||
|
||||
|
|
|
@ -202,13 +202,16 @@
|
|||
* If the software driver is chosen, there are some additional
|
||||
* configuration items that the driver uses to drive the port pins.
|
||||
*/
|
||||
#define CONFIG_HARD_I2C 1 /* To enable I2C support */
|
||||
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
|
||||
#define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_HARD_I2C 1 /* To enable I2C support */
|
||||
#undef CONFIG_SYS_I2C_SOFT
|
||||
#define CONFIG_SYS_I2C_SLAVE 0x7F
|
||||
#define CONFIG_SYS_I2C_SPEED 400000
|
||||
|
||||
#ifdef CONFIG_SOFT_I2C
|
||||
#ifdef CONFIG_SYS_I2C_SOFT
|
||||
#error "Soft I2C is not configured properly. Please review!"
|
||||
#define CONFIG_SYS_I2C
|
||||
#define CONFIG_SYS_I2C_SOFT_SPEED 50000
|
||||
#define CONFIG_SYS_I2C_SOFT_SLAVE 0xFE
|
||||
#define I2C_PORT 3 /* Port A=0, B=1, C=2, D=3 */
|
||||
#define I2C_ACTIVE (iop->pdir |= 0x00010000)
|
||||
#define I2C_TRISTATE (iop->pdir &= ~0x00010000)
|
||||
|
@ -218,7 +221,7 @@
|
|||
#define I2C_SCL(bit) if(bit) iop->pdat |= 0x00020000; \
|
||||
else iop->pdat &= ~0x00020000
|
||||
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
|
||||
#endif /* CONFIG_SOFT_I2C */
|
||||
#endif /* CONFIG_SYS_I2C_SOFT */
|
||||
|
||||
|
||||
#define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 /* EEPROM IS24C02 */
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
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Reference in a new issue