Commit graph

1491 commits

Author SHA1 Message Date
Michal Simek
f3090fce77 microblaze: Save and restore first unused vector
Use one memory space to detect little/big endian platforms.
The first unused address(0x28) is used instead 0x0 address (reset vectors).
Detection rewrited reset vector setup from first stage bootloader.

Workflow:
1. Store 0x28 to r7
2. Do little/big endian test
3. Restore r7 to 0x28

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03 08:01:56 +02:00
Michal Simek
86c1b2a86b microblaze: Setup MB vectors if feature is enable for u-boot
For example: Setup reset vectors if reset address is setup.
Setup user exception vector if user exception is enabled

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03 08:01:56 +02:00
Michal Simek
dfc10703d7 microblaze: Remove debug saving value
Forget to remove debug code.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03 08:01:55 +02:00
Paul Gortmaker
b30d41cad6 sbc82xx: delete support for obsolete SBC8240/SBC8260
The EST SBC8260 is over 10 years old, and the SBC8240 older than
that.  With the tiny amount of RAM (by today's standards), there
really isn't anyone interested in running the latest U-boot on
these EOL products anymore.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
CC: jon.diekema@smiths-aerospace.com
2011-10-01 21:57:13 +02:00
Graeme Russ
e3e454cd72 console: Squelch pre-console output in console functions
There are some locations in the code which anticipate printf() being called
before the console is ready by squelching printf() on gd->have_console.
Move this squelching into printf(), vprintf(), puts() and putc(). Also
make tstc() and getc() return 0 if console is not yet initialised

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
Tested-by: Simon Glass <sjg@chromium.org>
2011-10-01 21:54:49 +02:00
Wolfgang Denk
97d7ab8a8e Merge branch 'post' of git://git.denx.de/u-boot-blackfin
* 'post' of git://git.denx.de/u-boot-blackfin:
  Blackfin: uart: implement loop callback for post
  Blackfin: bf537-stamp/bf548-ezkit: update POST flash block range
  Blackfin: post: generalize led/button tests with GPIOs
  Blackfin: bf537-stamp: drop uart/flash post tests
  Blackfin: post: drop custom test list
  Blackfin: bf537-stamp: convert to gpio post hotkey
2011-10-01 21:42:21 +02:00
Fabio Estevam
e6ec1761cd zmx25: Fix build warning due to 'get_reset_cause' defined but not used
When building the zmx25 target we get:

Configuring for zmx25 board...
generic.c:108: warning: 'get_reset_cause' defined but not used

Fix this warning by defining get_reset_cause only if CONFIG_DISPLAY_CPUINFO is defined.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-09-30 22:01:05 +02:00
Marek Vasut
37a6d2085e MX5: Clean up the output of "clocks" command
The new output looks like this:
> clocks
PLL1            800 MHz
PLL2            665 MHz
PLL3            216 MHz

AHB          133000 kHz
IPG           66500 kHz
IPG PERCLK   665000 kHz

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Jason Liu <jason.hui@linaro.org>
2011-09-30 22:01:05 +02:00
Marek Vasut
95c0eb198d MX5: Add AHB clock reporting and fix IPG clock reporting
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Liu <jason.hui@linaro.org>
Acked-by: Jason Liu <jason.hui@linaro.org>
2011-09-30 22:01:05 +02:00
Marek Vasut
bf2eaf5112 MX5: Modify the PLL decoding algorithm
The PLL decoding algorithm didn't take into account many configuration bits.
Adjust it according to Linux kernel. Also, add PLL4 for MX53.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Jason Hui <jason.hui@linaro.org>
Tested-by: Jason Liu <Jason.hui@linaro.org>
2011-09-30 22:01:05 +02:00
Marek Vasut
8edcc6f221 FEC: Move imx_get_mac_from_fuse() definition to fec_mxc.h
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Ben Warren <biggerbadderben@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
2011-09-30 22:01:03 +02:00
Fabio Estevam
610b53e29b MX31: Disable watchdog during low-power modes
Turn on the watchdog WDZST bit so that watchdog timer does not count during low power modes.

Prior to applying this patch mx31pdk board got watchdog resets because when it booted in the Linux prompt
and there was no activity, the system entered into idle mode while watchdog timer was still active.

Fix this by disabling watchdog timer during idle mode.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:01:00 +02:00
Fabio Estevam
e6d9b9785c MX25: tx25: Avoid the usage of extern in C file
Avoid the usage of extern in C file as pointed out by checkpatch.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:01:00 +02:00
Fabio Estevam
b6ce47964d MX31: Improve readability for reset cause
Currently the reset cause is printed like:
CPU:   Freescale i.MX31 rev 2.0 at 531 MHz.Reset cause: POR

Improve readability by adding a new line like it is done on other i.MX boards.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:01:00 +02:00
Fabio Estevam
957dc02474 ARM: mx25: Print the source of reset
Print the source of reset during boot.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:00:59 +02:00
Fabio Estevam
986d0d1bc5 ARM: mx25: Print the silicon revison
Print the silicon revison during boot.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-09-30 22:00:59 +02:00
Heiko Schocher
0a0522cbff arm, davinci, da8xx: add cpuinfo
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:59 +02:00
Heiko Schocher
310ae55efe arm, davinci, am1808: add lowlevel functions for booting from NOR
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:59 +02:00
Heiko Schocher
337c433383 arm, davinci: add NOR Boot Configuration Word
to add the "NOR Boot Configuration Word" on AM18xx based boards,
define CONFIG_SYS_DV_NOR_BOOT_CFG.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:59 +02:00
Heiko Schocher
a293181819 arm, davinci: add ddr2 definition
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:59 +02:00
Heiko Schocher
198a7fc253 arm, davinci, am1808, gpio: add missing defines for bank 8
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:58 +02:00
Heiko Schocher
e6862997bd arm, davinci: add some missing defines in hardware.h
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:58 +02:00
Heiko Schocher
b841c01d6a arm, davinci: add SYSCFG1 base and register struct
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:58 +02:00
Heiko Schocher
725c2935f6 arm, davinci: add RTC base addr
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:58 +02:00
Heiko Schocher
bf569ac8d9 arm, davinci: add internal WDT support for AM1808 cpus
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:58 +02:00
Heiko Schocher
fbabac79d0 arm, davinci: add missing timer baseaddresses for !DA8xx cpu
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:58 +02:00
Heiko Schocher
de23e7225b arm, davinci: move davinci_timer in header file
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:58 +02:00
Heiko Schocher
4f3c42aca4 net, davinci_emac: add KSZ8864 switch
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:56 +02:00
Sanjeev Premi
939e722276 omap3: Fix compile warning
Building without option CONFIG_DISPLAY_CPUINFO leads to
this warning:
sys_info.c:50:14: warning: 'rev_s_37xx' defined but not used

Signed-off-by: Sanjeev Premi <premi@ti.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:55 +02:00
Balaji T K
14fa2dd00f mmc: omap: config VMMC, MMC1_PBIAS
Config VMMC voltage to 3V for MMC/SD card slot
and PBIAS settings needed for OMAP4
Fixes MMC/SD detection on boot from eMMC.

Signed-off-by: Balaji T K <balajitk@ti.com>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:55 +02:00
Sandeep Paulraj
d6cac9c83d devkit8000: Fix build break
Found a build erros when i ran MAKEALL.
So fix it.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:55 +02:00
Simon Schwarz
9ea5c6efd8 omap-common: reorganize spl.c
split-up spl.c into spl.c, spl_mmc.c and spl_nand.c. This avoids problems
with missing defines if a board does not use mmc or nand. This includes
adding spl_ prefix to some functions which are now public. spl_image_t is now
a public type. Added some of the common functions to omap-common.h

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:55 +02:00
Simon Schwarz
409ef1bcfb omap3: implement boot parameter saving
Implements the saving of boot params passed by OMAP3 ROM code.

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:55 +02:00
Simon Schwarz
78ce977967 omap3: new SPL structure support
Support for the new spl structure. Using the interface defined by Aneesh V for
OMAP4

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:54 +02:00
Simon Schwarz
bb085b87e5 omap-common: add nand spl support
Add NAND support for the new SPL structure.

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:54 +02:00
Simon Schwarz
b88e42560b omap3: Configure RAM bank 0 if in SPL
OMAP3 relied on the memory config done by X-loader or Configuration Header. This
has to be reworked for the implementation of a SPL. This patch configures RAM
bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000
are added to mem.h

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:54 +02:00
Simon Schwarz
63ffcfcbd0 omap-common/omap4: relocate early UART clock setup
Moves the early UART clock setup setup_clocks_for_console() from
preloader_console_init() to s_init() of OMAP4.

This is done to prepare for OMAP3 integration.

This patch was posted seperatly to the mailinglist but I decidet - since it is
a prereqesit for this patch to add it. Former port to ML:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/104395

Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:54 +02:00
Philip Balister
5213d24d7b OMAP3: Overo: Update GPMC timing for ethernet chip
The existing timing does not quite meet the minimum requirements
in the LAN9221 datasheet. The timing in this patch solves problems
noticed on some parts. The patch also combines the CS configuration
for the overo and igep0020 boards per request.

Signed-off-by: Philip Balister <philip@opensdr.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-30 22:00:53 +02:00
Ajay Bhargav
aa0ecfeb9d Armada100: Enable Ethernet support for GplugD
This patch enables ethernet support for Marvell GplugD board. Network
related commands works.

Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
2011-09-30 22:00:53 +02:00
Ajay Bhargav
79788bb19a net: Adds Fast Ethernet Controller driver for Armada100
This patch adds support for Fast Ethernet Controller driver for
Armada100 series.

Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2011-09-30 22:00:53 +02:00
Ajay Bhargav
3cf97f4543 gpio: Add GPIO driver for Marvell SoC Armada100
This patch adds support for generic GPIO driver framework for Marvell
SoC Armada100.

Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
2011-09-30 22:00:53 +02:00
York Sun
d29d17d7ba powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver
Unified DDR driver is maintained for better performance, robustness and bug
fixes. Upgrading to use unified DDR driver for MPC83xx takes advantage of
overall improvement. It requires changes for board files to customize
platform-dependent parameters.

To utilize the unified DDR driver, a board needs to define CONFIG_FSL_DDRx
in the header file. No more boards will be accepted without such definition.

Note: the workaround for erratum DDR6 for the very old MPC834x Rev 1.0/1.1
and MPC8360 Rev 1.1/1.2 parts is not migrated to unified driver.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:06 -05:00
York Sun
4e57382faa powerpc/mpc8xxx: Add DDR2 to unified DDR driver
DDR2 has different ODT table and values. Adding table according to Samsung
application note.

Fix additive latency calculation to avoid interger underflow.

Also converted typedef dynamic_odt_t to struct dynamic_odt.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:06 -05:00
York Sun
905acde21a powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps()
Reduce the calculation error to 1ps.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:06 -05:00
York Sun
639f330f5f powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots
The two slots on the same controller have different addresses.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:06 -05:00
York Sun
cae7c1b56b powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en
Check second DIMM slot in case the first one is empty.
Honor DQS enable option for SDRAM mode register.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:06 -05:00
York Sun
cda1de21de powerpc/mpc8xxx: Move DDR RCW overriding to common code
DDR RCW varies at different speeds. It is common for all platform. Move it
out from corenet_ds.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:06 -05:00
York Sun
2bba85f412 powerpc/mpc8xxx: Extend CWL table
Extend CAS write Latency (CWL) table to comply with DDR3 spec

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:05 -05:00
Kumar Gala
a598643267 powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536
The MPC8536 seems to use only 3 bits for the major revision field in the
SVR rather than the 4 bits used by all other processors.  The most
significant bit is used as a mfg code on MPC8536.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:05 -05:00
Roy Zang
fe1a1da038 powerpc/85xx: Add networking support to P1023RDS
The P1023 has two 1G ethernet controllers the first can run in
SGMII, RGMII, or RMII.  The second can only do SGMII & RGMII.

We need to setup a for SoC & board registers based on our various
configuration for ethernet to function properly on the board.

Removed CONFIG_SYS_FMAN_FW as its not used anywhere.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Lei Xu <B33228@freescale.com>
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:05 -05:00
Kumar Gala
c916d7c914 powerpc/85xx: Add support for FMan ethernet in Independent mode
The Frame Manager (FMan) on QorIQ SoCs with DPAA (datapath acceleration
architecture) is the ethernet contoller block.  Normally it is utilized
via Queue Manager (Qman) and Buffer Manager (Bman).  However for boot
usage the FMan supports a mode similar to QE or CPM ethernet collers
called Independent mode.

Additionally the FMan block supports multiple 1g and 10g interfaces as a
single entity in the system rather than each controller being managed
uniquely.  This means we have to initialize all of Fman regardless of
the number of interfaces we utilize.

Different SoCs support different combinations of the number of FMan as
well as the number of 1g & 10g interfaces support per Fman.

We add support for the following SoCs:
 * P1023 - 1 Fman, 2x1g
 * P4080 - 2 Fman, each Fman has 4x1g and 1x10g
 * P204x/P3041/P5020 - 1 Fman, 5x1g, 1x10g

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Dai Haruki <dai.haruki@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com>
Signed-off-by: Lei Xu <B33228@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:05 -05:00
Timur Tabi
fbb9ecf749 powerpc/mp: add support for discontiguous cores
Some SOCs have discontiguously-numbered cores, and so we can't determine the
valid core numbers via the FRR register any more.  We define
CPU_TYPE_ENTRY_MASK to specify a discontiguous core mask, and helper functions
to process the mask and enumerate over the set of valid cores.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:05 -05:00
Kumar Gala
f117c0f073 fdt: Rename fdt_create_phandle to fdt_set_phandle
The old fdt_create_phandle didn't actually create a phandle it just
set one.  We'll introduce a new helper that actually does creation.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
2011-09-29 19:01:05 -05:00
Kumar Gala
e2d0f255cf powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set
Add ifdef protection around fman specific code related to device tree
clock setup.  If we dont have CONFIG_SYS_DPAA_FMAN defined we shouldn't
be executing this code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:04 -05:00
Poonam Aggrwal
bc6bbd6be8 fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010)
Issue: Address masking doesn't work properly.
When sum of the base address, defined by BA, and memory bank size,
defined by AM, exceeds 4GB (0xffff_ffff) then AMASKn[AM] doesn't mask
CSPRn[BA] bits.

Impact:
This will impact booting when we are reprogramming CSPR0(BA) and
AMASK0(AMASK) while executing from NOR Flash.

Workaround:
Re-programming of CSPR(BA) and AMASK is done while not executing from NOR
Flash. The code which programs the BA and AMASK is executed from L2-SRAM.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:04 -05:00
Poonam Aggrwal
fb855f43a1 powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC)
Issue:
Peripheral connected to IFC_CS3 may hamper booting from IFC.

Impact:
Boot from IFC may not be successful if IFC_CS3 is used.

Workaround:
If IFC_CS3 is used, gate IFC_CS3 while booting from NAND or NOR.
Also Software should select IFC_CS3 using PMUXCR[26:27] = 0x01.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:04 -05:00
Poonam Aggrwal
42aee64bd9 fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010)
Issue:
The NOR-FCM does not support access to unaligned addresses for 16 bit port size

Impact:
When 16 bit port size is used, accesses not aligned to 16 bit address boundary
will result in incorrect data

Workaround:
The workaround is to switch to GPCM mode for NOR Flash access.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:04 -05:00
Poonam Aggrwal
e8e6197ab2 powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M
For an IFC Erratum (A-003399) we will need to access IFC registers in
cpu_init_early_f() so expand the TLB covering CCSR to 1M.

Since we need a TLB to cover 1M we move to using TLB1 array for all the
early mappings so we can cover various sizes beyond 4k.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:04 -05:00
Dipen Dudhat
52f90dad60 nand: Freescale Integrated Flash Controller NAND support
Add NAND support (including spl) on IFC, such as is found on the p1010.

Note that using hardware ECC on IFC with small-page NAND (which is what
comes on the p1010rdb reference board) means there will be insufficient
OOB space for JFFS2, since IFC does not support 1-bit ECC.  UBI should
work, as it does not use OOB for anything but ECC.

When hardware ECC is not enabled in CSOR, software ECC is now used.

Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com>
[scottwood@freescale.com: ECC rework and misc fixes]
Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-09-29 19:01:04 -05:00
Timur Tabi
6ca88b0958 powerpc/85xx: relocate CCSR before creating the initial RAM area
Before main memory (DDR) is initialized, the on-chip L1 cache is used as a
memory area for the stack and the global data (gd_t) structure.  This is
called the initial RAM area, or initram.  The L1 cache is locked and the TLBs
point to a non-existent address (so that there's no chance it will overlap
main memory or any device).  The L1 cache is also configured not to write
out to memory or the L2 cache, so everything stays in the L1 cache.

One of the things we might do while running out of initram is relocate CCSR.
On reset, CCSR is typically located at some high 32-bit address, like
0xfe000000, and this may not be the best place for CCSR.  For example, on
36-bit systems, CCSR is relocated to 0xffe000000, near the top of 36-bit
memory space.

On some future Freescale SOCs, the L1 cache will be forced to write to the
backing store, so we can no longer have the TLBs point to non-existent address.
Instead, we will point the TLBs to an unused area in CCSR.  In order for this
technique to work, CCSR needs to be relocated before the initram memory is
enabled.

Unlike the original CCSR relocation code in cpu_init_early_f(), the TLBs
we create now for relocating CCSR are deleted after the relocation is finished.
cpu_init_early_f() will still need to create a TLB for CCSR (at the new
location) for normal U-Boot purposes.  This is done to keep the impact to
existing U-Boot code minimal and to better isolate the CCSR relocation code.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:04 -05:00
Timur Tabi
e46fedfeb2 powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros
Introduce the CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW
macros, which contain the high and low portions of CONFIG_SYS_CCSRBAR_PHYS.
This is necessary for the assembly-language code that relocates CCSR, since
the assembler does not understand 64-bit constants.

CONFIG_SYS_CCSRBAR_PHYS is automatically defined from the
CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW macros, so it
should not be defined in a board header file.  Similarly,
CONFIG_SYS_CCSRBAR_DEFAULT is defined for each SOC in config_mpc85xx.h, so
it should also not be defined in the board header file.

CONFIG_SYS_CCSR_DO_NOT_RELOCATE is a "short-cut" macro that guarantees that
CONFIG_SYS_CCSRBAR_PHYS is set to the same value as CONFIG_SYS_CCSRBAR_DEFAULT,
and so CCSR will not be relocated.

Since CONFIG_SYS_CCSRBAR_DEFAULT is locked to a fixed value, multi-stage U-Boot
builds (e.g. NAND) are required to relocate CCSR only during the last stage
(i.e. the "real" U-Boot).  All other stages should define
CONFIG_SYS_CCSR_DO_NOT_RELOCATE to ensure that CCSR is not relocated.

README is updated with descriptions of all the CONFIG_SYS_CCSRBAR_xxx macros.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:04 -05:00
Kumar Gala
b6c3722dfa powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:03 -05:00
Ramneek Mehresh
1b719e6654 powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
Add UTMI and ULPI PHY support for USB controller on qoriq series of
processors with internal UTMI PHY implemented, for example P1010/P1014
 - Use both getenv() and hwconfig to get USB phy type till getenv()
   is depricated
 - Introduce CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY to specify if soc
   has internal UTMI phy

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Acked-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-29 19:01:03 -05:00
Mike Frysinger
90a75b050b Blackfin: uart: implement loop callback for post
This allows the Blackfin UART driver to be tested via post.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-09-29 16:38:05 -04:00
Mike Frysinger
2151374fa6 Blackfin: post: generalize led/button tests with GPIOs
Make it easy for any Blackfin board to enable led/push button tests.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-09-29 16:38:05 -04:00
Mike Frysinger
4257ea4efd Blackfin: post: drop custom test list
The few tests that are Blackfin-specific have been migrated to common
code or been rewritten with the existing "bsp-specific" defines.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-09-29 16:38:05 -04:00
Stefan Roese
226502e01b ppc4xx: Flush dcache after DDR2 autocalibration with caches on
Flush the dcache before removing the TLB with caches enabled.
Otherwise this might lead to problems later on, e.g. while booting
Linux (as seen on ICON-440SPe).

Signed-off-by: Stefan Roese <sr@denx.de>
2011-09-19 11:51:21 +02:00
Weirich, Bernhard
25fb02abdf Fix incorrect array size of phy settings for 405EX
Change bd_t->bi_phy* arrays from 1 to 2 for PPC405EX since
405EX has 2 ethernet interfaces.

Signed-off-by: Bernhard Weirich <bernhard.weirich@riedel.net>
Signed-off-by: Stefan Roese <sr@denx.de>
2011-09-19 11:51:21 +02:00
Jason Kridner
2d3be7c456 led: remove camel casing of led identifiers globally
Result of running the following command to address Wolfgang's
comment about camel case:

for file in `find . | grep '\.[chS]$'`; do perl -i -pe
's/(green|yellow|red|blue)_LED_(on|off)/$1_led_$2/g' $file; done

Discussion:
http://patchwork.ozlabs.org/patch/84988/

Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-13 08:30:52 +02:00
Aneesh V
4ecfcfaa9e omap4: IO settings
Tuning some IO settings for better performance and power.
And consolidate all such IO settings at one place.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-13 08:25:16 +02:00
Aneesh V
025bc4254b omap4: make SDRAM init work for ES1.0 silicon
SDRAM init was not working on ES1.0 due to a programming
error. A pointer that was passed by value to a function
was set in function emif_get_device_details(), but the effect
wouldn't be seen in the calling function. The issue came
out while testing for ES1.0 because ES1.0 doesn't have any
SDRAM chips connected to CS1

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-13 08:25:15 +02:00
Sanjeev Premi
3b690ebbbf omap: gpio: generic changes after changing API
This patch contains the generic changes required after
change to generic API in the previous patch.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-13 08:25:15 +02:00
Sanjeev Premi
81bdc155c7 omap: gpio: Use generic API
Convert all OMAP specific functions to use the common API
definitions in include/asm/gpio.h. In the process, made
few additional changes:
 - Use -EINVAL consistently. -1 was used in many places.
 - Removed one-liner static functions that were used only
   once. Replaced the content as necessary.
 - Combines implementation of functions omap_get_gpio_dataout()
   and omap_get_gpio_datain(). To do so, new static function
   _get_gpio_direction() was added.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-13 08:25:15 +02:00
Howard D. Gray
32b58ce736 ARMV7: OMAP3: Add 37xx ESx revision numbers.
OMAP3: Add 37xx ESx revision numbers.

Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
Signed-off-by: Howard D. Gray <howard.gray@matrix-vision.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-12 17:40:48 +02:00
Joel A Fernandes
569919d8e2 OMAP: Add function to get state of a GPIO output
Read directly from OMAP_GPIO_DATAOUT to get the output state of the GPIO pin

Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com>
Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-12 17:40:48 +02:00
Wolfgang Denk
04e5ae7931 Minor coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2011-09-11 21:24:09 +02:00
Wolfgang Denk
3aa7782ac4 tegra2: fix warning: "assert" redefined
Commit 21726a7 "Add assert() for debug assertions" caused build
warnings for all tegra2 based boards:

clock.c:36:1: warning: "assert" redefined
In file included from clock.c:29:
include/common.h:144:1: warning: this is the location of the previous definition

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
2011-09-10 16:17:25 +02:00
Greg Ungerer
3a52cfa5cc KS8695: move TIMER_ definitions before code use
Move the TIMER_ definitions before they are used in KS8695 timer.c code.
Fixes:

timer.c: In function ‘timer_init’:
timer.c:37: error: ‘TIMER_COUNT’ undeclared (first use in this function)
timer.c:37: error: (Each undeclared identifier is reported only once
timer.c:37: error: for each function it appears in.)
timer.c:38: error: ‘TIMER_PULSE’ undeclared (first use in this function)

Signed-off-by: Greg Ungerer <greg.ungerer@opengear.com>
2011-09-10 00:12:13 +02:00
Marek Vasut
b793bb92a2 PXA: FIX: Deep-sleep return address in stored in PSPR
FIX for a typo-bug: The address is stored in PSPR, not PSSR.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2011-09-07 23:51:37 +02:00
Stefano Babic
67f463b06d MX31: fix missing mxc_get_clk() call
Add missing case to be used in common MXC code.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-07 22:11:23 +02:00
Wolfgang Denk
6636eb97e4 omap24xx: fix 'reset_timer_masked' declaration error
Commit 17659d7 "Timer: Remove reset_timer_masked()" introduced a
static declaration for reset_timer_masked() which causes build errors:

timer.c:45: error: static declaration of 'reset_timer_masked' follows non-static declaration
include/asm/u-boot-arm.h:70: error: previous declaration of 'reset_timer_masked' was here

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Graeme Russ <graeme.russ@gmail.com>
Cc: Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-07 22:03:06 +02:00
Wolfgang Denk
c1f8750f9f ARM: remove broken "impa7" board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Marius Gröger <mag@sysgo.de>
2011-09-07 21:46:40 +02:00
Wolfgang Denk
c8f63b415f ARM: remove broken "ep7312" board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Marius Gröger <mag@sysgo.de>
2011-09-07 21:46:39 +02:00
Stefano Babic
a4814a69d3 Makefile : fix generation of cpu related asm-offsets.h
commit 0edf8b5b2f breaks
building on a different directory with the O= parameter.
The patch wil fix this issue, generating always asm-offsets.h before
the other targets.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
CC: Wolfgang Denk <wd@denx.de>
2011-09-07 21:41:27 +02:00
Diana CRACIUN
99ffccbd3e Flush cache after the OS image is loaded into the memory.
Since we are loading an executable image into memory we need flush it
out of the cache to possible maintain coherence on CPUs with split
instruction and data caches.  We do this for other executable image
loading command.

On PowerPC once we do this we no longer need to explicitly flush the
dcache on multi-core systems in the BOOTM_STATE_OS_PREP phase.  We now
treat the BOOTM_STATE_OS_PREP as a no-op to maintain backwards
compatibility with the bootm subcommand.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Diana CRACIUN <Diana.Craciun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-09-05 16:07:44 +02:00
Wolfgang Denk
684cad5717 Merge branch 'master' of git://git.denx.de/u-boot-coldfire
* 'master' of git://git.denx.de/u-boot-coldfire:
  ColdFire:Clean up the CONFIG_STANDALONE_LOAD_ADDR usage
  ColdFire:Add mb for 5253 dram initialization
  ColdFire:Define the DM9000 byteswap for M5253 board.
  ColdFire:Update the env settings for several boards.
  ColdFire:disable the NFS define for 52277 board.
  ColdFire:Update the timer_init since it was unified.
  ColdFire: Cleanup for partial linking and --gc-sections
  ColdFire: Update compile flags for each CPUs
  ColdFire:Fix the configuration broken for some boards.
2011-09-04 22:53:04 +02:00
Wolfgang Denk
6dfbf49c6d Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: (145 commits)
  beagleboard: enable HUB power on all variants of the BeagleBoard
  dm3730: enable dpll5
  ehci-hcd: Allow cleanups to happen gracefully on a timeout.
  OMAP3: Add DSS driver for OMAP3
  led: Remove state-saving of led for toggle functionality and add toggle option to led command
  led: Fixed setting of STATUS_LED_BIT1 when led_name is 'all'
  led: correct off/on locations in structure
  led: added cmd_led to Makefile
  BeagleBoard: fix LED 0/1 in driver
  Corrected LED name match finding avoiding extraneous Usage printouts
  BeagleBoard: config: updated default configuration
  BeagleBoard: config: Enabled multibus support for I2C in configuration
  BeagleBoard: config: add optargs/buddy/camera
  BeagleBoard: config: increase command-line functionality
  BeagleBoard: config: make mtest run
  BeagleBoard: config: enable DSS
  BeagleBoard: config: enable asix driver and dhcp
  BeagleBoard: config: enable networking
  BeagleBoard: config: decrease bootdelay to 2 seconds
  BeagleBoard: config: use uImage.beagle for tftp
  BeagleBoard: config: hardcode MAC for onboard SMSC
  BeagleBoard: config: load kernel from MMC ext, not FAT
  BeagleBoard: Configure DVI/S-video
  BeagleBoard: Added userbutton command
  BeagleBoard: turn off clocks in ehci_stop
  USB: Remove __attribute__ ((packed)) for struct ehci_hccr and ehci_hcor
  beagleboard: add support for xM revision C
  beagle: pass expansionboard name in bootargs
  OMAP: Remove omapfb.debug=y from Beagle and Overo env settings
  OMAP3 Beagle Pin Mux initialization glitch fix
  da850: modifications for Logic PD Rev.3 AM18xx EVM
  da850: fix the channel number for EMAC teardown init
  da850: add support for Spectrum Digital AM18xx EVM
  da850: add support to wake up DSP during board init
  da850: modify the U-Boot prompt string
  da850: add NOR boot mode support
  da8xx: add support for multiple PLL controllers
  da850: indicate cache usage disable in config file
  dm365: modify boot prompt from dm365 to dm36x
  dm365: disable cache usage due to coherency issues
  dm6446: disable cache usage due to coherency issues
  OMAP3: Remove legacy mmc driver
  devkit8000: Use generic MMC driver
  TI OMAP3 SDP3430: Use generic MMC driver
  AM3517 CraneBoard: Use generic MMC driver
  OMAP3: pandora: Use generic MMC driver
  OMAP3: Zoom2: Use generic MMC driver
  OMAP3: Zoom1: Use generic MMC driver
  OMAP3: DIG297: Use generic MMC driver
  OMAP3: CM-T35: Use generic MMC driver
  am3517evm: Use generic MMC driver
  omap3evm: Use generic MMC driver
  omap3:clock: check cpu_family before enabling clks for IVA & CAM
  omap3:clock: configure GFX clock to 200MHz for AM/DM37x
  OMAP3/4: Increase console I/O buffer size
  PXA: vpac270: Remove re-defined CONFIG_SYS_TEXT_BASE
  PXA: Fix CSB226, fix monitor length
  PXA: Fix Lubbock, remove redundant parenthesis
  armv7: cache: remove flush on un-aligned invalidate
  armv7: stronger barrier for cache-maintenance operations
  omap: enable caches at system start-up
  arm: do not force d-cache enable on all boards
  ORIGEN: Add MMC SPL support
  ARMV7: Add support for Samsung ORIGEN board
  i2c:gpio:s5p: Enable I2C GPIO on the GONI target
  i2c:gpio:s5p: I2C GPIO Software implementation (via soft_i2c)
  Tegra2: Use clock and pinmux functions to simplify code
  Tegra2: Add additional pin multiplexing features
  Tegra2: Add more clock support
  Tegra2: Add microsecond timer function
  ARM: remove broken "at91rm9200dk" board
  ARM: remove broken "m501sk" board
  ARM: remove broken "kb9202" board
  ARM: remove broken "csb637" board
  ARM: remove broken "cmc_pu2" board
  ARM: remove broken "at91cap9adk" board
  ARM: remove broken "voiceblue" board
  ARM: remove broken "smdk2400" board
  ARM: remove broken "sbc2410x" board
  ARM: remove broken "netstar" board
  ARM: remove broken "mx1fs2" board
  ARM: remove broken "lpd7a40x" boards
  ARM: remove broken "edb93xx" boards
  ARM: remove broken "B2" board
  ARM: remove broken "armadillo" board
  ARM: remove broken "assabet" board
  ARM: versatile: drop warnings
  IMX: scb9328: drop warnings
  MX31: imx31_litekit: make use of GPIO framework
  MX31: mx31ads: make use of GPIO framework
  MX5: mx51evk: make use of GPIO framework
  MX35: mx35pdk: make use of GPIO framework
  MX5: mx53loco: make use of GPIO framework
  MX5: mx53evk: make use of GPIO framework
  MX5: vision2: make use of GPIO framework
  MX5: mx53smd: make use of GPIO framework
  MX5: mx53ard: make use of GPIO framework
  MX25: zmx25: make use of GPIO framework
  MX5: efikamx: make use of GPIO framework
  MX31: QONG: make use of GPIO framework
  MX35: make use of GPIO framework for MX35 processor
  MX5: make use of GPIO framework for MX5 processor
  MX31: make use of GPIO framework for MX31 processor
  MX25: make use of GPIO framework for MX25 processor
  IMX: uniform GPIO interface using GPIO framework
  MX: MX35 / MX5: uniform clock command with powerpc
  MX35: MX35PDK: support additional RAM on CSD1
  mx53: ddr3: Update DD3 initialization
  ARM: MX51: PLL errata workaround
  ARM: versatilepb : drop warnings due to double definitions
  omap4: increase SRAM budget to fix build error
  omap4: fix build warning due to signed unsigned comparison
  mkimage: Fix 'Unknown OMAP image type - 5'
  omap: fix gpio related build breaks
  gpio:samsung: s5p_ suffix add for GPIO functions (C210_universal)
  SMDKV310: MMC SPL: Remove unwanted dummy functions
  SMDKV310: Fix undefined reference error
  SMDKV310: Fix build error for smdkv310 board
  gpio:samsung s5p_ suffix add for GPIO functions
  mmc: S5P: Support DMA restarts at buffer boundaries
  SMDKV310: Fix host compilation of mkv310_image
  arm: fix bd pointer dereference prior initialization
  arm, lib/board.c: use gd->ram_size instead of bd->bi_memsize
  mx5: Remove CONFIG_L2_OFF and CONFIG_SYS_L2CACHE_OFF
  MX31: removed warnings due to clock.h
  integrator: convert to new build system
  integratorcp: make the board compile
  integratorap: remove hardcoded 32MB memory cmdline
  ...
2011-09-04 21:12:18 +02:00
Jason Jin
3f8ce93956 ColdFire:Clean up the CONFIG_STANDALONE_LOAD_ADDR usage
Remove the additional linker options for CONFIG_STANDALONE_LOAD_ADDR

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2011-09-04 22:46:55 +08:00
Jason Jin
6752da6b26 ColdFire:Add mb for 5253 dram initialization
The dram initialization sequence should be in order.
This patch add mb for the dram intialization code to make
sure the compiler do not disorder the code.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2011-09-04 22:46:55 +08:00
Jason Jin
444ddfc751 ColdFire:Update the timer_init since it was unified.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2011-09-04 22:46:55 +08:00
Jason Jin
6c0bf27d74 ColdFire: Cleanup for partial linking and --gc-sections
Introduce the --gc-sections for ColdFire platform and clean up the
corresponding lds file.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2011-09-04 22:46:55 +08:00
Jason Jin
45263ec4c0 ColdFire: Update compile flags for each CPUs
Remove compiler version check for gcc 4.1 in config.mk.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2011-09-04 22:46:55 +08:00
Eric Benard
31c8598425 dm3730: enable dpll5
which is used to provide 120MHz to USB EHCI
This allows EHCI to work on BeagleBoard XM

Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:22 +02:00
Syed Mohammed Khasim
de701d1183 OMAP3: Add DSS driver for OMAP3
* Supports dynamic panel configuration
* Supports dynamic tv standard selection
* Adds support for DSS register access through generic APIs
* Incorporated DSS register access using structures.
* DSS makefile update

Previous discussions are here:
http://www.mail-archive.com/u-boot@lists.denx.de/msg27150.html

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:22 +02:00
Nagabhushana Netagunte
0f3d6b06ea da850: modifications for Logic PD Rev.3 AM18xx EVM
AHCLKR/UART1_RTS/GP0[11] pin needs to be configured for
NOR to work on Rev.3 EVM. When GP0[11] is low,
the SD0 interface will not work, but NOR flash will.

Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:19 +02:00
Nagabhushana Netagunte
cf2c24e399 da850: add support to wake up DSP during board init
add support for DSP wake-up by default on DA850/OMAP-L138
during board initialization. Enable hwconfig environment and added
extra env setting through CONFIG_EXTRA_ENV_SETTINGS.
To prevent DSP from being woken up,set the environment variable as,
set hwconfig "dsp:wake=no"

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:19 +02:00
Sudhakar Rajashekhara
b7e6843f97 da8xx: add support for multiple PLL controllers
Modify clk_get() function in cpu file to work for
multiple PLL controllers.

Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:18 +02:00
Vaibhav Hiremath
7dd5a5be2f omap3:clock: check cpu_family before enabling clks for IVA & CAM
In case of AM3517 and AM3505 (which is OMAP3 varients), IVA2 and
ISP-CAMERA modules have been removed. So add check for cpu_family before
enabling clocks for these modules, else this impacts subsequent
power consumption and system suspend/resume functionality.

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:17 +02:00
Vaibhav Hiremath
f4dac3e16c omap3:clock: configure GFX clock to 200MHz for AM/DM37x
AM/DM37x is another OMAP3 variant, where the GFX clock has been
boosted to 192MHz/200MHz. So fix the GFX_DIV value for this change.

HW Errata: Due to dependency of TV out clock of 54MHz, it is not
possible to configure GFX to 192MHz. So as per HW errats, the
recommended GFX clock is 200MHz (=CORE_CLK/2).

Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-09-04 11:36:17 +02:00
Aneesh V
cabe2878a8 armv7: cache: remove flush on un-aligned invalidate
Remove the flush of boundary cache-lines done as part
of invalidate on a non cache-line boundary aligned
buffer

Also, print a warning when this situation is recognized.

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-09-04 11:36:16 +02:00
Aneesh V
882f80b993 armv7: stronger barrier for cache-maintenance operations
set-way operations need a DSB after them to ensure the
operation is complete. DMB may not be enough. Use DSB
after all operations instead of DMB.

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-09-04 11:36:16 +02:00
Aneesh V
13d4f9bd74 omap: enable caches at system start-up
Signed-off-by: Aneesh V <aneesh@ti.com>
2011-09-04 11:36:16 +02:00
Aneesh V
cba4b1809f arm: do not force d-cache enable on all boards
c2dd0d4554 added dcache_enable()
to board_init_r(). This enables d-cache for all ARM boards.
As a result some of the arm boards that are not cache-ready
are broken. Revert this change and allow platform code to
take the decision on d-cache enabling.

Also add some documentation for cache usage in ARM.

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-09-04 11:36:16 +02:00
Łukasz Majewski
9f15bc0c1c i2c:gpio:s5p: I2C GPIO Software implementation (via soft_i2c)
This patch adds support for software I2C for GONI and Universal C210 reference targets.
It adds support for access to GPIOs by number, not as it is present,
by bank and offset.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Heiko Schocher <hs@denx.de>
2011-09-04 11:36:15 +02:00
Simon Glass
d07dc4993d Tegra2: Use clock and pinmux functions to simplify code
Signed-off-by: Simon Glass <sjg@chromium.org>
2011-09-04 11:36:15 +02:00
Simon Glass
858bd095e1 Tegra2: Add additional pin multiplexing features
This adds an enum for each pin and some functions for changing the pin
muxing setup.

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-09-04 11:36:15 +02:00
Simon Glass
b4ba2be8dc Tegra2: Add more clock support
This adds functions to enable/disable clocks and reset to on-chip peripherals.

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-09-04 11:36:15 +02:00
Simon Glass
39d3416f0a Tegra2: Add microsecond timer function
These functions provide access to the high resolution microsecond timer
and tidy up a global variable in the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2011-09-04 11:36:15 +02:00
Stefano Babic
729b74add9 MX35: make use of GPIO framework for MX35 processor
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:11 +02:00
Stefano Babic
7d8d0b1a4a MX5: make use of GPIO framework for MX5 processor
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:11 +02:00
Stefano Babic
6cb2e774f2 MX31: make use of GPIO framework for MX31 processor
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:11 +02:00
Stefano Babic
41eca7416c MX25: make use of GPIO framework for MX25 processor
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:11 +02:00
Stefano Babic
7acec25948 MX: MX35 / MX5: uniform clock command with powerpc
There was already a command to show the processor clocks
for PowerPC (clocks). For i.MX, the "clockinfo" command
was introduce. The patch sets the same command name used on
PowerPC.
A nasty and not needed newline is also dropped in the help for
the command.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-04 11:36:11 +02:00
David Jander
9db1bfa110 ARM: MX51: PLL errata workaround
This is a port of the official PLL errata workaround from Freescale to
mainline u-boot.
The PLL's in the i.MX51 processor can go out of lock due to a metastable
condition in an analog flip-flop when used at high frequencies.
This workaround implements an undocumented feature in the PLL (dither
mode), which causes the effect of this failure to be much lower (in terms
of frequency deviation), avoiding system failure, or at least decreasing
the likelihood of system failure.

Signed-off-by: David Jander <david@protonic.nl>
2011-09-04 11:36:11 +02:00
Aneesh V
34455b04fc omap4: fix build warning due to signed unsigned comparison
Signed-off-by: Aneesh V <aneesh@ti.com>
2011-09-04 11:34:09 +02:00
Aneesh V
080a46eaf1 omap: fix gpio related build breaks
Signed-off-by: Aneesh V <aneesh@ti.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
2011-09-04 11:33:36 +02:00
Łukasz Majewski
ef5d9eb925 gpio:samsung s5p_ suffix add for GPIO functions
This change is driven by need of general gpio_* functions,
which as their parameter are accepting the GPIO pin number, NOT
block and pin.

This makes the code alike to omap, and allows for using more
generic frameworks (e.g. software I2C).

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-09-03 22:40:47 +02:00
Igor Grinberg
15c2e2c0ea arm: fix bd pointer dereference prior initialization
gd->bd pointer has been used prior been initialized.
Move the relevant code after the initialization.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2011-09-03 22:40:46 +02:00
Heiko Schocher
b2b8f98f88 arm, lib/board.c: use gd->ram_size instead of bd->bi_memsize
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Albert Aribaud <albert.u.boot@aribaud.net>
2011-09-03 22:40:46 +02:00
Stefano Babic
d321b64d64 MX31: removed warnings due to clock.h
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-09-03 22:40:46 +02:00
Linus Walleij
23b3ae0fe8 integrator: convert to new build system
This deletes the integrator split_by_variant.sh script and
defines a number of unique board types for the core modules
that are meaningful to support for the Integrator AP/CP, i.e.
the ones that did not just say "unsupported core module" in
split_by_variant.sh. If more core modules need to be supported
they are easy to add.

We delete all the old cruft in Makefile and MAKEALL that was
working around the old way of building boards. We create a
unique config file per board to satisfy the build system, but
they are just oneliners that include the existing
integratorap.h and integratorcp.h configs.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-09-03 22:40:46 +02:00
Matthias Weisser
34fe8281d7 arm: lib: memcpy: Do not copy to same address
In some cases (e.g. bootm with a elf payload which is already at the right
position) there is a in place copy of data to the same address. Catching this
saves some ms while booting.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-09-03 22:40:45 +02:00
Reinhard Meyer
55d11d22ca AT91: fix at91sam9g45.h to include USB Host defines
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-09-03 22:40:45 +02:00
Thomas Petazzoni
58fb6020c1 atmel: update at91sam9m10g45 SoC support to new style
Based on earlier work by Alex Waterman <awaterman@dawning.com>.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
2011-09-03 22:40:44 +02:00
Yao Cheng
dc344589de MIPS: mips32: fix wrong loop bound in flush_cache()
The issue is found when calling flush_cache() with zero "size" argument.
The bound of loop is miscalculated in this case and flush_cache() enters
a wrong flushing loop.

Signed-off-by: Yao Cheng <saturdaycoder@gmail.com>
Cc: Shinya Kuribayashi <skuribay@pobox.com>
Cc: Sergei Shtylyov <sshtylyov@mvista.com>
Cc: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-09-03 10:43:45 +09:00
Yoshihiro Shimoda
fe0ddffac1 sh: add calling mmc_initialize in board.c
Some SH have MMC controller. So, if we need it, we have to call
the mmc_initialize().

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-08-22 13:16:09 +09:00
Nobuhiro Iwamatsu
8cc44418b8 sh: sh2a: Add sh2a optimize to config.mk
Only the optimization of sh2 had been supported up.
This adds the optimization of sh2a.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-08-22 13:16:08 +09:00
Phil Edworthy
eeb84df6e4 sh: Add support for SH2A freestanding build
SH2A toolchains often only provide an fdpic version of libgcc. This
can't be used with bare-metal software like U-Boot, so this patch
provides the necessary functions extracted from libgcc.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-08-22 13:16:08 +09:00
Phil Edworthy
7fbeb6422d sh: Add Renesas rsk7264 board
The rsk7264 (also know as rsk2+sh7264) is an SH2A based board
with 64MB NAND flash and 64MB SDRAM. It is very similar to the
rsk7203 board.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2011-08-22 13:16:08 +09:00
Albert ARIBAUD
fa82f871c8 Convert ISO-8859 files to UTF-8
There was a mix of UTF-8 and ISO-8859 files in the U-Boot source
tree, which could cause issues with the patchwork review system.
This commit converts all ISO-8859 files to UTF-8.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-08-04 23:34:02 +02:00
Heiko Schocher
780f13a9e1 hwmon: do not init sensors on startup
The U-Boot Design Principles[1] clearly say:

  Initialize devices only when they are needed within U-Boot, i.e. don't
  initialize the Ethernet interface(s) unless U-Boot performs a download
  over Ethernet; don't initialize any IDE or USB devices unless U-Boot
  actually tries to load files from these, etc. (and don't forget to
  shut down these devices after using them - otherwise nasty things may
  happen when you try to boot your OS).

So, do not initialize and read the sensors on startup.

Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Wolfgang Denk <wd@denx.de>
cc: Holger Brunck <holger.brunck@keymile.com>
2011-08-04 23:30:38 +02:00
Wolfgang Denk
fb6440ee9b Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
  drivers/rtc: add Marvell Integrated RTC
  Armada100: Add Board Support for Marvell GuruPlug-Display
  Armada100: MFP macro naming correction
  arm: auto gen asm-offsets.h for mb86r0x
  spear: fix build errors for spear3xx/spear600 platforms
  cosmetic: arm: lib/board.c: Coding Style cleanup
  ARM: versatile: fix board support
  SMDKV310: Enable device tree support
  SMDKV310: MMC_SPL: Fix building when using "make O="
  arm: a320: enable tagged list support
  arm: a320: fix multiline comment style
  ARMv7: u8500_href: Add missing header to fix compiler warning
  Removed unused define, CONFIG_ARMV7.
  avr32: add grasshopper (ICnova AP7000) board
  AT91/SPI: fix atmel_dataflash_spi.c to allow building without warnings
  MAKEALL: remove AT91 boards that are in boards.cfg
  AT91: Makes AT91SAM9263-EK build correctly against u-boot-atmel/master
  AT91: Makes AT91SAM9263 SoC build correctly against u-boot-atmel/master
  AT91: Board fix for AT91SAM9261-EK
  AT91: SoC fix at91sam9261_matrix.h
  AT91: Makes AT91SAM9RL-EK build correctly against u-boot-atmel/master
  AT91: Makes AT91SAM9RL SoC build correctly against u-boot-atmel/master
  AT91: change common at91sam9261 files to compile with new scheme
  AT91: fix mistake in at91sam9260_devices.c(spi1_hw_init)
  a/a/c/arm920t/at91/reset.c: drop obsolete CONFIG_AT91RM9200_USART
  README: fix arm920t/at91 path
  net/eth.c: drop obsolete at91rm9200 support
  README.at91-soc: remove AT91(RM9200) joining notice
  a/a/c/arm920t/cpu.c: remove CONFIG_AT91_LEGACY warning
  MAKEALL: remove obsolete at91rm9200 soc
  ARM: remove obsolete at91rm9200
  omap4: clock init support for omap4460
  omap4: support TPS programming
  omap: reuse omap3 gpio support in omap4
  omap4: sdram init changes for omap4460
  omap4: add omap4460 revision detection
  mkimage: Add OMAP boot image support
  omap: add MMC and FAT support to SPL
  omap: add basic SPL support
  armv7: start.S: fixes and enhancements for SPL
  omap4: automatic sdram detection
  omap4: calculate EMIF register values
  omap4: add sdram init support
  omap4: add clock support
  omap4: add OMAP4430 revision check
  omap4: cleanup pin mux data
  omap4: utility function to identify the context of hw init
  DA8xx: fix LPSC constants
  DA8xx: switch an enum to defines for consistency
  DA8xx: add MMC/SD controller addresses
  DaVinci EMAC: declare function for all DA8xx CPUs
  DA8xx: add generic GPIO driver
  DaVinci: rename gpio_defs.h to gpio.h
  omap3evm: eth: Include functions only when necessary
  omap3evm: Update ethernet reset sequence for Rev.G board
  omap3evm: eth: split function setup_net_chip
  omap3: Include array definition only when it is used
  omap730p2: fix build breaks
  omap2420h4: fix build breaks
  omap1610inn: fix build breaks
  omap1510inn: fix build breaks
  omap5912osk: fix build breaks
  omap1610h2: fix build breaks
2011-08-04 23:05:07 +02:00
Timur Tabi
3b4a226305 video: Add SHARP LQ084S3LG01 LCD support on P1022DS
The SHARP LQ084S3LG01 is a TFT LCD used on the P1022DS (revision "C") board.
This device only supports 800x600 resolution, so if that resolution is selected,
assume that this is the device.  The device is attached to the LVDS port
on the P1022DS board.

The existing 800x600 entry (for the PDM360NG board) is actually 800x480,
so we fix that.  To support two different 800x resolutions, the Y-resolution
is now passed to fsl_diu_init() and both values are used to pick the proper
fb_videomode structure.

The data for the 800x600 video mode is originally from Jiang Yutang.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Jiang Yutang <b14898@freescale.com>
2011-08-04 22:55:33 +02:00
Jason Cooper
b608b95753 drivers/rtc: add Marvell Integrated RTC
This driver can be used for kirkwood SoCs by enabling CONFIG_RTC_MV.  Tested on
Global Scale Technologies Dreamplug.

Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
2011-08-04 19:00:34 +02:00
Ajay Bhargav
82b13f7326 Armada100: MFP macro naming correction
MFP macros for UART3 updated.

Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
2011-08-04 19:00:28 +02:00
Matthias Weisser
7a619ab30a arm: auto gen asm-offsets.h for mb86r0x
auto gen asm-offsets.h for mb86r0x

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-08-04 13:56:55 +02:00
Heiko Schocher
ceb1d6d75e cosmetic: arm: lib/board.c: Coding Style cleanup
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
cc: Albert Aribaud <albert.u.boot@aribaud.net>
cc: <macpaul@gmail.com>
cc: Wolfgang Denk <wd@denx.de>
2011-08-04 13:39:25 +02:00
Xu, Hong
ffa280fa53 AT91: Makes AT91SAM9263 SoC build correctly against u-boot-atmel/master
Rework for AT91SAM9263 SoC, makes it build again.
Based on the work for AT91SAM9260-EK.

Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Reinhard Meyer <uboot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
Xu, Hong
673d39f6e4 AT91: SoC fix at91sam9261_matrix.h
Fix at91sam9261_matrix.h according to the new scheme.

Signed-off-by: Hong Xu <hong.xu@atmel.com>
2011-08-03 13:00:56 +02:00
Xu, Hong
f87353f0d9 AT91: Makes AT91SAM9RL SoC build correctly against u-boot-atmel/master
Rework for AT91SAM9RL SoC, makes it build again.
Based on the work for AT91SAM9260-EK.
V4: US->USART, cosmetics

Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
Asen Dimov
3ad24802aa AT91: change common at91sam9261 files to compile with new scheme
Signed-off-by: Asen Dimov <dimov@ronetix.at>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
Reinhard Meyer
b38d634b39 AT91: fix mistake in at91sam9260_devices.c(spi1_hw_init)
Bits 0..3 in cs_mask = CS0..CS3 in SPI mode require it to be peripheral
Bits 4..7 in cs_mask = CS0..CS3 in GPIO mode require it to be output

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2011-08-03 13:00:56 +02:00
Andreas Bießmann
c23e5e7eda a/a/c/arm920t/at91/reset.c: drop obsolete CONFIG_AT91RM9200_USART
The CONFIG_AT91RM9200_USART is an remnant of
18ed5e9550 which deleted the
at91rm9200_usart driver.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-08-03 13:00:56 +02:00
Andreas Bießmann
8312af9f90 a/a/c/arm920t/cpu.c: remove CONFIG_AT91_LEGACY warning
The CONFIG_AT91_LEGACY warning became obsolete due to complete removal of
at91rm9200 arch code in arm920t.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-08-03 13:00:55 +02:00
Andreas Bießmann
cf05528238 ARM: remove obsolete at91rm9200
The big "ARM: remove broken boards" series deletes all boards using
obsolete arm920t/at91rm9200 arch code. Therefore we can safely remove
this code now.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2011-08-03 13:00:55 +02:00
Aneesh V
b4dc644291 omap4: clock init support for omap4460
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
d506719f7f omap4: support TPS programming
TPS62361 is the new power supply used in OMAP4460 that
supplies vdd_mpu.

VCORE1 from Phoenix supplies vdd_core and VCORE2 supplies
vdd_iva. VCORE3 is not used in OMAP4460.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
25223a68e5 omap: reuse omap3 gpio support in omap4
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
924eb369e3 omap4: sdram init changes for omap4460
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
5ab12a9eeb omap4: add omap4460 revision detection
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
John Rigby
3decb14abe mkimage: Add OMAP boot image support
- Add mkimage support for OMAP boot image
- Add support for OMAP boot image(MLO) generation in the new
  SPL framework

Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
8cf686e19b omap: add MMC and FAT support to SPL
- Add MMC raw and FAT mode boot support for OMAP
- Provide a means by which parameters passed by ROM-code
  can be saved in u-boot.
- Save boot mode related information passed by OMAP4 ROM-code
  and use it to determine where to load the u-boot from
- Assumes that the image has a mkimage header. Gets the
  payload size and load address from this header. If the
  header is not detected assume u-boot.bin as payload

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
bcae721162 omap: add basic SPL support
- Provide alternate implementations of board_init_f()
  board_init_r() for OMAP spl.
- Provide linker script
- Initialize global data
- Add serial console support
- Update CONFIG_SYS_TEXT_BASE to allow for SPL's bss and move
  it to board config header from config.mk

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
033ca72438 armv7: start.S: fixes and enhancements for SPL
- Allow SPL to have .bss disjoint from rest of the image
- Allow for .bss setup in CONFIG_SPL_BUILD case too.
- Take care of the special case where relocation offset = 0.
- Compile out exception handling code and install a simpler
  vector

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:20 +02:00
Aneesh V
1e463866f5 omap4: automatic sdram detection
Identify SDRAM devices connected to EMIF automatically:
LPDDR2 devices have some Mode Registers that provide details
about the device such as the type, density, bus width
etc. EMIF has the capability to read these registers. If there
are no devices connected to a given chip-select reading mode
registers will return junk values. After reading as many such
registers as possible and matching with expected ranges of
values the driver can identify if there is a device connected
to the respective CS. If we identify that a device is connected
the values read give us complete details about the device.

This along with the base AC timings specified by JESD209-2
allows us to do a complete automatic initialization of
SDRAM that works on all boards.

Please note that the default AC timings specified by JESD209-2
will be safe for all devices but not necessarily optimal. However,
for the Elpida devices used on Panda and SDP the default timings
are both safe and optimal.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Aneesh V
095aea293b omap4: calculate EMIF register values
Calculate EMIF register values based on AC timing parameters
from the SDRAM datasheet and the DDR frequency rather than
using the hard-coded values.

For a new board the user doen't have to go through the tedious
process of calculating the register values. Instead, just
provide the AC timings from the device data sheet as input
and the driver will automatically calculate the register values.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Aneesh V
2ae610f030 omap4: add sdram init support
Add support for the SDRAM controller (EMIF).

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Aneesh V
3776801d0a omap4: add clock support
Add support for:
1. DPLL locking
2. Initialization of clock domains and clock modules
3. Setting up the right voltage on voltage rails

This work draws upon previous work done for x-loader by:
	Santosh Shilimkar <santosh.shilimkar@ti.com>
	Rajendra Nayak <rnayak@ti.com>

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Aneesh V
ad577c8a48 omap4: add OMAP4430 revision check
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Aneesh V
469ec1e353 omap4: cleanup pin mux data
- separate mux settings into essential and non essential parts
- essential part is board independent as of now(so move it
  to SoC directory). Will help in having single SPL for all
  boards.
- Non-essential part(the pins not essential for u-boot to function)
  need to be phased out eventually.
- Correct mux data by aligning to the latest settings in x-loader

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Aneesh V
d2f18c275e omap4: utility function to identify the context of hw init
The basic hardware init of OMAP4(s_init()) can happen in 4
different contexts:
 1. SPL running from SRAM
 2. U-Boot running from FLASH
 3. Non-XIP U-Boot loaded to SDRAM by SPL
 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the
    Configuration Header feature

What level of hw initialization gets done depends on this
context. Add a utility function to find this context.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Laurence Withers
732590b397 DA8xx: fix LPSC constants
Some of the LPSC constants were incorrect, and some were missing. This
commit fixes the incorrect constants (which were not used anywhere in
the tree) and adds all constants for both DA830 and DA850, as per the
TI datasheets.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Laurence Withers
37dbd1c1ad DA8xx: switch an enum to defines for consistency
There are two main sets of LPSC constants, depending on the processor
family.  The DA8xx constants were given in an enum whereas the non-DA8xx
constants were preprocessor defines. This commit switches the DA8xx
constants to defines for consistency.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Laurence Withers
2c6e0b07dc DA8xx: add MMC/SD controller addresses
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Laurence Withers
da51e424d2 DaVinci EMAC: declare function for all DA8xx CPUs
The function davinci_emac_mii_mode_sel() is defined in
board/davinci/common/misc.c for any DA8xx CPU which has
CONFIG_DRIVER_TI_EMAC enabled. However, the prototype was only being
declared in <include/asm/arch/davinci_misc.h> for the DA850 EVM board.
This patch declares it for all DA8xx CPUs where CONFIG_DRIVER_TI_EMAC
is enabled.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Laurence Withers
f517afd5df DA8xx: add generic GPIO driver
Add a generic GPIO driver for the DaVinci DA8xx processors. It is turned
on by defining CONFIG_DA8XX_GPIO and fulfills the generic GPIO interface
specified in <asm/gpio.h> . The driver has support for both manipulating
GPIO pins as well as automatically configuring the pin multiplexor
registers to set the pin function to GPIO.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Laurence Withers
0bf98f1d13 DaVinci: rename gpio_defs.h to gpio.h
In preparation for a generic GPIO driver for the DA8xx processors,
rename <asm/arch/gpio_defs.h> to <asm/arch/gpio.h> and fix up all files
which include it.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:19 +02:00
Sanjeev Premi
80bb756dbe omap3: Include array definition only when it is used
The array of strings corresponding to cpu revision is
used only when CONFIG_DISPLAY_CPUINFO is selected - in
the function print_cpuinfo().

Enclose definition of this array in #ifdef...#endif for
the same.

Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03 12:49:18 +02:00
Wolfgang Denk
1902692aa0 Merge branch 'master' of git://git.denx.de/u-boot-blackfin
* 'master' of git://git.denx.de/u-boot-blackfin:
  Blackfin: jtag-console: fix timer usage
  Blackfin: switch to common display_options()
  Blackfin: serial: move early debug strings into .rodata section
  Blackfin: adi boards: also set stderr to nc with helper
  Blackfin: update anomaly lists to latest public info
  Blackfin: serial: convert to bfin_{read,write} helpers
  Blackfin: split out async setup
  Blackfin: adi boards: enable pretty flash progress output
  Blackfin: drop unused dma.h header from start code
  Blackfin: portmux: allow header to be included in assembly files
  Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: enable mmc_spi support
  Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: update network settings
  Blackfin: sync MMR read/write helpers with Linux
  Blackfin: gpio: optimize free path a little
  Blackfin: post: setup default CONFIG_SYS_POST_WORD_ADDR
  Blackfin: uart: fix printf warning
  Blackfin: add init.elf helper code
  Blackfin: dont reset SWRST on newer bf526 parts
  Blackfin: adi boards: enable multi serial support by default
  Blackfin: uart: add multiple serial support
  Blackfin: uart: move debug buffers into local bss
2011-08-02 21:46:53 +02:00
Wolfgang Denk
cc4e6d2556 Merge branch 'master' of git://git.denx.de/u-boot-mips
* 'master' of git://git.denx.de/u-boot-mips:
  README: update MIPS related informations
  MIPS: make cache operation mode configurable
  MIPS: rename INFINEON_EBU_BOOTCFG to CONFIG_SYS_XWAY_EBU_BOOTFG
  MIPS: INCA-IP: rename inca-swap-bytes host tool
2011-08-02 21:45:45 +02:00
Wolfgang Denk
f6c019c454 Unify timer_init() and cpu_init() prototypes
Clean up some duplicated prototype declarations.
Get rid of now useless AVR32 initcalls.h file.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
Cc: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Graeme Russ <graeme.russ@gmail.com>
2011-08-01 15:10:15 +02:00
seedshope
5589073a16 ARM: fix error: conflicting types for 'setenv'
Also remove bogus comment.

Signed-off-by: Zhong hongbo <bocui107@gmail.com>
Changed commit message
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.aribaud@free.fr>
2011-08-01 15:07:06 +02:00
Daniel Schwierzeck
ab2a98b117 MIPS: make cache operation mode configurable
Currently the cache operation mode is hard-coded to
CONF_CM_CACHABLE_NONCOHERENT. This is not appropiate for CPUs or SOCs
which operate at a different mode.

This patch makes the cache operation mode configurable via board config.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-07-31 23:26:41 +09:00
Daniel Schwierzeck
7185adb48e MIPS: rename INFINEON_EBU_BOOTCFG to CONFIG_SYS_XWAY_EBU_BOOTFG
This define is a board-specific config option and should be
renamed to follow the U-Boot naming convention. Additionally,
add an explaining comment for this option.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-07-31 23:26:41 +09:00
Kumar Gala
5756736176 powerpc/8xxx: Remove dependency on <usb.h>
We used <usb.h> for USB_MAX_DEVICE.  However this requires we actual
build in support for USB into u-boot (which should not be required for
device tree fixup).

At this time no FSL SoC that utilizies this code (83xx/85xx) has more
than 2 USB controllers.  So we replace USB_MAX_DEVICE with a local
define FSL_MAX_NUM_USB_CTRLS.

If/when a device shows up with more than 2 controllers we can easily
bump this value or refactor into a proper define per SoC.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 16:04:56 -05:00
Shaohui Xie
a3a3e7b2c3 powerpc/85xx: enable USB2 gadget mode for corenet ds board
to make USB2 worked in gadget mode, we need to set it's 'dr_mode' to
'peripheral' in hwconfig, but driver starts scan from 'usb1', it'll break
out if it cannot find 'usb1', so drop the 'else' clause to make driver scan
all the 'usbx'.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:43 -05:00
Timur Tabi
90f89f099d powerpc/85xx: verify the device tree before booting Linux
Introduce ft_verify_fdt(), a function that is called after the device tree
has been fixed up, that displays warning messages if there is a mismatch
between the physical addresses of some devices that U-Boot has configured
with what the device tree says the addresses are.

This is a particular problem when booting a 36-bit device tree from a
32-bit U-Boot (or vice versa), because the physical address of CCSR is
wrong in the device tree.  When the operating system boots, no messages are
displayed, so the user generally has no idea what's wrong.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:39 -05:00
Wolfgang Denk
21cd5815a7 MPC8xxx: drop redundant boot messages
Current code would print RAM size information like this:

	DRAM:  DDR: 256 MiB (DDR1, 64-bit, CL=2, ECC off)

Turn a number of printf()s into debug() to get rid of the redundant
"DDR: " string like this:

	DRAM:  256 MiB (DDR1, 64-bit, CL=2, ECC off)

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:39 -05:00
Kumar Gala
8992738db7 powerpc/85xx: Cleanup handling of PVR detection for e500/e500mc/e5500
At some point we broke the detection of e500v1 class cores.  Fix that
and simply the code to just utilize PVR_VER() to have a single case
statement.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:39 -05:00
Bhaskar Upadhaya
65bb8b060a powerpc/85xx: Fix up clock_freq property in CAN node of dts
Fix up the device tree property associated with the Flexcan clock
frequency. This property is used to calculate the bit timing parameters
for Flexcan.

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:38 -05:00
Matthew McClintock
0a9fe8ee7e powerpc/85xx: provide 85xx flush_icache for cmd_cache
This provides a function that will override the weak function
flush_icache to let 85xx boards to flush the icache

cc: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Matthew McClintock <msm@freescale.com>
2011-07-29 08:53:38 -05:00
Kumar Gala
acf3f8da98 powerpc/85xx: Handle the lack of L2 cache on P2040/P2040E
The P2040/P2040E have no L2 cache.  So we utilize the SVR to determine
if we are one of these devices and skip the L2 init code in cpu_init.c
and release.  For the device tree we skip the updating of the L2 cache
properties but we still update the chain of caches so the CPC/L3 node
can be properly updated.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:38 -05:00
Kumar Gala
db564bccef powerpc/85xx: Add support for P2041[e] XAUI in SERDES
We add XAUI_FM1 into the SERDES tables for P2041[e] devices.  However
for the P2040[e] devices that dont support XAUI we handle this at
runtime via SVR checks.  If we are on a P2040[e] device the SERDES
functions will behave as follows:

is_serdes_prtcl_valid() will always report invalid if prtcl passed in is
XAUI_FM1.

serdes_get_prtcl() will report NONE if the prtcl in the table is set to
XAUI_FM1.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:38 -05:00
Kumar Gala
88b91f2d3b powerpc/85xx: Rename P2040 id & SERDES to P2041
P2041 is the superset part that covers both P2040 & P2041.  The only
difference between the two devices is that P2041 supports 10g/XAUI and
has an L2 cache.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:37 -05:00
Stephen George
f110fe940c powerpc/85xx: Adding configuration for DCSRCR to enable 32M access
Configuring DCSRCR to define the DCSR space to be 1G instead
of the default 4M. DCSRCR only allows selection of either 4M
or 1G.
Most DCSR registers are within 4M but the Nexus trace buffer
is located at offset 16M within the DCSR.

Configuring the LAW to be 32M to allow access to the Nexus
trace buffer. No TLB modification is required since accessing
the Nexus trace buffer from within u-boot is not required.

Signed-off-by: Stephen George <stephen.george@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:37 -05:00
Kumar Gala
70bfb032ec powerpc/85xx: Fix setting of EPAPR_MAGIC value
Had a typo in the ifdef for 85xx, should be CONFIG_MPC85xx for it to get
triggered.  Was pull in the non-BookE magic number.

Reported-by: John Cortell
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-29 08:53:37 -05:00
Mike Williams
1626308797 cleanup: Fix typos and misspellings in various files.
Recieve/Receive
recieve/receive
Interupt/Interrupt
interupt/interrupt
Addres/Address
addres/address

Signed-off-by: Mike Williams <mike@mikebwilliams.com>
2011-07-28 21:27:36 +02:00
Andreas Bießmann
09c2e90c11 unify version_string
This patch removes the architecture specific implementation of
version_string where possible. Some architectures use a special place
and therefore we provide U_BOOT_VERSION_STRING definition and a common
weak symbol version_string.

Signed-off-by: Andreas Biemann <andreas.devel@googlemail.com>
CC: Mike Frysinger <vapier@gentoo.org>
CC: Peter Pan <pppeterpppan@gmail.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-07-28 17:22:53 +02:00
Michael Jones
f9a78b8d4f cosmetic: spell fixes etc.
Signed-off-by: Michael Jones <michael.jones@matrix-vision.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2011-07-28 16:32:50 +02:00
Mike Frysinger
1c9a5606d8 serial: drop useless ctlr field
The multi serial support has a "ctlr" field which almost no one uses,
but everyone is forced to set to useless strings.  So punt it.

Funny enough, the only code that actually reads this field (the mpc8xx
driver) has a typo where it meant to look for the SCC driver.  Fix it
while converting the check to use the name field.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Heiko Schocher <hs@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
CC: Tom Rix <Tom.Rix@windriver.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
CC: Craig Nauman <cnauman@diagraph.com>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Prafulla Wadaskar <prafulla@marvell.com>
CC: Mahavir Jain <mjain@marvell.com>
2011-07-26 16:38:05 +02:00
Mike Frysinger
6c768ca746 serial: push default_serial_console to drivers
Rather than sticking arch/board/driver specific logic in the common
serial code, push it all out to the respective drivers.  The serial
drivers declare these funcs weak so that boards can still override
things with their own definition.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Heiko Schocher <hs@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
CC: Tom Rix <Tom.Rix@windriver.com>
CC: Minkyu Kang <mk7.kang@samsung.com>
CC: Craig Nauman <cnauman@diagraph.com>
CC: Prafulla Wadaskar <prafulla@marvell.com>
CC: Mahavir Jain <mjain@marvell.com>
Tested-by: Minkyu Kang <mk7.kang@samsung.com>
2011-07-26 16:37:57 +02:00
Graeme Russ
17659d7de9 Timer: Remove reset_timer_masked()
In some circumstances, reset_timer_masked() was called be timer_init() in
order to perform architecture specific timer initialisation. In such
cases, the required code in reset_timer_masked() has been moved into
timer_init()
2011-07-26 14:54:15 +02:00
Graeme Russ
53fc43c682 Timer: Fix at91rm9200/spi.c timer usage 2011-07-26 14:53:55 +02:00
Graeme Russ
4769be21cc Timer: Remove reset_timer() for non-Nios2 arches 2011-07-26 14:53:30 +02:00
Graeme Russ
5c8404aff1 Timer: Remove set_timer completely 2011-07-26 14:52:17 +02:00
Aneesh V
401bb30b6d replace CONFIG_PRELOADER with CONFIG_SPL_BUILD
replace all occurences of CONFIG_PRELOADER with CONFIG_SPL_BUILD

Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-26 14:44:34 +02:00
Aneesh V
05bad4aa56 scaled down version of generic libraries for SPL
Signed-off-by: Aneesh V <aneesh@ti.com>
2011-07-26 14:44:25 +02:00
Aneesh V
5253418a77 arm: adjust PLATFORM_LIBS for SPL
Signed-off-by: Aneesh V <aneesh@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-07-26 14:43:48 +02:00
Daniel Schwierzeck
4e0fbb98fc Use ALL-y style instead of ifeq blocks for better readability
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
2011-07-26 14:41:43 +02:00
Kumar Gala
9e9579bbf9 powerpc: Fix device tree padding associated with ramdisk
When booting with a ramdisk we bump the amount of memory reserved for
the device tree by FDT_RAMDISK_OVERHEAD.  However we did not increase
the actual size in the device tree blob to match.

Its possible on boundary cases that we dont have enough memory according
to the device tree blob and get errors like:

WARNING: could not set linux,initrd-end FDT_ERR_NOSPACE

We can easily fix this by setting the device tree size at the same time
we bump the amount of memory reserved for the device tree.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
2011-07-26 13:55:10 +02:00
Becky Bruce
9cdfe28106 powerpc/mpc85xx: Add clear_ddr_tlbs function
This is useful when we just want to wipe out the TLBs.  There's currently
a function that resets the ddr tlbs to a different value; it is changed to
utilize this function.  The new function can be used in conjunction with
setup_ddr_tlbs() for a board to temporarily map/unmap the DDR address
range as needed.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-22 03:07:47 -05:00
Timur Tabi
ffadc441bc fman: insert the Fman firmware into the device tree
The Fman device tree node binding allows for the entire Fman firmware binary
data to be embedded in the device tree.  This eliminates the need to have
NOR flash mapped to Linux just so that the Fman driver can see the firmware.

The location of the Fman firmware is taken from the 'fman_ucode' environment
variable.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-22 03:07:43 -05:00
Timur Tabi
e4e7e42803 powerpc/85xx: add support the ePAPR "phandle" property
The ePAPR specification says that phandle properties should be called
"phandle", and not "linux,phandle".  To facilitate the migration from
"linux,phandle" to "phandle", we update fdt_qportal() to use the new
function, fdt_create_phandle().  This function abstracts the creation of
phandle properties.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-22 01:49:39 -05:00
Wolfgang Denk
74fac70084 Merge branch 'master' of git://git.denx.de/u-boot-mmc
* 'master' of git://git.denx.de/u-boot-mmc:
  mmc: rescan fails on empty slot
  AT91:mmc:fix multiple read/write error
  mmc: Access mode validation for eMMC cards > 2 GiB
  mmc: sh_mmcif: add support for Renesas MMCIF
  mmc: fix the condition for MMC version 4
  MMC: add marvell sdhci driver
  MMC: add sdhci generic framework
  MMC: add erase function to both mmc and sd
  MMC: unify mmc read and write operation
  mmc: Tegra2: Enable SD/MMC driver for Seaboard and Harmony
  mmc: Tegra2: SD/MMC driver for Seaboard - eMMC on SDMMC4, SDIO on SDMMC3
2011-07-19 22:27:07 +02:00
Wolfgang Denk
cdf1a2328a Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm:
  ARM: MX5: Fix broken leftover TO-2 errata workaround
  MX31: Cleanup clock function
  scb9328: Add ARM relocation support
  am3517evm: change console device from ttyS2 to ttyO2
  Remove volatile qualifier in get_ram_size() calls
  TI: TNETV107X Fix Build Error
  ARM: add missing CONFIG_SKIP_LOWLEVEL_INIT for armv7
  arm: add CONFIG_MACH_TYPE setting and documentation
  arm: add __ilog2 function
  Timer: Fix misuse of ARM *timer_masked() functions outside arch/arm
  EfikaMX: Enable EXT2 booting
  EfikaMX: Add missing CONFIG_SYS_TEXT_BASE
  EfikaMX: Use correct imximage.cfg
  MX27: Update to autogenerated asm-offsets.h
  MX5: Update to autogenerated asm-offsets.h
  imx: Add support for zmx25 board
  imx: Make imx25 compatible to mxc_gpio driver and fix in tx25
  imx: Add auto generation of asm-offsets.h for imx25
  imx: Add support for USB EHCI on imx25
  imx: Use correct imx25 reset.c
  imx: Add get_tbclk() function for imx25
  ARM: Update maintainer of board scb9328
  mx27: Make the UART port number explicit
  build: Add targets for auto gen of asm-offsets.h and use it in imx35
  mx31pdk: cosmetic: Fix line over 80 characters
2011-07-18 21:04:56 +02:00
David Jander
6e25b6ce5d ARM: MX5: Fix broken leftover TO-2 errata workaround
This check was broken. r3 does not contain the silicon revision anymore, so
we need to reload it. Also, this errata only applies to i.MX51.

Signed-off-by: David Jander <david@protonic.nl>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-07-18 14:41:48 +02:00
Stefano Babic
9f008bb47d MX31: Cleanup clock function
The patch provide the same API used with other i.MX
processors and get rid of mx31_ functions.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-07-18 14:41:48 +02:00
Kumar Gala
c518fc0281 powerpc/85xx: Fix detection of P1017E
Had a typo such that P1017E would not be detected correctly.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-17 10:33:05 -05:00
Albert ARIBAUD
a55d23ccf6 Remove volatile qualifier in get_ram_size() calls
Checkpatch.pl complains about the volatile qualifier in calls to
get_ram_size(). Remove this qualifier in the prototype and in the
calls where it is useless, and leave it only in the function body
where it is needed.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2011-07-17 17:11:53 +02:00
Rob Herring
22193540c1 ARM: add missing CONFIG_SKIP_LOWLEVEL_INIT for armv7
cpu_init_crit can be skipped, but the code is still enabled requiring a
platform to supply lowlevel_init.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Albert ARIBAUD <albert.aribaud@free.fr>
2011-07-17 11:24:35 +02:00
Igor Grinberg
7eb29398c0 arm: add CONFIG_MACH_TYPE setting and documentation
CONFIG_MACH_TYPE is used to set the machine type number in the
common arm code instead of setting it in the board code.
Boards with dynamically discoverable machine types can still set the
machine type number in the board code.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
2011-07-17 11:07:01 +02:00
Rob Herring
0b9bc73711 arm: add __ilog2 function
Add __ilog2 function for ARM. Needed for ahci.c

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Albert ARIBAUD <albert.aribaud@free.fr>
2011-07-16 13:00:11 +02:00
Tom Warren
21ef6a109c mmc: Tegra2: SD/MMC driver for Seaboard - eMMC on SDMMC4, SDIO on SDMMC3
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2011-07-15 20:28:56 -05:00
Stefano Babic
727024a9a4 MX27: Update to autogenerated asm-offsets.h
On i.MX27, the asm-offsets.h file is not yet generated as it should be.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
Stefano Babic
0edf8b5b2f MX5: Update to autogenerated asm-offsets.h
On i.MX5, the asm-offsets.h file is not yet generated as it should be.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
Matthias Weisser
39f0023e81 imx: Add support for zmx25 board
zmx25 is a board based on imx25 SoC, 64 Megs of LPDDR, 32 Megs of NOR flash, an
optional NAND flash.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
Matthias Weisser
95d185894b imx: Make imx25 compatible to mxc_gpio driver and fix in tx25
Adding support for mxc_gpio driver for imx25 and fix names of registers in tx25
board.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
Matthias Weisser
23210d8e1b imx: Add auto generation of asm-offsets.h for imx25
Offsets to registers may be needed in asm code. This patch adds automated
generation of these offsets form C structures.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
Matthias Weisser
dddb7c9ffd imx: Add support for USB EHCI on imx25
Adding support for USB host on imx25 using the internal PHY. Changing the name
of base address define for imx31 to get some unification.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
Matthias Weisser
dea5387d98 imx: Use correct imx25 reset.c
imx25 used the wrong reset.c from imx27

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
Matthias Weisser
a7f39e7c22 imx: Add get_tbclk() function for imx25
Need this function for autoboot keyd

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2011-07-14 15:41:24 +02:00
Fabio Estevam
3f7bfbdd3c mx27: Make the UART port number explicit
mx27_uart_init_pins does the IOMUX setting for UART1 port.

Change the function name to make the UART port number explicit.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2011-07-14 15:41:24 +02:00
Matthias Weisser
f456445f29 build: Add targets for auto gen of asm-offsets.h and use it in imx35
asm-offsets.h should be auto generated. This patch adds two rules to rules.mk
which makes this possible and removes the rules on imx35.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2011-07-14 15:41:24 +02:00
Mike Frysinger
d8940a6544 Blackfin: jtag-console: fix timer usage
Reported-by: Graeme Russ <graeme.russ@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:46 -04:00
Mike Frysinger
bb83875d5d Blackfin: switch to common display_options()
Use common code to output the version string rather than doing it
ourselves.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:46 -04:00
Mike Frysinger
e8e35efc8f Blackfin: serial: move early debug strings into .rodata section
Rewrite the assembly serial_early_puts() helper to place the strings
in the .rodata section rather than embedding them directly in the
.text section.  Using .text is a little simpler, but it doesn't let
people execute out of internal L1 sram (since core reads don't work
on those regions).

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:46 -04:00
Mike Frysinger
bc9c64273d Blackfin: update anomaly lists to latest public info
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:46 -04:00
Mike Frysinger
b1e574d95b Blackfin: serial: convert to bfin_{read,write} helpers
Since the serial struct declares the sizes for us, no need to hardcode
them in the accessor functions.  Let the bfin_{read,write} helpers do
it for us.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:46 -04:00
Mike Frysinger
4150cec335 Blackfin: split out async setup
We really only need to tweak the async banks in the initcode if the
processor is booting out of it, otherwise we can wait until later
on in the CPU booting setup.

This also makes testing in the sim and early bring up over JTAG work
much smoother when the initcode gets bypassed.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:46 -04:00
Mike Frysinger
ed7496349d Blackfin: drop unused dma.h header from start code
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
Mike Frysinger
f75e8b32ad Blackfin: portmux: allow header to be included in assembly files
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
Mike Frysinger
7ed998f629 Blackfin: sync MMR read/write helpers with Linux
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
Mike Frysinger
95b4b9d97a Blackfin: gpio: optimize free path a little
When we aren't doing resource tracking, the gpio_free() function is a
stub that simply returns, so pull this logic up a level and make it an
inline stub in the header.  Now we don't have to waste time at any of
the call sites.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
Mike Frysinger
272d2fc2f5 Blackfin: post: setup default CONFIG_SYS_POST_WORD_ADDR
Set the default post word location to an L1 data location for all
Blackfin parts so things "just work" for most people.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
Mike Frysinger
f9aee4b4b6 Blackfin: uart: fix printf warning
The code uses %i to printf a size_t when it should use %zu, otherwise
we get a warning from gcc about it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
Mike Frysinger
fb5166ce35 Blackfin: add init.elf helper code
This creates a standalone ELF that executes just the Blackfin initcode.
This is useful for people who want to program the low level aspects of
the CPU (memory/clocks/etc...) and can easily be used with JTAG for
quick booting while developing.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
Mike Frysinger
08a82a447b Blackfin: dont reset SWRST on newer bf526 parts
The bug in the BF526 rom when doing a software reset exists only in older
silicon versions, so don't clear SWRST on newer parts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
Mike Frysinger
635f330fc7 Blackfin: uart: add multiple serial support
This brings CONFIG_SERIAL_MULTI support to the Blackfin on-chip UARTs.
Ends up adding only ~512bytes per additional UART.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
Mike Frysinger
34a6d0b84a Blackfin: uart: move debug buffers into local bss
There's no need for these saved buffers to be global symbols, or in
the data section.  So mark them static to move them into the bss.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-12 02:17:45 -04:00
Timur Tabi
26002826c7 powerpc/85xx: remove SERDES4 soft-reset work-around
Some P4080 rev1 errata work-arounds, notably erratum SERDES4, required a
bank soft-reset after the bank was configured and enabled, even though
enabling a bank causes it to reset.  Because the reset was required for
multiple errata, it was not properly enclosed in an #ifdef, and so was
not removed with all the other rev1 errata work-arounds.

Erratum SERDES-8 says that the clocks for bank 3 needs to be enabled if
bank 2 is enabled, but this was not being done for SERDES protocols 0xF
and 0x10.  The bank reset also happened to enable bank 3 (apparently an
undocumented feature).  Simply removing the reset breaks these two
protocols.

It turns out that every time we call enable_bank(), we do want at least
one lane of the bank enabled, either because the bank is supposed to be
enabled, or because we need the clock from that bank enabled.

For erratum SERDES-A001, we don't want to modify srds_lpd_b[] when we
call enable_bank(), because that array is used elsewhere to determine if
the bank is available.

Note that the side effect of these changes is that the work-arounds for
these two errata are now linked.  Specifically, if SERDES-A001 is
enabled, then we need SERDES-8 enabled as well.

Because this was the only SERDES bank soft-reset, there is no need to
implement a work-around for erratum SERDES-A003.

Also fix an off-by-one error in a printf().

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Ed Swarthout <swarthou@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:21 -05:00
York Sun
23f9670f1a powerpc/mpc8xxx: Allow override DDR read-to-write turnaround time
Add this option to allow boards to override the default read-to-write
turnaround time for better performance.

Signed-off-by: York Sun <yorksun@freescale.com>
2011-07-11 13:24:20 -05:00
Ramneek Mehresh
72f4980b40 powerpc/8xxx: Update USB mode device tree fixup
Modify support for USB mode fixup:
        - Add common support for USB mode and phy type
          device tree fix-up for all USB controllers
          mentioned in hwconfig string
        - Fetch USB mode and phy type via hwconfig; if not
          defined in hwconfig, then fetch them from env

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
York Sun
4c99cb9190 powerpc/mpc8xxx: fix DDR data width checking
Checking width before setting DDR controller. SPD for DDR1 and DDR2 has
data width and primary sdram width. The latter one has different meaning
for DDR3.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
York Sun
f2d264b660 powerpc/mpc8xxx: Adding fallback to raw timing on supported boards
In case of empty SPD or checksum error, fallback to raw timing on
supported boards.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
York Sun
1b3e3c4f26 powerpc/mpc8xxx: Enable calculation for fixed DDR chips
We used to have fixed parameters for soldered DDR chips. This patch
introduces CONFIG_SYS_DDR_RAW_TIMING to enable calculation based on timing
data from DDR chip datasheet, implemneted in board-specific files or header
files.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
Felix Radensky
aeb6716a12 powerpc/85xx: Fix pin muxing for second USB controller
On P1022/P1013 second USB controller is muxed with second
Ethernet controller. The current code to enable second USB
fails to properly clear pinmux bits used by ethernet. As a
result, Linux freezes when this controller is used. This
patch fixes the problem.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
York Sun
51d498f175 powerpc/mpc8xxx: Add 16-bit support for DDR3
Add support for 16-bit DDR bus. Also deal with system using 64- and 32-bit
DDR devices.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:20 -05:00
York Sun
d2246549c7 powerpc/mpc8xxx: check SPD length before using part number
Only use DDR DIMM part number if SPD has valid length, to prevent from
display garbage in case SPD doesn't cover these fields.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
York Sun
e090aa7cf0 powerpc/mpc8xxx: adjust DDR burst length and chop accroding to sdram width
If the bus width is 32-bit, burst chop should be disabled and burst length
should be 8. Read from SPD or other source to determine the width.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00
Kumar Gala
1f97987a51 powerpc/85xx: Add P2041 processor support
The P2041 is similar to P2040, however has a 10G port and backside L2

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-07-11 13:24:19 -05:00