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powerpc/mpc8xxx: adjust DDR burst length and chop accroding to sdram width
If the bus width is 32-bit, burst chop should be disabled and burst length should be 8. Read from SPD or other source to determine the width. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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commit
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1 changed files with 20 additions and 4 deletions
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@ -418,8 +418,19 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
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/* Choose dynamic power management mode. */
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popts->dynamic_power = 0;
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/* 0 = 64-bit, 1 = 32-bit, 2 = 16-bit */
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popts->data_bus_width = 0;
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/*
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* check first dimm for primary sdram width
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* presuming all dimms are similar
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* 0 = 64-bit, 1 = 32-bit, 2 = 16-bit
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*/
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if (pdimm[0].primary_sdram_width == 64)
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popts->data_bus_width = 0;
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else if (pdimm[0].primary_sdram_width == 32)
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popts->data_bus_width = 1;
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else if (pdimm[0].primary_sdram_width == 16)
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popts->data_bus_width = 2;
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else
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panic("Error: invalid primary sdram width!\n");
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/* Choose burst length. */
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#if defined(CONFIG_FSL_DDR3)
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@ -427,8 +438,13 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
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popts->OTF_burst_chop_en = 0; /* on-the-fly burst chop disable */
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popts->burst_length = DDR_BL8; /* Fixed 8-beat burst len */
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#else
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popts->OTF_burst_chop_en = 1; /* on-the-fly burst chop */
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popts->burst_length = DDR_OTF; /* on-the-fly BC4 and BL8 */
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if (popts->data_bus_width == 1) { /* 32-bit bus */
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popts->OTF_burst_chop_en = 0;
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popts->burst_length = DDR_BL8;
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} else {
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popts->OTF_burst_chop_en = 1; /* on-the-fly burst chop */
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popts->burst_length = DDR_OTF; /* on-the-fly BC4 and BL8 */
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}
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#endif
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#else
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popts->burst_length = DDR_BL4; /* has to be 4 for DDR2 */
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