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AT91: change common at91sam9261 files to compile with new scheme
Signed-off-by: Asen Dimov <dimov@ronetix.at> Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
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b38d634b39
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2 changed files with 38 additions and 41 deletions
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@ -23,77 +23,73 @@
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/at91_pmc.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/io.h>
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/*
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* if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
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* peripheral pins. Good to have if hardware is soldered optionally
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* or in case of SPI no slave is selected. Avoid lines to float
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* needlessly. Use a short local PUP define.
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*
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* Due to errata "TXD floats when CTS is inactive" pullups are always
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* on for TXD pins.
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*/
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#ifdef CONFIG_AT91_GPIO_PULLUP
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# define PUP CONFIG_AT91_GPIO_PULLUP
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#else
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# define PUP 0
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#endif
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void at91_serial0_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTC, 8, 1); /* TXD0 */
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at91_set_a_periph(AT91_PIO_PORTC, 9, 0); /* RXD0 */
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writel(1 << AT91SAM9261_ID_US0, &pmc->pcer);
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writel(1 << ATMEL_ID_USART0, &pmc->pcer);
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}
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void at91_serial1_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTC, 12, 1); /* TXD1 */
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at91_set_a_periph(AT91_PIO_PORTC, 13, 0); /* RXD1 */
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writel(1 << AT91SAM9261_ID_US1, &pmc->pcer);
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writel(1 << ATMEL_ID_USART1, &pmc->pcer);
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}
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void at91_serial2_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTC, 14, 1); /* TXD2 */
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at91_set_a_periph(AT91_PIO_PORTC, 15, 0); /* RXD2 */
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writel(1 << AT91SAM9261_ID_US2, &pmc->pcer);
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writel(1 << ATMEL_ID_USART2, &pmc->pcer);
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}
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void at91_serial3_hw_init(void)
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void at91_seriald_hw_init(void)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTA, 9, 0); /* DRXD */
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at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* DTXD */
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writel(1 << AT91_ID_SYS, &pmc->pcer);
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writel(1 << ATMEL_ID_SYS, &pmc->pcer);
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}
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void at91_serial_hw_init(void)
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{
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#ifdef CONFIG_USART0
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at91_serial0_hw_init();
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#endif
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#ifdef CONFIG_USART1
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at91_serial1_hw_init();
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#endif
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#ifdef CONFIG_USART2
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at91_serial2_hw_init();
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#endif
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#ifdef CONFIG_USART3 /* DBGU */
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at91_serial3_hw_init();
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#endif
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}
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#ifdef CONFIG_HAS_DATAFLASH
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#if defined(CONFIG_HAS_DATAFLASH) || defined(CONFIG_ATMEL_SPI)
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void at91_spi0_hw_init(unsigned long cs_mask)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */
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at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */
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at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */
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at91_set_a_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */
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at91_set_a_periph(AT91_PIO_PORTA, 1, PUP); /* SPI0_MOSI */
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at91_set_a_periph(AT91_PIO_PORTA, 2, PUP); /* SPI0_SPCK */
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/* Enable clock */
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writel(1 << AT91SAM9261_ID_SPI0, &pmc->pcer);
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writel(1 << ATMEL_ID_SPI0, &pmc->pcer);
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if (cs_mask & (1 << 0)) {
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at91_set_a_periph(AT91_PIO_PORTA, 3, 1);
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@ -123,14 +119,14 @@ void at91_spi0_hw_init(unsigned long cs_mask)
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void at91_spi1_hw_init(unsigned long cs_mask)
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{
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at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
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at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC;
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at91_set_a_periph(AT91_PIO_PORTB, 30, 0); /* SPI1_MISO */
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at91_set_a_periph(AT91_PIO_PORTB, 31, 0); /* SPI1_MOSI */
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at91_set_a_periph(AT91_PIO_PORTB, 29, 0); /* SPI1_SPCK */
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at91_set_a_periph(AT91_PIO_PORTB, 30, PUP); /* SPI1_MISO */
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at91_set_a_periph(AT91_PIO_PORTB, 31, PUP); /* SPI1_MOSI */
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at91_set_a_periph(AT91_PIO_PORTB, 29, PUP); /* SPI1_SPCK */
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/* Enable clock */
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writel(1 << AT91SAM9261_ID_SPI1, &pmc->pcer);
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writel(1 << ATMEL_ID_SPI1, &pmc->pcer);
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if (cs_mask & (1 << 0)) {
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at91_set_a_periph(AT91_PIO_PORTB, 28, 1);
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@ -104,7 +104,7 @@
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#define ATMEL_SIZE_SRAM 0x00028000 /* Internal SRAM size (160Kb) */
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#define ATMEL_BASE_ROM 0x00400000 /* Internal ROM base address */
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#define ATMEL_SIZE_ROM SZ_32K /* Internal ROM size (32Kb) */
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#define ATMEL_SIZE_ROM 0x00008000 /* Internal ROM size (32Kb) */
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#define ATMEL_BASE_UHP 0x00500000 /* USB Host controller */
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#define ATMEL_BASE_LCDC 0x00600000 /* LDC controller */
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@ -125,6 +125,7 @@
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* Other misc defines
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*/
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#define ATMEL_PIO_PORTS 3 /* theese SoCs have 3 PIO */
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#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
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#define ATMEL_BASE_PIO ATMEL_BASE_PIOA
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/*
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