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Daniel Schwierzeck ab2a98b117 MIPS: make cache operation mode configurable 
Currently the cache operation mode is hard-coded to
CONF_CM_CACHABLE_NONCOHERENT. This is not appropiate for CPUs or SOCs
which operate at a different mode.

This patch makes the cache operation mode configurable via board config.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Acked-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2011-07-31 23:26:41 +09:00
..
arm cleanup: Fix typos and misspellings in various files. 2011-07-28 21:27:36 +02:00
avr32 unify version_string 2011-07-28 17:22:53 +02:00
blackfin unify version_string 2011-07-28 17:22:53 +02:00
m68k cleanup: Fix typos and misspellings in various files. 2011-07-28 21:27:36 +02:00
microblaze unify version_string 2011-07-28 17:22:53 +02:00
mips MIPS: make cache operation mode configurable 2011-07-31 23:26:41 +09:00
nios2 unify version_string 2011-07-28 17:22:53 +02:00
powerpc powerpc/8xxx: Remove dependency on <usb.h> 2011-07-29 16:04:56 -05:00
sh unify version_string 2011-07-28 17:22:53 +02:00
sparc cleanup: Fix typos and misspellings in various files. 2011-07-28 21:27:36 +02:00
x86 cleanup: Fix typos and misspellings in various files. 2011-07-28 21:27:36 +02:00
.gitignore update include/asm/ gitignore after move 2010-05-07 00:17:30 +02:00