When setting the compatible property for the L2 cache ensure that we
follow the documented binding by setting both
"<chip>-l2-cache-controller" and "cache" as values.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Enable ERRATUM_A009942 workaround for B-series and T-series platforms.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
- add additional function erratum_a009942_check_cpo to check if the
board needs tuning CPO calibration for optimal setting.
- move ERRATUM_A009942(with revision to check cpo_sample option) from
fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts.
- move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c
- remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
[YS: Replaced CONFIG_QEMU_E500 with CONFIG_ARCH_QEMU_E500]
Reviewed-by: York Sun <york.sun@nxp.com>
Commit e2f88dfd2d ("libfdt: Introduce new ARCH_FIXUP_FDT option")
allows us to skip memory setup of DTB, but a problem for ARM is that
spin_table_update_dt() and psci_update_dt() are skipped as well if
CONFIG_ARCH_FIXUP_FDT is disabled.
This commit allows us to skip only fdt_fixup_memory_banks() instead
of the whole of arch_fixup_fdt(). It will be useful when we want to
use a memory node from a kernel DTB as is, but need some fixups for
Spin-Table/PSCI.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fixed build error for x86:
Signed-off-by: Simon Glass <sjg@chromium.org>
Some header files have this macro defined conditionally and
redefined unconditionally. Remove all existing definitions.
Signed-off-by: York Sun <york.sun@nxp.com>
This configuration has been moved into Kconfig for mpc85xx, and
dropped for mpc86xx. Remove the default value in config.h.
Signed-off-by: York Sun <york.sun@nxp.com>
CONFIG_T104xRDB is defined in T104xRDB.h, so it is always enabled for
all T1040RDB, T1040D4RDB, T1042RDB, T1042D4RDB, T1042RDB_PI.
CONFIG_T104XD4RDB is defined for all T1040D4RDB, T1042D4RDB.
Signed-off-by: York Sun <york.sun@nxp.com>
Use TARGET_T1040D4RDB in Kconfig to simplify config macros. Replace
CONFIG_T1040D4RDB with TARGET_T1040D4RDB and clean up existing macros.
Signed-off-by: York Sun <york.sun@nxp.com>
P2010 is a single-core version of P2020. There is no P2010 target
configured. Drop related macros. P2010 SoC is still supported.
Signed-off-by: York Sun <york.sun@nxp.com>
All boards covered by this group have been converted to their own
targers. Drop TARGET_P1_P2_RDB_PC from Kconfig.
Signed-off-by: York Sun <york.sun@nxp.com>
Use TARGET_P2020RDB_PC instead of sharing with P1_P2_RDB_PC to
simplify Kconfig and config macros.
Remove macro CONFIG_P2020RDB.
Signed-off-by: York Sun <york.sun@nxp.com>
Use TARGET_P1025RDB instead of sharing with P1_P2_RDB_PC to
simplify Kconfig and config macros.
Remove macro CONFIG_P1025RDB.
Signed-off-by: York Sun <york.sun@nxp.com>
Use TARGET_P1024RDB instead of sharing with TARGET_P1_P2_RDB_PC to
simplify Kconfig and macros.
Remove macro CONFIG_P1024RDB.
Signed-off-by: York Sun <york.sun@nxp.com>
Use TARGET_P1021RDB instead of sharing with TARGET_P1_P2_RDB_PC to
simplify Kconfig and macros.
Remove macro CONFIG_P1021RDB.
Signed-off-by: York Sun <york.sun@nxp.com>
Use TARGET_P1020UTM instead of sharing with TARGET_P1_P2_RDB_PC
to simplify Kconfig and config macros.
Remove macro CONFIG_P1020UTM.
Signed-off-by: York Sun <york.sun@nxp.com>
Use TARGET_P1020RDB_PD instead of sharing with P1_P2_RDB_PC
to simplify Kconfig and config macros.
Remove macro CONFIG_P1020RDB_PD.
Signed-off-by: York Sun <york.sun@nxp.com>
Use TARGET_P1020RDB_PC instead of sharing with TARGET_P1_P2_RDB_PC
to simplify Kconfig and config macros.
Remove macro CONFIG_P1020RDB_PC.
Signed-off-by: York Sun <york.sun@nxp.com>
Use TARGET_P1020MBG instead of sharing with TARGET_P1_P2_RDB_PC to
simplify Kconfig and other macros.
Remove macro CONFIG_P1020MBG.
Signed-off-by: York Sun <york.sun@nxp.com>
P1017 is a single-core version of P1023. There is no P1017 target
configured. Drop related macros. P1017 SoC is still supported.
Signed-off-by: York Sun <york.sun@nxp.com>
P1014 is a variant of P1010. There is no P1014 target configured.
Drop related macros. P1014 SoC is still supported.
Signed-off-by: York Sun <york.sun@nxp.com>
P1013 is a single-core version of P1022. There is no P1022 target
configured. Drop related macros. P1022 SoC is still supported.
Signed-off-by: York Sun <york.sun@nxp.com>
P1012 is a single-core version of P1021. There is no P1012 target
configured. Drop related macros. P1012 SoC is still supported.
Signed-off-by: York Sun <york.sun@nxp.com>
Remove CONFIG_P1010RDB_PA and CONFIG_P1010RDB_PB and split TARGET_P1010RDB
to TARGET_P1010RDB_PA and TARGET_P1010RDB_PB in Kconfig.
Signed-off-by: York Sun <york.sun@nxp.com>
Replace CONFIG_BSC9131, CONFIG_BSC9132 with ARCH_BSC9131, ARCH_BSC9132
Kconfig options.
Also drop #ifdef in BSC9131RDB.h since it is redundant.
Signed-off-by: York Sun <york.sun@nxp.com>
Defines get_svr() for mpc512x devices
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Cover-Letter: Fixes several spelling errors for the words "resetting",
"extended", "occur", and "multiple".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
lbc_clk is used to fixup dts as "bus frequency".
It is not being used by Linux IFC and eLBC driver.
So remove unused "bus frqeuency" fix-up of devicre tree.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Fix various misspellings of:
* deprecated
* partition
* preceding,preceded
* preparation
* its versus it's
* export
* existing
* scenario
* redundant
* remaining
* value
* architecture
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Instead of using the global spl_image variable, pass the required struct in
as an argument.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
CONFIG_SYS_FSL_USB1_PHY_ENABLE is set and the USB Phy
offset are set to enable the initial setting of Usb Phy for P1010.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Modifies erratum implementation due to the fact that P3041,
P5020, and P5040 are all big endian for the USB PHY registers, but
they were specified little endian.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
