Commit graph

411 commits

Author SHA1 Message Date
Timur Tabi
88353a9851 Fix calculation of I2C clock for some 85xx chips
Some 85xx chips use CCB as the base clock for the I2C.  Some use CCB/2, and
some use CCB/3.  There is no pattern that can be used to determine which
chips use which frequency, so the only way to determine is to look up the
actual SOC designation and use the right value for that SOC.

Update immap_85xx.h to include the GUTS PORDEVSR2 register.

Signed-off-by: Timur Tabi <timur@freescale.com>
2008-04-18 17:43:09 -05:00
Kumar Gala
e99ccb4881 Introduce phys_size_t and move phys_addr_t into asm/types.h
Also add CONFIG_PHYS_64BIT on powerpc to deal with 32-bit ppc's
that have larger physical addresses like 44x, 85xx, and 86xx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-13 17:13:46 -07:00
Wolfgang Denk
e6dfed705e ppc: Get rid of unused machine type definitions
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-13 10:03:54 -07:00
Wolfgang Denk
1aeed8d71a Coding Style cleanup; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-13 09:59:26 -07:00
Kim Phillips
35cf155c5e mpc83xx: unreinvent mem_clk
delete ddr_clk and use mem_clk instead.  Rename other ddr_*_clk to
mem_*_clk for consistency's sake.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 14:32:07 -05:00
James Yang
5893b3d0a4 85xx: Expand CCSR space with more DDR controller registers.
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:04 -05:00
James Yang
a3e77fa535 85xx: Speed up get_ddr_freq() and get_bus_freq()
get_ddr_freq() and get_bus_freq() used get_sys_info() each time they were
called.  However, get_sys_info() recalculates extraneous information when
called each time.  Have get_ddr_freq() and get_bus_freq() return memoized
values from global_data instead.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:04 -05:00
Andy Fleming
1ced121600 Update SVR numbers to expand support
FSL has taken to using SVR[16:23] as an SOC sub-version field.  This
is used to distinguish certain variants within an SOC family.  To
account for this, we add the SVR_SOC_VER() macro, and update the SVR_*
constants to reflect the larger value.  We also add SVR numbers for all
of the current variants.  Finally, to make things neater, rather than
use an enormous switch statement to print out the CPU type, we create
and array of SVR/name pairs (using a macro), and print out the CPU name
that matches the SVR SOC version.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-03-26 11:43:04 -05:00
Kumar Gala
ec2b74ffd3 85xx: Added support for multicore boot mechanism
Added the cpu command that provides a generic mechanism to get status,
reset, and release secondary cores in multicore processors.

Added support for using the ePAPR defined spin-table mechanism on 85xx.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-03-26 11:43:03 -05:00
Anton Vorontsov
453316a2a1 83xx: serdes setup routines
This patch adds few routines to configure serdes on 837x targets.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-03-25 19:16:45 -05:00
Bryan O'Donoghue
77ff7b7444 8xx: Update OF support on 8xx
This patch does some shifting around of OF support on 8xx.

Signed-off-by: Bryan O'Donoghue <bodonoghue@codehermit.ie>
2008-03-25 22:28:34 +01:00
Yuri Tikhonov
b428f6a8c6 The patch introduces the CRITICAL feature of POST tests. If the test marked as POST_CRITICAL fails then the alternative, post_critical, boot-command is used. If this command is not defined then U-Boot enters into interactive mode.
Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 22:24:48 +01:00
Yuri Tikhonov
e262efe357 The patch introduces the CRITICAL feature of POST tests. If the test
marked as POST_CRITICAL fails then the alternative, post_critical,
boot-command is used. If this command is not defined then U-Boot
enters into interactive mode.

Signed-off-by: Dmitry Rakhchev <rda@emcraft.com>
Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
2008-03-18 21:59:23 +01:00
Stefan Roese
c813f1f835 ppc4xx: Add AMCC Canyonlands support (460EX) (3/3)
This patch adds support for the AMCC Canyonlands 460EX evaluation
board.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:05 +01:00
Stefan Roese
999ecd5aca ppc4xx: Add basic support for AMCC 460EX/460GT (3/5)
This patch adds basic support for the AMCC 460EX/460GT PPC's.

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:04 +01:00
Stefan Roese
84a999b6cd ppc4xx: program_tlb now uses 64bit physical addess
This patch changes the physical addess parameter from 32bit to 64bit.
This is needed for 36bit 4xx platforms to access areas located
beyond the 4GB border, like SoC peripherals (EBC etc.).

Signed-off-by: Stefan Roese <sr@denx.de>
2008-03-15 07:28:03 +01:00
John Rigby
5f91db7f58 MPC5121e ADS PCI support take 3
Adds PCI support for MPC5121

Tested with drivers/net/rtl8139.c

Support is conditional since PCI on old silicon does not work.

ads5121_PCI_config turns on PCI

In this version, condition compilation of PCI code has been moved
from ifdef in board/ads5121/pci.c to board/ads5121/Makefile as
suggested by Jean-Christophe PLAGNIOL-VILLARD

Signed-off-by: John Rigby <jrigby@freescale.com>
2008-03-02 21:44:59 +01:00
Shinya Kuribayashi
b075d74efb Remove the __STRICT_ANSI__ check from the __u64/__s64 declaration on 32bit targets.
----------------------------------------------------------------
Olaf Hering [Wed, 17 Oct 2007 06:27:13 +0000 (23:27 -0700)]

Remove the __STRICT_ANSI__ check from the __u64/__s64 declaration on
32bit targets.

GCC can be made to warn about usage of long long types with ISO C90
(-ansi), but only with -pedantic.  You can write this in a way that even
then it doesn't cause warnings, namely by:

#ifdef __GNUC__
__extension__ typedef __signed__ long long __s64;
__extension__ typedef unsigned long long __u64;
#endif

The __extension__ keyword in front of this switches off any pedantic
warnings for this expression.

Signed-off-by: Olaf Hering <olh@suse.de>
Cc: <linux-arch@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
----------------------------------------------------------------

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
2008-02-23 09:49:48 +01:00
Wolfgang Denk
6a2dcaf1ee Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xx 2008-02-22 13:03:28 +01:00
Kumar Gala
5a9abcc317 Remove duplicate defines for ARRAY_SIZE
A few duplicate of the ARRAY_SIZE macro sneaked in since we put
the define in common.h.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-02-22 12:36:44 +01:00
Jon Loeliger
a551cee99a 86xx: Fix GUR PCI config registers properly.
Back in commit 975a083a5e where
I tried to "8610HPCD: Fix typos in two PCI setup registers", I
botched it due to not realizing that 8610 and 8641 had different
Global Utility Register defintions, one of which was like 85xx,
and the other wasn't.  Correct this problem by introducing two
symbols, one for each 86xx SoC, but neither of which is named
anything like 85xx.

My bad.  Lovely Wednesday with git bisect.  You know.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-02-20 14:45:09 -06:00
Jon Loeliger
975a083a5e 8610HPCD: Fix typos in two PCI setup registers.
The two symbols MPC86xx_PORDEVSR_IO_SEL and MPC86xx_PORBMSR_HA
were erroneously present as 85xx names and values, leftover from
the clone wars.  Fix this by removing the 85xx cruft from the
86xx codebase.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-02-19 12:31:08 -06:00
Wolfgang Denk
9e04a81388 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc86xx
Conflicts:

	common/cmd_reginfo.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-02-15 00:26:52 +01:00
Timur Tabi
943afa229c 85xx, 86xx: Determine I2C clock frequencies and store in global_data
Update global_data to define i2c1_clk and i2c2_clk to 85xx and 86xx.

Update the get_clocks() function in 85xx and 86xx to determine the I2C
clock frequency and store it in gd->i2c1_clk and gd->i2c2_clk.

Signed-off-by: Timur Tabi <timur@freescale.com>
2008-02-14 23:32:40 +01:00
Wolfgang Denk
e7670f6c1e PPC: Use r2 instead of r29 as global data pointer
R29 was an unlucky choice as with recent toolchains (gcc-4.2.x) gcc
will refuse to use load/store multiple insns; instead, it issues a
list of simple load/store instructions upon function entry and exit,
resulting in bigger code size, which in turn makes the build for a
few boards fail.

Use r2 instead.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-02-14 22:43:22 +01:00
Jon Loeliger
ccd6e1464e Add CFG_MPC86xx_DDR_ADDR and CFG_MPC86xx_DDR2_ADDR symbols
These replace direct structure references for IMMR sections.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-02-13 16:03:49 -06:00
Becky Bruce
ddcebcb638 86xx: Add print_laws function to fsl_law.c
This can be used for debug, and will be used by board code
to help implement reginfo.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-01-24 12:12:51 -06:00
Wolfgang Denk
39166b5c9e Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2008-01-23 13:56:55 +01:00
Dave Liu
cfe5ca7797 mpc83xx: Correct the struct spi8xxx in mpc8xxx_spi.h
The commit 04a9e1180a
cause the 83xx immap broken, so the DMA and PCI will
be failed.

The patch fix the struct spi8xxx and rm struct spi83xx.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-18 12:39:23 -06:00
Kim Phillips
2956acd5ef codingstyle cleanup for spi driver
..and rm unused CONFIG_FSL_SPI define

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-17 14:01:59 -06:00
Ben Warren
04a9e1180a Add support for a Freescale non-CPM SPI controller
This patch adds support for the SPI controller found on Freescale PowerPC
processors such as the MCP834x family.  Additionally, a new config option,
CONFIG_HARD_SPI, is added for general purpose SPI controller use.

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-17 11:02:25 -06:00
Kumar Gala
44a23cfd63 85xx: Introduce new tlb API
Add a set of functions to manipulate TLB entries:
 * set_tlb() - write a tlb entry
 * invalidate_tlb() - invalidate a tlb array
 * disable_tlb() - disable a variable size tlb entry
 * init_tlbs() - setup initial tlbs based on static table

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-17 02:04:07 -06:00
Kumar Gala
83d40dfd79 85xx: Move LAW init code into C
Move the initialization of the LAWs into C code and provide an API
to allow modification of LAWs after init.

Board code is responsible to provide a law_table and num_law_entries.

We should be able to use the same code on 86xx as well.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-16 23:21:55 -06:00
Grzegorz Bernacki
5d49e0e152 MPC512X: Cleanup bus clock names.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2008-01-12 15:37:49 +01:00
Grzegorz Bernacki
281ff9a45c ads5121: Added support for FDT.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2008-01-12 15:36:17 +01:00
Dave Liu
c86ef2cd9e mpc83xx: Fix the typo in global data struct
Fix the typo in global_data.h

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-01-10 21:06:48 -06:00
Timur Tabi
b8ec238503 85xx: add ability to upload QE firmware
Define the layout of a binary blob that contains a QE firmware and instructions
on how to upload it.  Add function qe_upload_firmware() to parse the blob and
perform the actual upload.  Add command-line command "qe fw" to take a firmware
blob in memory and upload it.  Update ft_cpu_setup() on 85xx to create the
'firmware' device tree node if U-Boot has uploaded a firmware.  Fully define
'struct rsp' in immap_qe.h to include the actual RISC Special Registers.

Signed-off-by: Timur Tabi <timur@freescale.com>
2008-01-09 16:28:12 -06:00
Kumar Gala
b009f3eca9 85xx: Remove cache config from configs.h
Either use the standard defines in asm/cache.h or grab the information
at runtime from the L1CFG SPR.

Also, minor cleanup in cache.h to make the code a bit more readable.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-09 16:25:04 -06:00
Kumar Gala
2146cf5682 Reworked FSL Book-E TLB macros to be more readable
The old macros made it difficult to know what WIMGE and perm bits
were set for a TLB entry.  Actually use the bit masks for these items
since they are only a single bit.

Also moved the macros into mmu.h out of e500.h since they aren't specific
to e500.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-09 16:25:03 -06:00
Kumar Gala
1d47273d46 Use FSL Book-E MMU macros from Linux Kernel
Grab the FSL Book-E MAS register macros from Linux.  Also added
defines for page sizes up to 4TB and removed SHAREN since it doesnt
really exist.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-09 16:25:03 -06:00
Wolfgang Denk
0b4f579230 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc83xx 2008-01-09 11:27:02 +01:00
Matthias Fuchs
6e9233d30a ppc4xx: Move cpu/ppc4xx/vecnum.h into include path
This patch allows the use of 4xx interrupt vector number defines
in board specific code outside cpu/ppc4xx.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
2008-01-09 06:32:58 +01:00
Dave Liu
555da61702 mpc83xx: Add the support of MPC8315E SoC
The MPC8315E SoC including e300c3 core and new IP blocks,
such as TDM, PCI Express and SATA controller.

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-01-08 09:55:39 -06:00
Dave Liu
03051c3d35 mpc83xx: Add the support of MPC837x SoC
The MPC837x SoC including e300c4 core and new IP blocks,
such as SDHC, PCI Express and SATA controller.

Signed-off-by: Dave Liu <daveliu@freescale.com>
2008-01-08 09:55:39 -06:00
Lawrence R. Johnson
5ab884b254 ppc4xx: Add functionality to GPIO support
This patch makes two additions to GPIO support:

First, it adds function gpio_read_in_bit() to read the a bit from the
GPIO Input Register (GPIOx_IR) in the same way that function
gpio_read_out_bit() reads a bit from the GPIO Output Register
(GPIOx_OR).

Second, it modifies function gpio_set_chip_configuration() to provide
an additional option for configuring the GPIO from the
"CFG_4xx_GPIO_TABLE".

According to the 440EPx User's Manual, when an alternate output is used,
the three-state control is configured in one of two ways, depending on
the particular output.  The first option is to select the corresponding
alternate three-state control in the GPIOx_TRSH/L registers.  The second
option is to select the GPIO Three-State Control Register (GPIOx_TCR) in
the GPIOx_TRSH/L registers, and set the corresponding bit in the
GPIOx_TCR register to enable the output.  For example, the Manual
specifies configuring the GPIO00 Alternate 1 Signal (PreAddr07) to use
the alternate three-state control (first option), and specifies
configuring the GPIO32 Alternate 1 Signal (USB2OM0) with the output
enabled in the GPIOx_TCR register (second option).

Currently, gpio_set_chip_configuration() configures all alternate signal
outputs to use the first option.  This patch allow the second option to
be selected by setting the "out_val" element in the table entry to
"GPIO_OUT_1".  The first option is used when the "out_val" element is
set to "GPIO_OUT_0".  Because "out_val" is not currently used when an
alternate signal is selected, and because all current GPIO tables set
"out_val" to "GPIO_OUT_0" for all alternate signals, this patch should
not change any existing configurations.

Signed-off-by: Larry Johnson <lrj@acm.org>
2008-01-04 11:38:45 +01:00
Jon Loeliger
2c3536425d Merge commit 'wd/master' 2008-01-03 09:46:55 -06:00
Stefan Roese
bb701283a8 Merge branch 'master' of /home/stefan/git/u-boot/u-boot into for-1.3.2-ver2 2007-12-27 19:37:26 +01:00
Wolfgang Denk
3f523edb14 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx 2007-12-27 00:35:03 +01:00
Haavard Skinnemoen
4d7d6936eb Introduce map_physmem() and unmap_physmem()
map_physmem() returns a virtual address which can be used to access a
given physical address without involving the cache. unmap_physmem()
should be called when the virtual address returned by map_physmem() is
no longer needed.

This patch adds a stub implementation which simply returns the
physical address cast to a uchar * for all architectures except AVR32,
which converts the physical address to an uncached virtual mapping.
unmap_physmem() is a no-op on all architectures, but if any
architecture needs to do such mappings through the TLB, this is the
hook where those TLB entries can be invalidated.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-12-13 13:15:16 +01:00
Haavard Skinnemoen
812711ce6b Implement __raw_{read,write}[bwl] on all architectures
This adds implementations of __raw_read[bwl] and __raw_write[bwl] to
m68k, ppc, nios and nios2. The m68k and ppc implementations were taken
from Linux.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
2007-12-13 13:15:04 +01:00
Kumar Gala
8ff3de61fc Handle MPC85xx PCIe reset errata (PCI-Ex 38)
On the MPC85xx boards that have PCIe enable the PCIe errata fix.
(MPC8544DS, MPC8548CDS, MPC8568MDS).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:20 -06:00
Kumar Gala
a853d56c59 Use standard LAWAR_TRGT_IF_* defines for LAW setup on 85xx
We already had defines for LAWAR_TRGT_IF_* that we should use
rather than creating new ones.  Also, added some missing defines for
PCIE targets.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:20 -06:00
Kumar Gala
04db400892 Stop using immap_t on 85xx
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_*_ADDR as the base of the registers
instead of getting it via &immap.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:20 -06:00
Kumar Gala
aafeefbdb8 Stop using immap_t for cpm offset on 85xx
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_CPM_ADDR as the base of the CPM registers
instead of getting it via &immap->im_cpm.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:19 -06:00
Kumar Gala
f59b55a5b8 Stop using immap_t for guts offset on 85xx
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_GUTS_ADDR as the base of the guts registers
instead of getting it via &immap->im_gur.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-12-11 22:34:19 -06:00
Stefan Roese
f31d38b9ee ppc4xx: Enable 405EX PCIe UTL register configuration
Till now the UTL registers on 405EX were not initialized but left with
their default values. This patch new initializes some of the UTL
registers on 405EX.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-11-16 14:16:54 +01:00
Stefan Roese
aee747f19b ppc4xx: Enable 440 GPIO init table CFG_440_GPIO_TABLE for 405 platforms
- Rename CFG_440_GPIO_TABLE to CFG_4xx_GPIO_TABLE
- Cleanup of the 4xx GPIO functions
- Move some GPIO defines from the cpu headers ppc405.h/ppc440.h into gpio.h

Signed-off-by: Stefan Roese <sr@denx.de>
2007-11-15 14:23:55 +01:00
Stefan Roese
483e09a223 ppc4xx: Add change_tlb function to modify I attribute of TLB(s)
This function is used to either turn cache on or off in a specific
memory area.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:21:47 +01:00
Stefan Roese
9b94ac61d2 ppc4xx: Rework 4xx cache support
New cache handling functions added and all existing functions
moved from start.S into seperate cache.S.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:21:46 +01:00
Stefan Roese
f10493c6d7 ppc4xx: Correct UART input clock calculation and passing to fdt
We now use a value in the gd (global data) structure for the UART input
frequency, since the PPC4xx_SYS_INFO struct is always rewritten completely
in get_sys_info().

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:51 +01:00
Eugene O'Brien
f6ba9b5660 ppc4xx: Define CONFIG_BOOKE for all PPC440 based processors
CONFIG_BOOKE must be defined for PPC440 processors so that the proper SPR
number is used to access system registers.

Signed-off-by: Eugene O'Brien <eugene.obrien@advantechamt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:50 +01:00
Stefan Roese
5cb4af4791 ppc4xx: Add PCIe endpoint support on Kilauea (405EX)
This patch adds endpoint support for the AMCC Kilauea eval board. It can
be tested by connecting a reworked PCIe cable (only 1x lane singles
connected) to another root-complex.

In this test setup, a 64MB inbound window is configured at BAR0 which maps
to 0 on the PLB side. So accessing this BAR0 from the root-complex will
access the first 64MB of the SDRAM on the PPC side.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:50 +01:00
Stefan Roese
d4cb2d1794 ppc4xx: Dynamic configuration of 4xx PCIe mode as root or endpoint mode
This patch adds support for dynamic configuration of PCIe ports for the
AMCC PPC4xx boards equipped with PCIe interfaces. These are the PPC440SPe
boards Yucca & Katmai and the 405EX board Kilauea.

This dynamic configuration is done via the "pcie_mode" environement
variable. This variable can be set to "EP" or "RP" for endpoint or
rootpoint mode. Multiple values can be joined via the ":" delimiter.
Here an example:

pcie_mode=RP:EP:EP

This way, PCIe port 0 will be configured as rootpoint, PCIe port 1 and 2
as endpoint.

Per default Yucca will be configured as:
pcie_mode=RP:EP:EP

Per default Katmai will be configured as:
pcie_mode=RP:RP:REP

Per default Kilauea will be configured as:
pcie_mode=RP:RP

Signed-off-by: Tirumala R Marri <tmarri@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:50 +01:00
Stefan Roese
dbbd125721 ppc4xx: Add PPC405EX support
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:49 +01:00
Stefan Roese
97923770cb ppc4xx: 4xx_pcie: More general cleanup and 405EX PCIe support added
Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:49 +01:00
Stefan Roese
3048bcbf0b ppc4xx: Rename 405gp_pci to 4xx_pci since its used on all 4xx platforms
These files were introduced with the IBM 405GP but are currently used on all
4xx PPC platforms. So the name doesn't match the content anymore. This patch
renames the files to 4xx_pci.c/h.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:49 +01:00
Stefan Roese
03d344bb6a ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (3)
(3) This patch introduces macros like SDRN_PESDR_DLPSET(port) to access
    the SDR registers of the PCIe ports. This makes the overall design
    clearer, since it removed a lot of switch statements which are not
    needed anymore.

    Also, the functions ppc4xx_init_pcie_rootport() and
    ppc4xx_init_pcie_entport() are merged into a single function
    ppc4xx_init_pcie_port(), since most of the code was duplicated.
    This makes maintainance and porting to other 4xx platforms
    easier.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:49 +01:00
Stefan Roese
026f711068 ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (2)
This patch is the first patch of a series to make the 440SPe PCIe code
usable on different 4xx PPC platforms. In preperation for the new 405EX
which is also equipped with PCIe interfaces.

(2) This patch renames the functions from 440spe_ to 4xx_ with a
    little additional cleanup

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:49 +01:00
Stefan Roese
c7c6da2302 ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (1)
This patch is the first patch of a series to make the 440SPe PCIe code
usable on different 4xx PPC platforms. In preperation for the new 405EX
which is also equipped with PCIe interfaces.

(1) This patch renames the files from 440spe_pcie to 4xx_pcie

Signed-off-by: Stefan Roese <sr@denx.de>
2007-10-31 21:20:48 +01:00
Jon Loeliger
9553df86d3 Initial mpc8610hpcd cpu/, README and include/ files.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Mahesh Jade <mahesh.jade@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-10-17 15:01:47 -05:00
Wolfgang Denk
20640002e6 Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xx 2007-08-29 00:53:51 +02:00
Heiko Schocher
f98984cb19 IDE: - make ide_inb () and ide_outb () "weak", so boards can
define there own I/O functions.
          (Needed for the pcs440ep board).
        - The default I/O Functions are again 8 Bit accesses.
        - Added CONFIG_CMD_IDE for the pcs440ep Board.

Signed-off-by: Heiko Schocher <hs@denx.de>
2007-08-28 17:39:14 +02:00
Stefan Roese
93f7983460 Merge with /home/stefan/git/u-boot/u-boot-ppc4xx 2007-08-21 16:33:33 +02:00
Stefan Roese
3ad6387873 ppc4xx: Add matrix kbd support to lwmon5 board (440EPx based)
This patch adds support for the matrix keyboard on the lwmon5 board.
Since the implementation in the dsPCI is kind of compatible with the
"old" lwmon board, most of the code is copied from the lwmon
board directory.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-08-21 16:27:57 +02:00
Andy Fleming
b96c83d4ae Fix numerous bugs in the 8568 UEC support
Actually, fixed a large bug in the UEC for *all* platforms.
How did this ever work?

uec_init() did not follow the spec for eth_init(), and returned
0 on success.  Switch it to return the link like tsec_init()
(and 0 on error)

The immap for the 8568 was defined based on MPC8568, rather than
CONFIG_MPC8568

CONFIG_QE was off

CONFIG_ETHPRIME was set to "Freescale GETH".  Now is "FSL UEC0"

Fixed a comment about the ranges for CONFIG_ETHPRIME if TSEC_ENET is
enabled

Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-08-16 12:12:51 +02:00
Stefan Roese
3b3bff4cbf Merge with git://www.denx.de/git/u-boot.git 2007-08-14 16:36:29 +02:00
Andy Fleming
da9d4610d7 Add support for UEC to 8568
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-08-14 01:47:44 -05:00
Haiying Wang
c59e4091ff Add PCI support for MPC8568MDS board
This patch is against u-boot-mpc85xx.git of www.denx.com

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
2007-08-14 01:46:08 -05:00
Ed Swarthout
837f1ba05c 8544ds PCIE support
PCI1 LAW mapping should use CFG_PCI1_MEM_PHY and not _BASE address.

Enable LBC and ECM errors and clear error registers.

Add tftpflash env var to get uboot from tftp server and flash it.

Add pci/pcie convenience env vars to display register space:
  "run pcie3regs" to see all pcie3 ccsr registers
  "run pcie3cfg" to see all cfg registers
Whitespace cleanup and MPC8544DS.h

Enable CONFIG_INTERRUPTS.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2007-08-14 01:38:40 -05:00
Andy Fleming
61a21e980a 85xx start.S cleanup and exception support
From: Ed Swarthout <Ed.Swarthout@freescale.com>

Support external interrupts from platform to eliminate system hangs.
Define CONFIG_INTERRUPTS board configure option to enable.
Enable ecm, ddr, lbc, and pci/pcie error interrupts in PIC.

Remove extra cpu initialization redundant with hardware initialization.
Whitespace cleanup.

Define and use _START_OFFSET consistent with other processors using
ppc_asm.tmpl

Move additional code from .text to boot page to make room for
exception vectors at start of image.

Handle Machine Check, External and Critical exceptions.

Fix e500 machine check error determination in traps.c

TEXT_BASE can now be 0xfffc_0000 - which cuts binary image in half.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2007-08-14 01:34:21 -05:00
Ed Swarthout
2e4d94f1e3 fsl_pci_init cleanup.
Do not enable normal errors created during probe (master abort, perr,
and pcie Invalid Configuration access).

Add CONFIG_PCI_NOSCAN board option to prevent bus scan.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2007-08-10 11:39:37 -05:00
Jon Loeliger
cfc7a7f5bb cpu/86xx fixes.
Remove rev 1 fixes.
Always set PICGCR_MODE.
Enable machine check and provide board config option
to set and handle SoC error interrupts.

Include MSSSR0 in error message.

Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-08-10 11:02:32 -05:00
Wolfgang Denk
f2c2a937d8 Merge with /home/wd/git/u-boot/custodian/u-boot-testing 2007-08-06 01:11:08 +02:00
Wolfgang Denk
46919751ea Merge with /home/wd/git/u-boot/custodian/u-boot-mpc85xx 2007-08-06 00:55:51 +02:00
Ed Swarthout
63cec5814f Make MPC8641's PCI/PCI-E driver a common driver for many FSL parts.
All of the PCI/PCI-Express driver and initialization code that
was in the MPC8641HPCN port has now been moved into the common
drivers/fsl_pci_init.c.  In a subsequent patch, this will be
utilized by the 85xx ports as well.

Common PCI-E IMMAP register blocks for FSL 85xx/86xx are added.

Also enable the second PCI-Express controller on 8641
by getting its BATS and CFG_ setup right.

Fixed a u16 vendor compiler warning in AHCI driver too.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-08-06 00:22:24 +02:00
Stefan Roese
b5dc4403f6 Merge with git://www.denx.de/git/u-boot.git 2007-08-02 08:43:48 +02:00
Rafal Jaworowski
8993e54b6f [ADS5121] Support for the ADS5121 board
The following MPC5121e subsystems are supported:

- low-level CPU init
- NOR Boot Flash (common CFI driver)
- DDR SDRAM
- FEC
- I2C
- Watchdog

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Signed-off-by: Jan Wrobel <wrr@semihalf.com>
2007-07-27 14:43:59 +02:00
Rafal Jaworowski
1863cfb7b1 [PPC] Remove unused MSR_USER definition
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
2007-07-27 14:22:04 +02:00
Rafal Jaworowski
cc3023b9f9 Fix breakage of 8xx boards from recent commit.
This patch fixes the negative consequences for 8xx of the recent
"ppc4xx: Clean up 440 exceptions handling" commit.

Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
2007-07-19 17:12:28 +02:00
Stefan Roese
5743a9207a ppc4xx: Add remove_tlb() function to remove a mem area from TLB setup
The new function remove_tlb() can be used to remove the TLB's used to
map a specific memory region. This is especially useful for the DDR(2)
setup routines which configure the SDRAM area temporarily as a cached
area (for speedup on auto-calibration and ECC generation) and later
need this area uncached for normal usage.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-07-16 08:53:51 +02:00
Andy Fleming
982efcf23f From: eran liberty <eran.liberty@gmail.com>
adds the reset register to 85xx immap

Signed-off-by: Eran Liberty <eran.liberty@gmail.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-07-11 18:19:07 -05:00
Wolfgang Denk
1636d1c852 Coding stylke cleanup; rebuild CHANGELOG 2007-06-22 23:59:00 +02:00
Stefan Roese
b7c3e93105 Merge with /home/stefan/git/u-boot/denx-440-exceptions 2007-06-15 11:20:13 +02:00
Grzegorz Bernacki
efa35cf12d ppc4xx: Clean up 440 exceptions handling
- Introduced dedicated switches for building 440 and 405 images required
  for 440-specific machine instructions like 'rfmci' etc.

- Exception vectors moved to the proper location (_start moved away from
  the critical exception handler space, which it occupied)

- CriticalInput now serviced (with default handler)

- MachineCheck properly serviced (added a dedicated handler and return
  subroutine)

- Overall cleanup of exceptions declared with STD_EXCEPTION macro (unused,
  unhandled and those not relevant for 4xx were eliminated)

- Eliminated Linux leftovers, removed dead code

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-15 11:19:28 +02:00
Stefan Roese
85f737376d [ppc4xx] Extend 44x GPIO setup with default output state
The board config array CFG_440_GPIO_TABLE for the ppc440 GPIO setup
is extended with the default GPIO output state (level).

Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-15 07:39:43 +02:00
Stefan Roese
f3679aa13d Merge with /home/stefan/git/u-boot/bamboo-nand 2007-06-01 16:15:34 +02:00
Stefan Roese
53ad02103f ppc4xx: Update in_be32() functions and friends to latest Linux version
Signed-off-by: Stefan Roese <sr@denx.de>
2007-06-01 15:16:58 +02:00
Wolfgang Denk
256176d3d5 Merge with /home/wd/git/u-boot/custodian/u-boot-mpc83xx 2007-05-16 01:12:04 +02:00
Grzegorz Wianecki
a9d87e2707 [PATCH] Use PVR to distinguish MPC5200B from MPC5200 in boot message
MPC5200B systems are incorrectly reported as MPC5200 in U-Boot start-up
message. Use PVR to distinguish between the two variants, and print proper CPU
information.

Signed-off-by: Grzegorz Wianecki <grzegorz.wianecki@gmail.com>
Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2007-05-05 21:35:03 +02:00
Andy Fleming
6743105988 Add support for the 8568 MDS board
This included some changes to common files:
* Add 8568 processor SVR to various places
* Add support for setting the qe bus-frequency value in the dts
* Add the 8568MDS target to the Makefile

Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-05-02 15:50:02 -05:00
Andy Fleming
81f481ca70 Enable 8544 support
* Add support to the Makefile
* Add 8544 configuration support to the tsec driver
* Add 8544 SVR numbers to processor.h

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-04-23 19:58:28 -05:00
Andy Fleming
45cef612cc Changed BOOKE_PAGESZ_nGB to BOOKE_PAGESZ_nG
The other pagesz constants use one letter to specify order of
magnitude.  Also change the one reference to it in mpc8548cds/init.S

Signed-off-by: Andy Fleming <afleming@freescale.com>
2007-04-23 19:58:28 -05:00
Zang Roy-r61911
41fb7e0f1e u-boot: Enable PCI function and add PEX & rapidio memory map on MPC8548CDS board
Enable PCI function and add PEX & rapidio memory map on MPC8548CDS
board.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2007-04-23 19:58:27 -05:00
Scott Wood
0f253283a3 mpc83xx: Add 831x support to global_data.h
Signed-off-by: Scott Wood <scottwood@freescale.com>
2007-04-23 16:32:00 -05:00
Scott Wood
95e7ef897e mpc83xx: Change PVR_83xx to PVR_E300C1-3, and update checkcpu().
Rather than misleadingly define PVR_83xx as the specific type of 83xx
being built for, the PVR of each core revision is defined. checkcpu() now
prints the core that it detects, rather than aborting if it doesn't find
what it thinks it wants.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2007-04-23 16:31:59 -05:00
Scott Wood
d87c57b201 mpc83xx: Add register definitions for MPC831x.
Signed-off-by: Scott Wood <scottwood@freescale.com>
2007-04-23 16:31:59 -05:00
Wolfgang Denk
43f6226db0 Merge with /home/wd/git/u-boot/custodian/u-boot-74xx-7xx 2007-04-18 17:00:09 +02:00
Stefan Roese
0e7d4916af Merge with git://www.denx.de/git/u-boot.git 2007-03-31 13:44:12 +02:00
Wolfgang Denk
6db7d0af23 Merge with /home/wd/git/u-boot/custodian/u-boot-mpc86xx 2007-03-29 12:16:41 +02:00
Stefan Roese
e50b791b3f Merge with /home/stefan/git/u-boot/acadia 2007-03-24 15:59:23 +01:00
Stefan Roese
0d974d5297 [PATCH] Add 4xx GPIO functions
This patch adds some 4xx GPIO functions. It also moves some of the
common code and defines into a common 4xx GPIO header file.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-24 15:57:09 +01:00
Haiying Wang
9964a4dd0d Set Rev 2.x 86xx PIC in mixed mode.
Prevent false interrupt from hanging Linux as MSR[EE] is set
to enable interrupts by changing the PIC out of the default
pass through mode into mixed mode.

Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
2007-03-22 11:02:35 -05:00
Stefan Roese
fc1e45ce6e Merge with /home/stefan/git/u-boot/acadia 2007-03-21 14:38:25 +01:00
Stefan Roese
e01bd218b0 [PATCH] Add AMCC PPC405EZ support
This patch adds support for the new AMCC 405EZ PPC. It is in
preparation for the AMCC Acadia board support.

Please note that this Acadia/405EZ support is still in a beta stage.
Still lot's of cleanup needed but we need a preliminary release now.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-03-21 13:38:59 +01:00
Kumar Gala
3e78a31cfe mpc83xx: Replace CONFIG_MPC8349 and use CONFIG_MPC834X instead
The code that is ifdef'd with CONFIG_MPC8349 is actually applicable to all
MPC834X class processors.  Change the protections from CONFIG_MPC8349 to
CONFIG_MPC834X so they are more generic.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-03-02 11:05:53 -06:00
Dave Liu
24c3aca3f1 mpc83xx: Add support for the MPC832XEMDS board
This patch supports DUART, ETH3/4 and PCI etc.

Signed-off-by: Dave Liu <daveliu@freescale.com>
2007-03-02 11:05:53 -06:00
Dave Liu
e080313c32 mpc83xx: streamline the 83xx immr head file
For better format and style, I streamlined the 83xx head files,
including immap_83xx.h and mpc83xx.h. In the old head files, 1)
duplicated macro definition appear in the both files; 2) the structure
of QE immr is duplicated in the immap_83xx.h and immap_qe.h; 3) The
macro definition put inside the each structure. So, I cleaned up the
structure of QE immr from immap_83xx.h, deleted the duplicated stuff and
moved the macro definition to mpc83xx.h, Just like MPC8260.

CHANGELOG

*streamline the 83xx immr head file

Signed-off-by: Dave Liu <daveliu@freescale.com>
2007-03-02 11:05:53 -06:00
roy zang
00b574bdc8 Merge branch 'master' into hpc2
Conflicts:

	drivers/Makefile
Fix the merge conflict in file drivers/Makefile
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2007-02-28 16:46:48 +08:00
Haiying Wang
3a197b2fe4 [PATCH v3] Add sync to ensure flash_write_cmd is fully finished
Some CPUs like PPC, BLACKFIN need sync() to ensure cfi flash write command
is fully finished. The sync() is defined in each CPU's io.h file. For
those CPUs which do not need sync for now, a dummy sync() is defined in
their io.h as well.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2007-02-21 16:52:31 +01:00
Stefan Roese
4037ed3b63 [PATCH] PPC4xx: Add 440SP(e) DDR2 SPD DIMM support
This patch adds support for the DDR2 controller used on the
440SP and 440SPe. It is tested on the Katmai (440SPe) eval
board and works fine with the following DIMM modules:

- Corsair CM2X512-5400C4 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5/512 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5K2/2G (1GByte per DIMM)

This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-02-20 10:43:34 +01:00
roy zang
30bddf2c46 Merge branch 'master' into hpc2 2007-02-12 11:24:27 +08:00
Stefan Roese
2902fadade [PATCH] Update 440EPx/440GRx cpu detection
Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-31 16:56:10 +01:00
roy zang
ee460917af Merge branch 'master' into hpc2
Conflicts:

	drivers/cfi_flash.c

The patch by Heiko Schocher <hs@pollux.denx.de> on Jan, 19, 2007
fixes cfi_driver bug for mpc7448hpc2 board. The default cfi_driver can support
mpc7448hpc2 board.
2007-01-22 13:15:35 +08:00
Stefan Roese
95981778cf [PATCH] Update 440SP(e) cpu revisions
Also display enabled/disabled RAID 6 support for 440SP/440SPe PPC's.

Signed-off-by: Stefan Roese <sr@denx.de>
2007-01-13 08:01:03 +01:00
roy zang
e0b369e4f7 Fix the confilcts when merging 'master' into hpc2.
The conflicts due to a new mpc7448 p3m7448 board is in the main tree.

Merge branch 'master' into hpc2

Conflicts:

	MAKEALL
	cpu/74xx_7xx/cpu.c
	cpu/74xx_7xx/cpu_init.c
	cpu/74xx_7xx/speed.c
2006-12-01 12:09:33 +08:00
Wolfgang Denk
dd520bf314 Code cleanup. 2006-11-30 18:02:20 +01:00
Wolfgang Denk
ab07b6c221 Merge with http://opensource.freescale.com/pub/scm/u-boot-83xx.git 2006-11-30 02:01:32 +01:00
Joakim Tjernlund
1939d96944 Make fsl-i2c not conflict with SOFT I2C
Signed-off-by: Timur Tabi <timur@freescale.com>
2006-11-29 00:25:26 -06:00
Stefan Roese
e732faec95 [PATCH] PPC4xx: 440SP Rev. C detection added
Signed-off-by: Stefan Roese <sr@denx.de>
2006-11-28 16:09:24 +01:00
Timur Tabi
be5e61815d mpc83xx: Update 83xx to use fsl_i2c.c
Update the 83xx tree to use I2C support in drivers/fsl_i2c.c.  Delete
cpu/mpc83xx/i2c.c, include/asm-ppc/i2c.h, and all references to those files.
Added multiple I2C bus support to fsl_i2c.c.

Signed-off-by: Timur Tabi <timur@freescale.com>
2006-11-03 19:42:23 -06:00
Timur Tabi
d239d74b1c mpc83xx: Replace CFG_IMMRBAR with CFG_IMMR
Replace all instances of CFG_IMMRBAR with CFG_IMMR, so that the 83xx
tree matches the other 8xxx trees.

Signed-off-by: Timur Tabi <timur@freescale.com>
2006-11-03 19:42:23 -06:00
Timur Tabi
9ca880a250 mpc83xx: Fix dual I2C support for the MPC8349ITX, MPC8349EMDS, TQM834x, and MPC8360EMDS
This patch also adds an improved I2C set_speed(), which handles all clock
frequencies.

Signed-off-by: Timur Tabi <timur@freescale.com>
2006-11-03 19:42:22 -06:00
Dave Liu
7737d5c658 mpc83xx: add QE ethernet support
this patch adds support for the QUICC Engine based UCC gigabit ethernet device.
2006-11-03 19:42:21 -06:00
Dave Liu
5f8204394e mpc83xx: Add MPC8360EMDS basic board support
Add support for the Freescale MPC8360EMDS board.
Includes DDR, DUART, Local Bus, PCI.
2006-11-03 19:42:21 -06:00
Dave Liu
23892e4935 mpc83xx: add the QUICC Engine (QE) immap file
common QE immap file.  Also required for 8360.
2006-11-03 19:42:20 -06:00
Dave Liu
b701652a49 mpc83xx: Add 8360 specifics to 83xx immap
Mainly add QE device dependencies, with appropriate 8360 protection.
Lindent also run.
2006-11-03 19:42:20 -06:00
Timur Tabi
2ad6b513b3 mpc83xx: Add support for the MPC8349E-mITX
PREREQUISITE PATCHES:

* This patch can only be applied after the following patches have been applied:

  1) DNX#2006090742000024 "Add support for multiple I2C buses"
  2) DNX#2006090742000033 "Multi-bus I2C implementation of MPC834x"
  3) DNX#2006091242000041 "Additional MPC8349 support for multibus i2c"
  4) DNX#2006091242000078 "Add support for variable flash memory sizes on 83xx systems"
  5) DNX#2006091242000069 "Add support for Errata DDR6 on MPC 834x systems"

CHANGELOG:

* Add support for the Freescale MPC8349E-mITX reference design platform.
  The second TSEC (Vitesse 7385 switch) is not supported at this time.

Signed-off-by: Timur Tabi <timur@freescale.com>
2006-11-03 19:42:20 -06:00
Ben Warren
b24f119d67 Multi-bus I2C implementation of MPC834x
Hello,

Attached is a patch implementing multiple I2C buses on the MPC834x CPU
family and the MPC8349EMDS board in particular.
This patch requires Patch 1 (Add support for multiple I2C buses).
Testing was performed on a 533MHz board.

/*** Note: This patch replaces ticket DNX#2006083042000027 ***/

Signed-off-by: Ben Warren <bwarren@qstreams.com>

CHANGELOG:
        Implemented driver-level code to support two I2C buses on the
MPC834x CPU family and the MPC8349EMDS board.  Available I2C bus speeds
are 50kHz, 100kHz and 400kHz on each bus.

regards,
Ben
2006-11-03 19:42:19 -06:00
Dave Liu
f6eda7f80c mpc83xx: Changed to unified mpx83xx names and added common 83xx changes
Incorporated the common unified variable names and the changes in preparation
for releasing mpc8360 patches.

Signed-off-by: Dave Liu <daveliu@freescale.com>
2006-11-03 19:42:18 -06:00
roy zang
4c52783b3d General code modification for mpc7448hpc2 board support.
1. Add 7447A and 7448 processor support.
2. Add the following flags.

CFG_CONFIG_BUS_CLK : If the 74xx bus frequency can be configured dynamically
(such as by switch on board), this flag should be set.

CFG_EXCEPTION_AFTER_RELOCATE: If an exception occurs after the u-boot
relocates to RAM, this flag should be set.

CFG_SERIAL_HANG_IN_EXCEPTION: If the print out function will cause the
system hang in exception, this flag should be set.

There is a design issue for tsi108/109 pci configure  read. When pci scan
the slots, if there is no pci card, the tsi108/9 will cause a machine
check exception for mpc7448 processor.

Signed-off-by: Alexandre Bounine <alexandreb@tundra.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2006-11-02 18:49:51 +08:00
Jon Loeliger
3dfa9cfdce Use generic I2C register block on 85xx and 86xx.
Replace private IMMAP I2C structures with generic reg block
and allow 86xx to have multiple I2C device busses.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-10-20 17:16:35 -05:00
Jon Loeliger
7237c033b0 Moved i2c driver out of cpu/mpc86xx/i2c.c into drivers/fsl_i2c.c
in an effort to begin to unify the umpteen FSL I2C drivers that
are all otherwise very similar.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-10-19 11:34:11 -05:00
Jon Loeliger
5f3249a0a1 Fixed leading whitespace issues.
Removed spurious LAWAR thing.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-10-13 16:47:53 -05:00
Jon Loeliger
8b283dbb3a Fix whitespace issues. 2006-10-10 17:16:04 -05:00
Jon Loeliger
afa98843e4 Merge branch 'master' of http://www.denx.de/git/u-boot
Conflicts:

	board/stxxtc/Makefile
2006-09-19 08:51:24 -05:00
Jon Loeliger
b440d0ef72 Merge branch 'mpc86xx' 2006-09-14 08:41:07 -05:00
Jon Loeliger
d14ba6a798 Handle 86xx SVR values according to the new Reference Manual.
Both 8641 and 8641D have SVR == 0x8090, and are distinguished
by the byte in bits 16-23 instead.
Thanks to Jason Jin for noticing.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2006-09-14 08:40:36 -05:00
Stefan Roese
887e2ec9ec Add support for AMCC Sequoia PPC440EPx eval board
- Add support for PPC440EPx & PPC440GRx
- Add support for PPC440EP(x)/GR(x) NAND controller
  in cpu/ppc4xx directory
- Add NAND boot functionality for Sequoia board,
  please see doc/README.nand-boot-ppc440 for details
- This Sequoia NAND image doesn't support environment
  in NAND for now. This will be added in a short while.
Patch by Stefan Roese, 07 Sep 2006
2006-09-07 11:51:23 +02:00
Jon Loeliger
e80e82cbb9 Merge branch 'mpc86xx' 2006-08-22 18:07:57 -05:00
Jon Loeliger
ae6241685c Cleanup more poorly introduced whitespace. 2006-08-22 18:07:00 -05:00
Jon Loeliger
38546f08c6 Merge branch 'mpc86xx' 2006-08-22 17:55:45 -05:00
Jon Loeliger
2c33e8a1c5 Cleanup poorly introduced whitespace. 2006-08-22 17:54:05 -05:00
Jon Loeliger
92c427b189 Merge branch 'mpc85xx'
Conflicts:

	include/ft_build.h
	include/pci.h

Resolved, though.
2006-08-09 14:41:17 -05:00
Matthew McClintock
97074ed965 * Added support for initializing second PCI bus on 85xx Patch by Andy Fleming 17-Mar-2006
Signed-off-by: Andy Fleming <afleming@freescale.com>
2006-08-09 13:50:44 -05:00
Jon Loeliger
281f69ede2 Merge branch 'wd' 2006-08-09 13:36:54 -05:00
Marian Balakowicz
fe84b48a94 Cleanup config file and bootup output for Yucca board. 2006-07-03 23:42:36 +02:00
Marian Balakowicz
f6e5739a68 Merge: Add support for AMCC 440SPe CPU based eval board (Yucca). 2006-06-30 18:19:42 +02:00
Marian Balakowicz
6c5879f380 Add support for AMCC 440SPe CPU based eval board (Yucca). 2006-06-30 16:30:46 +02:00
Jon Loeliger
894b773c86 Merge branch 'mpc86xx' 2006-06-27 11:08:17 -05:00
Jin Zhengxiong-R64188
fa7db9c377 Enable PCIE1 for MPC8641HPCN board
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2006-06-27 09:17:59 -05:00
Jon Loeliger
a941b83241 Merge branch 'mpc86xx' 2006-06-07 08:49:46 -05:00
Jon Loeliger
72ed528a94 Merge branch 'master' of http://www.denx.de/git/u-boot 2006-06-07 08:49:38 -05:00
Jon Loeliger
586d1d5abd Update 86xx address map and LAWBARs. 2006-05-19 13:54:02 -05:00
Stefan Roese
512f8d5d78 Add support for AMCC 440EP Rev C and 440GR Rev B
Patch by John Otken, 08 May 2006
2006-05-10 14:10:41 +02:00
Jon Loeliger
a67255363a Merge branch 'mpc86xx' 2006-05-09 08:33:11 -05:00
Jon Loeliger
debb7354d1 Initial support for MPC8641 HPCN board. 2006-04-26 17:58:56 -05:00
Kumar Gala
8fe9bf61ef Merged MPC8349ADS and MPC8349EMDS ports into MPC8349EMDS port:
- Removed MPC8349ADS port
  - Added PCI support to MPC8349ADS
  - reworked memory map to allow mapping of all regions with BATs
  Patch by Kumar Gala 20 Apr 2006

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2006-04-20 13:45:32 -05:00
Marian Balakowicz
97f98001a3 Fix DDR ECC bit definitions for MPC83xx. 2006-03-16 14:35:32 +01:00
Marian Balakowicz
61f25155ac Add DMA support for MPC83xx. 2006-03-14 16:14:48 +01:00
Marian Balakowicz
e24e0f0744 Add bit definitions for MPC83xx DDR controller registers. 2006-03-14 16:03:46 +01:00
Wolfgang Denk
8123eee875 Add CPM2 I/O pin functions for MPC85xx processors
Patch by Murray Jensen, 08 Jul 2005
2006-03-12 22:41:33 +01:00
Wolfgang Denk
47705af5da Merge with git://git.kernel.org/pub/scm/boot/u-boot/u-boot.git#mpc8349ads 2006-03-12 21:49:19 +01:00
Kumar Gala
b970480948 Fixed defines for MPC83xx SICRL register to match current specs
Patch by Kumar Gala, 23 Jan 2006
2006-01-23 16:22:57 -06:00
Kumar Gala
86902b8e36 Added PCI support for MPC8349ADS board
Patch by Kumar Gala 11 Jan 2006
2006-01-12 19:51:38 -06:00
Wolfgang Denk
a889bd27ef Fix DPRAM offset/size for MPC8541/8555.
Simplify TQM85xx Makefile handling.
2005-12-06 15:02:31 +01:00
Stefan Roese
6e7fb6eaa5 Add support for AMCC 440SP, add support for AMCC Luan 440SP eval board.
Patch by John Otken, 23 Nov 2005
2005-11-29 18:18:21 +01:00
Wolfgang Denk
f08abe311b Remove unnnecessary #include <linux/types.h> from include/asm-*/u-boot.h 2005-11-25 16:38:03 +01:00
Stefan Roese
182e10691f Correct PPC Timebase register definitions (SPRN_TBRL...)
Patch by Stefan Roese, 07 Nov 2005
2005-11-07 09:57:57 +01:00
Stefan Roese
57275b69c6 Add support for Ocotea pass 3 with 440GX Rev. F
Patch by Stefan Roese, 01 Nov 2005
2005-11-01 10:08:03 +01:00
Rafal Jaworowski
6902df56a0 Add PCI support for the TQM834x board. 2005-10-17 02:39:53 +02:00
Wolfgang Denk
84bd92bdda Merge with /home/m8/git/u-boot 2005-10-15 18:23:43 +02:00
Wolfgang Denk
77ddac9480 Cleanup for GCC-4.x 2005-10-13 16:45:02 +02:00
Marian Balakowicz
e6f2e90233 Added support for TQM834x boards. 2005-10-11 19:09:42 +02:00
Stefan Roese
9a8d82fd3c Fix 440GR to print correct cpu revision
Patch by Stefan Roese, 4 Oct 2005
2005-10-04 15:00:30 +02:00
Wolfgang Denk
e6f222815c Add iopset command on mpc8xx
Patch by Daniel Eisenhut, 25 Mar 2005
2005-09-26 00:44:15 +02:00
Wolfgang Denk
0c8721a466 Cleanup (PPC4xx is AMCC now) 2005-09-23 11:05:55 +02:00
Stefan Roese
d6c61aabc4 Merged 405gp_enet.c and 440gx_enet.c to generic 4xx_enet.c
now handling all 4xx cpu's.
Patch by Stefan Roese, 16 Aug 2005
2005-08-16 18:18:00 +02:00
Stefan Roese
846b0dd2dc Changed CONFIG_440_xx to CONFIG_440xx for a consistent design (405 and linux)
Patch by Stefan Roese, 08 Aug 2005
2005-08-08 12:42:22 +02:00
Jon Loeliger
4b1d95d96a Merge with rsync://git-user@source.denx.net/git/u-boot.git 2005-08-02 13:53:07 -05:00
Jon Loeliger
de1d0a6995 Fix style issues primarily in 85xx and 83xx boards.
- C++ comments
    - Trailing white space
    - Indentation not by TAB
    - Excessive amount of empty lines
    - Trailing empty lines
2005-08-01 13:20:47 -05:00
Stefan Roese
c157d8e219 Add support for AMCC PPC440EP/GR eval boards Yosemite and Yellowstone.
Patch by Steven Blakeslee, 27 Jul 2005
2005-08-01 16:41:48 +02:00
Eran Liberty
f046ccd15c * Patch by Eran Liberty
Add support for the Freescale MPC8349ADS board.
2005-07-28 10:08:46 -05:00
Jon Loeliger
d9b94f28a4 * Patch by Jon Loeliger, 2005-05-05
Implemented support for MPC8548CDS board.
  Added DDR II support based on SPD values for MPC85xx boards.
  This roll-up patch also includes bugfies for the previously
  published patches:
    DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
2005-07-25 14:05:07 -05:00
Jon Loeliger
9c4c5ae3e1 * Patch by Jon Loeliger, Kumar Gala 2005-02-08
- Convert the CPM2 based functionality to use new CONFIG_CPM2
    option rather than a myriad of CONFIG_MPC8560-like variants.
    Applies to MPC85xx and MPC8260 boards, includes stxgp3 and sbc8560.
    Eliminates the CONFIG_MPC8560 option entirely.  Distributes the
    new CONFIG_CPM2 option to each 8260 board.
2005-07-23 10:37:35 -05:00
wdenk
343117bf12 Fix timer handling on MPC85xx systems 2005-05-13 22:49:36 +00:00
stroese
0a7c5391a0 Add PPC440GX Revision C 2005-04-07 05:33:41 +00:00
wdenk
756f586a73 * Patch by Yusdi Santoso, 22 Oct 2004:
- Add support for HIDDEN_DRAGON board
  - fix endianess problem in driver/rtl1839.c

* Patch by Allen Curtis, 21 Oct 2004:
  support multiple serial ports
2005-04-03 15:51:42 +00:00
wdenk
e2ffd59b4d * Code cleanup, mostly for GCC-3.3.x
* Cleanup confusing use of CONFIG_ETH*ADDR - ust his only to
  pre-define a MAC address; use CONFIG_HAS_ETH* to enable support for
  additional ethernet addresses.

* Cleanup drivers/i82365.c - avoid duplication of code

* Fix bogus "cannot span across banks" flash error message

* Add support for CompactFlash for the CPC45 Board.
2004-12-31 09:32:47 +00:00
wdenk
983fda8391 Patch by TsiChung Liew, 23 Sep 2004:
- add support for MPC8220 CPU
- Add support for Alaska and Yukon boards
2004-10-28 00:09:35 +00:00
wdenk
e1599e83d6 * Patch by Gridish Shlomi, 30 Aug 2004:
- Add support to revA version of PQ27 and PQ27E.
  - Reverted MPC8260ADS baudrate back to original 115200

* Patch by Hojin, 17 Sep 2004:
  Fix typo in cfi_flash.c

* Patch by Mark Jonas, 09 September 2004:
  mtest's data line test (with CFG_ALT_MEMTEST set) returned a wrong
  error message

* Patch by Mark Jonas, 31 August 2004:
  Added option CFG_XLB_PIPELINING to enable XLB pipelining. This
  improves FTP performance for MPC5200 systems. Enabled for IceCube
  by default.
2004-10-10 23:27:33 +00:00