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https://github.com/AsahiLinux/u-boot
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mpc83xx: Replace CONFIG_MPC8349 and use CONFIG_MPC834X instead
The code that is ifdef'd with CONFIG_MPC8349 is actually applicable to all MPC834X class processors. Change the protections from CONFIG_MPC8349 to CONFIG_MPC834X so they are more generic. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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parent
ae246dc6c1
commit
3e78a31cfe
5 changed files with 15 additions and 15 deletions
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@ -113,7 +113,7 @@ int checkcpu(void)
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return -1; /* Not sure what this is */
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}
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#if defined(CONFIG_MPC8349)
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#if defined(CONFIG_MPC834X)
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printf("Rev: %02x at %s MHz\n", (spridr & 0x0000FFFF)>>4 |(spridr & 0x0000000F), strmhz(buf, clock));
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#else
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printf("Rev: %02x at %s MHz\n", spridr & 0x0000FFFF, strmhz(buf, clock));
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@ -99,7 +99,7 @@ int get_clocks(void)
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u32 lcrr;
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u32 csb_clk;
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#if defined(CONFIG_MPC8349)
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#if defined(CONFIG_MPC834X)
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u32 tsec1_clk;
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u32 tsec2_clk;
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u32 usbmph_clk;
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@ -148,7 +148,7 @@ int get_clocks(void)
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sccr = im->clk.sccr;
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#if defined(CONFIG_MPC8349)
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#if defined(CONFIG_MPC834X)
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switch ((sccr & SCCR_TSEC1CM) >> SCCR_TSEC1CM_SHIFT) {
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case 0:
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tsec1_clk = 0;
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@ -314,7 +314,7 @@ int get_clocks(void)
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#endif
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gd->csb_clk = csb_clk;
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#if defined(CONFIG_MPC8349)
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#if defined(CONFIG_MPC834X)
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gd->tsec1_clk = tsec1_clk;
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gd->tsec2_clk = tsec2_clk;
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gd->usbmph_clk = usbmph_clk;
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@ -371,7 +371,7 @@ int print_clock_conf(void)
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#if !defined(CONFIG_MPC832X)
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printf(" I2C2: %4d MHz\n", gd->i2c2_clk / 1000000);
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#endif
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#if defined(CONFIG_MPC8349)
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#if defined(CONFIG_MPC834X)
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printf(" TSEC1: %4d MHz\n", gd->tsec1_clk / 1000000);
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printf(" TSEC2: %4d MHz\n", gd->tsec2_clk / 1000000);
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printf(" USB MPH: %4d MHz\n", gd->usbmph_clk / 1000000);
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@ -52,12 +52,12 @@ typedef struct global_data {
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#if defined(CONFIG_MPC83XX)
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/* There are other clocks in the MPC83XX */
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u32 csb_clk;
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#if defined (CONFIG_MPC8349)
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#if defined (CONFIG_MPC834X)
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u32 tsec1_clk;
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u32 tsec2_clk;
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u32 usbmph_clk;
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u32 usbdr_clk;
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#endif /* CONFIG_MPC8349 */
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#endif /* CONFIG_MPC834X */
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u32 core_clk;
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u32 i2c1_clk;
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u32 i2c2_clk;
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@ -544,7 +544,7 @@ typedef struct security83xx {
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u8 fixme[0x10000];
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} security83xx_t;
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#if defined(CONFIG_MPC8349)
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#if defined(CONFIG_MPC834X)
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typedef struct immap {
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sysconf83xx_t sysconf; /* System configuration */
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wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */
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@ -96,7 +96,7 @@
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#define SPCR_COREPR 0x00300000 /* E300 PowerPC Core system bus request priority */
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#define SPCR_COREPR_SHIFT (31-11)
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#if defined(CONFIG_MPC8349)
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#if defined(CONFIG_MPC834X)
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/* SPCR bits - MPC8349 specific */
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#define SPCR_TSEC1DP 0x00003000 /* TSEC1 data priority */
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#define SPCR_TSEC1DP_SHIFT (31-19)
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@ -114,7 +114,7 @@
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/* SICRL/H - System I/O Configuration Register Low/High
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*/
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#if defined(CONFIG_MPC8349)
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#if defined(CONFIG_MPC834X)
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/* SICRL bits - MPC8349 specific */
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#define SICRL_LDP_A 0x80000000
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#define SICRL_USB1 0x40000000
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@ -340,7 +340,7 @@
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#define HRCWH_PCI_HOST_SHIFT 31
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#define HRCWH_PCI_AGENT 0x00000000
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#if defined(CONFIG_MPC8349)
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#if defined(CONFIG_MPC834X)
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#define HRCWH_32_BIT_PCI 0x00000000
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#define HRCWH_64_BIT_PCI 0x40000000
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#endif
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@ -351,7 +351,7 @@
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#define HRCWH_PCI_ARBITER_DISABLE 0x00000000
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#define HRCWH_PCI_ARBITER_ENABLE 0x20000000
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#if defined(CONFIG_MPC8349)
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#if defined(CONFIG_MPC834X)
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#define HRCWH_PCI2_ARBITER_DISABLE 0x00000000
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#define HRCWH_PCI2_ARBITER_ENABLE 0x10000000
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@ -375,14 +375,14 @@
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#define HRCWH_ROM_LOC_DDR_SDRAM 0x00000000
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#define HRCWH_ROM_LOC_PCI1 0x00100000
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#if defined(CONFIG_MPC8349)
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#if defined(CONFIG_MPC834X)
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#define HRCWH_ROM_LOC_PCI2 0x00200000
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#endif
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#define HRCWH_ROM_LOC_LOCAL_8BIT 0x00500000
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#define HRCWH_ROM_LOC_LOCAL_16BIT 0x00600000
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#define HRCWH_ROM_LOC_LOCAL_32BIT 0x00700000
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#if defined(CONFIG_MPC8349)
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#if defined(CONFIG_MPC834X)
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#define HRCWH_TSEC1M_IN_RGMII 0x00000000
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#define HRCWH_TSEC1M_IN_RTBI 0x00004000
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#define HRCWH_TSEC1M_IN_GMII 0x00008000
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@ -742,7 +742,7 @@
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#define BR_V 0x00000001
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#define BR_V_SHIFT 0
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#if defined(CONFIG_MPC8349)
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#if defined(CONFIG_MPC834X)
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#define BR_RES ~(BR_BA | BR_PS | BR_DECC | BR_WP | BR_MSEL | BR_V)
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#elif defined(CONFIG_MPC8360)
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#define BR_RES ~(BR_BA | BR_PS | BR_DECC | BR_WP | BR_MSEL | BR_ATOM | BR_V)
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