Commit graph

3979 commits

Author SHA1 Message Date
Teresa Remmet
6bd1db0a0c arm: dts: imx8mp: Resync imx8mp device tree include
Sync imx8mp include with kernel commit:
d1689cd3c0f4 ("arm64: dts: imx8mp: Use the correct name for child node "snps, dwc3"")

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-10 16:53:34 +02:00
Yu-Tung Chang
2527b24f39 sunxi: h3: Add initial ZeroPi support
ZeroPi is a new board of high performance with low cost
designed by FriendlyElec., using the Allwinner H3 SOC.

ZeroPi features
- Allwinner H3, Quad-core Cortex-A7@1.2GHz
- 256MB/512MB DDR3 RAM
- microsd slot
- 10/100/1000Mbps Ethernet
- Debug Serial Port
- DC 5V/2A power-supply

Signed-off-by: Yu-Tung Chang <mtwget@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-07-10 01:22:09 +01:00
Andre Przywara
8fcf1fa246 arm: dts: sunxi: h3: Update DT files
Update the H3 DT files from the Linux 5.12 release.

The changes update some boards, and don't affect U-Boot, but fix Gigabit
Ethernet when this DT is passed on to the Linux kernel.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-07-10 01:22:09 +01:00
Andre Przywara
58f68611df arm: dts: sunxi: h5: Update DT files
Update the H5 DT files from the Linux 5.12 release.

The changes don't affect U-Boot at all, but fix Gigabit Ethernet when
this DT is passed on to the Linux kernel. It also introduces DVFS.

This also updates the shared sunxi-h3-h5.dtsi, but that only adds nodes
that are of no concern to U-Boot.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-07-10 01:22:09 +01:00
Andre Przywara
127e57c671 arm: dts: sunxi: h6: Update DT files
Update the H6 DT files from the Linux 5.12 release.

The changes are minimal (many LED node renames), but also help to enable
USB port 0 in U-Boot (later), enable the RSB device (not yet used in
U-Boot), and also introduce an MMC frequency limit.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-07-10 01:22:09 +01:00
Tom Rini
008604c3b8 First set of u-boot-atmel fixes for 2021.10 cycle
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Merge tag 'u-boot-atmel-fixes-2021.10-a' of https://source.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel fixes for 2021.10 cycle:

This small fixes set is dedicated to fixing the onewire subsystem for
the at91 boards which was broken since 2020.04.
2021-07-07 08:52:14 -04:00
Tom Rini
5617efd2c8 Merge branch '2021-07-06-platform-updates'
- mpc8379erdb DM_USB, DM_PCI and DM_ETH support.
- Drop PCI support from the integrator family of boards
- Add synquacer support
- Assorted lpc32xx updates and improvements
- snapdragon (and related) fixes, Broadcom iproc update
2021-07-06 18:10:10 -04:00
Stephan Gerhold
698c1df4d1 arm: dts: db410c: Add missing cd-gpios for SD card detection
It looks like SD card detection is broken at the moment for DB410c.
The eMMC is detected correctly, but the SD card is not.

This is probably similar to the issue fixed in commit 8505147403
("mmc: msm_sdhci: Use mmc_of_parse for setting host_caps") for eMMC,
except that the SD card does not have a property like "non-removable"
that skips the card detection.

The SDHCI on DB410c cannot detect itself if a SD card is inserted,
so add the necessary cd-gpios to make SD card detection work again.

While at it, fix the #gpio-cells for the soc_gpios to avoid DTC
warnings - the soc_gpios are actually already used with two cells
for the gpio-leds so this was just wrong all the time.

Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-06 14:12:15 -04:00
Trevor Woerner
faf78fd464 arm: lpc32xx: add EA LPC3250 DevKitv2 board support
Add basic support for running U-Boot on the Embedded Artists LPC3250
Developer's Kit v2 board by launching U-Boot from the board's s1l loader
(which comes pre-installed on the board).

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2021-07-06 14:12:14 -04:00
Trevor Woerner
eb5807e68f lpc32xx: import device tree from Linux
Import the dtsi, dts, and clock binding files for the lpc32xx ea3250 board
directly and unmodified from the latest Linux kernel.

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2021-07-06 14:11:50 -04:00
Masami Hiramatsu
2f1f797efa ARM: dts: synquacer: Add device trees for DeveloperBox
Add device trees for 96boards EE DeveloperBox and basement SynQuacer
SoC dtsi. These files are imported from EDK2

commit 83d38b0b4c0f240d4488c600bbe87cea391f3922

as-is (except for the changes #include path and some macros).

And add U-Boot specific changes in synquacer-sc2a11-developerbox-u-boot.dtsi

Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-07-06 14:11:49 -04:00
Eugen Hristev
89bd68a748 ARM: dts: at91: fix the GPIO polarity for onewire
The GPIO polarity for onewire must be GPIO_ACTIVE_HIGH.
On previous versions this used to work as it looks like the right flag values
are being passed since :
https://lists.denx.de/pipermail/u-boot/2020-April/407195.html

And that series broke the old functionality for onewire nodes.
Some boards had the correct value for the polarity, but it wasn't clear
so I replaced it with the right macro for the flag, instead of an empty value.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-07-06 15:17:10 +03:00
Michael Walle
515ed9df24 board: sl28: add DSA support for variant 2
Now that u-boot gained DSA support, and it is already enabled for the
kontron_sl28 board, add the last missing piece and enable the
corresponding devices it in the device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
2021-07-06 05:22:41 +03:00
Vladimir Oltean
bec7d5342d arm: dts: ls1028a: disable enetc-2 by default
The enetc-2 port is used as DSA master (connected back-to-back to
mscc_felix_port4). Since the convention is to not enable ports in the
common SoC dtsi unless they are used on the board, then enable enetc-2
only when mscc_felix_port4 itself is enabled.

All existing device trees appear to adhere to this rule, so disable
enetc-2 in the SoC dtsi.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-06 05:22:41 +03:00
Vladimir Oltean
9feb636680 arm: dts: ls1028a: declare the fixed-link speeds for the internal ENETC ports
To comply with the device tree bindings expectations for an Ethernet
controller, as well as to simplify the driver code, declare fixed-link
nodes for the internal ENETC ports (attached to the mscc_felix switch).

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-06 05:22:41 +03:00
Vladimir Oltean
aee4479a85 arm: dts: ls1028a: enable internal RGMII delays for the LS1028A-QDS AR8035 PHY
There are no PCB trace delays on this board, so the PHY needs to enable
its internal ones in order to have a proper electrical connection to the
enetc MAC.

Fixes: b32e9a7578 ("arm: dts: ls1028a updates for network interfaces")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-06 05:22:41 +03:00
Vladimir Oltean
39dca76c34 arm: dts: ls1028a: enable the switch CPU port for the LS1028A-QDS
Due to an upstream change, the ls1028a.dtsi bindings for the mscc_felix
switch got accepted with all ports disabled by default and with no link
to the DSA master - this needs to be done on a per board basis.

Note that enetc-2 is not currently disabled in the ls1028a.dtsi, but
presumably at some point it might become. Explicitly enable it in the
QDS device trees anyway, to proactively avoid issues when that happens.

Fixes: a7fdac7e2a ("arm: dts: ls1028a: define QDS networking protocol combinations")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-06 05:22:41 +03:00
Tom Rini
6b69f15fd6 Xilinx changes for v2021.10
clk:
 - Add driver for Xilinx Clocking Wizard IP
 
 fdt:
 - Also record architecture in /fit-images
 
 net:
 - Fix plat/priv data handling in axi emac
 - Add support for 10G/25G speeds
 
 pca953x:
 - Add missing dependency on i2c
 
 serial:
 - Fix dependencies for DEBUG uart for pl010/pl011
 - Add setconfig option for cadence serial driver
 
 watchdog:
 - Add cadence wdt expire now function
 
 zynq:
 - Update DT bindings to reflect the latest state and descriptions
 
 zynqmp:
 - Update DT bindings to reflect the latest state and descriptions
 - SPL: Add support for ECC DRAM initialization
 - Fix R5 core 1 handling logic
 - Enable firmware driver for mini configurations
 - Enable secure boot, regulators, wdt
 - Add support xck devices and 67dr
 - Add psu init for sm/smk-k26 SOMs
 - Add handling for MMC seq number via mmc_get_env_dev()
 - Handle reserved memory locations
 - Add support for u-boot.itb generation for secure OS
 - Handle BL32 handoffs for secure OS
 - Add support for 64bit addresses for u-boot.its generation
 - Change eeprom handling via nvmem aliases
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Merge tag 'xilinx-for-v2021.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next

Xilinx changes for v2021.10

clk:
- Add driver for Xilinx Clocking Wizard IP

fdt:
- Also record architecture in /fit-images

net:
- Fix plat/priv data handling in axi emac
- Add support for 10G/25G speeds

pca953x:
- Add missing dependency on i2c

serial:
- Fix dependencies for DEBUG uart for pl010/pl011
- Add setconfig option for cadence serial driver

watchdog:
- Add cadence wdt expire now function

zynq:
- Update DT bindings to reflect the latest state and descriptions

zynqmp:
- Update DT bindings to reflect the latest state and descriptions
- SPL: Add support for ECC DRAM initialization
- Fix R5 core 1 handling logic
- Enable firmware driver for mini configurations
- Enable secure boot, regulators, wdt
- Add support xck devices and 67dr
- Add psu init for sm/smk-k26 SOMs
- Add handling for MMC seq number via mmc_get_env_dev()
- Handle reserved memory locations
- Add support for u-boot.itb generation for secure OS
- Handle BL32 handoffs for secure OS
- Add support for 64bit addresses for u-boot.its generation
- Change eeprom handling via nvmem aliases
2021-07-01 08:57:23 -04:00
Tom Rini
8fba49bc8e Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-sh into next
- V3U Falcon board support
2021-06-28 18:32:07 -04:00
Tom Rini
6d0453d889 Prepare v2021.07-rc5
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Merge tag 'v2021.07-rc5' into next

Prepare v2021.07-rc5

# gpg: Signature made Mon 28 Jun 2021 03:39:36 PM EDT
# gpg:                using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]

# Conflicts:
#	configs/am64x_evm_r5_defconfig
2021-06-28 16:22:13 -04:00
Piyush Mehta
436978b1d8 arm64: dts: zynqmp: Add psgtr and phy entry for USB and SATA node
This patch adds psgtr clocks and phy entry for USB0, USB1 and SATA node for
zc1751-xm017-dc3 board.

Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-28 09:35:27 +02:00
Hai Pham
4cfdcf3948 ARM: renesas: Add R8A779A0 V3U Falcon board code
Add board code for the R8A779A0 V3U Falcon board.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
--
Marek: - various small rebase fixes and clean ups
2021-06-24 20:22:18 +02:00
Marek Vasut
ae3c0d42fa ARM: dts: renesas: Add RPC node to R8A779A0 V3U
The R-Car V3U does support RPC interface, however the support for it is
missing in upstream Linux DTs as of commit 9f4ad9e425a1 ("Linux 5.12"),
add the node into u-boot.dtsi to let U-Boot access the SPI NOR or HF.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-06-24 20:22:18 +02:00
Hai Pham
b35fc0dabd ARM: dts: renesas: Add R8A779A0 V3U DT extras
Add R8A779A0 V3U DT extras for U-Boot.

Based on "ARM: dts: renesas: Add R8A779A0 V3U DTs"
by Hai Pham <hai.pham.ud@renesas.com>

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-06-24 20:22:17 +02:00
Marek Vasut
6232d0a740 ARM: dts: renesas: Add R8A779A0 V3U Falcon DTs
Import R8A779A0 V3U Falcon DTs from Linux 5.12,
commit 9f4ad9e425a1 ("Linux 5.12") .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-06-24 20:22:17 +02:00
Marek Vasut
b6ec11b62d ARM: dts: renesas: Add R8A779A0 V3U DTs and headers
Import R8A779A0 V3U DTs and headers from Linux 5.12,
commit 9f4ad9e425a1 ("Linux 5.12") .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-06-24 20:22:17 +02:00
Michal Simek
3972ae65e4 arm64: zynqmp: Add missing year in Kria dts files
DT files have been added this year but forgot to update it that's why do it
in separate patch now.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:36 +02:00
Michal Simek
9899f3e6b9 arm64: zynqmp: Add psgtr description to zc1751 dc1 board
Wire psgtr for zc1751 dc1 board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:36 +02:00
Michal Simek
52caf2c12b arm64: zynqmp: Remove gpio from aliases list
It is not recommended to have aliases for gpio. In past it was used in
Linux for assigning numbers via sysfs which is deprecated and libgpiod
should be used instead.
In U-Boot this number is used for seq number but gpio offset are not
counted from this number. That's why having these aliases only for seq
number is not needed. As is done in Linux it is the best to use full gpio
name instead of sequence number which depends on sequence in binding.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:36 +02:00
Michal Simek
83dc13384b arm64: zynqmp: Enable USB3.0 for dc2/dc3
Both boards are usb3.0 capable. dc3 was also missing enabling dwc3* nodes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:36 +02:00
Michal Simek
cb4380abfd arm64: zynqmp: Update usb dwc3 DT description
Align USB nodes with the latest dt-bindings. It is adding resets, new
interrupt and also some quirks.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:36 +02:00
Michal Simek
b6d8d4b100 arm64: zynqmp: Use overlay sugar syntax for Kria SOM
dtc supports new sugar syntax which is easier compare to previous one
that's why also covert overlays for SOM to it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
3dbd53144c arm64: zynqmp: Remove revA compatibility string from kv260 revB/1
kv260-revB is different compare to revA (usbhub is wired via i2c) that's
why remove revA compatible string.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
6a2ce6ec24 arm64: zynqmp: Sync psgtr location on zcu104/zcu111/zc1751-dc1
psgtr node should be below pinctrl for easier comparion among dts files.
That's why move that nodes to different location.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
e0f99280ee arm64: zynqmp: Remove information about dma clock on zcu106
Clock setting is not static anymore that's why it depends on firmware setup
that's why remove this comment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
d245d0dfd8 arm64: zynqmp: Remove unused property from SD/USB
Linux kernel is not using these properties that's why they can be removed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
0c79419d35 arm64: zynqmp: Remove can aliases from zc1751
Networking subsystem is not using aliases that's why remove them for CAN
devices. There is also no any other Xilinx ZynqMP DT file with them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
43086886ad arm64: zynqmp: Remove si5328 and si5382 nodes
There are no drivers for these devices that's why remove that nodes
completely. This change is done based on Linux kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210308115437.2232847-1-quanyang.wang@windriver.com
2021-06-23 09:48:35 +02:00
Michal Simek
531abcb71e xilinx: Convert xlnx,eeprom property to nvmem alias
Convert all boards to use nvmem alias instead of xlnx,eeprom. The change is
done based on discussion in the link below.

Link: https://lore.kernel.org/r/CAL_JsqLMDqpkyg-Q7mUfw-XH67-v068Q6e9wTq2UOoN=0-_coQ@mail.gmail.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Srinivas Neeli
ee6b3c54e9 arm64: zynqmp: rtc: Update rtc calibration value
As per the design specification
"The 16-bit Seconds Calibration Value represents the number of
 Oscillator Ticks that are required to measure the largest time
 period that is less than or equal to 1 second.
 For an oscillator that is 32.768 KHz, this value will be 0x7FFF."

Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
5fa9672248 arm64: zynqmp: Sync psgtr location on zcu100/zcu106
psgtr node should be below pinctrl for easier comparion among dts files.
That's why move that nodes to different location.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
abd30371d3 arm64: zynqmp: Sync dp port location on zc1751 dc4
Historically dpdma and dpsub are placed at the end of files. Move nodes
there for easier comparison among dts files.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
af04516992 arm64: zynqmp: Remove unused dp_aclk clock
dp_aclk is not used anywhere that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
70fbcdb825 arm64: zynqmp: Remove addition newline from zc1751 dc1
Trivial patch.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
184309b8c6 arm64: zynqmp: Add maximum-speed property for dwc3 nodes
dwc3 can be used only for higher speeds than super-speed that's why
explicitly set it up.
This is also aligned with other ZynqMP dts files.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
7c3ad8f6a3 arm64: zynqmp: Remove additional header from zc1232 DT
Remove unused phy.h from zc1232 DTS.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
02860e1562 zynqmp: Remove u-boot,dm-pre-reloc for uart instances
Uarts already have u-boot,dm-pre-reloc via zynqmp.dtsi that's why there is
no need to have them in platform DT files too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
447fb8db02 arm64: zynqmp: Update Copyright years to 2021
Trivial change for all files I have touched recently.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
eca0376b54 arm64: zynqmp: Add label for zynqmp_ipi
Add label which is used by bootloader for adding bootloader specific flag.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/3dc8416abdd3498e61edcd83830a12af295c5c6d.1611224800.git.michal.simek@xilinx.com
2021-06-23 09:48:35 +02:00
Michal Simek
f2b5dd38de arm64: zynqmp: Move DP nodes to the end of file (zcu106)
Just sync it with others for easier comparison.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
fee3e307f2 arm64: zynqmp: Add reset description for sata
Sata needs to get reset before configuration that's why add property for it
there.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Stefano Stabellini
ce42bd2fa3 arm64: zynqmp: Add missing SMID for pcie to zynqmp.dtsi
The SMMU is disabled in device tree so this change has no impact.
The benefit is that this way it is in sync with xen.dtsi. Xen enables
the SMMU and makes use of it.

Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
d9be8b4f2f arm64: zynqmp: Disable CCI by default
There is no reason to have CCI no enabled by default. Enable it when your
system configuration requires it. In Xilinx configuration flow this is
work for Device Tree Generator which reads information from HW Design
configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
1242a6b13d arm64: zynqmp: Update psgtr clocks index for boards
Update the psgtr clock indexing for couple of zynqmp boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
767aa16d41 ARM: zynq: Rename bus to be align with simple-bus yaml
Rename amba to AXI. Based on Xilinx Zynq TRM (Chapter 5) chip is "AXI
point-to-point channels for communicating addresses, data, and response
transactions between master and slave clients. This ARM AMBA 3.0..."

Issues are reported as:
.. amba: $nodename:0: 'amba' does not match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
>From schema:
../github.com/devicetree-org/dt-schema/dtschema/schemas/simple-bus.yaml

Similar change has been done for Xilinx ZynqMP SoC.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8a4bc80debfbb79c296e76fc1e4c173e62657286.1606397101.git.michal.simek@xilinx.com
2021-06-23 09:48:35 +02:00
Michal Simek
351b9f5f95 arm64: zynqmp: Enable gpio driver for zcu1275/zcu1285
Enable gpio driver on these boards. GPIOs can be used on any board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-23 09:48:35 +02:00
Michal Simek
e246dc49cf ARM: zynq: Fix OCM mapping to be aligned with binding on zc702
The Linux commit f69629919942 ("dt-bindings: sram: Convert SRAM bindings to
json-schema") converted binding to yaml and some missing required
properties started to be reported. Align binding based on it.

The patch is fixing these warnings:
.../zynq-zc702.dt.yaml: sram@fffc0000: '#address-cells' is a required property
.../zynq-zc702.dt.yaml: sram@fffc0000: '#size-cells' is a required property
.../zynq-zc702.dt.yaml: sram@fffc0000: 'ranges' is a required property
>From schema: .../Documentation/devicetree/bindings/sram/sram.yaml

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/87c02786ccd8d7827827a9d95a8737bb300caeb0.1606397101.git.michal.simek@xilinx.com
2021-06-23 09:48:35 +02:00
Michal Simek
742fdd1e6b ARM: zynq: Convert at25 binding to new description on zc770-xm013
The Linux commit f8f79fa6bb25 ("dt-bindings: at25: convert the binding
document to yaml") converted binding to yaml and 3 deprecated properties
pop up.

The patch is fixing these warnings:
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'pagesize' is a required property
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'size' is a required property
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'address-width' is a required property
>From schema: .../Documentation/devicetree/bindings/eeprom/at25.yaml

by converting them to new binding.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/be2c1125d98386033e182012eb08986924707a76.1606397101.git.michal.simek@xilinx.com
2021-06-23 09:48:35 +02:00
Vignesh Raghavendra
95eca8612b ARM: dts: k3-j7200-common-proc-board-u-boot.dtsi: Fix dtc warnings
Fix following dtc warning by explicitly setting up #size-cells
and #address-cells when overriding node in -u-boot.dtsi

arch/arm/dts/k3-j7200-common-proc-board.dtb: Warning (reg_format):
/bus@100000/bus@28380000/mcu-navss/ringacc@2b800000:reg: property has
invalid length (80 bytes) (#address-cells == 2, #size-cells == 1)

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2021-06-21 13:18:17 -04:00
Fabio Estevam
31b3829f74 o4-imx-nano: Fix dtc warnings
Remove the LED unit addresses and reg properties to
fix the following dtc build warnings:

arch/arm/dts/o4-imx-nano.dtb: Warning (reg_format): /leds/led@0:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
...
arch/arm/dts/o4-imx-nano.dtb: Warning (avoid_default_addr_size): /leds/led@0: Relying on default #address-cells value

Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Oleh Kravchenko <oleg@kaa.org.ua>
2021-06-21 13:31:40 +02:00
Tom Rini
28afb71646 Merge tag 'u-boot-rockchip-20210618' of https://source.denx.de/u-boot/custodians/u-boot-rockchip into next
- New SoC platform support: rk3568;
- rockchip pcie Code compile issue fix;
- Board fix for rk3399 Khadas Edge;
- Add Rockchip NFC driver;
2021-06-19 08:20:12 -04:00
Michael Walle
82a3c9ef20 net: use the same alias stem for ethernet as linux
Linux uses the prefix "ethernet" whereas u-boot uses "eth". This is from
the linux tree:

$ grep "eth[0-9].*=.*&" arch/**/*dts{,i}|wc -l
0
$ grep "ethernet[0-9].*=.*&" arch/**/*dts{,i}|wc -l
633

In u-boot device trees both prefixes are used. Until recently the only
user of the ethernet alias was the sandbox test device tree. This
changed with commit fc054d563b ("net: Introduce DSA class for Ethernet
switches"). There, the MAC addresses are inherited based on the devices
sequence IDs which is in turn given by the device tree.

Before there are more users in u-boot and both worlds will differ even
more, rename the alias prefix to "ethernet" to match the linux ones.
Also adapt the test cases and rename any old aliases in the u-boot
device trees.

Cc: David Wu <david.wu@rock-chips.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-18 11:29:17 +03:00
Joseph Chen
636ffbd25c arm: dts: rockchip: Add dts for rk3568 evb
Add dts for rk3568 evb, sync from the linux kernel
upstream list [0].

[0] https://patchwork.kernel.org/project/linux-rockchip/list/?series=474969

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-06-18 14:36:24 +08:00
Joseph Chen
a4a9ce1660 arm: dts: Sync rockchip-pinconf.dtsi from kernel
Sync from linux kernel:
https://patchwork.kernel.org/project/linux-rockchip/list/?series=474969

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-06-18 14:36:24 +08:00
Grzegorz Szymaszek
95a34eb42e arm: dts: stm32mp157c-odyssey-som: enable SDMMC2 in SPL
Enable the SDMMC2 device tree node, as well as the pins it uses, in
U-Boot SPL.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 08:34:16 +02:00
Grzegorz Szymaszek
7db3307848 arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode
Enable the SDMMC2 eMMC high-speed DDR mode as it is done in the
corresponding Linux kernel device tree.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 08:34:16 +02:00
Grzegorz Szymaszek
51a2ac966e arm: dts: stm32mp157c-odyssey-som: set the SDMMC2 VQMMC supply
Set the SDMMC2 VQMMC supply to vdd (buck3). Note that in the
corresponding Linux kernel device tree, the supply is set to v3v3
(buck4), which is wrong.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 08:34:16 +02:00
Grzegorz Szymaszek
b1c8ad53f5 arm: dts: stm32mp157c-odyssey-som: enable all SDMMC2 data lanes
Add the “sdmmc2_d47_pins_d” pins to the SDMMC2 pinctrls. Increase the
bus width from four to eight.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 08:34:16 +02:00
Grzegorz Szymaszek
b40a034a63 arm: dts: stm32mp157c-odyssey-som: fix the basic SDMMC2 properties
The SDMMC2 interface hosts an eMMC. Replace the interface properties
that would only apply to SD cards—“broken-cd” and “disable-wp”—with
relevant ones: “non-removable”, “no-sd” and “no-sdio”.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-06-18 08:34:16 +02:00
Tom Rini
a298d4fbcd Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- fsl-qoriq: Bug fixes related pfe, eth, thermal node, vid.c, cpu release,
  mmc, usb, env, etc for Layerscape boards
- powerpc: Update Maintainers for some boards.
2021-06-17 08:44:56 -04:00
Aleksandar Gerasimovski
a7fd6fa1c2 board/km: add support for expu1 design based on nxp
The EXPU1 design is a new 40G capable ethernet service unit card for
Hitachi-Powergrids wired-com product lines.

The base SoC is same as for already added SELI8 card, consequently the
already added u-boot support for SELI8 is reused.

Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com>
Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
[Fixed new line error at EOF]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Lasse Klok Mikkelsen
fb6c96f14e arm: dts: ls1021a.dtsi: Fix invalid reg on gpio nodes
Address and size cells on SOC are set to 1. But gpio nodes are specified
with 2 cells. This fixes the gpio nodes to correct cells.

Signed-off-by: Lasse Klok Mikkelsen <lkmi@prevas.dk>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Yangbo Lu
38d1a18750 arm: dts: lx2162aqds: support eMMC HS400 mode on esdhc1
Add properties related to eMMC HS400 mode for esdhc1.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17 11:46:11 +05:30
Tom Rini
b2c4b7f665 u-boot-imx-20210616
-------------------
 
 - imxrt : fixes, USB, imxrt1020-evk
 - imx8m:
 	fix for verdin-imx8mm
 	Add conga-QMX8 board
 - imx6 :
 	documentation for pico-imx6:
 	Add SeeedStudio NPI-IMX6ULL Support
 	ventana: DM PCI
 - imx7d:
 	added SMEGW01 board
 
 CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7765
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Merge tag 'u-boot-imx-20210616' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

u-boot-imx-20210616
-------------------

- imxrt : fixes, USB, imxrt1020-evk
- imx8m:
	fix for verdin-imx8mm
	Add conga-QMX8 board
- imx6 :
	documentation for pico-imx6:
	Add SeeedStudio NPI-IMX6ULL Support
	ventana: DM PCI
- imx7d:
	added SMEGW01 board

CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7765
2021-06-16 11:18:11 -04:00
Michael Walle
2bf4658b8c board: sl28: fix RGMII clock and voltage
It was noticed that the clock isn't continuously enabled when there is
no link. This is because the 125MHz clock is derived from the internal
PLL which seems to go into some kind of power-down mode every once in a
while. The LS1028A expects a contiuous clock. Thus enable the PLL all
the time.

Also, the RGMII pad voltage is wrong, it was configured to 2.5V (that is
the VDDH regulator). The correct voltage is 1.8V, i.e. the VDDIO
regulator.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-16 18:14:08 +05:30
Vignesh Raghavendra
2af181b53e ARM: dts: k3: Add cfg register space for ringacc and udmap
R5 SPL needs access to cfg space of Rings and UDMAP, therefore add RING
CFG, TCHAN CFG and RCHAN CFG address ranges.
Note that these registers are present within respective IPs but are
not populated in Linux DT nodes (as they are configured via TISCI APIs)
and hence are added to -u-boot.dtsi for now.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210607141753.28796-6-vigneshr@ti.com
2021-06-11 19:18:52 +05:30
Vignesh Raghavendra
00d6fc9c71 ARM: dts: j72xx-r5-common-proc-board: Add DM firmware node
Add DM firmware node which will provide DM services during R5 SPL stage.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210607141753.28796-5-vigneshr@ti.com
2021-06-11 19:18:52 +05:30
Tero Kristo
bb318d8dc8 arm: dts: k3-j72xx: correct MCU timer1 frequency
MCU timer1 is used as the tick timer for MCU R5 SPL, and the
clock-frequency defined in DT appears to be incorrect at the moment.
Actual clock source for the timer is MCU_SYSCLK0 / 4 which is 250MHz.

Earlier setup of 25MHz went unnoticed, as there was a separate issue
with omap-timer, which caused an error to the clock by a factor of 8
with j7 devices. This problem surfaced once the omap-timer was fixed.

Signed-off-by: Tero Kristo <kristo@kernel.org>
2021-06-11 16:34:52 +05:30
Marek Behún
f221333400 arm: mvebu: dts: turris_mox: add nodes for SPI NOR partitions
Add nodes for SPI NOR partitions to the device tree of Turris MOX, as
are in Linux' device tree.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-10 07:18:06 +02:00
Marek Behún
e04bf43681 arm: mvebu: dts: turris_mox: add button and LED nodes
Add nodes for indicator LED and reset button so that board code can
implement board factory reset mechanism.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-10 07:18:06 +02:00
Dario Binacchi
62af440e21 arm: dts: sync rtc node of am335x boards with Linux 5.9-rc7
There have been some changes to the am335x-<board> DTs related to the
rtc node, so let's re-syncs them with Linux.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210602203805.11494-7-dariobin@libero.it
2021-06-09 22:23:44 +05:30
Aswath Govindraju
defd62ca13 arm: dts: k3-am64-main: Update the location of ATF in SRAM and increase its max size
Due to a limitation for USB DFU boot mode, SPL load address has to be less
than  or equal to 0x70001000. So, load address of SPL and ATF have been
moved to 0x70000000 and 0x701a0000 respectively.

Also, the maximum size of ATF has been increased to 0x1c000 [1].

Therefore, update ATF's location and maximum size accordingly in the device
tree file.

[1] - https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/commit/?id=2fb5312f61a7de8b7a70e1639199c4f14a10b6f9

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210604163043.12811-10-a-govindraju@ti.com
2021-06-09 22:23:44 +05:30
Aswath Govindraju
1c8b404b88 arm: dts: k3-am642-evm-u-boot: Add U-Boot tags and fix the dr_mode to peripheral for USB subsystem
Add U-Boot tags and fix the dr_mode as peripheral in U-Boot to support DFU
by default.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210604163043.12811-8-a-govindraju@ti.com
2021-06-09 22:23:44 +05:30
Aswath Govindraju
7803a5bda9 arm: dts: k3-am642-*-evm: Add USB support
AM64 EVM board has a micro USB 2.0 AB connector and the USB0_VBUS is
connected with a resistor divider in between. USB0_DRVVBUS pin is muxed
between USB0_DRVVBUS and GPIO1_79 signals.

Add the corresponding properties and set the pinmux mode for USB subsystem
in the evm dts file.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210604163043.12811-7-a-govindraju@ti.com
2021-06-09 22:23:44 +05:30
Aswath Govindraju
cdb738411f arm: dts: k3-am64-main: Add USB DT nodes
Add DT node for the single USB subsystem in main dtsi file.

Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210604163043.12811-6-a-govindraju@ti.com
2021-06-09 22:23:44 +05:30
Kevin Scholz
dc9f1009b1 arm: dts: k3-j7200: ddr: Update to 0.5.0 version of DDR for LPDDR 2666MTs
Update the ddr settings to use the DDR reg config tool rev 0.5.0.
This enables 2666MTs LPDDR configuration on J7200.

Signed-off-by: Kevin Scholz <k-scholz@ti.com>
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Suman Anna <s-anna@ti.com>
Link: https://lore.kernel.org/r/20210603131453.11414-1-praneeth@ti.com
2021-06-09 22:23:44 +05:30
Fabio Estevam
40496ac3b7 mx7d: Add Storopack's SMEGW01 board
Add support for Storopack's SMEGW01 board, which is an
IoT gateway based on the i.MX7D SoC.

Based on the original U-Boot work done by Phytec.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2021-06-09 13:34:38 +02:00
Navin Sankar Velliangiri
a3a0bc85c0 imx: Add SeeedStudio NPI-IMX6ULL Support
CPU:   Freescale i.MX6ULL rev1.1 792 MHz (running at 396 MHz)
CPU:   Industrial temperature grade (-40C to 105C) at 49C
Reset cause: POR
Model: Seeed NPi iMX6ULL Dev Board with NAND
Board: Seeed NPi i.MX6ULL Dev Board
DRAM:  512 MiB
NAND:  512 MiB
MMC:   FSL_SDHC: 0
In:    serial@2020000
Out:   serial@2020000
Err:   serial@2020000
Net:   FEC0

Working:
- Eth0
- MMC/SD
- NAND
- UART 1
- USB host

Signed-off-by: Navin Sankar Velliangiri <navin@linumiz.com>

Note:

Changes in v2:

 * removed unnecessary space in imx6ull-seeed-npi-imx6ull-dev-board.dts file.
 * Used SZ_2M for CONFIG_SYS_MALLOC_LEN size allocation.
2021-06-09 13:34:18 +02:00
Oliver Graute
fe133eb192 imx: support for conga-QMX8 board
Add i.MX8QM qmx8 congatec board support

U-Boot 2021.07-rc3-00528-gc9a966d9dd (May 31 2021 - 15:21:25 +0200)

CPU:   NXP i.MX8QM RevB A53 at 1200 MHz

Model: Congatec QMX8 Qseven series
Board: conga-QMX8
Build: SCFW 494c97f3, SECO-FW d63fdb21, ATF 09c5cc9
Boot:  SD2
DRAM:  6 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial@5a060000
Out:   serial@5a060000
Err:   serial@5a060000
switch to partitions #0, OK
mmc2 is current device
Net:
Error: ethernet@5b040000 address not set.
No ethernet found.

Hit any key to stop autoboot:  0

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
2021-06-09 13:34:09 +02:00
Tim Harvey
cd18f1e6e6 imx: ventana: enable dm support for PCI and FEC ethernet
Enable driver model support for FEC ethernet which allows us to remove
the iomux and board_eth_init function. Replace the toggling of the ethernet
phy reset with dt configuration.

Enable driver model support for PCI which allows us to remove the
eth1000_initialize() call. Additionally enable PCI_INIT_R to scan for
PCI devices on init such as the e1000 that is present on the GW552x.

Convert board_pci_fixup to use dm callback and remove pcidisable env
variable which is not supported for DM_PCI and thus leave PCI always
enabled during init.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-06-09 13:33:35 +02:00
Oleh Kravchenko
1180baec98 Add EV-iMX280-NANO-X-MB board
A simple prototyping board with one microSD port, one Ethernet port,
2 USB ports, I2C, SPI, GPIO, and UART interfaces.

Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
Cc: Stefano Babic <sbabic@denx.de>
2021-06-09 13:32:49 +02:00
Oleh Kravchenko
3675ac081a Add out4.ru O4-iMX-NANO board
Board designed for quick prototyping and has one microSD port,
2 Ethernet ports, 2 USB ports, I2C, SPI, CAN, RS-485, GPIO,
UART interfaces, and 2 RGB LEDs.

Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
Cc: Stefano Babic <sbabic@denx.de>
2021-06-09 13:32:42 +02:00
Giulio Benetti
42b967216e ARM: dts: imxrt1050-evk: enable usbotg1 node as host
Enable usbotg1 port node as host usb.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:04:00 +02:00
Giulio Benetti
9b91484a89 ARM: dts: imxrt1050: add usbotg1, usbphy1 and usbmisc nodes
Usb is now supported so add all required nodes for it in imxrt1050.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:03:54 +02:00
Giulio Benetti
d7308dbd86 ARM: dts: imxrt1020: add gpio5 node to this SoC
i.MXRT1020 supports gpio5, so let's add a node for it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:03:26 +02:00
Giulio Benetti
dc54f82901 ARM: dts: imxrt1020-evk: move all u-boot, dm-spl to imxrt1020-evk-u-boot.dtsi file
At the moment a lot of u-boot,dm-spl properties are present in board .dts
file but this is not correct since u-boot,dm-spl property is u-boot
specific and must be listed into the separate imrt1020-evk-u-boot.dtsi
file. So let's move every u-boot,dm-spl property present in
imxrt1020-evk.dts to imxrt1020-evk-u-boot.dtsi file.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:03:19 +02:00
Giulio Benetti
1f3555d906 ARM: dts: imxrt1050-evk: move all u-boot, dm-spl to imxrt1050-evk-u-boot.dtsi file
At the moment a lot of u-boot,dm-spl properties are present in board .dts
file but this is not correct since u-boot,dm-spl property is u-boot
specific and must be listed into the separate imrt1050-evk-u-boot.dtsi
file. So let's move every u-boot,dm-spl property present in
imxrt1050-evk.dts to imxrt1050-evk-u-boot.dtsi file.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:03:08 +02:00
Giulio Benetti
31f0e58527 ARM: dts: imxrt1050-evk: remove u-boot,dm-spl
We don't need lcdif to be enable in SPL, so let's remove u-boot,dm-spl.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
a9a5c33d57 ARM: dts: imxrt1050: set lcdif clocks according to mxsfb driver
Lcdif needs both "pix" and "axi" clocks to be enabled so let's add them to
lcdif node.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Giulio Benetti
f2d91e606b ARM: dts: imxrt1050: move lcdif assigned clock to dtsi
Since we assume pll5 is the default lcdif clock source let's move
assigned-clocks(-parents) properties to .dtsi file.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00