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arm: dts: k3-j72xx: correct MCU timer1 frequency

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MCU timer1 is used as the tick timer for MCU R5 SPL, and the
clock-frequency defined in DT appears to be incorrect at the moment.
Actual clock source for the timer is MCU_SYSCLK0 / 4 which is 250MHz.

Earlier setup of 25MHz went unnoticed, as there was a separate issue
with omap-timer, which caused an error to the clock by a factor of 8
with j7 devices. This problem surfaced once the omap-timer was fixed.

Signed-off-by: Tero Kristo <kristo@kernel.org>
This commit is contained in:
Tero Kristo 2021-06-11 11:45:27 +03:00 committed by Lokesh Vutla
parent c3ebc56e2d
commit bb318d8dc8
2 changed files with 2 additions and 2 deletions
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2
arch/arm/dts/k3-j7200-common-proc-board-u-boot.dtsi
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@ -33,7 +33,7 @@
compatible = "ti,omap5430-timer";
reg = <0x0 0x40400000 0x0 0x80>;
ti,timer-alwon;
clock-frequency = <25000000>;
clock-frequency = <250000000>;
u-boot,dm-spl;
};

2
arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi
View file

@ -46,7 +46,7 @@
compatible = "ti,omap5430-timer";
reg = <0x0 0x40400000 0x0 0x80>;
ti,timer-alwon;
clock-frequency = <25000000>;
clock-frequency = <250000000>;
u-boot,dm-spl;
};