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arm64: zynqmp: Update Copyright years to 2021

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Trivial change for all files I have touched recently.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Michal Simek 2021-05-31 09:50:01 +02:00
parent eca0376b54
commit 447fb8db02
16 changed files with 16 additions and 16 deletions
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2
arch/arm/dts/zynqmp-zc1232-revA.dts
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@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZC1232
*
* (C) Copyright 2017 - 2020, Xilinx, Inc.
* (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/

2
arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts
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@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP zc1751-xm015-dc1
*
* (C) Copyright 2015 - 2020, Xilinx, Inc.
* (C) Copyright 2015 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/

2
arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts
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@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP zc1751-xm016-dc2
*
* (C) Copyright 2015 - 2020, Xilinx, Inc.
* (C) Copyright 2015 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/

2
arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts
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@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP zc1751-xm019-dc5
*
* (C) Copyright 2015 - 2020, Xilinx, Inc.
* (C) Copyright 2015 - 2021, Xilinx, Inc.
*
* Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
* Michal Simek <michal.simek@xilinx.com>

2
arch/arm/dts/zynqmp-zcu100-revC.dts
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@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU100 revC
*
* (C) Copyright 2016 - 2020, Xilinx, Inc.
* (C) Copyright 2016 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
* Nathalie Chan King Choy

2
arch/arm/dts/zynqmp-zcu102-revA.dts
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@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU102 RevA
*
* (C) Copyright 2015 - 2020, Xilinx, Inc.
* (C) Copyright 2015 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/

2
arch/arm/dts/zynqmp-zcu104-revA.dts
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@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU104
*
* (C) Copyright 2017 - 2020, Xilinx, Inc.
* (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/

2
arch/arm/dts/zynqmp-zcu104-revC.dts
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@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU104
*
* (C) Copyright 2017 - 2020, Xilinx, Inc.
* (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/

2
arch/arm/dts/zynqmp-zcu106-revA.dts
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@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU106
*
* (C) Copyright 2016 - 2020, Xilinx, Inc.
* (C) Copyright 2016 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/

2
arch/arm/dts/zynqmp-zcu111-revA.dts
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@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU111
*
* (C) Copyright 2017 - 2020, Xilinx, Inc.
* (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/

2
arch/arm/dts/zynqmp-zcu1275-revA.dts
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@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU1275
*
* (C) Copyright 2017 - 2020, Xilinx, Inc.
* (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
* Siva Durga Prasad Paladugu <sivadur@xilinx.com>

2
arch/arm/dts/zynqmp-zcu1275-revB.dts
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@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU1275 RevB
*
* (C) Copyright 2018 - 2020, Xilinx, Inc.
* (C) Copyright 2018 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
* Siva Durga Prasad Paladugu <sivadur@xilinx.com>

2
arch/arm/dts/zynqmp-zcu1285-revA.dts
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@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU1285 RevA
*
* (C) Copyright 2018 - 2020, Xilinx, Inc.
* (C) Copyright 2018 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
* Siva Durga Prasad Paladugu <sivadur@xilinx.com>

2
arch/arm/dts/zynqmp-zcu208-revA.dts
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@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU208
*
* (C) Copyright 2017 - 2020, Xilinx, Inc.
* (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/

2
arch/arm/dts/zynqmp-zcu216-revA.dts
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@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP ZCU216
*
* (C) Copyright 2017 - 2020, Xilinx, Inc.
* (C) Copyright 2017 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/

2
arch/arm/dts/zynqmp.dtsi
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@ -2,7 +2,7 @@
/*
* dts file for Xilinx ZynqMP
*
* (C) Copyright 2014 - 2020, Xilinx, Inc.
* (C) Copyright 2014 - 2021, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*