mirror of
https://github.com/AsahiLinux/u-boot
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Add out4.ru O4-iMX-NANO board
Board designed for quick prototyping and has one microSD port, 2 Ethernet ports, 2 USB ports, I2C, SPI, CAN, RS-485, GPIO, UART interfaces, and 2 RGB LEDs. Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Oleh Kravchenko
Stefano Babic
parent
e2017ef6ed
commit
3675ac081a
12 changed files with 819 additions and 0 deletions
10
MAINTAINERS
10
MAINTAINERS
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@ -919,6 +919,16 @@ S: Orphaned (Since 2017-01)
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T: git https://source.denx.de/u-boot/custodians/u-boot-onenand.git
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F: drivers/mtd/onenand/
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OUT4-IMX6ULL-NANO BOARD
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M: Oleh Kravchenko <oleg@kaa.org.ua>
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S: Maintained
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T: git https://github.com/Oleh-Kravchenko/u-boot-out4.git
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F: arch/arm/dts/o4-imx-nano.dts
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F: arch/arm/dts/o4-imx6ull-nano.dtsi
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F: board/out4
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F: configs/o4-imx6ull-nano_defconfig
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F: include/configs/o4-imx6ull-nano.h
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PATMAN
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M: Simon Glass <sjg@chromium.org>
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S: Maintained
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@ -819,6 +819,9 @@ dtb-$(CONFIG_ARCH_MX6) += \
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imx6-apalis.dtb \
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imx6-colibri.dtb
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dtb-$(CONFIG_O4_IMX_NANO) += \
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o4-imx-nano.dtb
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dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \
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imx7d-sdb-qspi.dtb \
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imx7-cm.dtb \
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241
arch/arm/dts/o4-imx-nano.dts
Normal file
241
arch/arm/dts/o4-imx-nano.dts
Normal file
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@ -0,0 +1,241 @@
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// SPDX-License-Identifier: GPL-2.0+
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// Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua>
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/dts-v1/;
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#include <dt-bindings/leds/common.h>
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#include "o4-imx6ull-nano.dtsi"
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/ {
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model = "O4-iMX-NANO";
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compatible = "out4,o4-imx-nano",
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"out4,o4-imx6ull-nano",
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"fsl,imx6ull";
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aliases {
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mmc1 = &usdhc1;
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};
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chosen {
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stdout-path = &uart1;
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};
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leds {
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compatible = "gpio-leds";
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led@0 {
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color = <LED_COLOR_ID_RED>;
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gpios = <&pcf8574a 0 GPIO_ACTIVE_LOW>;
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reg = <0>;
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};
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led@1 {
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&pcf8574a 1 GPIO_ACTIVE_LOW>;
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reg = <1>;
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};
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led@2 {
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gpios = <&pcf8574a 2 GPIO_ACTIVE_LOW>;
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color = <LED_COLOR_ID_BLUE>;
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reg = <2>;
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};
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led@3 {
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color = <LED_COLOR_ID_RED>;
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gpios = <&pcf8574a 3 GPIO_ACTIVE_LOW>;
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reg = <3>;
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};
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led@4 {
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&pcf8574a 4 GPIO_ACTIVE_LOW>;
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reg = <4>;
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};
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led@5 {
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color = <LED_COLOR_ID_BLUE>;
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gpios = <&pcf8574a 5 GPIO_ACTIVE_LOW>;
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reg = <5>;
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};
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};
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usbotg1_vbus: reg_usbotg1_vbus {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&pcf8574a 6 GPIO_ACTIVE_HIGH>;
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regulator-max-microvolt = <5000000>;
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regulator-min-microvolt = <5000000>;
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regulator-name = "usb0";
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};
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usbotg2_vbus: reg_usbotg2_vbus {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&pcf8574a 7 GPIO_ACTIVE_HIGH>;
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regulator-max-microvolt = <5000000>;
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regulator-min-microvolt = <5000000>;
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regulator-name = "usb1";
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};
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};
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&iomuxc {
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
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MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
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>;
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};
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pinctrl_usdhc1: usdhc1grp {
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fsl,pins = <
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MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10069
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MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059
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MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059
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MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059
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MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059
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MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059
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MX6UL_PAD_UART1_RTS_B__USDHC1_CD_B 0x03029
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>;
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};
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pinctrl_mdio: mdiogrp {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
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MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
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MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0xb0b0 /* RST */
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX6UL_PAD_CSI_HSYNC__I2C2_SCL 0x4001b8b0
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MX6UL_PAD_CSI_VSYNC__I2C2_SDA 0x4001b8b0
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>;
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};
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pinctrl_i2c2_gpio: i2c2gpiogrp {
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fsl,pins = <
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MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x1b8b0
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MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x1b8b0
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>;
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};
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pinctrl_can1: can1grp {
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fsl,pins = <
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MX6UL_PAD_LCD_DATA08__FLEXCAN1_TX 0x1b020
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MX6UL_PAD_LCD_DATA09__FLEXCAN1_RX 0x1b020
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1
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MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1
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MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1
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>;
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};
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};
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&uart1 {
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pinctrl-0 = <&pinctrl_uart1>;
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pinctrl-names = "default";
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status = "okay";
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};
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&usdhc1 {
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bus-width = <4>;
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no-1-8-v;
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pinctrl-0 = <&pinctrl_usdhc1>;
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pinctrl-names = "default";
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status = "okay";
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wakeup-source;
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};
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&fec1 {
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phy-handle = <&phy0>;
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phy-mode = "rmii";
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pinctrl-0 = <&pinctrl_fec1>;
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pinctrl-names = "default";
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status = "okay";
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};
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&fec2 {
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phy-handle = <&phy1>;
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phy-mode = "rmii";
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phy-reset-duration = <250>;
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phy-reset-post-delay = <100>;
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phy-reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
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pinctrl-0 = <&pinctrl_fec2 &pinctrl_mdio>;
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pinctrl-names = "default";
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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phy0: ethernet-phy@0 {
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clocks = <&clks IMX6UL_CLK_ENET_REF>;
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clock-names = "rmii-ref";
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interrupt-parent = <&gpio5>;
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interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
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pinctrl-0 = <&pinctrl_phy0_irq>;
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pinctrl-names = "default";
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reg = <0>;
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};
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phy1: ethernet-phy@1 {
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clocks = <&clks IMX6UL_CLK_ENET2_REF>;
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clock-names = "rmii-ref";
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interrupt-parent = <&gpio5>;
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interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
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pinctrl-0 = <&pinctrl_phy1_irq>;
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pinctrl-names = "default";
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reg = <1>;
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};
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};
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};
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&usbotg1 {
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dr_mode = "host";
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status = "okay";
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vbus-supply = <&usbotg1_vbus>;
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};
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&usbotg2 {
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dr_mode = "host";
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status = "okay";
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vbus-supply = <&usbotg2_vbus>;
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};
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&i2c2 {
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clock_frequency = <100000>;
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pinctrl-0 = <&pinctrl_i2c2>;
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pinctrl-1 = <&pinctrl_i2c2_gpio>;
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pinctrl-names = "default", "gpio";
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scl-gpios = <&gpio4 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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sda-gpios = <&gpio4 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
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status = "okay";
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pcf8574a: gpio@38 {
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compatible = "nxp,pcf8574a";
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#gpio-cells = <2>;
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gpio-controller;
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reg = <0x38>;
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};
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can1>;
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status = "okay";
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};
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&uart2 {
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linux,rs485-enabled-at-boot-time;
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pinctrl-0 = <&pinctrl_uart2>;
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pinctrl-names = "default";
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status = "okay";
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uart-has-rtscts;
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};
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87
arch/arm/dts/o4-imx6ull-nano.dtsi
Normal file
87
arch/arm/dts/o4-imx6ull-nano.dtsi
Normal file
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@ -0,0 +1,87 @@
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// SPDX-License-Identifier: GPL-2.0+
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// Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua>
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/dts-v1/;
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#include "imx6ull.dtsi"
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/ {
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model = "O4-iMX6ULL-NANO";
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compatible = "out4,o4-imx6ull-nano", "fsl,imx6ull";
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aliases {
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mmc0 = &usdhc2;
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x20000000>;
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};
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};
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&iomuxc {
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX6UL_PAD_NAND_ALE__USDHC2_RESET_B 0x17059
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MX6UL_PAD_NAND_DATA00__USDHC2_DATA0 0x17059
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MX6UL_PAD_NAND_DATA01__USDHC2_DATA1 0x17059
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MX6UL_PAD_NAND_DATA02__USDHC2_DATA2 0x17059
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MX6UL_PAD_NAND_DATA03__USDHC2_DATA3 0x17059
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MX6UL_PAD_NAND_DATA04__USDHC2_DATA4 0x17059
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MX6UL_PAD_NAND_DATA05__USDHC2_DATA5 0x17059
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MX6UL_PAD_NAND_DATA06__USDHC2_DATA6 0x17059
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MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059
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MX6UL_PAD_NAND_RE_B__USDHC2_CLK 0x10069
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MX6UL_PAD_NAND_WE_B__USDHC2_CMD 0x17059
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>;
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};
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pinctrl_fec1: fec1grp {
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fsl,pins = <
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MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
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MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
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MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
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MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
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MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031
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MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
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MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
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MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
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>;
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};
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pinctrl_fec2: fec2grp {
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fsl,pins = <
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MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
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MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
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MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
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MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
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MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031
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MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0
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MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0
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MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
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>;
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};
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pinctrl_phy0_irq: phy0grp {
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fsl,pins = <
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MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x79
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>;
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};
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pinctrl_phy1_irq: phy1grp {
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fsl,pins = <
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MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x79
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>;
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};
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};
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&usdhc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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no-1-8-v;
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non-removable;
|
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keep-power-in-suspend;
|
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wakeup-source;
|
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bus-width = <8>;
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status = "okay";
|
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};
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|
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@ -619,6 +619,18 @@ config TARGET_BRPPT2
|
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Support
|
||||
B&R BRPPT2 platform
|
||||
based on Freescale's iMX6 SoC
|
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|
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config TARGET_O4_IMX6ULL_NANO
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bool "O4-iMX6ULL-NANO"
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depends on MX6ULL
|
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select BOARD_LATE_INIT
|
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select DM
|
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select DM_THERMAL
|
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imply CMD_DM
|
||||
help
|
||||
Support for www.out4.ru O4-iMX6UL-NANO platform
|
||||
based on Freescale's i.MX6UL/i.MX6ULL SoC.
|
||||
|
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endchoice
|
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|
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config SYS_SOC
|
||||
|
|
@ -668,5 +680,6 @@ source "board/udoo/neo/Kconfig"
|
|||
source "board/wandboard/Kconfig"
|
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source "board/warp/Kconfig"
|
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source "board/BuR/brppt2/Kconfig"
|
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source "board/out4/o4-imx6ull-nano/Kconfig"
|
||||
|
||||
endif
|
||||
|
|
|
|||
91
board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg
Normal file
91
board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg
Normal file
|
|
@ -0,0 +1,91 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
// Copyright (C) 2016 Freescale Semiconductor, Inc.
|
||||
// Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua>
|
||||
|
||||
#define __ASSEMBLY__
|
||||
#include <config.h>
|
||||
|
||||
/* image version */
|
||||
|
||||
IMAGE_VERSION 2
|
||||
BOOT_FROM sd
|
||||
|
||||
#ifdef CONFIG_IMX_HAB
|
||||
CSF CONFIG_CSF_SIZE
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Device Configuration Data (DCD)
|
||||
*
|
||||
* Each entry must have the format:
|
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* Addr-type Address Value
|
||||
*
|
||||
* where:
|
||||
* Addr-type register length (1,2 or 4 bytes)
|
||||
* Address absolute address of the register
|
||||
* value value to be stored in the register
|
||||
*/
|
||||
|
||||
/* Enable all clocks */
|
||||
DATA 4 0x020c4068 0xffffffff
|
||||
DATA 4 0x020c406c 0xffffffff
|
||||
DATA 4 0x020c4070 0xffffffff
|
||||
DATA 4 0x020c4074 0xffffffff
|
||||
DATA 4 0x020c4078 0xffffffff
|
||||
DATA 4 0x020c407c 0xffffffff
|
||||
DATA 4 0x020c4080 0xffffffff
|
||||
|
||||
/* Samsung K4B4G1646D-BCMA */
|
||||
DATA 4 0x020e04b4 0x000c0000
|
||||
DATA 4 0x020e04ac 0x00000000
|
||||
DATA 4 0x020e027c 0x00000030
|
||||
DATA 4 0x020e0250 0x00000030
|
||||
DATA 4 0x020e024c 0x00000030
|
||||
DATA 4 0x020e0490 0x00000030
|
||||
DATA 4 0x020e0288 0x000c0030
|
||||
DATA 4 0x020e0270 0x00000000
|
||||
DATA 4 0x020e0260 0x00000030
|
||||
DATA 4 0x020e0264 0x00000030
|
||||
DATA 4 0x020e04a0 0x00000030
|
||||
DATA 4 0x020e0494 0x00020000
|
||||
DATA 4 0x020e0280 0x00000030
|
||||
DATA 4 0x020e0284 0x00000030
|
||||
DATA 4 0x020e04b0 0x00020000
|
||||
DATA 4 0x020e0498 0x00000030
|
||||
DATA 4 0x020e04a4 0x00000030
|
||||
DATA 4 0x020e0244 0x00000030
|
||||
DATA 4 0x020e0248 0x00000030
|
||||
DATA 4 0x021b001c 0x00008000
|
||||
DATA 4 0x021b0800 0xa1390003
|
||||
DATA 4 0x021b080c 0x00030009
|
||||
DATA 4 0x021b083c 0x01440148
|
||||
DATA 4 0x021b0848 0x40403640
|
||||
DATA 4 0x021b0850 0x4040322a
|
||||
DATA 4 0x021b081c 0x33333333
|
||||
DATA 4 0x021b0820 0x33333333
|
||||
DATA 4 0x021b082c 0xf3333333
|
||||
DATA 4 0x021b0830 0xf3333333
|
||||
DATA 4 0x021b08c0 0x00944009
|
||||
DATA 4 0x021b08b8 0x00000800
|
||||
DATA 4 0x021b0004 0x0002002d
|
||||
DATA 4 0x021b0008 0x1b333030
|
||||
DATA 4 0x021b000c 0x676b52f2
|
||||
DATA 4 0x021b0010 0x926d0b63
|
||||
DATA 4 0x021b0014 0x01ff00db
|
||||
DATA 4 0x021b0018 0x00211740
|
||||
DATA 4 0x021b001c 0x00008000
|
||||
DATA 4 0x021b002c 0x000026d2
|
||||
DATA 4 0x021b0030 0x006b1023
|
||||
DATA 4 0x021b0040 0x0000004f
|
||||
DATA 4 0x021b0000 0x84180000
|
||||
DATA 4 0x021b0890 0x00400000
|
||||
DATA 4 0x021b001c 0x02008032
|
||||
DATA 4 0x021b001c 0x00008033
|
||||
DATA 4 0x021b001c 0x00048031
|
||||
DATA 4 0x021b001c 0x15108030
|
||||
DATA 4 0x021b001c 0x04008040
|
||||
DATA 4 0x021b0020 0x00007800
|
||||
DATA 4 0x021b0818 0x00000227
|
||||
DATA 4 0x021b0004 0x0002552d
|
||||
DATA 4 0x021b0404 0x00011006
|
||||
DATA 4 0x021b001c 0x00000000
|
||||
57
board/out4/o4-imx6ull-nano/Kconfig
Normal file
57
board/out4/o4-imx6ull-nano/Kconfig
Normal file
|
|
@ -0,0 +1,57 @@
|
|||
if TARGET_O4_IMX6ULL_NANO
|
||||
|
||||
config SYS_BOARD
|
||||
default "o4-imx6ull-nano"
|
||||
|
||||
config SYS_VENDOR
|
||||
default "out4"
|
||||
|
||||
config SYS_CONFIG_NAME
|
||||
default "o4-imx6ull-nano"
|
||||
|
||||
choice
|
||||
prompt "Memory model"
|
||||
default K4B4G1646D_BCMA
|
||||
help
|
||||
Memory type setup.
|
||||
|
||||
Please choose correct memory model here.
|
||||
|
||||
config K4B4G1646D_BCMA
|
||||
bool "K4B4G1646D-BCMA 256Mx16 (512 MiB/chip)"
|
||||
help
|
||||
Samsung DDR3 SDRAM
|
||||
K4B4G1646D-BCMA
|
||||
|
||||
config MT41K256M16HA_125E
|
||||
bool "MT41K256M16HA-125:E 256Mx16 (512 MiB/chip)"
|
||||
help
|
||||
Micron DDR3L SDRAM
|
||||
MT41K256M16HA-125:E
|
||||
|
||||
endchoice
|
||||
|
||||
choice
|
||||
prompt "Mainboard model"
|
||||
default O4_IMX_NANO
|
||||
help
|
||||
Mainboard setup.
|
||||
|
||||
Please choose correct main board model here.
|
||||
|
||||
config O4_IMX_NANO
|
||||
bool "O4-iMX-NANO"
|
||||
help
|
||||
A baseboard for EV-iMX280-NANO module:
|
||||
https://out4.ru/products/board/18-o4-imx-nano.html
|
||||
|
||||
endchoice
|
||||
|
||||
config IMX_CONFIG
|
||||
default "board/out4/o4-imx6ull-nano/K4B4G1646D-BCMA.cfg" if K4B4G1646D_BCMA
|
||||
default "board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg" if MT41K256M16HA_125E
|
||||
|
||||
config DEFAULT_DEVICE_TREE
|
||||
default "o4-imx-nano" if O4_IMX_NANO
|
||||
|
||||
endif
|
||||
91
board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg
Normal file
91
board/out4/o4-imx6ull-nano/MT41K256M16HA-125E.cfg
Normal file
|
|
@ -0,0 +1,91 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
// Copyright (C) 2016 Freescale Semiconductor, Inc.
|
||||
// Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua>
|
||||
|
||||
#define __ASSEMBLY__
|
||||
#include <config.h>
|
||||
|
||||
/* image version */
|
||||
|
||||
IMAGE_VERSION 2
|
||||
BOOT_FROM sd
|
||||
|
||||
#ifdef CONFIG_IMX_HAB
|
||||
CSF CONFIG_CSF_SIZE
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Device Configuration Data (DCD)
|
||||
*
|
||||
* Each entry must have the format:
|
||||
* Addr-type Address Value
|
||||
*
|
||||
* where:
|
||||
* Addr-type register length (1,2 or 4 bytes)
|
||||
* Address absolute address of the register
|
||||
* value value to be stored in the register
|
||||
*/
|
||||
|
||||
/* Enable all clocks */
|
||||
DATA 4 0x020c4068 0xffffffff
|
||||
DATA 4 0x020c406c 0xffffffff
|
||||
DATA 4 0x020c4070 0xffffffff
|
||||
DATA 4 0x020c4074 0xffffffff
|
||||
DATA 4 0x020c4078 0xffffffff
|
||||
DATA 4 0x020c407c 0xffffffff
|
||||
DATA 4 0x020c4080 0xffffffff
|
||||
|
||||
/* Micron MT41K256M16HA-125:E */
|
||||
DATA 4 0x020e04b4 0x000c0000
|
||||
DATA 4 0x020e04ac 0x00000000
|
||||
DATA 4 0x020e027c 0x00000030
|
||||
DATA 4 0x020e0250 0x00000030
|
||||
DATA 4 0x020e024c 0x00000030
|
||||
DATA 4 0x020e0490 0x00000030
|
||||
DATA 4 0x020e0288 0x000c0030
|
||||
DATA 4 0x020e0270 0x00000000
|
||||
DATA 4 0x020e0260 0x00000030
|
||||
DATA 4 0x020e0264 0x00000030
|
||||
DATA 4 0x020e04a0 0x00000030
|
||||
DATA 4 0x020e0494 0x00020000
|
||||
DATA 4 0x020e0280 0x00000030
|
||||
DATA 4 0x020e0284 0x00000030
|
||||
DATA 4 0x020e04b0 0x00020000
|
||||
DATA 4 0x020e0498 0x00000030
|
||||
DATA 4 0x020e04a4 0x00000030
|
||||
DATA 4 0x020e0244 0x00000030
|
||||
DATA 4 0x020e0248 0x00000030
|
||||
DATA 4 0x021b001c 0x00008000
|
||||
DATA 4 0x021b0800 0xa1390003
|
||||
DATA 4 0x021b080c 0x0005000b
|
||||
DATA 4 0x021b083c 0x01400144
|
||||
DATA 4 0x021b0848 0x4040343a
|
||||
DATA 4 0x021b0850 0x4040342a
|
||||
DATA 4 0x021b081c 0x33333333
|
||||
DATA 4 0x021b0820 0x33333333
|
||||
DATA 4 0x021b082c 0xf3333333
|
||||
DATA 4 0x021b0830 0xf3333333
|
||||
DATA 4 0x021b08c0 0x00944009
|
||||
DATA 4 0x021b08b8 0x00000800
|
||||
DATA 4 0x021b0004 0x0002002d
|
||||
DATA 4 0x021b0008 0x1b333030
|
||||
DATA 4 0x021b000c 0x676b52f2
|
||||
DATA 4 0x021b0010 0x91eb0b63
|
||||
DATA 4 0x021b0014 0x01ff00db
|
||||
DATA 4 0x021b0018 0x00211740
|
||||
DATA 4 0x021b001c 0x00008000
|
||||
DATA 4 0x021b002c 0x000026d2
|
||||
DATA 4 0x021b0030 0x006b1023
|
||||
DATA 4 0x021b0040 0x0000004f
|
||||
DATA 4 0x021b0000 0x84180000
|
||||
DATA 4 0x021b0890 0x00400000
|
||||
DATA 4 0x021b001c 0x02008032
|
||||
DATA 4 0x021b001c 0x00008033
|
||||
DATA 4 0x021b001c 0x00048031
|
||||
DATA 4 0x021b001c 0x15108030
|
||||
DATA 4 0x021b001c 0x04008040
|
||||
DATA 4 0x021b0020 0x00007800
|
||||
DATA 4 0x021b0818 0x00000227
|
||||
DATA 4 0x021b0004 0x0002552d
|
||||
DATA 4 0x021b0404 0x00011006
|
||||
DATA 4 0x021b001c 0x00000000
|
||||
4
board/out4/o4-imx6ull-nano/Makefile
Normal file
4
board/out4/o4-imx6ull-nano/Makefile
Normal file
|
|
@ -0,0 +1,4 @@
|
|||
# SPDX-License-Identifier: GPL-2.0+
|
||||
# Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua>
|
||||
|
||||
obj-y := o4-imx6ull-nano.o
|
||||
86
board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c
Normal file
86
board/out4/o4-imx6ull-nano/o4-imx6ull-nano.c
Normal file
|
|
@ -0,0 +1,86 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
// Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua>
|
||||
|
||||
#include <asm/arch-mx6/clock.h>
|
||||
#include <asm/arch/sys_proto.h>
|
||||
#include <asm/global_data.h>
|
||||
#include <asm/mach-imx/boot_mode.h>
|
||||
#include <common.h>
|
||||
#include <env.h>
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
int dram_init(void)
|
||||
{
|
||||
gd->ram_size = imx_ddr_size();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_early_init_f(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int setup_fec_clock(void)
|
||||
{
|
||||
if (IS_ENABLED(CONFIG_FEC_MXC) && !IS_ENABLED(CONFIG_CLK_IMX6Q)) {
|
||||
struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* Use 50M anatop loopback REF_CLK1 for ENET1,
|
||||
* clear gpr1[13], set gpr1[17].
|
||||
*/
|
||||
clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC1_MASK,
|
||||
IOMUX_GPR1_FEC1_CLOCK_MUX1_SEL_MASK);
|
||||
|
||||
ret = enable_fec_anatop_clock(0, ENET_50MHZ);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/*
|
||||
* Use 50M anatop loopback REF_CLK2 for ENET2,
|
||||
* clear gpr1[14], set gpr1[18].
|
||||
*/
|
||||
clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC2_MASK,
|
||||
IOMUX_GPR1_FEC2_CLOCK_MUX1_SEL_MASK);
|
||||
|
||||
ret = enable_fec_anatop_clock(1, ENET_50MHZ);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
enable_enet_clk(1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_init(void)
|
||||
{
|
||||
/* Address of boot parameters */
|
||||
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
|
||||
|
||||
return setup_fec_clock();
|
||||
}
|
||||
|
||||
int board_late_init(void)
|
||||
{
|
||||
if (IS_ENABLED(CONFIG_CMD_BMODE))
|
||||
add_board_boot_modes(NULL);
|
||||
|
||||
if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
|
||||
const char *model;
|
||||
|
||||
model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
|
||||
if (model)
|
||||
env_set("board_name", model);
|
||||
}
|
||||
|
||||
if (is_boot_from_usb()) {
|
||||
env_set("bootcmd", "run bootcmd_mfg");
|
||||
env_set("bootdelay", "0");
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
103
configs/o4-imx6ull-nano_defconfig
Normal file
103
configs/o4-imx6ull-nano_defconfig
Normal file
|
|
@ -0,0 +1,103 @@
|
|||
CONFIG_ARCH_MX6=y
|
||||
CONFIG_ARM=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="o4-imx-nano"
|
||||
CONFIG_HUSH_PARSER=y
|
||||
CONFIG_IMX_MODULE_FUSE=y
|
||||
CONFIG_MX6ULL=y
|
||||
CONFIG_O4_IMX_NANO=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_IMX6=y
|
||||
CONFIG_SYS_TEXT_BASE=0x87800000
|
||||
CONFIG_TARGET_O4_IMX6ULL_NANO=y
|
||||
|
||||
# CONFIG_K4B4G1646D_BCMA is not set
|
||||
CONFIG_MT41K256M16HA_125E=y
|
||||
|
||||
# Device Tree
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
|
||||
# Environment
|
||||
CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
|
||||
CONFIG_ENV_IS_IN_FAT=y
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
|
||||
# Clock driver for imx6ull is not implemented
|
||||
# CONFIG_CLK_IMX6Q=y
|
||||
|
||||
# Thermal
|
||||
CONFIG_DM_THERMAL=y
|
||||
CONFIG_IMX_THERMAL=y
|
||||
|
||||
# Serial
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_MXC_UART=y
|
||||
|
||||
# eMMC support
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_FSL_USDHC=y
|
||||
CONFIG_SUPPORT_EMMC_BOOT=y
|
||||
CONFIG_SUPPORT_EMMC_RPMB=y
|
||||
|
||||
# GPIO support
|
||||
CONFIG_CMD_GPIO=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_MXC_GPIO=y
|
||||
|
||||
# USB support
|
||||
CONFIG_CI_UDC=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
CONFIG_DM_USB=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
|
||||
# Fastboot support
|
||||
CONFIG_CMD_FASTBOOT=y
|
||||
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
|
||||
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
CONFIG_FASTBOOT_FLASH=y
|
||||
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
|
||||
CONFIG_USB_FUNCTION_FASTBOOT=y
|
||||
|
||||
# Ethernet support
|
||||
CONFIG_CMD_DHCP=y
|
||||
CONFIG_CMD_MDIO=y
|
||||
CONFIG_CMD_MII=y
|
||||
CONFIG_CMD_PING=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_DM_ETH_PHY=y
|
||||
CONFIG_FEC_MXC=y
|
||||
CONFIG_FEC_MXC_MDIO_BASE=0x020b4000
|
||||
CONFIG_FEC_MXC_SHARE_MDIO=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHY_SMSC=y
|
||||
|
||||
# I2C
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_MXC=y
|
||||
|
||||
# Watchdog support is broken
|
||||
# CONFIG_CMD_WDT=y
|
||||
# CONFIG_IMX_WATCHDOG=y
|
||||
# CONFIG_SYSRESET_WATCHDOG=y
|
||||
# CONFIG_WATCHDOG_RESET_DISABLE=y
|
||||
# CONFIG_WDT=y
|
||||
|
||||
# VBUS
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_DM_REGULATOR_FIXED=y
|
||||
|
||||
# misc
|
||||
CONFIG_CMD_BOOTZ=y
|
||||
CONFIG_CMD_EXT4=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_MEMINFO=y
|
||||
CONFIG_CMD_MEMTEST=y
|
||||
CONFIG_CMD_PART=y
|
||||
33
include/configs/o4-imx6ull-nano.h
Normal file
33
include/configs/o4-imx6ull-nano.h
Normal file
|
|
@ -0,0 +1,33 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/* Copyright (C) 2021 Oleh Kravchenko <oleg@kaa.org.ua> */
|
||||
|
||||
#ifndef __O4_IMX6ULL_NANO_CONFIG_H
|
||||
#define __O4_IMX6ULL_NANO_CONFIG_H
|
||||
|
||||
#include "mx6_common.h"
|
||||
|
||||
#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
|
||||
#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
|
||||
#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
|
||||
#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
|
||||
#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
|
||||
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
|
||||
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
|
||||
|
||||
#if IS_ENABLED(CONFIG_CMD_USB)
|
||||
# define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
|
||||
#endif /* CONFIG_CMD_USB */
|
||||
|
||||
#if IS_ENABLED(CONFIG_FEC_MXC)
|
||||
# define CONFIG_FEC_XCV_TYPE RMII
|
||||
#endif /* CONFIG_FEC_MXC */
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"mmcdev=0\0" \
|
||||
"mmcpart=2\0" \
|
||||
"mmcargs=setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcpart} console=ttymxc0,${baudrate} panic=30\0" \
|
||||
"mmcboot=run mmcargs && ext4load mmc ${mmcdev}:${mmcpart} $loadaddr /boot/zImage && bootz $loadaddr - $fdtcontroladdr\0" \
|
||||
"bootcmd=run mmcboot\0" \
|
||||
"bootcmd_mfg=fastboot usb 0\0"
|
||||
|
||||
#endif /* __O4_IMX6ULL_NANO_CONFIG_H */
|
||||
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