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arm: dts: ls1021a.dtsi: Fix invalid reg on gpio nodes
Address and size cells on SOC are set to 1. But gpio nodes are specified with 2 cells. This fixes the gpio nodes to correct cells. Signed-off-by: Lasse Klok Mikkelsen <lkmi@prevas.dk> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
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1 changed files with 4 additions and 4 deletions
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@ -100,7 +100,7 @@
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gpio0: gpio@2300000 {
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compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
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reg = <0x0 0x2300000 0x0 0x10000>;
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reg = <0x2300000 0x10000>;
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interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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@ -110,7 +110,7 @@
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gpio1: gpio@2310000 {
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compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
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reg = <0x0 0x2310000 0x0 0x10000>;
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reg = <0x2310000 0x10000>;
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interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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@ -120,7 +120,7 @@
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gpio2: gpio@2320000 {
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compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
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reg = <0x0 0x2320000 0x0 0x10000>;
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reg = <0x2320000 0x10000>;
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interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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@ -130,7 +130,7 @@
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gpio3: gpio@2330000 {
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compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio";
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reg = <0x0 0x2330000 0x0 0x10000>;
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reg = <0x2330000 0x10000>;
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interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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