Add the required binman images to replace the Makefile rules which are
currently used. This includes subsuming:
- tpl/u-boot-tpl-rockchip.bin if TPL is enabled
- idbloader.img if either or both of SPL and TPL are enabled
- u-boot.itb if SPL_FIT is enabled
- u-boot-rockchip.bin if SPL is used, either using u-boot.itb when
SPL_FIT is enabled or u-boot.img when it isn't
Note that the intermediate files are dropped with binman, since it
producing everything in one pass. This means that
tpl/u-boot-tpl-rockchip.bin is not created, for example.
Note that for some 32-bit rk3288 boards, rockchip-optee.dtsi is included.
Signed-off-by: Simon Glass <sjg@chromium.org>
Enable multiple-images so we can generate more than one image. Also
add a comment for the end of the #if block.
Signed-off-by: Simon Glass <sjg@chromium.org>
This board is useful for benchmarking overall U-Boot performance. Enable
the bootstage feature so we get a report.
Since this returns to the boot rom before finishing executing
board_init_r() in SPL, add a few bootstage calls so that we can collect
timing from TPL.
For the stash region, use a portion of SRAM, 64KB below the stack top.
This allows the TPL image to be up to nearly 120KB (it is typically about
64KB). SPL normally runs from SDRAM at 0, so can use the same stash
region.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the notrace attribute so that timer functions can be used when
tracing. This is required to avoid infinite loops when recording a trace.
Signed-off-by: Simon Glass <sjg@chromium.org>
The event framework is just that, a framework. Enabling it by itself
does nothing, so we shouldn't ask the user about it. Reword (and correct
typos) around this the option and help text. This also applies to
DM_EVENT and EVENT_DYNAMIC. Only EVENT_DEBUG and CMD_EVENT should be
visible to the user to select, when EVENT is selected.
With this, it's time to address the larger problems. When functionality
uses events, typically via EVENT_SPY, the appropriate framework then
must be select'd and NOT imply'd. As the functionality will cease to
work (and so, platforms will fail to boot) this is non-optional and
where select is appropriate. Audit the current users of EVENT_SPY to
have a more fine-grained approach to select'ing the framework where
used. Also ensure the current users of event_register and also select
EVENT_DYNAMIC.
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reported-by: Oliver Graute <Oliver.Graute@kococonnector.com>
Reported-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Fixes: 7fe32b3442 ("event: Convert arch_cpu_init_dm() to use events")
Fixes: 42fdcebf85 ("event: Convert misc_init_f() to use events")
Fixes: c5ef202557 ("dm: fix DM_EVENT dependencies")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
To quote the author:
So far standard boot lacks a boot menu, although it is possible to create
a rudimentary one using the existing 'bootmenu' command.
Even then, this text-based menu offer only basic functionality and does
not take full advantage of the displays which are common on many devices.
This series provides a 'bootflow menu' command which allows the user to
select from the available bootflows. An attempt is made to show the name
of the available operating systems, by reading more information into the
bootflow. A logo can be read also, where supported, so that this can be
presented to the user when an option is highlighted.
Full use is made of TrueType fonts, if enabled. For cases where only a
serial console is available, it falls back to a simple text-based menu.
All of this is implementing using a new 'expo' construct, a collection of
scenes (like menu screens) which can be navigated by the user to view
information and select options. This is fairly general and should be able
to cope with a wider array of use cases, with less hacking of the menu
code, such as is currently needed for CMD_BOOTEFI_BOOTMGR.
Of course it would be possible to enhance the existing menu rather than
creating a new setup. Instead it seems better to make the existing menu
use expo, if code space permits. It avoids the event-loop problem and
should be more extensible, given its loosely coupled components and use of
IDs instead of pointers. Further motivation is provided in the
documentation.
For now the CLI keypress-decoding code is split out to be used by the new
menu. The key codes defined by menu.h are reused also.
This is of course just a starting point. Some ideas for future work are
included in the documentation.
With CONFIG_DM_USB_GADGET=y, we no longer need any board_usb_*() logic
because:
* the dwc2 driver is DM compatible, and handles its own clock enabling
* the dwc3-meson-g12a glue drivers handles "force mode switching"
Remove all mach-meson/g12a usb code and enable CONFIG_DM_USB_GADGET.
Note: Only configs having both CONFIG_USB_DWC3_MESON_G12A=y *and*
USB_GADGET_DWC2_OTG=y have been updated.
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20221024-meson-dm-usb-v1-2-2ab077a503b9@baylibre.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
For Kirkwood boards, it is necessary to have early malloc in DRAM area
when Driver Model for Serial is enabled. Please see Michael's patch here:
https://lore.kernel.org/u-boot/20220817193809.1059688-20-michael@walle.cc/
This patch enables the early malloc in DRAM for all Kirkwood boards.
Note that this will work for boards that have either non-DM serial
and DM_SERIAL. Also, add the CONFIG_KIRKWOOD_COMMON option to enable
DM_SERIAL as a common option for boards that have been tested.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
We should use the cmd/ directory for commands rather than for common code
used elsewhere in U-Boot. Move the common 'source' code into
image-board.c to achieve this.
The image_source_script() function needs to call run_command_list() so
seems to belong better in the command library. Move and rename it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for starting timer by setting up time stamp generator
registers. This is done only for EL3 i.e. mini U-Boot case.
For other cases, it will be done TF-A.
Add COUNTER_FREQUENCY and IOU_SWITCH_DIVISOR0 to Kconfig so that they
can be tuned as required.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fcd8b0dc4b45a11f5e753afff42f84738ac813da.1673336645.git.michal.simek@amd.com
Sync the px30 dtsi from Linux kernel v6.1.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
It is possible to boot U-Boot proper from a different storage medium
than the one used by the BOOTROM to load the SPL. This information is
stored in the u-boot,spl-boot-device Device Tree property and is
accessible from U-Boot proper so that it has knowledge at runtime where
it was loaded from.
Let's add support for this feature for px30.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
BOOTROM sets a bit in a CPU register so that the software can know from
where the first stage bootloader was booted. One use case for this is to
specify the default loading medium for U-Boot proper to match the one
used by the BOOTROM to load the SPL (same-as-spl in
u-boot,spl-boot-order).
Let's create the mapping between BOOTROM value and Device Tree node
names for MMC devices.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
The grf and cru are only used when no UART base is provided by the user
(defaults to UART2) or for UART1, UART3 and UART5 to be used for the
debug UART. Therefore, let's surround those variable definitions with
the proper checks.
This wasn't an issue before support for UART0 was added, because all
cases were using cru and grf. UART0 only uses pmucru so there's a need
to not define those variables anymore.
Fixes: d0af506625 ("rockchip: px30: support debug uart on UART0")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The Pinephone Pro is another device by PINE64. It's closely related
to the Pinebook Pro of which this initial support is derived from.
Specification:
- A variant of the Rockchip RK3399
- A 6 inch 720*1440 DSI display
- Front and rear cameras
- Type-C interface with alt mode display (DP 1.2) and PD charging
- 4GB LPDDR4 RAM
- 128GB eMMC
- mSD card slot
- An AP6255 module for 802.11ac WiFi and Bluetooth 5
- Quectel EG25-G 4G/LTE modem
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Initial support for the PinePhone Pro has now landed upstream in
Linux 6.1 RC1 so sync the dts from 6.2-rc1 for initial support.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Neural Compute Module 2(Neu2) IO board is an industrial form factor
IO board from Edgeble AI.
General features:
- microSD slot
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, RS232, CAN
- Micro Phone array
- Speaker
- RTC battery slot
- 40-pin expansion
Neu2 needs to mount on top of this IO board in order to create complete
Edgeble Neural Compute Module 2(Neu2) IO platform.
Add support for it.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Add u-boot,dm-spl and u-boot,dm-pre-reloc related properties
for Rockchip RV1126 SoC.
Both eMMC and SD boot are tested in Edgeble Neu2 SoM.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Neural Compute Module 2(Neu2) IO board is an industrial form factor
evaluation board from Edgeble AI.
General features:
- microSD slot
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, RS232, CAN
- Micro Phone array
- Speaker
- RTC battery slot
- 40-pin expansion
Neu2 needs to mount on top of this IO board in order to create complete
Edgeble Neural Compute Module 2(Neu2) IO platform.
Add support for it.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Neural Compute Module 2(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RV1126 from Edgeble AI.
General features:
- Rockchip RV1126
- 2/4GB LPDDR4
- 8/16/32GB eMMC
- 2x MIPI CSI2 FPC connector
- Fn-link 8223A-SR WiFi/BT
Industrial grade (-40 °C to +85 °C) version of the same class of module
called Neu2k powered with Rockchip RV1126K.
Neu2 needs to mount on top of Edgeble IO boards for creating complete
platform solutions.
Add support for it.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Unsecure the dram area so that MMC, USB, and SFC controllers
can able to read data from dram.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip RV1126 is a high-performance vision processor SoC
for IPC/CVR, especially for AI related application.
Add arch core support for it.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I22fde40ec375e3c6aba39808abf252edc45d4b04
RV1126 is a high-performance vision processor SoC for IPC/CVR,
especially for AI related application.
It is based on quad-core ARM Cortex-A7 32-bit core which integrates
NEON and FPU. There is a 32KB I-cache and 32KB D-cache for each core
and 512KB unified L2 cache. It has build-in NPU supports INT8/INT16
hybrid operation and computing power is up to 2.0TOPs.
This patch add basic core dtsi support.
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Add full ddr pctl registers and bit masks for px30.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
DDR chip capacity is computed based on GRF split in some
Rockchip SoC's like PX30 and RV1126.
Add split argument in ddr print info so-that the respective
ddr driver will pass the grf split.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This synchronizes the Device Trees related to Puma RK3399 SoM with Linux
kernel next-20221114 to include two important changes pertaining to
eMMC and SD card instability.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
By default, the PX30 is configured for watchdog and tsadc to trigger a
second global reset which is a more permissive reset than first global
reset.
From TRM part 1 "2.3 System Reset Solution":
glb_srstn_1 will reset the all logic, and
glb_srstn_2 will reset the all logic except GRF, SGRF and all GPIOs.
This enforces that the watchdog and tsadc trigger glb_srstn_1 as
similarly done for RK3399 in U-Boot (in SDRAM driver for some reason?),
TF-A and Coreboot.
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The eMMC card has two supplies, VCC and VCCQ. The VCC supplies the NAND
array and the VCCQ supplies the bus. On Condor, the VCC is connected to
3.3V rail, while the VCCQ is connected to 1.8V rail. Adjust the pinmux
to match the bus, which is always operating in 1.8V mode.
Based on Linux commit 69efe4bbeda50745 ("arm64: dts: renesas: condor:
Switch eMMC bus to 1V8") from Wolfram Sang
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
This board requires SPI NOR fast-read, otherwise the SPI NOR
access returns corrupted data. Enable the fast-read explicitly
in DT as it has been disabled in the MTD subsystem by commit
d008190920 ("mtd: spi-nor: Mask out fast read if not requested in DT")
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Add calibration support for stm32-adc
Linux kernel v6.1 DT synchronization for stm32mp151.dtsi
stm32mp157a-dk1-scmi-u-boot.dtsi update
Add support of OP-TEE and STM32MP13x in bsec driver
ECDSA various fixes for stm32mp
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Merge tag 'u-boot-stm32-20230113' of https://source.denx.de/u-boot/custodians/u-boot-stm
Add driver to manage onboard hub supplies
Add calibration support for stm32-adc
Linux kernel v6.1 DT synchronization for stm32mp151.dtsi
stm32mp157a-dk1-scmi-u-boot.dtsi update
Add support of OP-TEE and STM32MP13x in bsec driver
ECDSA various fixes for stm32mp
With U-Boot having access to ROM API call table, it is possible to use
the ROM API call it authenticate e.g. signed kernel fitImages using the
BootROM ECDSA support. Make this available by pulling the ECDSA BootROM
call support from SPL-only guard.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
The ROM API table pointer is no longer accessible from U-Boot, fix
this by passing the ROM API pointer through. This makes it possible
for U-Boot to call ROM API functions to authenticate payload like
signed fitImages.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
The STM32MP15xx platform currently comes with two incompatible
implementations of save_boot_params() weak function override.
Factor the save_boot_params() implementation into common cpu.c
code and provide accessors to read out both ROM API table address
and DT address from any place in the code instead.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
In case Dcache is enabled while the ECDSA authentication function is
called via BootROM ROM API, the MMU tables are set up and the BootROM
region is not marked as executable, so an attempt to run code from it
results in a hang. Mark the BootROM region as executable as suggested
by Patrick to prevent the hang.
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
_relocate() needs the information in .rela* for self relocation
of the EFI binary.
Fixes: d7ddeb66a6 ("efi_loader: fix building aarch64 EFI binaries")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
The fs_loader device is used to pull in settings via the chosen node.
However, there was no library function for this, so arria10 was doing it
explicitly. This function subsumes that, and uses ofnode_get_chosen_node
instead of navigating the device tree directly. Because fs_loader pulls
its config from the environment by default, it's fine to create a device
with nothing backing it at all. Doing this allows enabling
CONFIG_FS_LOADER without needing to modify the device tree.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Add support for "st,stm32mp13-bsec" for STM32MP13x in the
bsec driver based on OP-TEE pseudo TA STM32MP BSEC.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
When OP-TEE is used, the SMC for BSEC management are not available and
the STM32MP BSEC pseudo TA must be used (it is mandatory for STM32MP13
and it is a new feature for STM32MP15x).
The BSEC driver try to open a session to this PTA BSEC at probe
and use it for OTP read or write access to fuse or to shadow.
This patch also adapts the commands stm32key and stboard to handle
the BSEC_LOCK_PERM lock value instead of 1.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Remove unnecessary return in stm32mp_bsec_write_lock and replace tab
by space for plat_auto opts.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The timer units in the stm32mp15x CPUs have interrupts, depending on the
timer flavour either one "global" or four dedicated ones. Add the irqs
to the timer units on stm32mp15x.
Sync the DT Files with linux kernel v6.1 and with commit a9b70102253ce
("ARM: dts: stm32: Add timer interrupts on stm32mp15")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Remove unnecessary space in device tree stm32mp15xx-dkx.dtsi.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The include file stm32mp1-clksrc.h is not necessary for the SCMI STM32MP15
dtsi files as the clock tree is not defined in the U-Boot SCMI device tree;
these SCMI device tree only support TFABOOT with stm32mp15_defconfig,
SPL with the basic boot defconfig is not supported.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support for USB2514B onboard hub on stm32mp157c EV1 board. The HUB
is supplied by a 3v3 PMIC regulator.
[backport from linux ad9591b01d24]
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
phy-stm32-usbphyc bindings uses a connector node with vbus-supply
property.
[backport from linux 43e55d778a6b]
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Before this was named just evm, which doesn't match the naming
of the other TI board file directory and makes it look like a
common directory for evms. Name this omap3evm.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Derald Woods <woods.technical@gmail.com>
KASLR address is needed to boot fully functional Android.
KASLR is set by primary bootloader, and since u-boot is used
as a secondary bootloader(replacing kernel) on sdm845 platform,
KASLR may be found by comparing memory chunks at relocaddr over
supposed KASLR range.
Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Texas Instruments has begun enabling security settings on the SoCs it
produces to instruct ROM and TIFS to begin protecting the Security
Management Subsystem (SMS) from other binaries we load into the chip by
default.
One way ROM and TIFS do this is by enabling firewalls to protect the
OCSRAM and HSM RAM regions they're using during bootup.
The HSM RAM the wakeup SPL is in is firewalled by TIFS to protect
itself from the main domain applications. This means the 'bootindex'
value in HSM RAM, left by ROM to indicate if we're using the primary
or secondary boot-method, must be moved to OCSRAM (that TIFS has open
for us) before we make the jump to the main domain so the main domain's
bootloaders can keep access to this information.
Signed-off-by: Bryan Brattlof <bb@ti.com>
The boot mode detection assumes that BOOT_DEVICE_MMC2 should always
result in MMCSD_MODE_FS, but MMCSD_MODE_RAW is also a valid option for
this port.
The current logic also avoids looking at the bootmode pin strapping,
which should be the primary means of determining whether a device is
being booted in MMCSD_MODE_EMMCBOOT mode.
Switch around the logic to check the boot mode to determine whether the
eMMC boot mode is expected or MMC/SD boot mode. From there we can look
at the boot mode config if in MMC/SD boot mode to determine whether to
attempt RAW or FS based booting.
This change allows U-Boot to also be successfully booted from RAW
offsets in addition to from a filesystem.
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
It is incorrect to keep commands in the arch/ folder.
Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230110105650.54580-3-avromanov@sberdevices.ru
[narmstrong: moved after cmd/sound in index.rst]
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
This function can be used by other modules. Also add comments.
Signed-off-by: Alexey Romanov <avromanov@sberdevices.ru>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20230110105650.54580-2-avromanov@sberdevices.ru
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
TI phy requires a reset before PHY address detection to make sure
correct strapping via MIO is detected. Facilitate the same using
ethernet-phy-id compatible string. GPIO reset entry will be added in
a separate commit.
This support is present in RevA but needs to be extended to RevB/1.0/1.1
versions which are built on top.
Fixes: 13622c7a9d ("arm64: zynqmp: Describe TI phy as ethernet-phy-id")
Signed-off-by: Harini Katakam <harini.katakam@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6d500a83a787316353d4b26c75d1b51d29e3730e.1670854455.git.michal.simek@amd.com
The Cadence GEM/MACB driver now utilizes the platform-level reset on the
ZynqMP platform. Add reset definitions to the ZynqMP platform device
tree to allow this to be used.
Linux upstream commit (e461bd6f43f4e568f7436a8b6bc21c4ce6914c36).
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/14e3637735dbc626659e96d142f04a63398362f8.1670590595.git.michal.simek@amd.com
When building with binutils 2.39 warnings
*_efi.so has a LOAD segment with RWX permissions
occur.
Use SHF_WRITE | SHF_ALLOC as section flags for the .data section.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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Merge tag 'u-boot-at91-2023.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next
First set of u-boot-at91 features for the 2023.04 cycle:
This feature set includes the new DM-based NAND flash driver (old non-DM
driver is still kept for backwards compatibility), and the move to DM
NAND flash driver for sam9x60ek board. Feature set also includes
devicetree alignment for sama7g5 with Linux, devicetree alignment on USB
with Linux for all boards (sama5, sam9x60), chip id for sama7g5, minor
configs and tweaks.
commit 777aaaa706 ("common/memsize.c: Fix get_effective_memsize() to check
for overflow") because the effective DDR effective size is reduce by 4KiB
and sometime the board hang on boot
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Merge tag 'u-boot-stm32-20230106' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- stm32mp: Fix board_get_usable_ram_top(): workaround to avoid issue after the
commit 777aaaa706 ("common/memsize.c: Fix get_effective_memsize() to check
for overflow") because the effective DDR effective size is reduce by 4KiB
and sometime the board hang on boot
The QSPI is accessed via the RPC-IF, but the compatible flags
previously used a different name. This compatibel name was changed
which broke the ability to access the QSPI. Fix this by removing
the custom naming reference.
Fixes: 68083b897b ("renesas: Fix RPC-IF compatible values")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Since commit 2f96d4dd95 ("imx7s/d: synchronise device trees with linux")
the imx7d-pico board no longer boots.
The reason is that prior to the above commit there was an explicit
inclusion of arch/arm/dts/imx7d-pico-u-boot.dtsi inside imx7d-pico.dtsi.
After the syncing with the Linux upstream dtsi, this u-boot.dtsi inclusion
is gone and the board fails to boot.
U-Boot uses the imx7d-pico-pi.dtb file, so rename the u-boot.dtsi to
imx7d-pico-pi-u-boot.dtsi which gets included automatically by U-Boot
standard make logic and makes the board boot again.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Do not access gd->ram_size and assume this is actual valid RAM size. Since commit
777aaaa706 ("common/memsize.c: Fix get_effective_memsize() to check for overflow")
the RAM size may be less than gd->ram_size , call get_effective_memsize() to get
the limited value instead.
The aforementioned commit makes STM32MP15xx boards with 1 GiB of DRAM
at 0xc0000000 hang on boot, which is a grave defect.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add the required pinctrl, gpio and phy properties required by the
USB DT nodes of the sama7g5ek boards. Since these have not yet been
defined in upstream Linux, place them in the U-Boot specific DT file.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Define the USB and UTMI DT nodes for the sama7g5 SoC's. Since these have
not yet been defined in upstream Linux, place them in the U-Boot specific
DT file.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add the required pinctrl and gpio properties required by the USB DT
nodes of the sam9x60ek boards.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Add the required pinctrl and gpio properties needed by the USB DT nodes
of the sam9x60_curiosity boards.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
While our EFI binaries execute without problems on EDK II they crash on
a Lenovo X13s. Let our binaries look more like what EDK II produces:
* move all writable data to a .data section
* align sections to 4 KiB boundaries (matching EFI page size)
* remove IMAGE_SCN_LNK_NRELOC_OVFL from .reloc section flags
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Remove init of UART-clock and UART-reset in arch_cpu_init(). Add DEBUG_UART
to s5p4418_nanopi2_defconfig.
Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
All uniphier v7 SoCs have cortex-a9 and use cortex-a9 global timer
in a simple implementation. Now DM_TIMER of it is available
on 35751c7f3f ("timer: sti: convert sti-timer to arm a9 global timer"),
so let's switch to it.
The old driver reads the lower 32bits of counter field
and sets the prescaler as 50 with PERIPHCLK(=50MHz),
so the global timer works as a 32-bit 1MHz timer.
The DM_TIMER uses the whole 64bits with no prescaler,
so the global timer works as a 64-bit PERIPHCLK timer.
CONFIG_SYS_HZ_CLOCK is set as the default PERIPHCLK frequency,
if there is no 'clocks' property in devicetree.
Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
The 'base' GPIO controller property is unused in u-boot and Linux. It is
also not documented in the binding. So drop it.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
'active_clk_edges' and 'chipselect_num' SPI controller properties are
unused in u-boot and Linux. They are also not documented in the binding.
So drop them.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
The correct value for 'entry-method' in the idle-states binding is 'psci',
not 'arm,psci'. It hasn't mattered because it isn't used by the OS.
Signed-off-by: Rob Herring <robh@kernel.org>
The "arm,armv7-timer-mem" schema defines the address sizes for child
nodes to be 32-bit as there's no need for 64-bit offsets and sizes of
the child 'frame' nodes.
Signed-off-by: Rob Herring <robh@kernel.org>
DT node names should follow generic names defined in the DT spec. These
are also now checked by dtschema tools.
Signed-off-by: Rob Herring <robh@kernel.org>
Add the definition of the pinctrl for the MCU domain.
Same as kernel commit 500e6dfbb465531150ac6e2ff0856dd357ddc8a4
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
As discussed previously [1,2], the source command is not safe to use with
verified boot unless there is a key with required = "images" (which has its
own problems). This is because if such a key is absent, signatures are
verified but not required. It is assumed that configuration nodes will
provide the signature. Because the source command does not use
configurations to determine the image to source, effectively no
verification takes place.
To address this, allow specifying configuration nodes. We use the same
syntax as the bootm command (helpfully provided for us by fit_parse_conf).
By default, we first try the default config and then the default image. To
force using a config, # must be present in the command (e.g. `source
$loadaddr#my-conf`). For convenience, the config may be omitted, just like
the address may be (e.g. `source \#`). This also works for images
(`source :` behaves exactly like `source` currently does).
[1] https://lore.kernel.org/u-boot/7d711133-d513-5bcb-52f2-a9dbaa9eeded@prevas.dk/
[2] https://lore.kernel.org/u-boot/042dcb34-f85f-351e-1b0e-513f89005fdd@gmail.com/
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Two callers of image_source_script specify an image name. However, both
use the deprecated @ syntax, indicating that they have not been updated
in a while. If CONFIG_FIT_SIGNATURE is enabled, we will reject such
names outright. Back in commit 152576a598 ("stm32mp: stm32prog: handle
U-Boot script in flashlayout alternate"), we even renamed one of the
nodes. Instead of hard-coding a script image name, just use the default
image.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
For the 64bit EFI binaries that we create set the
IMAGE_FILE_LARGE_ADDRESS_AWARE characteristic in the PE-COFF header
to indicate that they can handle addresses above 2 GiB.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
A number of CONFIG symbols have crept in that are never referenced in
code, so drop them here. Further, we have two symbols being enabled
in headers while already enabled correctly in Kconfig, so these lines
can also be removed.
Signed-off-by: Tom Rini <trini@konsulko.com>
As of 2f41ade79e ("linker: Modify linker scripts to be more generic")
we can use the same linker script for SPL and TPL and not have to make
use of #undef tricks. Remove these last remnants.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The way that the timer support is currently done for exynos/nexell
platforms relies on the legacy PWM infrastructure, and that needs to be
updated. However, we really cannot safely undef CONFIG_DM_PWM to build
the timer.c file without warnings. For now, rename the relevant legacy
functions to be prefixed with s5p_ and add prototypes to the arch pwm.h
files.
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Stefan Bosch <stefan_b@posteo.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_TEGRA_ENABLE_UARTA
CONFIG_TEGRA_ENABLE_UARTB
CONFIG_TEGRA_ENABLE_UARTC
CONFIG_TEGRA_ENABLE_UARTD
CONFIG_TEGRA_SPI
CONFIG_TEGRA_UARTA_GPU
CONFIG_TEGRA_UARTA_SDIO1
CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3
CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1
Signed-off-by: Tom Rini <trini@konsulko.com>
When the ti814x_evm config was removed most, but not all, of the
relevant support code was remove. Get rid of what was missed.
Fixes: 50b5326868 ("ti814x: Remove platform")
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_FLASH_SPANSION_S29WS_N
CONFIG_FLASH_VERIFY
CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
CONFIG_FSL_ISBC_KEY_EXT
CONFIG_FSL_TRUST_ARCH_v1
CONFIG_FSL_SDHC_V2_3
CONFIG_MAX_DSP_CPUS
CONFIG_MIU_2BIT_INTERLEAVED
CONFIG_SERIAL_BOOT
CONFIG_SPI_BOOTING
CONFIG_X86EMU_RAW_IO
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_DM9000_BYTE_SWAPPED
CONFIG_DM9000_NO_SROM
CONFIG_DM9000_USE_16BIT
CONFIG_DM9000_DEBUG
CONFIG_MXC_GPT_HCLK
CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
Signed-off-by: Tom Rini <trini@konsulko.com>
This symbol is enabled for all exynos5 platforms, move to Kconfig and
select it.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
The PMC node is not an interrupt provider, so it must not have
interrupt-cells.
This fixes the warning (on newer DTC):
arch/arm/dts/sama5d2.dtsi:82.22-602.6: Warning (interrupt_provider): /ahb/apb/pmc@f0014000: '#interrupt-cells' found, but node is not an interrupt provider
Fixes: 2c4b2dd289 ("ARM: at91/dt: Add device tree for SAMA5D2 Xplained")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Add SAMA7G5 series chip id definitions to align with linux SoC driver.
Add support for SAMA7G5 System-In-Package (SIP):
SAMA7G54D1G, SAMA7G54D2G, SAMA7G54D4G.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Align the DT with current Linux 6.1 tree, wherever possible.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Add information that will be needed for enabling the UEFI capsule
update feature on the RockPi4 boards. With the feature enabled, it
would be possible to update the idbloader and u-boot.itb images on the
RockPi4B and RockPi4C variants.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add functions needed to support the UEFI capsule update feature on
rockchip boards. Currently, the feature is being enabled on the
RockPi4 boards with firmware images residing on GPT partitioned
storage media.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The i2c locks up when initialized before relocation, and it stays broken
in Linux as well breaking the ability to boot Linux.
The i2c bus and pmic was not actually used in pre-reloc before
commit ad607512f5 ("power: pmic: rk8xx: Support sysreset shutdown method")
The cause is not known.
This is board-specific, other boards that do not add the option to
include the i2c bus in pre-reloc DT are not affected.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The GPT table is taking the first 34 sectors, which amounts to 0x4400
bytes. Saving the environment below this address in storage will corrupt
the GPT table.
While technically the table ends at 0x4400, some tools (e.g. bmaptool)
are rounding everything to the logical block size (0x1000), so it is
safer to make it point to 0x5000 so that the environment could still
persist when flashing a sparse image with bmaptool or similar tools.
Obviously, the default 0x4000 environment size does not work anymore, so
let's set it to 0x3000 so it does fill the gap between the GPT table
(rounded to 0x1000) and the start of the idbloader.img.
Fixes: 56f580d3eb ("rockchip: dts: rk3399-puma: put environment (in MMC/SD configurations) before SPL")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Move all rk3128 u-boot specific properties in separate dtsi files.
Sort emmc node.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to update the DT for rk3128
sync the clock dt-binding header.
This is the state as of v6.0 in Linux.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip platform use TPL to do the DRAM initialize for all the SoCs,
if TPL is not available, means no available DRAM init program, and the
u-boot-rockchip.bin is not functionable.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I2299f1eddce5aa7d5fb1a3fb4d8aeaa995b397fa
The legacy Allwinner code is cluttered with #ifdef's, some of them even
nested, which makes the code hard to read and error prone.
Eventually we will get rid of most of them, but for now let's at least
annotate the #endif lines with the corresponding symbol the bracket
started with.
Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
The functions board_fit_image_post_process() and board_tee_image_process()
are not actually board specific (despite their names). Any board using the
OMAP2 family can use these functions. Move them to boot-common.c.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add OSPI Support such that this device can boot up using OSPI Flash.
Also can use the flash for other purposes if required from uboot.
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Introduce the auto-generated clock tree and power domain data needed to
attach the am62a into the power-domain and clock frameworks of uboot
Signed-off-by: Bryan Brattlof <bb@ti.com>
Introduce the base dts files needed for u-boot or to augment the
linux dtbs for use in the u-boot-spl and u-boot binaries
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Introduce the basic am62a7 SoC dtbs from the v6.1-rc3 tag of the linux
kernel along with the new am62a specific pinmux definition that we will
use to generate the dtbs for the u-boot-spl and u-boot binaries
Co-developed-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Enable the EBI and NAND flash controller. Define the pinctrl and
partition table
Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
- Kautuk's semihosting patch:
move semihosting library from arm directory to common place and add
RISC-V support
- Zong's Kconfig patch:
use "imply" instead of "select" to allow user to decide if
SPL_SEPARATE_BSS should be selected
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Merge tag 'u-boot-at91-fixes-2023.01-b' of https://source.denx.de/u-boot/custodians/u-boot-at91
Second set of u-boot-at91 fixes for the 2023.01 cycle:
This is a single tiny fix that allows the correct name for one pin on
sama7g5 device. People with DT coming from Linux will have build errors
without this if they add NAND device.
We factor out the arch-independent parts of the ARM semihosting
implementation as a common library so that it can be shared
with RISC-V.
Signed-off-by: Kautuk Consul <kconsul@ventanamicro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
As DM_ETH is required for all network drivers, it's now safe to remove
the non-DM_ETH support code. Doing this removes some board support code
which was also unused. Finally, this removes some CONFIG symbols that
otherwise needed to be migrated to Kconfig, but were unused in code now.
Signed-off-by: Tom Rini <trini@konsulko.com>
We only need to enable DM_ETH if we have a networking driver. All
networking drivers depend on DM_ETH being enabled, and their selection
ensures DM_ETH will be enabled.
Signed-off-by: Tom Rini <trini@konsulko.com>
The pl18x MMCI driver does not use the interrupt-names property,
the binding document has been updated to recommend this property
be unused, remove it.
Backport of Marek's Linux patch:
https://lore.kernel.org/linux-arm-kernel/20221013221242.218808-3-marex@denx.de/
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
On STM32MP135F-DK, the SD card detect GPIO is GPIOH4.
Backport of the Linux patch:
https://lore.kernel.org/linux-arm-kernel/20220921160334.3227138-1-yann.gautier@foss.st.com/
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Adds support of Clock and Reset drivers for STM32MP13 platform.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
It is a bad idea, and more modern toolchains will fail, if you declare
an assembly function to be global and then weak, instead of declaring it
weak to start with. Update assorted assembly files to use the WEAK macro
directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Pali Rohár <pali@kernel.org>
This option controls using board/samsung/common/misc.c, so add a Kconfig
file there as well and select it from the boards which use this
functionality.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do
not easily transition to Kconfig. In many cases they likely should come
from the device tree instead. Move these out of CONFIG namespace and in
to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_SYS_TIMER_COUNTS_DOWN
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_NOBQFMAN
CONFIG_SYS_DPAA_DCE
CONFIG_SYS_DPAA_FMAN
CONFIG_SYS_DPAA_PME
CONFIG_SYS_DPAA_RMAN
CONFIG_SYS_PMAN
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_PCI and
CONFIG_SYS_PCIE namespace do not easily transition to Kconfig. In many
cases they likely should come from the device tree instead. Move these
out of CONFIG namespace and in to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_SYS_OMAP_ABE_SYSCK
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NUM
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NS16550
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_SPL_NS16550_MIN_FUNCTIONS
CONFIG_SYS_NS16550_MEM32
CONFIG_SYS_NS16550_PORT_MAPPED
CONFIG_SYS_NS16550_REG_SIZE
CONFIG_SYS_NS16550_SERIAL
To do this we also introduce CONFIG_SPL_SYS_NS16550_SERIAL so that
platforms can enable the legacy driver here for SPL.
Signed-off-by: Tom Rini <trini@konsulko.com>
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
ZynqMP mini configurations are not using IPI driver and enabling this is
adding additional ~1200 Bytes (depends on configuration).
This ends up in situation that there is no enough space in OCM for
relocation that's why disable this driver for all mini configurations.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c71bab3927cb71ae517d9c21f59f3d5cf0caf712.1669734580.git.michal.simek@amd.com
The commit ed35de6170 ("Convert CONFIG_ZYNQMP_PSU_INIT_ENABLED to
Kconfig") converted CONFIG_ZYNQMP_PSU_INIT_ENABLED symbol and enabled it by
default which is not correct configuration.
Intention of this config was to have it enabled by default for SPL and
provide an option to users to also do low level initialization directly
from U-Boot.
That's why it is necessary to define second symbol with SPL marking in it
and properly use symbols depends on usage in Makefile.
Also disable ZYNQMP_PSU_INIT_ENABLED from boards which enables it by
default. CONFIG_SPL_ZYNQMP_PSU_INIT_ENABLED is enabled by default when SPL
is enabled.
Reported-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d5fcbd66b05bf0d7ef594e66464ee23b48c5e4cc.1669969083.git.michal.simek@amd.com
When Linux boot takes over control of the pmu
(by signaling PM_INIT_FINALIZE via ipi), pmu will switch off 'unused'
rpu cores. The Xilinx zynqmp fsbl prevents switching off those cores by
marking rpu cores as 'used' when loading code partitions to those cores.
The current u-boot SPL is missing this behaviour, which results in
halting rpu cores during Linux boot.
This commit mimics the xilinx zynqmp fsbl behavior by marking r5 cores as
used when they are released during boot.
Signed-off-by: Lukas Funke <lukas.funke@weidmueller.com>
Signed-off-by: Lukas Funke <lukas.funke-oss@weidmueller.com>
Link: https://lore.kernel.org/r/20221028121547.26464-2-lukas.funke-oss@weidmueller.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
The SanCloud BBE requires the same dtb nodes to be present in the SPL as
the AM335x EVM.
The SanCloud BBE Lite also requires the SPI flash node and all
dependencies to be present in the SPL to support SPI boot.
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
