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arm: uniphier: use DM_TIMER of arm a9 global timer

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All uniphier v7 SoCs have cortex-a9 and use cortex-a9 global timer
in a simple implementation. Now DM_TIMER of it is available
on 35751c7f3f ("timer: sti: convert sti-timer to arm a9 global timer"),
so let's switch to it.

The old driver reads the lower 32bits of counter field
and sets the prescaler as 50 with PERIPHCLK(=50MHz),
so the global timer works as a 32-bit 1MHz timer.

The DM_TIMER uses the whole 64bits with no prescaler,
so the global timer works as a 64-bit PERIPHCLK timer.

CONFIG_SYS_HZ_CLOCK is set as the default PERIPHCLK frequency,
if there is no 'clocks' property in devicetree.

Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
This commit is contained in:
Dai Okamura 2022-12-09 20:33:48 +09:00 committed by Tom Rini
parent ef75d482aa
commit 872413bb0a
7 changed files with 10 additions and 43 deletions
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4
arch/arm/dts/uniphier-v7-u-boot.dtsi
View file

@ -2,6 +2,10 @@
soc {
u-boot,dm-pre-reloc;
timer@60000200 {
u-boot,dm-pre-reloc;
};
serial@54006800 {
u-boot,dm-pre-reloc;
};

1
arch/arm/mach-uniphier/Kconfig
View file

@ -12,6 +12,7 @@ config ARCH_UNIPHIER_V7_MULTI
select ARMV7_NONSEC
select CPU_V7A
select CPU_V7_HAS_NONSEC
select ARM_GLOBAL_TIMER if TIMER
config ARCH_UNIPHIER_V8_MULTI
bool "UniPhier V8 SoCs"

2
arch/arm/mach-uniphier/arm32/Makefile
View file

@ -8,5 +8,3 @@ obj-y += late_lowlevel_init.o
obj-y += cache-uniphier.o
obj-$(CONFIG_ARMV7_PSCI) += psci.o psci_smp.o
endif
obj-y += timer.o

39
arch/arm/mach-uniphier/arm32/timer.c
View file

@ -1,39 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
*/
#include <config.h>
#include <init.h>
#include <linux/io.h>
#include "arm-mpcore.h"
#define PERIPHCLK (50 * 1000 * 1000) /* 50 MHz */
#define PRESCALER ((PERIPHCLK) / (CFG_SYS_TIMER_RATE) - 1)
static void *get_global_timer_base(void)
{
void *val;
asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (val) : : "memory");
return val + GLOBAL_TIMER_OFFSET;
}
unsigned long timer_read_counter(void)
{
/*
* ARM 64bit Global Timer is too much for our purpose.
* We use only lower 32 bit of the timer counter.
*/
return readl(get_global_timer_base() + GTIMER_CNT_L);
}
int timer_init(void)
{
/* enable timer */
writel(PRESCALER << 8 | 1, get_global_timer_base() + GTIMER_CTRL);
return 0;
}

2
configs/uniphier_ld4_sld8_defconfig
View file

@ -13,6 +13,8 @@ CONFIG_SYS_LOAD_ADDR=0x85000000
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x84000000
CONFIG_SYS_MONITOR_LEN=2097152
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
CONFIG_TIMESTAMP=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot"

2
configs/uniphier_v7_defconfig
View file

@ -13,6 +13,8 @@ CONFIG_SYS_LOAD_ADDR=0x85000000
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x84000000
CONFIG_SYS_MONITOR_LEN=2097152
CONFIG_TIMER=y
CONFIG_SPL_TIMER=y
CONFIG_TIMESTAMP=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot"

3
include/configs/uniphier.h
View file

@ -36,8 +36,7 @@
BOOT_TARGET_DEVICE_USB(func)
#if !defined(CONFIG_ARM64)
/* Time clock 1MHz */
#define CFG_SYS_TIMER_RATE 1000000
#define CFG_SYS_HZ_CLOCK 50000000
#endif
#define CFG_SYS_NAND_REGS_BASE 0x68100000