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arm64: zynqmp: Added GEM reset definitions
The Cadence GEM/MACB driver now utilizes the platform-level reset on the ZynqMP platform. Add reset definitions to the ZynqMP platform device tree to allow this to be used. Linux upstream commit (e461bd6f43f4e568f7436a8b6bc21c4ce6914c36). Signed-off-by: Robert Hancock <robert.hancock@calian.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/14e3637735dbc626659e96d142f04a63398362f8.1670590595.git.michal.simek@amd.com
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1 changed files with 4 additions and 0 deletions
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@ -540,6 +540,7 @@
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iommus = <&smmu 0x874>;
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power-domains = <&zynqmp_firmware PD_ETH_0>;
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resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>;
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reset-names = "gem0_rst";
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};
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gem1: ethernet@ff0c0000 {
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@ -554,6 +555,7 @@
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iommus = <&smmu 0x875>;
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power-domains = <&zynqmp_firmware PD_ETH_1>;
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resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;
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reset-names = "gem1_rst";
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};
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gem2: ethernet@ff0d0000 {
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@ -568,6 +570,7 @@
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iommus = <&smmu 0x876>;
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power-domains = <&zynqmp_firmware PD_ETH_2>;
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resets = <&zynqmp_reset ZYNQMP_RESET_GEM2>;
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reset-names = "gem2_rst";
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};
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gem3: ethernet@ff0e0000 {
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@ -582,6 +585,7 @@
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iommus = <&smmu 0x877>;
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power-domains = <&zynqmp_firmware PD_ETH_3>;
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resets = <&zynqmp_reset ZYNQMP_RESET_GEM3>;
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reset-names = "gem3_rst";
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};
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gpio: gpio@ff0a0000 {
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