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arm64: zynqmp: Describe TI phy as ethernet phy ID on ZCU102 RevB & up

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TI phy requires a reset before PHY address detection to make sure
correct strapping via MIO is detected. Facilitate the same using
ethernet-phy-id compatible string. GPIO reset entry will be added in
a separate commit.
This support is present in RevA but needs to be extended to RevB/1.0/1.1
versions which are built on top.

Fixes: 13622c7a9d ("arm64: zynqmp: Describe TI phy as ethernet-phy-id")
Signed-off-by: Harini Katakam <harini.katakam@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6d500a83a787316353d4b26c75d1b51d29e3730e.1670854455.git.michal.simek@amd.com
This commit is contained in:
Harini Katakam 2022-12-12 15:14:17 +01:00 committed by Michal Simek
parent ef440787da
commit 4664a63cc7
1 changed files with 13 additions and 9 deletions
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22
arch/arm/dts/zynqmp-zcu102-revB.dts
View file

@ -16,16 +16,20 @@
&gem3 {
phy-handle = <&phyc>;
phyc: ethernet-phy@c {
reg = <0xc>;
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,dp83867-rxctrl-strap-quirk;
/* reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>; */
mdio: mdio {
phyc: ethernet-phy@c {
#phy-cells = <0x1>;
compatible = "ethernet-phy-id2000.a231";
reg = <0xc>;
ti,rx-internal-delay = <0x8>;
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,dp83867-rxctrl-strap-quirk;
/* reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>; */
};
/* Cleanup from RevA */
/delete-node/ ethernet-phy@21;
};
/* Cleanup from RevA */
/delete-node/ ethernet-phy@21;
};
/* Fix collision with u61 */