Currently the controller by default enables the Receive Detect feature in P3
mode in USB 3.0 PHY. However, USB 3.0 PHY does not reliably support receive
detection in P3 mode.
Enabling the USB3 controller to configure USB in P2 mode whenever the Receive
Detect feature is required.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
This is required for better performance, and performs below tuning:
1. Enable burst length set, and define it as 4/8/16.
2. Set burst request limit to 16 requests.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
USB ULPI PHY reset signals are typically active low. Consequently, they
should be marked as GPIO_ACTIVE_LOW in device tree, and indeed they are in
the Linux kernel DTs, and in DT properties that U-Boot doesn't yet use.
However, in DT properties that U-Boot does use, the value has been set to
0 (== GPIO_ACTIVE_HIGH) to work around a bug in U-Boot.
This change fixes the DT to correctly represent the HW, and fixes the
Tegra USB driver to cope with the fact that dm_gpio_set_value() internally
handles any inversions implied by the DT value GPIO_ACTIVE_LOW.
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
To enable this driver on Armada 7K/8K this patch adds the compatibility
property to the list.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Neta Zur Hershkovits <neta@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Omri Itach <omrii@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
This patch adds DM based support for the Armada 3700 EHCI controller.
The address windows don't need to get configured in this case. The
difference here is detected via DT compatible property at runtime.
With this support and the DM xHCI driver, both XHCI and eHCI can be
used simultaniously on the MVEBU boards now.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Acked-by: Marek Vasut <marex@denx.de>
This patch adds DM based support for the xHCI USB 3.0 controller
integrated in the Armada 3700 SoC. It may be extended to be used
by other MVEBU SoCs as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Kostya Porotchkin <kostap@marvell.com>
Cc: Wilson Ding <dingwei@marvell.com>
Cc: Victor Gu <xigu@marvell.com>
Cc: Hua Jing <jinghua@marvell.com>
Cc: Terry Zhou <bjzhou@marvell.com>
Cc: Hanna Hawa <hannah@marvell.com>
Cc: Haim Boot <hayim@marvell.com>
Acked-by: Marek Vasut <marex@denx.de>
This driver is designed in a generic manner, so resets should be
handled generically as well.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Now, include/linux/errno.h is a wrapper of <asm-generic/errno.h>.
Replace all include directives for <asm-generic/errno.h> with
<linux/errno.h>.
<asm-generic/...> is supposed to be included from <asm/...> when
arch-headers fall back into generic implementation. Generally, they
should not be directly included from .c files.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Add drivers/usb/host/xhci-rockchip.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content. (both just wrap <asm-generic/errno.h>)
Replace all include directives for <asm/errno.h> with <linux/errno.h>.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini <trini@konsulko.com>
The remove callbacks of EHCI drivers are often just a wrapper of
ehci_deregister.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
This patch add support for rockchip dwc3 controller, which corresponding
to the two type-C port on rk3399 evb.
Only support usb2.0 currently for we have not enable the usb3.0 phy
driver and PD(fusb302) driver.
Signed-off-by: MengDongyang <daniel.meng@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This driver has not been converted to Driver Model, and it is an
obstacle to migrate other block device drivers. Remove it for now.
The UniPhier SoCs already use a DM-based EHCI driver, so now
ARCH_UNIPHIER can select DM_USB.
These two changes must be done atomically because removing the
legacy driver causes a build error.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add driver model support while retaining the existing legacy code.
This allows the driver to support boards that have converted to
driver model as well as those that have not.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Simon Glass <sjg@chromium.org>
Moves code from ehci_hcd_init to new function ehci_fsl_init
which can be re-used in CONFIG_DM_USB.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
The meaning of CONFIG_USB in U-Boot is different from that in Linux.
As you see in drivers/usb/Kconfig of Linux, CONFIG_USB enables the
USB host controller support, while CONFIG_USB_SUPPORT is used to
enable the whole of the USB sub-system.
When I added CONFIG_USB into Kconfig by commit 6e7e9294d3 ("usb:
add basic USB configs in Kconfig"), I planned to follow the Linux's
convention, i.e. CONFIG_USB to enable/disable the USB host support.
Then, commit 68f7c5db2d ("usb: Generic USB Kconfig option, that
fits both host and gadget and comments") changed the logic of the
CONFIG_USB to point to the whole of the USB sub-system. As a result,
currently we do not have an option for USB host.
This commit adds CONFIG_USB_HOST, which will be useful to compile
in the USB host support code.
CONFIG_USB_HOST is not referenced at all, but strangely some boards
define it in board headers. I removed them because USB_HOST will be
selected in Kconfig going forward.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
There is no UHCI driver entry in Kconfig for now, but we have some
UHCI drivers, for example, LEON. This is a placeholder in case we
want to move them to Kconfig in the future.
The help message was copied from Linux.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Add this option as a common config for all OHCI controllers. Its
help message was copied from Linux. Also, I moved it below EHCI
to respect the order in Linux's Kconfig.
Add CONFIG_USB_OHCI_HCD=y to axs103_defconfig, which is the only
user of OHCI_GENERIC.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Support driver model for ehci mx6 driver.
Consolidate code to be shared between DM and non-DM, such as
introducing ehci_mx6_common_init.
For simplicity, some old fasion code are keeped for DM usage,
such as board_ehci_power and board_usb_phy_mode. And 'dr-mode',
usbphy and vbus handling code for DM is not added now.
These will be added in future patches.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Cc: Stefan Agner <stefan@agner.ch>
Cc: Simon Glass <sjg@chromium.org>
Quite a few places have a bind() method which just calls dm_scan_fdt_dev().
We may as well call dm_scan_fdt_dev() directly. Update the code to do this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add Kconfig entry config option for USB_EHCI_ZYNQ
and update the same to enable for all zynq boards
which supports USB
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add a new config CONFIG_MXC_USB_OTG_HACTIVE which configures the
OTG Power Pin to be high active. Low active is the reset value
of the affected configuration register, hence the config option
is named by the non-reset configuration.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
USBNC_n_CTRL1 bit 9 actually controls the power pin polarity.
Rename UCTRL_PM to align reference manual and set the bit in
the appropriate callback usb_power_config.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
The USBNC_PHYCFG2_ACAENB bit should be cleared to enable the
OTG ID detection, not set it. When the bit is set, the ACA
Resistance Detection is enabled, which disables the OTG ID
detection, because the internal pull up is off.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
There is a 4 bytes hole between phy_cfg2 and phy_status, fix the
usbnc_regs structure to include the hole.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The following changes are made to the clock API:
* The concept of "clocks" and "peripheral clocks" are unified; each clock
provider now implements a single set of clocks. This provides a simpler
conceptual interface to clients, and better aligns with device tree
clock bindings.
* Clocks are now identified with a single "struct clk", rather than
requiring clients to store the clock provider device and clock identity
values separately. For simple clock consumers, this isolates clients
from internal details of the clock API.
* clk.h is split so it only contains the client/consumer API, whereas
clk-uclass.h contains the provider API. This aligns with the recently
added reset and mailbox APIs.
* clk_ops .of_xlate(), .request(), and .free() are added so providers
can customize these operations if needed. This also aligns with the
recently added reset and mailbox APIs.
* clk_disable() is added.
* All users of the current clock APIs are updated.
* Sandbox clock tests are updated to exercise clock lookup via DT, and
clock enable/disable.
* rkclk_get_clk() is removed and replaced with standard APIs.
Buildman shows no clock-related errors for any board for which buildman
can download a toolchain.
test/py passes for sandbox (which invokes the dm clk test amongst
others).
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
If the usb controller is not running, no need to shutdown it,
otherwise `usb stop` complains about:
"EHCI failed to shut down host controller".
To i.MX7D SDB, there are two usb ports, one Host, one OTG.
If we only plug one udisk to the Host port and then `usb start`,
the OTG controller for OTG port does not run actually. Then,
if `usb stop`, the OTG controller for OTG port will also be
shutdown, but it is not running.
This patch adds a check to only shutdown the running controller.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: "Stefan Brüns" <stefan.bruens@rwth-aachen.de>
Cc: Stephen Warren <swarren@nvidia.com>
This patch is doing the following:
1. Implementing the errata for LS2080.
2. Adding fixup for fdt for LS2080.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Create an entry for "config USB_XHCI_DWC3" in Kconfig and
switch over to it for all boards.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Move CONFIG_USB_XHCI to defconfig files for all boards, renaming it
into CONFIG_USB_XHCI_HCD.
As commented in the help of "config USB_XHCI" entry, this has been
a TODO for a long time; now CONFIG_USB_XHCI_HCD and CONFIG_USB_XHCI
have been unified in favor of the former.
Note:
Some boards define CONFIG_USB_XHCI in their headers without
CONFIG_USB, which does not meet the "depends on" in Kconfig.
I added CONFIG_USB=y for those boards when converting.
Otherwise, they would fail to build.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
With patch c998da0d (usb: Change power-on / scanning timeout handling),
the USB scanning is started earlier and with a smaller timeout. This
resulted on SoCFPGA (using the DWC2 driver) in some USB sticks not
getting detected any more. This patch now adds a 1 second delay (in
the host mode only) to the DWC2 driver before the scanning is started.
With this delay, now all problematic USB keys are detected successfully
again. And there is no need any more to change the delay / timeout
in the common USB code (usb_hub.c).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Marek Vasut <marex@denx.de>
There could be runtime determined board specific reason why a EHCI
initialization fails (e.g. ENODEV if a Port is not available). In
this case, properly return the error code.
While at it, that function (board_ehci_hcd_init) has actually two
documentation blocks... Use the correct function name for the
documentation block of board_usb_phy_mode.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Initialize desc_before_addr, otherwise the USB core won't send the
first 64B Get Device Descriptor request in common/usb.c function
usb_setup_descriptor() . There are some USB devices which expect
this sequence and otherwise can misbehave.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Tom Rini <trini@konsulko.com>
Introduce a new flag in the controller private data, which allows selectively
disabling the OC protection. Use the standard 'disable-over-current' OF prop
to set this flag. This OC protection must be disabled on EBV SoCrates rev 1.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Introduce a boolean flag in the dwc2 controller private data and set
it according to the macro (for now) instead of having this macro
directly in the dwc_otg_core_init(). This will let us configure the
flag from DT or such later on, if needed.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Pass the whole bulk of private data instead of just the regs,
since the private data will soon contain important configuration
flags.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Dinh Nguyen <dinguyen@kernel.org>
On the H3 we need to enable the clk and de-assert the reset of the
companion to be able to talk to the actual usb host controller.
Before this commit we were also disabling the companion clk-gate /
asserting its reset on remove, causing the later remove callback of
the companion itself to (sometimes) fail with:
ERROR: USB HC reset timed out!
This commit fixes this by not disabling the companion's clk-gate nor
asserting its reset on remove.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Move usb device-tree fixup framework from ehci-fsl.c to common place so
that it can be used by other drivers as well (xhci-fsl.c).
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@nxp.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Acked-by: Marek Vasut <marex@denx.de>
This commit fixes crash on BananaPi (and possibly others)
casued by 3f9f8a5b83.
Crash reason:
When no ops were passed to ehci_register(), USB host driver caused
NULL pointer dereference.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
This driver is able to reconfigure OTG controller into HOST mode.
Board can add board-specific initialization as board_prepare_usb().
It requires USB_ULPI_VIEWPORT enabled in board configuration.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Simon Glass <sjg@chromium.org>
Use definitions from ehci.h instead.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Simon Glass <sjg@chromium.org>
Most of ehci-fsl header describe USB controller
designed by Chipidea and used by various SoC vendors.
This patch renames it to a generic header: ehci-ci.h
Contents of file are not changed (so it contains several
references to freescale SoCs).
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Simon Glass <sjg@chromium.org>
Some host controllers need addidional initialization after ehci_reset()
In non-dm implementation it is possible to use CONFIG_EHCI_HCD_INIT_AFTER_RESET.
This patch adds similar option to ehci drivers using dm.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
We have a separate compatible for almost each SoC. Add one for the A83T.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
We have a separate compatible for almost each SoC. Add one for the A83T.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The 2nd usb controller on sun4i/sun7i has its base address 0x8000
bytes from the 1st one, rather then 0x1000. Also the ahb clk gates
are interleaved with the ohci clk-gates introducing a hole between
the clks for usb1 and usb2.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Add test into xhci_submit_control_message for usb requesttype in USB
vendor request being of standardized type. This fixes detection of
certain USB fixes, for example Ethernet, USB 3.0 port. Non standardized
requesttype in USB vendor request will be ignored.
Signed-off-by: Ted Chen <tedchen@realtek.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
When 'usb start' is used, block devices are created for any USB flash sticks
and disks, etc. When 'usb stop' is used, these block devices are currently
not removed.
We don't want old block devices hanging around since they can still be
visible to U-Boot. Therefore, when USB is shut down, remove and unbind all
the block devices created by the USB subsystem.
Possibly we should unbind all devices which don't cause problems by being
unbound. Most likely we can remove everything except USB controllers, hubs
and emulators. We can consider that later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
For the case where an external VBUS is used, we should enable the external
VBUS comparator in the driver. This would prevent an unnecessary overcurrent
error which would then disable the host port.
The overcurrent condition was happening on the SoCFPGA Cyclone5 devkit, thus
USB was not working on the devkit. This patch fixes that problem.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Fix the following warning on aarch64 introduced by using p2v/v2p
functions in the code:
In file included from ./arch/arm/include/asm/byteorder.h:29:0,
from include/compiler.h:125,
from include/image.h:19,
from include/common.h:88,
from drivers/usb/host/ehci-hcd.c:10:
drivers/usb/host/ehci-hcd.c: In function ‘ehci_td_buffer’:
drivers/usb/host/ehci-hcd.c:250:49: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr));
^
include/linux/byteorder/little_endian.h:34:51: note: in definition of macro ‘__cpu_to_le32’
#define __cpu_to_le32(x) ((__force __le32)(__u32)(x))
^
drivers/usb/host/ehci-hcd.c:250:24: note: in expansion of macro ‘cpu_to_hc32’
td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr));
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Tom Rini <trini@konsulko.com>
Add explicit cpu_to_be32()/be32_to_cpu() conversion to BE EHCI I/O
accessors to align them with their LE counterpart. No functional
change.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Hans de Goede <hdegoede@redhat.com>
If the USB EHCI is configured for little endian MMIO, make sure to
clear the USBMODE_BE flag from the USBMODE register.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Certain processor architectures, like MIPS, require that the USB
structures and transfer buffers are passed with their PA to the
USB controller. If VA is passed, the USB will not work. Add the
necessary virt_to_phys() calls into the USB EHCI code to make it
work.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Some architectures, like MIPS, require remapping of the registers.
Add the map_physmem() call to handle it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Add support for phy 1-3.
Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
[hdegoede@redhat.com: use setclrbits_le32 instead of read-modify-write]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Due to introducing the new PLLB clock handle functions,
use these functions to clean up the PLLB enable/disable code.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Tested-by: Heiko Schocher <hs@denx.de>
Due to introducing the new UTMI PLL clock handle functions,
use these function to reduce the duplicated code.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Due to introducing the new peripheral clock handle functions,
use these functions to reduce the duplicated code.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Tested-by: Heiko Schocher <hs@denx.de>
[fixup for missing clk.h in at91_emac.c]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Now, all this driver does can be covered by the generic EHCI driver
(drivers/usb/host/ehci-generic.c). UniPhier SoCs have switched to
use it. Delete this driver rather than bothering to convert it to
Driver Model.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Marek Vasut <marex@denx.de>
This driver is designed in a generic manner, so clocks should be
handled genericly as well.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Use existing library function to poll bit(s).
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
Add a compatible string to allow this to be specified in the device tree
if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
USB protocol allows for 16 IN and 16 OUT endpoints (USB 2.0 Spec,
8.3.2.2 Endpoint Field). A function may have an EP 1 for both IN and OUT,
so these two should be kept separate. As EPs are either BULK or INTERRUPT
(or ISO), it is fine to have one array per direction for all transfer
types (also see e236519b73).
USB device address is 7 bits, so a bus may have more than 16 devices.
Check the device number, as the DWC2 driver only supports BULK/ISO for
the first 16 devices.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
CSPLITs for INTERRUPT transactions have to be scheduled in each microframe
following the SSPLIT. INTERRUPT transfers are executed in the next even/
odd microframe depending on the HCCHAR_ODDFRM flag.
As there are no handshakes for INTERRUPT SSPLITs the SSPLIT may have
failed (transport error) without the error being detected by the host
driver. If the last CSPLIT is not received within 4 microframes after the
SSPLIT there was a transaction error and the complete transaction has
to be restarted.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
In contrast to non-SPLIT transfers each transaction has to be submitted
as an individual chunk.
The transaction state machine proceeds from SSPLIT to CSPLIT if the ACK
flag is set. CSPLIT has to be repeated while NYET is set.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
The split register setting is used for both SSPLIT and CSPLIT transactions,
the bit for CSPLIT has to be set seperately.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Split the movement of data between CPU and Host Controller from the
status handling and tracking of transfer progress.
This will also simplify adding of SPLIT transaction support.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
A transfer is completed if the XFERCOMP flag is set, irrespective of the
ACK flag. BULK OUT transfers to some HS devices complete without having
the ACK flag set, which signal the devices has responded with an NYET
to the transfer (PING protocol).
The new behaviour matches the Linux kernel minus any PING protocol.
Also see 5966defabdcc (usb: dwc2: fix bulk transfers)
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Fix two errors in transfer len calculation, move loop invariant code out
of loop.
If xfer_len is equal to CONFIG_DWC2_MAX_TRANSFER_SIZE (or slightly
smaller), the xfer_len will be to large, e.g.:
xfer_len = MAX_TRANSFER_SIZE = 65535
max packet size = 512
=> num_packets = 128
=> IN xfer_len = 65536
For OUT transactions larger than (65536 - mps) bytes, the xfer_len
determination is quite awkward, it is only correct due to:
- max_packet_size for control/bulk/interrupt is required to be
power-of-two.
- (CONFIG_DWC2_MAX_TRANSFER_SIZE + 1) % max-packet-size is zero
for all allowed (2^3 ... 2^9) packet sizes
As the max xfer len is loop invariant, it can be moved out of the loop.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Add board_usb_phy_mode weak function on similar lines to ehci-mx6.
However since Vybrid USB does not have a true OTG, make this weak
functon just return 0. The function is supposed to be implemented
by the individual boards using a GPIO for providing the OTG pin
functionality.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
The current ehci-vf USB driver for Vybrid hardcodes the USB host
and client functionality. Remove this.
Reported-by: Santhosh Kumar Janardhanam <santhosh.kj@hcl.com>
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Convert this driver to use the new driver model PCI API.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Most driver model PCI functions have a dm_ prefix. At some point, when the
old code is converted to driver model and the old functions are removed, we
will drop that prefix.
For consistency, we should use the dm_ prefix for all driver model
functions. Update pci_get_bdf() accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Start split and complete split tokens need the hub address and the
downstream port of the first HS hub (device view).
The core of the function was duplicated in both host/ehci_hcd and
musb-new/usb-compat.h.
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Hans de Goede <hdegoede@redhat.com>
flush_dcache_range may access data after priv->aligned_buffer end if
len > DWC2_DATA_BUF_SIZE.
memcpy may access data after buffer end if done > 0
Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
This driver is meant to be used with any OHCI-compatible host
controller in case if there's no need for platform-specific
glue such as setup of controller or PHY's power mode via
GPIOs etc.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
With the old order of initialization the hcor pointer has been setup to
the same address as Exynos EHCI base address (0x12110000 instead of
0x12110010).
Such behaviour was caused by reading value of 0 instead of 0x10 from EHCI
HCCPBASE register without doing proper clock initialization before.
To fix this problem hcor initialization has been moved after USB PHY setup.
Now ehci_readl(&ctx->hcd->cr_capbase) returns correct value.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
This patch removes unsued function usb_phy_reset, rather common function
dwc3_phy_reset is used.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
As per dwc3 databook, delay is required before taking the core out of reset.
This delay is required so that the PHY are stable, and then we can take core
out of reset.
Reference is taken from linux dwc3 code, file: drivers/usb/dwc3/core.c.
Signed-off-by: Sriram Dash <sriram.dash@freescale.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@freescale.com>
This driver is meant to be used with any EHCI-compatible host
controller in case if there's no need for platform-specific
glue such as setup of controller or PHY's power mode via
GPIOs etc.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
The DM entry should be unique, otherwise it will collide with other
drivers. Fix this by assigning the driver a more unique name than
usb_ehci.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Simon Glass <sjg@chromium.org>
The driver does "return 0" in function with void type.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Fix the following build break:
drivers/usb/host/xhci-omap.c:35:5: error: ‘board_usb_init’ aliased to external symbol ‘__board_usb_init’
int board_usb_init(int index, enum usb_init_type init)
^
Signed-off-by: Felipe Balbi <balbi@ti.com>
Each scan of the USB bus may return different results. Existing driver-model
devices are reused when found, but if a device no longer exists it will stay
around, de-activated, but bound.
Detect these devices and remove them after the scan completes.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function should not be used with driver model. While there are users
of USB Ethernet that use driver model for USB but not Ethernet, we have
to keep it around. Add a comment to that effect.
Signed-off-by: Simon Glass <sjg@chromium.org>
The console includes a global variable and several functions that are only
used by a small subset of U-Boot files. Before adding more functions, move
the definitions into their own header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
We need to cache-flush the hcca area after the initial memset, otherwise
on the first hc_interrupt we might see an old $random value as done_head and
try to interpret that as the address for a completed td (followed by chaos).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The current name is inconsistent with other driver model data access
functions. Rename it and fix up all users.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
This patch adds driver model (DM) support to the Marvell EHCI driver.
This will be used by the MVEBU SoC's, currently Armada XP and 38x.
Tested on Marvell Armada XP and 38x eval boards.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Now that we have a new header file for cache-aligned allocation, we should
move the stack-based allocation macro there also.
Signed-off-by: Simon Glass <sjg@chromium.org>
When an EHCI device is registered in device mode, the HW isn't actually
initialized at all, and hence isn't left in a running state. Consequently,
when the device is deregistered, ehci_shutdown() will fail, since the HW
bits it expects to see set in response to its shutdown requests will not
be sent, and the message "EHCI failed to shut down host controller." will
be printed.
Fix ehci-hcd.c to remember whether the device was registered in host or
device mode, and only call ehci_shutdown() for host mode registrations.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This is a convenient way for a driver to get the hardware address of a
device, when regmap or syscon are not being used. Change existing callers
to use it as an example to others.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
This driver is not used only on exynos, but also on Altera SoCFPGA,
HiSilicon SoCs, RPi etc, so rename it accordingly to prevent confusion.
Signed-off-by: Marek Vasut <marex@denx.de>
xhci omap driver has board_usb_init in xhci_hcd_init but doesn't have
the corresponding cleanup function in xhci_hcd_stop.
Fix it here by invoking board_usb_cleanup() in xhci_hcd_stop().
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
This patch fixes a potential NULL pointer dereference arising on
non-present/non-initialized xHCI controllers and adds some error
handling to xHCI code
Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
USB EHCI on SPEAr600 has not been tested for a while. The base controller
addresses are missing. This patch adds the defines to the header. And adds
the missing code.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Vipin Kumar <vk.vipin@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Document target board specific functions
board_ehci_hcd_init - override usb phy mode
board_ehci_hcd_init - set usb vbus voltage
board_ehci_power - enables/disables usb vbus voltage
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Incorporate USB driver from legacy LPCLinux NXP BSP.
The files taken from the legacy patch are:
- lpc32xx USB driver
- lpc3250 header file USB registers definition.
The legacy driver was updated and clean-up as part of the integration with the latest u-boot.
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Vladimir Zapolskiy <vz@mleia.com>
This patch adds support for multiple hostcontrollers to the ehci-marvell driver
and enables all 3 usb-hcs on the db-mv784mp-gp board.
It depends on the initial Armada XP usb support patch from Stefan.
Signed-off-by: Anton Schubert <anton.schubert@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
This patch enables the USB EHCI support for the Marvell Armada XP (AXP)
SoCs. In compatism to the Armada 38x (A38x), the AXP needs to configure
the USB PLL and the USB PHY's specifically in U-Boot. The A38x has done
this already in the bin_hdr (SPL U-Boot). Without this, accessing the
controller registers in U-Boot or Linux will hang the CPU.
Additionally, the AXP uses a different USB EHCI base address. This
patch also takes care of this by runtime SoC detection in the Marvell
EHCI driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Anton Schubert <anton.schubert@gmx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Remove the CONFIG_DM_USB limitation to enable cache support functions.
Tested on SAMA5D3x-EK board.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
This adds dcache support for dwc2. The DMA buffers must be DMA aligned and
is flushed for outgoing transactions before starting transfer. For
ingoing transactions it is invalidated after the transfer has finished.
Signed-off-by: Alexander Stein <alexanders83@web.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
[trini: Update to apply again on top of DM patches]
Signed-off-by: Tom Rini <trini@konsulko.com>
USB devices are not really designed to get the power bounced off and on
at them. Esp. USB powered harddisks do not like this.
Currently we power off the USB ports both on a "usb reset" and when
booting the kernel, causing the usb-power to bounce off and then back
on again.
This patch removes the powering off calls, fixing the undesirable power
bouncing.
Note this requires some special handling for the OTG port:
1) We must skip the external vbus check if we've already enabled our own
vbus to avoid false positives
2) If on an usb reset we no longer detect that the id-pin is grounded, turn
off vbus as that means an external vbus may be present now
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Put all global data in a structure and move (what will be) common code into
common functions. This will make the driver-model conversion much easier.
Signed-off-by: Simon Glass <sjg@chromium.org>
Added 38.4MHz/48MHz entries to pll_x_table for CPU PLL. Needs
to be measured - should be close to 700MHz (1.4G/2).
Note that some freqs aren't in the PLLU table in T210 TRM
(13, 26MHz), so I used the 12MHz table entry for them. They
shouldn't be selected since they're not viable T210 OSC freqs.
Since there are now 2 new OSC defines, all tables (pll_x_table,
PLLU) had to increase by two entries, but since 38.4/48MHz are
not viable osc freqs on T20/30/114, etc, they're just set to 0.
Signed-off-by: Tom Warren <twarren@nvidia.com>
usb_stor_reset is only defined when USB storage support is enabled, thus the
function is not declared when such support is missing.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
This patch makes the dwc2 controller like ehci / ohci / xhci controllers
by calling the board_usb_init() function from usb_lowlevel_init.
This can then be implemented by specific platforms to initialise
their USB hardware (phys / clocks etc).
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Add USB_EHCI_MX6 option to menuconfig and use it when migrating cm-fx6 usb
config to defconfig.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Derived from Tegra124, modified as appropriate during T210
board bringup. Cleaned up debug statements to conserve
string space, too. This also adds misc 64-bit changes
from Thierry Reding/Stephen Warren.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This patch removes the wrl accessor function from the Marvell EHCI
driver by replacing it with the writel function.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Remove LS102XA immap header inclusion from xhci fsl driver.
It removes redefinition warnings when built for platforms
other than LS102XA
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
This adjusts (micro)frame length to appropriate value thus
avoiding USB devices to time out over a longer run
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Support driver model in this driver. This uses the normal USB driver search
mechanism. Any EHCI controllers will be set up as they are found during
usb_init().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
On some single port (otg) controllers there is no emulated root hub, so
the first child (if any) may be one of: UCLASS_MASS_STORAGE,
UCLASS_USB_DEV_GENERIC or UCLASS_USB_HUB.
All three of these (and in the future others) are suitable for our
purposes, remove the check for the device being a hub, and add a check to
deal with the fact that there may be no child-dev.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
Allow usb uclass host drivers to implement usb_reset_root_port, this is
used by single port usb hosts which do not emulate a hub, such as otg
controllers.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
Now that we unbind usb devices from usb_stop() usb_find_child() is
only necessary to deal with emulated usb devices.
Rename it to make this clear and add a #ifdef to make it a nop in
other cases.
Note the #ifdef turns usb_find_emul_child() into a nop, rather then not
building it and adding another #ifdef to the caller, this is done this way
because adding a #ifdef to the caller is somewhat hairy.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
On an usb stop instead of leaving orphan usb devices behind simply remove
them.
The result of this commit is best seen in the output of "dm tree" after
plugging out an usb hub with 2 devices plugges in and plugging in a keyb.
instead, before this commit the output would be:
usb [ + ] `-- sunxi-musb
usb_hub [ ] |-- usb_hub
usb_mass_st [ ] | |-- usb_mass_storage
usb_dev_gen [ ] | `-- generic_bus_0_dev_3
usb_dev_gen [ + ] `-- generic_bus_0_dev_1
Notice the non active usb_hub child and its 2 non active children. The
first child being non-active as in this example also causes usb_get_dev_index
to return NULL when probing the first child, which results in the usb kbd
code not binding to the keyboard.
With this commit in place the output after swapping and "usb reset" is:
usb [ + ] `-- sunxi-musb
usb_dev_gen [ + ] `-- generic_bus_0_dev_1
As expected, and usb_get_dev_index works properly and the keyboard works.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
Add an usb_device parameter to usb_reset_root_port so that it knows which
root-port it is resetting. This is necessary for proper device-model support
for usb_reset_root_port.
Also remove a duplicate declaration of usb_reset_root_port() from usb.h .
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
Drop the unneeded portnr function argument, the portnr is part of the
usb_device struct which is passed via the dev argument.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
The device-model usb_legacy_port_reset function calls the device-model
usb_port_reset function which is a 1 on 1 copy of the non dm
usb_legacy_port_reset and this is the only use of usb_port_reset in all
of u-boot.
Drop both, and alway use the usb_legacy_port_reset() version in
common/usb.c .
Also while at it make it static as it is only used in common/usb.c .
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
This patch adds USB EHCI host support for the common mvebu platform.
Including the Armada 38x.
Tested on DB-88F6280-GP eval board.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Without this we loose every other interrupt packet. We never noticed this
because with keyboards the packets which we were loosing would normally
be key release packets.
But now that we do keyrepeat in software instead of relying on the hid
idle functionality, missing a release will result in key repeat triggering.
This commit fixes this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Add a weak function board_ehci_hcd_init which can be used by the board
file for board specific initialisation.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Return if USB_MAX_CONTROLLER_COUNT hence the index of the controller
to be initialised is incorrect
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
The business for UniPhier Soc family has been transferred from
Panasonic Corporation to Socionext Inc.
Update the SoC select menu in Kconfig.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
In the Linux coding style, it is recommended to include <linux/io.h>
rather than <asm/io.h>. Follow this trend.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This has been tested to the extent that I can enumerate
a asix usb networking adapter and boot a kernel over usb
on the 96boards hikey u-boot port I'm currently doing.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Add support for interrupt queues to the ohci hcd code, bringing it inline
with the ehci and musb-new(host) code.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Add an ohci_alloc_urb() function, this is a preparation patch for adding
interrupt queue support.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Marek Vasut <marex@denx.de>
When submitting interrupt packets to an endpoint we only link in the ed
once to avoid some races surrounding unlinking of periodic endpoints,
but we share one ohci_device struct / one set of ed-s for all devices,
which means that if we have an interrupt endpoint at endpoint 1 with one
device, and a non interrupt endpoint 1 with another device we end up
with the same ed linked into both the periodic and async lists, which is
not good (tm).
This commit switches over to using separate ohci_device structs, and thus
separate ed-s for devices with interrupt endpoints, fixing this.
This fixes e.g. matching a usb storage device and keyboard on the same
usb-1 hub not working.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Marek Vasut <marex@denx.de>
This commit adds support for the OHCI companion controller, which makes
usb-1 devices directly plugged into to usb root port work.
Note for now this switches usb-keyboard support for sunxi back from int-queue
support to the old interrupt polling method. Adding int-queue support to the
ohci code and switching back to int-queue support is in the works.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Convert sunxi-boards which use the sunxi-ehci code to the driver-model.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
For some reason the ohci code is full with:
#ifdef DEBUG
pkt_print(...)
#else
mdelay(1);
#endif
AFAICT there is no reason for the mdelay(1) calls. This commit disables them
when building the ohci code for new driver-model using boards. It leaves
the mdelay(1) calls in place when building for older boards, so as to avoid
causing any regressions there.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The usb spec says that we must wait a minimum amount of time after port
power on (exact time is in the hub descriptor), this is something which
we must not only do for root ports but also for external hub ports, which
is why the common usb_hub code already waits a full second after powering
up ports. Having a separate wait for just the root hub in the ohci-hcd
code only leads to doing the waiting twice for the root ports, so drop the
wait from the ohci-hcd code.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The u-boot usb code uses polling for all endpoints, including interrupt
endpoints, so urbs should never be automatically resubmitted.
This also fixes a leak of the urb, as submit_int_msg() did not check if
an already re-submitted urb exists before creating a new one.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Marek Vasut <marex@denx.de>
USB scanning is slow, and there is no need to scan the companion buses
if no usb devices where handed over to the companinon controllers by any
of the main controllers.
This saves e.g. 2 seconds when booting a A10 OLinuxIno Lime with no USB-1
devices plugged into the root usb ports.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
USB companion controllers must be scanned after the main controller has
been scanned, so that any devices which the main controller which to hand
over to the companion have actually been handed over before we scan the
companion.
As there are no guarantees that this will magically happen in the right
order, split the scanning of the buses in 2 phases, first main controllers,
and then companion controllers.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
Move printing of usb scan status to usb_scan_bus().
This is a preparation patch for adding companion controller support to the
usb uclass.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
Interrupt endpoints typically are polled for a long time by the usb
controller before they return anything, so calls to submit_int_msg() can
take a long time to complete this.
To avoid this the u-boot code has the an interrupt queue mechanism / API,
add support for this to the driver-model usb code and implement it for the
dm ehci code.
See the added doc comments for more details.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
This is a preparation patch for adding interrupt-queue support to the
ehci dm code.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
Short circuit the retry loop in legacy_hub_port_reset() by returning an
error from usb_control_msg() when a device was handed over to a companion
by the ehci code. This avoids trying to reset low / fullspeed devices 5
times needlessly. Also do not print an error when a device has been handed
over.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
When after a reset the port status connection bit is still set and the enable
bit is not then we're dealing with a full-speed device and should hand it over
to the companion controller.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Interrupts transfers timing out is normal, so do not log an error for this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Marek Vasut <marex@denx.de>
Add proper cache flushing / invalidating for non cache coherent cpus, for now
only enable this for new (driver-model) usb code to avoid regressions.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Non static function and variable declarations do not belong in a .h file.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Marek Vasut <marex@denx.de>
This is a preparation patch for adding driver-model support.
Note we do keep ohci_dev as a separate struct so that we can later add
support for interrupt-queues which requires allocating a separate ohci_dev
per interrupt-queue.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Marek Vasut <marex@denx.de>
devgone is never assigned a value, so the one comparisson reading it will
never be true, and devgone can be completely removed.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Marek Vasut <marex@denx.de>
Without this usb-1 device descriptors do not get read properly.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
The ehci driver model code for finding the first upstream usb-2 hub before
this commit has a number of issues:
1) "if (!ttdev->speed != USB_SPEED_HIGH)" does not work because the '!'
takes presedence over the '!=' this should simply be
"if (ttdev->speed == USB_SPEED_HIGH)"
2) It makes ttdev point to the first upstream usb-2 hub, but ttdev should
point to the last usb-1 device before the first usb-2 hub (when going
upstream from the device), as ttdev is used to find the port of the
first usb-2 hub to which the the last usb-1 device is connected.
3) parent_devnum however should be set to the devnum of the first usb-2
hub, so we need to keep pointers around to both usb_device structs.
To complicate things further during enumeration usb_device.dev will point
to the parent udevice, where as during normal use it will point to
the actual udevice, we must handle both cases correctly.
This commit fixes all this making usb-1 devices attached to usb-2 hubs,
including usb-1 devices attached to usb-1 hubs attached to usb-2 hubs, work.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
Use usb_get_bus in dm ehci code rather then re-implementing it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
Currently we copy over a number of usb_device values stored in the on stack
struct usb_device probed in usb_scan_device() to the final driver-model managed
struct usb_device in usb_child_pre_probe() through usb_device_platdata, and
then call usb_select_config() to fill in the rest.
There are 3 problems with this approach:
1) It does not fill in enough fields before calling usb_select_config(),
specifically it does not fill in ep0's maxpacketsize causing a div by zero
exception in the ehci driver.
2) It unnecessarily redoes a number of usb requests making usb probing slower
3) Calling usb_select_config() a second time fails on some usb-1 devices
plugged into usb-2 hubs, causing u-boot to not recognize these devices.
This commit fixes these issues by removing (*) the usb_select_config() call
from usb_child_pre_probe(), and instead of copying over things field by field
through usb_device_platdata, store a pointer to the in stack usb_device
(which is still valid when usb_child_pre_probe() gets called) and copy
over the entire struct.
*) Except for devices which are explictly instantiated through device-tree
rather then discovered through usb_scan_device() such as emulated usb devices
in the sandbox.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
Make usb_get_bus easier to use for callers, by directly returning the bus
rather then returning it via a pass-by-ref argument.
This also removes the error checking from the current callers, as
we already have an assert() for bus not being NULL in usb_get_bus().
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
Do not use bus->seq before device_probe(bus), as bus->seq is not set until
after the device_probe() call. This fixes u-boot printing: "USB-1: " for
each bus it scans.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
Add a delay of 1 microsecond before issuing soft reset to the
controller to let ongoing ULPI transaction complete.
This prevents corruption of ULPI Function Control Register which
eventually prevents phy clock from entering to low power mode
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The 2/3 usb-phys on the sunxi SoCs are really a single separate functional
block, and are modelled as such in devicetree. So once we've moved all the
sunxi usb code to the driver-model then phy_probe will be called once
for the entire block from the driver-model enumeration code.
Move to this now as this also avoids problems with phy_probe being called
multiple times once we introduce ohci support. This also allows us to get rid
of the sunxi_usb_phy_enabled_count variable as phy_probe now is guaranteed
to be called only once.
Since we're effectively rewriting the probe / remove functions, move them
to the end of the file while we are at it, as that is the most logical place
for them.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The usbc.? files now only contain usb-phy related code, rename them to make
this clear.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Rename the sunxi_usbc_foo functions to sunxi_usb_phy_bar to make it clear
that these are usb-phy functions. Also change the verbs & nouns in the suffix
to match the verbs & nouns used in the Linux kernels generic phy framework.
This patch purely renames things, it contains no functional changes.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
This is the only function left in sunxi/usbc.c which is not phy related,
so remove it.
This is a preparation patch for turning the usbc.c code into a proper
usb phy driver.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The sunxi "usbc" code is mostly about phy setup, but currently also sets up
the host controller clocks, which is something which really belongs in the
host controller drivers, so move it there.
This is a preparation patch for moving the sunxi ehci code to the driver
model and for adding ohci support.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Check if USB Erratum A005697 is applicable on BSC913x and
add corresponding property in the device tree via device
tree fixup which is used by linux driver
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Identify soc(s) having dual phy so as to add "utmi_dual" as phy_mode
for all these socs. This is required for supporting deel-sleep feature
in linux for usb driver
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Add driver model support in the XHCI support code so that it can be used by
XHCI USB drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Since driver model will want to use most of the same code for XHCI init
and uninit, put it in a separate function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
This function should not be delving into struct usb_device. Pass in the
parameters it needs directly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
This function should not be delving into struct usb_device. Pass in the
parameters it needs directly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Rather than getting this directly from struct usb_device, call a function
to obtain it. This will make it possible for driver model to provide it
another way.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
We want to use mostly the same init and uninit code for driver model, so move
the common part into two functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Try to return useful error numbers where possible. Also avoid swallowing
an error number when it is returned by a called function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
This variable is a bit of a hack. We can obtain the same information from
the normal device config. This will fit better with driver model, where
global variables are best avoided.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
This driver supports using emulation devices to provide a USB bus within
sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
These devices must have their addresses removed ready for the next USB
bus enumeration. Add this logic to usb_stop().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Some controllers support OTG (on-the-go) where they can operate as either
host or device. The gadget layer in U-Boot supports this.
While this layer does not interact with driver model, we can provide a
function which sets up the controller in the correct way. This way the code
at least builds (although it likely will not work).
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
At present USB devices with no driver model driver cannot be seen in the
device list, and we fail to set them up correctly. This means they cannot
be used.
While having real drivers that support driver model for all USB devices
is the eventual goal, we are not there yet.
As a stop-gap, add a generic USB driver which is bound when we do not have
a real driver. This allows the device to be set up and shown on the bus.
It also allows ad-hoc code (such as usb_ether) to find these devices and
set them up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
USB devices in U-Boot are currently probed only after all devices have
been enumerated. Each type of device is probed by custom code, e.g.:
- USB storage
- Keyboard
- Ethernet
With driver model this approach doesn't work very well. We could build
a picture of the bus and then go back and add the devices later, but
this means that the data structures are incomplete for quite a while.
It also does not follow the model of being able to bind a device when we
discover it.
We would prefer to have devices automatically be bound as the device is
enumerated. This allows us to attach drivers to particular USB classes
or product/vendor IDs. This is the method used by Linux.
Add the required #defines from Linux, a way of declaring a USB driver and
the logic to locate the correct driver given the USB device's descriptors.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Add a way for EHCI controller drivers to support driver model. Drivers can
call ehci_register() to register themselves in their probe() methods.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
The index cannot be used with driver model, and isn't needed anyway. Change
the parameter to a pointer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
These are a pain with driver model because we might have different EHCI
drivers which want to implement them differently. Now that they use
consistent function signatures, we can in good conscience move them to
a struct.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Fix non-driver-model EHCI to set up the EHCI operations correctly:
Signed-off-by: Tom Rini <trini@konsulko.com>
Move the bulk of the code in usb_lowlevel_init() into a separate function
which will also be used by driver model. Keep the CONFIG options out of
this function by providing a tweak flag for Faraday. We need to avoid using
CONFIG options in driver model code where possible, since it makes it
impossible to use multiple controllers in that code where they have
different options.
The CONFIG_EHCI_HCD_INIT_AFTER_RESET option is also kept out of the
common init function. With driver model the controller will be able to
perform this extra init itself after registering with the EHCI layer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
With driver model we want to remove the controller pointer in struct udevice
and use driver model data structures instead. To prepare for this, move
access to this field to a function which can provide a different
implementation for driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Adjust this function so that it is passed an EHCI controller pointer so that
implementations can look up their controller. This makes the weak functions
use a consistent API.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Adjust this function so that it is passed an EHCI controller pointer so that
implementations can look up their controller. This makes the weak functions
use a consistent API.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
We don't need this anymore, so adjust the code to avoid using it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Adjust this function so that it is passed an EHCI controller pointer so that
implementations can look up their controller.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
At present the tegra driver uses a separate pointer to know which controller
type is in use. This works because only one controller type is used at a
time.
With driver model we want to make the controller state hermetic in the sense
that it is not necessary to look elsewhere to know the controller type. This
will permit a controller to implement the EHCI weak functions without
reference to global data structures.
To achieve this, define an enum for the controller type and store it with
the information on each EHCI controller.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Add a private data pointer that clients of EHCI can use to access their
private information. This establishes a link between struct ehci_ctrl and
its associated controller data structure.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Adjust this function so that it is passed an EHCI controller pointer so that
implementations can look up their controller.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Put these at the top of the file so they are in one place. Also add function
prototypes to the header file to avoid call site mismatches.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Add a uclass that can represent a USB controller. For now we do not create
devices for things attached to the controller. This will be added later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
IIUC, interrupt transfers are NAK'd by devices until they wish to trigger
an interrupt, and e.g. EHCI controllers retry these in HW until they are
ACK'd. However, DWC2 doesn't seem to retry, so we need to do this in SW.
In practice, I've seen DWC2_HCINT_FRMOVRUN happen too. I'm not quite sure
what this error implies; perhaps it's related to how near the end of a
USB frame we're at when the interrupt transfer is initiated? Anyway,
retrying this temporary error seems to be necessary too.
With all these commits applied, both my USB keyboards (one LS Lenovo and
one FS Dell) work correctly when there is no USB hub between the SoC and
the keyboard; We still need split transactions to be implemented for hubs
to work.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
As best I can tell, there's no difference between bulk and interrupt
transfers in terms of how the HW should be programmed, at least given
that we're executing one transaction at a time rather than scheduling
them into frames for maximum throughput.
This patch ends up sharing the toggle bit state between bulk and
interrupt transfers on a particular EP. However I believe this is fine;
AFAIK a given EP either uses bulk or interrupt transfers and doesn't mix
them.
This patch doesn't do anything with the "interval" parameter for
interrupt transfers, but then most other USB controller drivers in U-Boot
don't either.
It turns out that one of my keyboards is happy to work using control
transfers but the other only gives non-zero "HID reports" via interrupt
transfers.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
A bit must be set in HCCHAR when communicating with low-speed devices.
I have no idea why there's no corresponding bit to distinguish between
full-speed and high-speed devices, but no matter; they all work now!
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
This doesn't make my LS keyboard work any better, but it does at least
report the correct speed in "usb tree".
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Use of these APIs is required on the Raspberry Pi. With this change, USB
on RPi1 should be more reliable, and USB on the RPi2 will start working.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
When I created wait_for_chhltd(), I noticed that some instances of the
code it replaced expected the ACK bit to be set and others didn't. I
assumed this was an accidental inconsistency in the code, so wrote
wait_for_chhltd() to always expect ACK to be set. This code appeared to
work correctly for both enumeration of USB keyboards and operation of
USB Ethernet devices. However, this change broke USB Mass Storage (at
least my USB SD card reader). This change reverts to exactly the
original behaviour. I'm not sure why the ACK bit isn't always set
(perhaps a quirk in the USB HW or DWC2 controller), but the code works
this way!
Fixes: 5be4ca7d6ac8 ("usb: dwc2: unify waiting for transfer completion")
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Each USB transfer is split up into chunks that are held in an aligned
buffer. This imposes a limit on the size of each chunk, but no limit on
the total size of transferred data. Fix the logic in chunk_msg() not to
reject large transfers, but simply take the size of the aligned buffer
into account when calculating the chunk size.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
The original aligned_buffer usage:
a) Uselessly copied data into the aligned buffer even for IN
transactions. Fix this my making the copy conditional.
b) Always programmed the HW to transfer to/from the start of the aligned
buffer. This worked fine for OUT transactions since the memcpy copied
the OUT data to this location too. However, for large IN transactions,
since the copy from the aligned buffer to the "client" buffer was
deferred until after all chunks were transferred. it resulted in each
chunk's transfer over-writing the data for the first transfer. Fix
this by copying IN data as soon as it's received.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
The control data toggle resets to DATA1 at the start of the data phase
of every setup transaction. We don't need a global variable to store
the value; we can just store it on the stack.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Move the body of submit_bulk_msg() into new function chunk_msg(). This
can be shared with submit_control_msg() to reduce code duplication, and
allow control messages larger than maxpacket.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
This commit allows xHCI to use both 64 and 32 bit memory
physical addresses depending on architecture it's being built for.
Also it makes use of readq()/writeq() on 64-bit systems
Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
Cast pointers to unsigned long instead of a sized 32-bit type to avoid
pointer to integer cast size mismatch warnings.
Cc: Tom Warren <twarren@nvidia.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Change addresses to unsigned long to be compatible with 64-bit builds.
Regardless of fixing warnings, the device is still only 32-bit capable.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Marek Vasut <marex@denx.de>
Panasonic's System LSI products, UniPhier SoC family, have been
transferred to Socionext Inc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Support xHCI host driver used on Panasonic UniPhier platform.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Marek Vasut <marex@denx.de>
Because uniphier_ehci_reset() is only called from ehci-uniphier.c,
it can be a static function there.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Marek Vasut <marex@denx.de>
Now UniPhier platform highly depends on Device Tree configuration
(CONFIG_OF_CONTROL is select'ed by Kconfig). Since the EHCI is only
used on main U-Boot, we can drop platform devices of the EHCI
controllers. We still keep UART platform devices because they might
be useful for SPL.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Marek Vasut <marex@denx.de>
Since commit 0e7368c6c4 (kbuild: prepare for moving headers into
mach-*/include/mach), we can replace #include <asm/arch/*.h> with
<mach/*.h> so we do not need to create the symbolic link during the
build.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
The dwc3_set_mode function is used only in
drivers/usb/host/xhci-exynos5.c so make it to static.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Add a driver which locates the available XHCI controllers on the PCI bus
and makes them available.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Currently create_int_queue is only implemented by the ehci code, and that
does not honor interrupt intervals, but other drivers which might also want
to implement create_int_queue may honor intervals, so add an interval param.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Most of the usb-controller init code found in ehci-sunxi.c also is necessary
to init the otg usb controller, so move it to a common place.
While at it also update various #ifdefs / defines for sun8i support.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Check USB Erratum A007792 applicability. If applicable, add
corresponding property in the device tree via device tree fixup
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Add a new framework for fsl usb erratum handling to standardize
erratum checking only inside Uboot. Information to kernel is passed
via a boolean property corresponding to erratum, hence eliminating
need for code duplication inside kernel
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
move usb device tree fixup code from "arch/powerpc/" to "drivers/usb/"
so that it works independent of architecture it is running on
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
If CONFIG_OF_CONTROL is defined, search device tree nodes that are
compatible with "panasonic,uniphier-ehci" and take the base address
from their "reg" property.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Marek Vasut <marex@denx.de>
Set TXFIFOTHRESH to adjust ddr pipeline delay for successful large
usb writes
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
U-Boot has never cared about the type when we get max/min of two
values, but Linux Kernel does. This commit gets min, max, min3, max3
macros synced with the kernel introducing type checks.
Many of references of those macros must be fixed to suppress warnings.
We have two options:
- Use min, max, min3, max3 only when the arguments have the same type
(or add casts to the arguments)
- Use min_t/max_t instead with the appropriate type for the first
argument
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Pavel Machek <pavel@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
[trini: Fixup arch/blackfin/lib/string.c]
Signed-off-by: Tom Rini <trini@ti.com>
Move USB Errata checking code from "arch/powerpc" to architecture independent
file "fsl_usb.h" so that errata(s) become independent of the architecture.
For each erratum checking function for PPC arch, define a nop function for
non PPC arch for successful compilation in either case
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
U-Boot has imported various utility macros from Linux
scattering them to various places without consistency.
In include/common.h are min, max, min3, max3, ARRAY_SIZE, ALIGN,
container_of, DIV_ROUND_UP, etc.
In include/linux/compat.h are min_t, max_t, round_up, round_down,
etc.
We also have duplicated defines of min_t in some *.c files.
Moreover, we are suffering from too cluttered include/common.h.
This commit moves various macros that originate in
include/linux/kernel.h of Linux to their original position.
Note:
This commit simply moves the macros; the macros roundup,
min, max, min2, max3, ARRAY_SIZE are different
from those of Linux at this point.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
CONFIG_CPU_ARM920T was introduced into Kconfig by commit 2e07c249a6
(kconfig: arm: introduce symbol for ARM CPUs).
This commit removes all the defines of CONFIG_ARM920T and replaces the
only reference in drivers/usb/host/ohci-hcd.c with CONFIG_CPU_ARM920T.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
According to EHCI specification, the LSB of DWORD 3 of Queue Head
(Current qTD Pointer) is not T-bit, but always zero.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
This change adds support for enabling the USB host features of the board.
This includes the USB3503A hub and the SMC LAN9730 ethernet controller
as well.
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
usb_phy_enable should return status bit, but not phy mode bit, thus
add a new function usb_phy_mode to query the PHY for it's mode and
make usb_phy_enable just return 0 but not 'phy_ctrl & USBPHY_CTRL_OTG_ID'.
Include a new board weak function board_usb_phy_mode. If board code
does not reimplement this function, it just call usb_phy_mode and return
usb_phy_mode's return value. The reason to include such a weak function
is: " SOC OTG core <--connect--> board HOST port, but no pin id for
the board host port, so board can not use usb_phy_mode to return the
phy mode, but define it's own rule."
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye Li <B37916@freescale.com>
Add support for the 2 ehci controllers found on the sun6i (A31) soc.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Marek Vasut <marex@denx.de>
Add proper Kconfig options to select the usb Vbus gpio-s, besides moving to
Kconfig being the right thing to do, an added advantage of this is that it
allows for boards without Vbus gpio-s.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Support EHCI host driver used on Panasonic UniPhier platform.
Since Device Tree is not supported on UniPhier yet, the base address
of USB cores are passed from board files (platdevice.c).
TODO for me:
Move the base address to device trees.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Marek Vasut <marex@denx.de>
CMD_IAAD (Interrupt on Async Advance Doorbell) is bit 6, not bit 5.
While we are here, sort the flags.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
This is necessary for the device-model enabled builds to work properly.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Simon Glass <sjg@chromium.org>
Mostly automatic with:
sed -i -e 's/CONFIG_\(SUN[45678]I\)/CONFIG_MACH_\1/g' $(git grep -l CONFIG_SUN[45678]I)
followed by removing the relevant #defines from include/configs/sun?i.h by
hand.
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
R8A7791, R8A7793 and R8A7794 have same IP of USB controller.
This collect up address data of each SoCs.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
R8A7793 has same IP of USB controller as R8A7791 and R8A7794 of rmobile
ARM SoCs. This adds support R8A7793 to EHCI HCD of rmobile.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Add support of usb xhci. xHCI controls all USB speeds of the Host
mode, that is, the SS through the SS PHY, as well as the HS, FS, and
LS through the USB2 PHY. xHCI replaces and supersedes all previous
host HCIs (HS-only EHCI, FS/LS OHCI and UHCI), and is therefore not
backwards compatible with any of them. The USB3SS’s USB Controller is
fully compliant with xHC.
Acked-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
This move makes is possible to use this header not only from kirkwood
platforms but from all Marvell mvebu platforms.
Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Luka Perkov <luka@openwrt.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
This is the USB host controller used on the Altera SoCFPGA and Raspbery Pi.
This code has three checkpatch warnings, but to make sure it stays at least
readable and clear, these are not fixed. These bugs are in the USB request
handling combinatorial logic, so any abstracting of those is out of question.
Tested on DENX MCV (Altera SoCFPGA 5CSFXC6C6U23C8N) and RPi B+ (BCM2835).
Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Cc: Vince Bridgers <vbridger@altera.com>
Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Trying to enumerate USB devices connected via ULPI to T20 failed as
follows:
USB2: ULPI integrity check failed
Git bisecting revealed the following commit being at odds:
commit 2d34151f75
usb: tegra: refactor PHY type selection
Looking at above commit one quickly identifies a copy paste error which
this patch fixes. Happy ULPIing again (;-p).
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Periodic schedules tracks how many int_queue-s are active, and decides whether
or not to en/disable the periodic schedule based on this. This is clearly
a per controller thing.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
When we first start an int queue, the qh's overlay area is all zeros. This
gets filled by the hc with the actual qtd values as soon as it advances
the queue, but we may call poll_int_queue before then, in which case we
would think the transfer has completed as the hc has not yet copied the
qt_token to the overlay, so the active flag is not set.
This fixes this by checking the actual qtd token, rather then the overlay.
This also fixes a (theoretical) race where we see the completion in the
overlay and free and re-use the qtd before the hc has completed writing back
the overlay to the actual qtd.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
For full / low speed devices we need to get the devnum and portnr of the tt,
so of the first upstream usb-2 hub, not of the parent device (which may be a
usb-1 hub).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The mx6sl/mx6sx has 2 OTG and 1 host. So they have name
"USBO2H_USB_BASE_ADDR" in imx-regs.h. The driver hard codes
the USB base address name to "USBOH3", which causes the driver
failed to build for mx6sl/mx6sx.
This patch uniform the address name to "USB_BASE_ADDR" for all
mx6 series.
Signed-off-by: Ye.Li <B37916@freescale.com>
Add board-specific callbacks for enabling/disabling port power
into the MXS EHCI controller driver. This is in-line with the
names of callbacks on other systems.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
If the SoC has pcr, we use pcr (peripheral control register)
to enable or disable clock.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
echi-rmobile does not support xHCI. This removes xHCI address
from address table. And this revise a value of CONFIG_USB_MAX_CONTROLLER_COUNT
for lager board and koelsh board.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
R8A7794 has same IP of USB controller as R8A7790 and R8A7791.
This addes support for R8A7794.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
The Allwinner aka sunxi SoCs have one or more USB host controllers.
This adds a driver for their EHCI.
Signed-off-by: Roman Byshko <rbyshko@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
upper_32_bits() and lower_32_bits() have been ported into linux/compat.h.
Start use them now in drivers/usb/host/xhci.h.
Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com>
This patch returns back support for old ep93xx processors family
Signed-off-by: Sergey Kostanbaev <sergey.kostanbaev@gmail.com>
Cc: albert.u.boot@aribaud.net
Because of the brackets the & and && is evaluated before
the comparison. This is likely not the intention. Change
it to test the first and second condition to both be true.
cc: Marek Vasut <marex@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
Initialization of r8a66597 info structure is not enough.
Because initilization was used size of pointer.
This fixes that use size of r8a6659 info structure.
Signed-off-by: Yasuhisa Umano <yasuhisa.umano.zc@renesas.com>
This driver is processed as two USB hub despite one.
The number of root hub is defined in R8A66597_MAX_ROOT_HUB.
This fixes that register is accessed by using the definition
of R8A66597_MAX_ROOT_HUB.
Signed-off-by: Yasuhisa Umano <yasuhisa.umano.zc@renesas.com>
Define and use CONTROL_REGISTER_W1C_MASK to make sure that
w1c bits of usb control register do not get reset while
writing any other bit
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
A few changes are made to the Tegra EHCI driver so that it can set
everything up for device-mode operation on the first USB controller.
This can be used in conjunction with ci_udc.c to operate as a USB
device.
Detailed changes are:
* Rename set_host_mode() to set_up_vbus() since that's really what it
does.
* Modify set_up_vbus() to know whether it's initializing in host or
device mode, and:
- Skip the external VBUS check in device mode, since external VBUS is
expected in this case.
- Disable VBUS output in device mode.
* Modify init_phy_mux() to know whether it's initializing in host or
device mode, and hence skip setting USBMODE_CM_HC (which enables host
mode) in device mode. See the comments in that function for why this
is safe w.r.t. the ordering requirements of PHY selection.
* Modify init_utmi_usb_controller() to force "b session valid" in device
mode, since the HW requires this. This is done in UTMI-specific code,
since we only support device mode on the first USB controller, and that
controller can only talk to a UTMI PHY.
* Enhance ehci_hcd_init() to error-check the requested host-/device-mode
vs. the dr_mode (dual-role mode) value present in device tree, and the
HW configurations which support device mode.
* Enhance ehci_hcd_init() not to skip HW initialization when switching
between host and device mode on a controller. This requires remembering
which mode the last initialization used.
Cc: Jim Lin <jilin@nvidia.com>
Cc: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Both init_{utmi,ulpi}_usb_controller() have nearly identical code for
PHY type selection. Pull this out into a common function to remove the
duplication.
Cc: Jim Lin <jilin@nvidia.com>
Cc: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The TRM for Tegra30 and later all state that USBMODE_CM_HC must be set
before writing to hostpc1_devlc to select which PHY to use for a USB
controller. However, neither init_{utmi,ulpi}_usb_controller() do this
today, so the register writes they perform for PHY selection do not
work.
For the UTMI case, this was hacked around in commit 7e44d9320e "ARM:
Tegra: USB: EHCI: Add support for Tegra30/Tegra114" by adding code to
ehci_hcd_init() which sets USBMODE_CM_HC and duplicates the PHY
selection register write. This code doesn't cover the ULPI case, so I
wouldn't be surprised if ULPI doesn't work with the current code, unless
the ordering requirement only ends up being an issue in HW for UTMI not
ULPI.
This patch fixes init_{utmi,ulpi}_usb_controller() to correctly set
USBMODE_CM_HC before selecting the PHY. Now that this works, we can
remove the duplicate UTMI-specific code in ehci_hcd_init(), thus
simplifying that function.
Cc: Jim Lin <jilin@nvidia.com>
Cc: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Commit 4a271cb1b4 doesn't take into account that fdtdec_setup_gpio()
returns success when the gpio passed to it is FDT_GPIO_NONE (no
gpio node found in the fdtdec_decode_gpio() call). This results in
calling gpio_direction_output() on invalid gpio. For this reason
executing "usb start" command on Arndale causes data abort in the
ehci-exynos driver.
Add the fdt_gpio_isvalid() check to fix that problem.
Signed-off-by: Andrey Konovalov <andrey.konovalov@linaro.org>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Marek Vasut <marex@denx.de>
The rmobile SoC has usb host controller.
This supports USB controllers listed in the R8A7790, R8A7791 and R8A7740.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Increase TXFIFOTHRES field value in TXFILLTUNING register of usb for T4 Rev 2.0.
This decreases data burst rate with which data packets are posted from the TX
latency FIFO to compensate for latencies in DDR pipeline during DMA.
This avoids Tx buffer underruns and leads to successful usb writes
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Put a delay of 5 millisecond after reset so that ULPI phy
gets enough time to come out of reset. Erratum A007075 applies
to following SOCs and their variants, if any
P1010 rev 1.0
B4860 rev 1.0, 2.0
P4080 rev 2.0, 3.0
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Set correct phy_type value for second USB controller.
This is required for supporting SOCs having 2 USB controllers
working simultaneously, one with UTMI phy and other with ULPI phy
Signed-off-by: Nikhil Badola <B46172@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Combine the Tegra USB header file into one header file for all SoCs.
Use ifdef to account for the difference, especially Tegra20 is quite
different from newer SoCs. This avoids duplication, mainly for
Tegra30 and newer devices.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Tom Warren <twarren@nvidia.com>
On Tegra30 and later, the PTS (parallel transceiver select) and STS
(serial transceiver select) are part of the HOSTPC1_DEVLC_0 register
rather than PORTSC1_0 register. Since the reset configuration
usually matches the intended configuration, this error did not show
up on Tegra30 devices.
Also use the slightly different bit fields of first USB, (USBD) on
Tegra20 and move those definitions to the Tegra20 specific header
file.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Clear the forced powerdown bit in the UTMIP_PLL_CFG2_0 register
which brings USB2 in UTMI mode to work. This was clearly missing
since the forced powerdown bit is set in reset by default for all
USB ports.
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Stefan Agner <stefan@agner.ch>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Many USB host controller drivers contain almost identical copies of the
same virtual root hub descriptors. Put these into a common file to avoid
duplication.
Note that there were some very minor differences between the descriptors
in the various files, such as:
- USB 1.0 vs. USB 1.1
- Manufacturer/Device ID
- Max packet size
- String content
I assume these aren't relevant.
Cc: Thomas Lange <thomas@corelatus.se>
Cc: Shinya Kuribayashi <skuribay@pobox.com>
Cc: Gary Jennejohn <garyj@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Eric Millbrandt <emillbrandt@coldhaus.com>
Cc: Pierre Aubert <p.aubert@staubli.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Daniel Hellstrom <daniel@gaisler.com>
Cc: Denis Peter <d.peter@mpl.ch>
Cc: Rodolfo Giometti <giometti@linux.it>
Cc: Zhang Wei <wei.zhang@freescale.com>
Cc: Mateusz Zalega <m.zalega@samsung.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Markus Klotzbuecher <mk@denx.de>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Gary Jennejohn <garyj@denx.de>
Cc: C Nauman <cnauman@diagraph.com>
Cc: David Müller <d.mueller@elsoft.ch>
Cc: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Thomas Abraham <t-abraham@ti.com>
Cc: Tom Rini <trini@ti.com>
Cc: Andrew Murray <amurray@embedded-bits.co.uk>
Cc: Matej Frančeškin <matej.franceskin@comtrade.com>
Cc: Cliff Cai <cliff.cai@analog.com>
Cc: Bryan Wu <cooloney@gmail.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
These data structures are passed to cache-flushing routines, and hence
must be conform to both the USB the cache-flusing alignment requirements.
That means aligning to USB_DMA_MINALIGN. This is important on systems
where cache lines are >32 bytes.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Section 4.10.2 "Advance Queue" of ehci-specification-for-usb.pdf
specifies how an EHCI controller loads a new QTD for processing if the
QH is not already marked as active. It states:
=====
If the field Bytes to Transfer is not zero and the T-bit in the Alternate
Next qTD Pointer is set to zero, then the host controller uses the
Alternate Next qTD Pointer. Otherwise, the host controller uses the Next
qTD Pointer. If Next qTD Pointer’s T-bit is set to a one, then the host
controller exits this state and uses the horizontal pointer to the next
schedule data structure.
=====
Hence, we must ensure that the alternate next QTD pointer's T-bit
(TERMINATE) is set, so the EHCI controller knows to use the next QTD
pointer.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
With this, fixup a trivial build error of get_effective_memsize needing
to be updated in the new board/freescale/p1010rdb/spl.c
Signed-off-by: Tom Rini <trini@ti.com>
Use first four characters for phy_type comparison. Strcmp() should not
be used to check the phy_type string which maybe parsed by hwconfig_subarg().
Hwconfig_subarg() returns part of hwconfig string starting from
phy_type value till the end of the string. Since phy_type could be
either "utmi" or "ulpi", strncmp() should be used so that a comparison
of "utmi;fsl_ddr:bank_intlv=auto" with "utmi" will succeed.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
The driver is no longer used, remove it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michael Schwingen <michael@schwingen.org>
Cc: Tom Rini <trini@ti.com>
Arndale board has AX88760, which is USB 2.0 Hub & USB 2.0 Ethernet Combo
controller, connected to HSIC Phy of USB host controller via USB3503 hub.
This patch uses board specific board_usb_init function to perform reset
sequence for USB3503 hub and enables the relevant config options for
network to work.
Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2
are for HSIC phys. The usb 2.0 phy is already being setup. This patch
sets up the hsic phys.
Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Fix the register access in EHCI HCD. We need to use address of the register
as an ehci_writel() argument.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
In case the controller is not initialized, we shall not de-initialize it.
As the control structure will not be filled, we will produce a null ptr
dereference if the controller is not inited.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
The detection function of the EHCI PCI controller was really cryptic,
add a beefy comment and clean the portion of the code up a bit. No
change in the logic of the code.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
In commit bb1f327 we removed the UHH reset to fix NFS root (over usb
ethernet) problems with Beagleboard (3530 ES1.0). However, this
seems to cause USB detection problems for Pandaboard, about (3/8).
On further investigation, it seems that doing the UHH reset is not
the cause of the original Beagleboard problem, but in the way the reset
was done.
This patch adds proper UHH RESET mechanism for OMAP3 and OMAP4/5 based
on the UHH_REVISION register. This should fix the Beagleboard NFS
problem as well as the Pandaboard USB detection problem.
Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
CC: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Conflicts:
arch/arm/cpu/arm926ejs/mxs/Makefile
board/compulab/cm_t35/Makefile
board/corscience/tricorder/Makefile
board/ppcag/bg0900/Makefile
drivers/bootcount/Makefile
include/configs/omap4_common.h
include/configs/pdnb3.h
Makefile conflicts are due to additions/removals of
object files on the ARM branch vs KBuild introduction
on the main branch. Resolution consists in adjusting
the list of object files in the main branch version.
This also applies to two files which are not listed
as conflicting but had to be modified:
board/compulab/common/Makefile
board/udoo/Makefile
include/configs/omap4_common.h conflicts are due to
the OMAP4 conversion to ti_armv7_common.h on the ARM
side, and CONFIG_SYS_HZ removal on the main side.
Resolution is to convert as this icludes removal of
CONFIG_SYS_HZ.
include/configs/pdnb3.h is due to a removal on ARM side.
Trivial resolution is to remove the file.
Note: 'git show' will also list two files just because
they are new:
include/configs/am335x_igep0033.h
include/configs/omap3_igep00x0.h
submit_common_msg should report amount of data passed from/to device.
Instead, it always returned size requested by Host.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Get rid of too many ifdeffery in usb ohci driver
Add following two configuration for USB clock selecting
- CONFIG_USB_ATMEL_CLK_SEL_PLLB: using PLLB as usb ohci input clock
- CONFIG_USB_ATMEL_CLK_SEL_UPLL: using UPLL as usb ohci input clock
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Add usb host support for at91sam9n12ek board.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Introduce different macros for storing addresses of multiple
USB controllers. This is required for successful initialization
and usage of multiple USB controllers inside u-boot
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
commit bba679144d
"usb: rename board_usb_init_type to usb_init_type" missed xhci-omap.c
So, fix that patch here, and fix a checkpatch warning.
WARNING: Avoid unnecessary line continuations
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Previously, only host1 was supported using an index of 0.
Now, otg has index 0, host1 is 1, host2 is 2, host3 is 3.
Since OTG requires usbmode to be set after reset, I added
CONFIG_EHCI_HCD_INIT_AFTER_RESET to nitrogen6x.h and
mx6qsabreauto.h.
I also added a weak function board_ehci_power to handle
turning power on/off for otg.
Type is type of device connected (USB stick vs Host.)
Init is type of device desired.
Only power up port if type == init == USB_INIT_HOST.
Only return error if type != init.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Add the support for the dra7xx xhci usb host.
dra7xx does not contain an EHCI controller so the headers
can be removed from the board file.
The xHCI host on dra7xx is connected to a usb2 phy so need to
add support to enable those clocks.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Moving the usb/phy code from xhci-omap to the usb/phy directory
and moving the associated phy code over to the new file.
Newer TI processors adding xHCI support will have different PHY configurations
so therefore abstracting this code away will prevent messing around with the
xhci-omap file itself.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Recent patches declares board_usb_init function prototype for a new
usb architecture.
Turning on the OMAP_XHCI defines cause a redefinition compiler failure.
So update the board_usb_init to the latest prototype.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
This commit unifies board-specific USB initialization implementations
under one symbol (usb_board_init), declaration of which is available in
usb.h.
New API allows selective initialization of USB controllers whenever needed.
Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Add the OMAP file for the xHCI Host controller
This code will initilialize the proper components within the
OMAP5 to enable the xHCI host controller.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Some Exynos boards, such as the SMDK5250, control USB port power through
a GPIO pin. For now this had been hardcoded in the exynos5-dt board
file, but not all boards use the same pin, requiring local changes to
support different boards.
This patch moves the GPIO initialization into the USB host controller
drivers which they belong to, and uses the samsung,vbus-gpio parameter
in the device tree to configure it.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Marek Vasut <marex@denx.de>
This adds driver layer for xHCI controller in Samsung's
exynos5 soc. This interacts with xHCI host controller stack.
Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dan Murphy <dmurphy@ti.com>
Cc: Marek Vasut <marex@denx.de>
This adds stack layer for eXtensible Host Controller Interface
which facilitates use of USB 3.0 in host mode.
Adapting xHCI host controller driver in linux-kernel
by Sarah Sharp to needs in u-boot.
Initial porting from Linux kernel version 3.4, with following
top commit history of drivers/usb/host/xhci* :
cf84055 xHCI: Cleanup isoc transfer ring when TD length mismatch found
This adds the basic xHCI host controller driver with bare minimum
features:
- Control/Bulk transfer support has been added with required
infrastructure for necessary xHC data structures.
- Stream protocol hasn't been supported yet.
- No support for quirky devices has been added.
Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dan Murphy <dmurphy@ti.com>
Cc: Marek Vasut <marex@denx.de>
Macros defining bmRequestType field of USB device request,
given in table 9.2 USB 2.0 spec, are rather generic macros
which can be further used by other Host controller stacks.
So moving them to usb_defs header.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dan Murphy <dmurphy@ti.com>
Cc: Marek Vasut <marex@denx.de>
The EHCI controller has some very specific requirements for the USB 2.0
port test modes, which were not closely followed in the initial test
mode commit. It demands that the host controller is completely shut down
(all ports suspended, Run/Stop bit unset) when activating test mode, and
will not work on an already enumerated port.
This patch fixes that by introducing a new ehci_shutdown() function that
closely follows the procedure listed in EHCI 4.14. Also, when we have
such a function anyway, we might as well also use it in
usb_lowlevel_stop() to make the normal host controller shutdown cleaner.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
The 'enable' argument can be better expressed as boolean.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
Currently we have the following behavior in ehci_hcd_init()
- Read csmr1 register, clear bit 26 and then set bit 26.
However a little bit later we call set_usb_phy_clk() which clears bit 26, so
let's get rid of the unnecessary code.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Fix the linker error for missing ulpi_reset when ulpi is not defined
in the board config.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
usb_lowlevel_init() allocates a new periodic_list each time it is invoked,
without freeing the original list. Since it is initialized later on in the code,
just reuse the first-allocated list in future invocations of usb_lowlevel_init.
Cc: Marek Vasut <marex@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Fixes NFS root problems with Beagle (3530 ES1.0) when used with
external USB-ethernet adapter and "USB start" command used within
u-boot.
Soft resetting the UHH module causes instability issues on
all OMAPs so we just avoid it.
See OMAP36xx Errata
i571: USB host EHCI may stall when entering smart-standby mode
i660: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
On OMAP4/5, soft-resetting the UHH module can put it into
Smart-Idle mode and lead to a deadlock.
On OMAP3 this doesn't seem to be the case but still instabilities
are observed on beagle (3530 ES1.0) if soft-reset is used.
e.g. NFS root failures with Linux kernel.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Move the struct ehci_ctrl defition from ehci-hcd.c into ehci.h
so it can be re-used by drivers. In particular, the mv_udc driver
can benefit from this move.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Lei Wen <leiwen@marvell.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and
serial.
Conflicts:
arch/arm/dts/exynos5250.dtsi
Signed-off-by: Tom Rini <trini@ti.com>
Tegra30 and Tegra114 are compatible except PLL parameters.
Tested on Tegra30 Cardhu, and Tegra114 Dalmore
platforms. All works well.
Signed-off-by: Jim Lin <jilin@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Commit 8f62ca6 "usb: ehci: Support interrupt transfers via periodic list"
didn't include any cache management in the new interrupt transfer path.
It also added an extra write to or_asynclistaddr in usb_lowlevel_init(),
without having flushed out the data there.
Add the missing cache management calls, so that the code works again.
This allows the USB keyboard on Tegra's Seaboard/Springbank boards to
work.
Cc: Patrick Georgi <patrick@georgi-clan.de>
Cc: Vincent Palatin <vpalatin@chromium.org>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This patch adds support to both Faraday FUSBH200 and FOTG210,
the differences between Faraday EHCI and standard EHCI are
listed bellow:
1. The PORTSC starts at 0x30 instead of 0x44.
2. The CONFIGFLAG(0x40) is not only un-implemented, and
also has its address space removed.
3. Faraday EHCI is a TDI design, but it doesn't
compatible with the general TDI implementation
found at both U-Boot and Linux.
4. The ISOC descriptors differ from standard EHCI in
several ways. But since U-boot doesn't support ISOC,
we don't have to worry about that.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
There is at least one non-EHCI compliant controller (i.e. Faraday EHCI)
not only leave RESERVED and CONFIGFLAG registers un-implemented
but also has their address spaces removed.
As an result, the PORTSC register of Faraday EHCI always
starts from 0x30 instead of 0x44 in standard EHCI.
So that we'll need a weak-aliased function for abstraction.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
1. The 'index' of ehci_submit_root() is not always > 0.
e.g.
While it gets invoked from usb_get_descriptor(),
the 'index' is always a '0'. (See ch.9 of USB2.0)
2. The PORTSC register is not always required, and thus it
should only report a port error when necessary.
It would cause a port scan failure if the ehci_submit_root()
always gets terminated by a port error.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Marek Vasut <marex@denx.de>
This commit broke USB2 on link (Chromebook Pixel):
020bbcb usb: hub: Power-cycle on root-hub ports
However the root cause seems to be a missing mask and missing 'break'
in ehci-hcd.c. This patch fixes both.
On link, 'usb start' with a USB keyboard and memory stick inserted now
finds both. The keyboard works as expected. Also ext2ls shows a directory
listing from the memory stick.
Signed-off-by: Simon Glass <sjg@chromium.org>
We can use a common global method for calculating minimum of
3 numbers. Put the same in 'common header' and let 'ehci'
use it.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Tom Rini <trini@ti.com>
This patch adds a new 'usb test' command, that will set a port to a USB
2.0 test mode (see USB 2.0 spec 7.1.20). It supports all five test modes
on both downstream hub ports and ordinary device's upstream ports. In
addition, it supports EHCI root hub ports.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Legacy iomux support is no longer needed now that all boards have been converted
to iomux-v3.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Following the removal of the smdk6400 board, the s3c64xx SoC becomes unused, so
remove associated code. It will still be possible to restore it later from the
Git history if necessary.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Use the ability to have several active EHCI controller on a system
in the PCI EHCI controller implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
The interrupt endpoint handling code stores the buffer pointer in the QH
padding field. We need to make it the size of a pointer to avoid strict
aliasing issue with the compiler.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Interrupt transfers aren't meant to be used from the async list
(the EHCI spec indicates trouble with low/full-speed intr on async).
Build a periodic list instead, and provide an API to make use of it.
Then, use that API from the existing interrupt transfer API.
This provides support for USB keyboards using EHCI.
Use timeouts to ensure we cannot get stuck in the keyboard scanning
if something wrong happens (USB device unplugged or fatal I/O error)
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Enabling the non-dt path for the driver so that
we don't get any build errors for non-dt configuration.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
With current FDT support driver tries to parse device node
twice in ehci_hcd_init() and ehci_hcd_stop(), which shouldn't
happen ideally.
Making provision to store data in a global structure and thereby
passing its pointer when needed.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
On EHCI controller with 64-bit address space support, we must initialize
properly the high word for the PCI bus master accesses.
Signed-off-by: Vincent Palatin <vpalatin@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Instead of hardcoding the PCI IDs on the USB controller, use the PCI
class to detect them.
Ensure the busmaster bit is properly set in the PCI configuration.
Signed-off-by: Simon Glass <sjg@chromium.org>
The ehci_hcd entry points were just calling into the Tegra USB
functions. Now that they are in the same file we can just move over the
implementation.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This moves the Tegra USB implementation into the drivers/usb/host
directory. Note that this merges the old
/arch/arm/cpu/armv7/tegra20/usb.c file into ehci-tegra.c. No code
changes, just moving stuff around.
v2: While at it also move some defines and the usb.h header file to make
usb driver usable for Tegra30.
NOTE: A lot more work is required to properly init the PHYs and PLL_U on
Tegra30, this is just to make porting easier and it does no harm here.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Rework ehci-mxs so it supports both ports on MX28. It was necessary
to wrap the per-port configuration into struct ehci_mxs_port and pull
out the clock configuration function.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
The ehci-mxs driver included the register definitions directly.
Use imx-regs.h instead since it contains proper handling of the
differences between mx23 and mx28.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Including header for pads is not needed and breaks board
after renaming pin definitions.
Series-to: u-boot
Series-cc: marex@denx.de,fabio.estevam@freescale.com,eric.nelson@boundarydevices.com
Signed-off-by: Stefano Babic <sbabic@denx.de>
Adding fdt support to ehci-exynos in order to parse
register base addresses from the device node.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
By commit c7e3b2b5, this was chanded to support multiple controllers.
But this has missing of parenthesis. This commit fix it.
-----
r8a66597-hcd.c: In function ‘usb_lowlevel_init’:
r8a66597-hcd.c:911:52: error: expected declaration specifiers before ‘)’
token
r8a66597-hcd.c:935:1: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or‘__attribute__’ before ‘{’ token
r8a66597-hcd.c:939:1: error: expected ‘{’ at end of input
-----
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Lucas Stach <dev@lynxeye.de>
Some variables are initialized with a value defined by macro.
This was changed to use the macro directly. And the variable not to
use deleted it.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Linux usb/ch9.h seems to have all the same information (and more)
as usbdescriptors.h so use the former instead of the later one.
As a consequense of this change USB_SPEED_* values don't correspond
directly to EHCI speed encoding anymore, I've added necessary
recoding in EHCI driver. Also there is no point to put speed into
pipe anymore so it's removed and a bunch of host drivers fixed to
look at usb_device->speed instead.
Old usbdescriptors.h included is not removed as it seems to be
used by old USB device code.
This makes usb.h and usbdevice.h incompatible. Fortunately the
only place that tries to include both are the old MUSB code and
it needs usb.h only for USB_DMA_MINALIGN used in aligned attribute
on musb_regs structure but this attribute seems to be unneeded
(old MUSB code doesn't support any DMA at all).
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance
selection bit.
This issue has been reported by Eric Bénard <eric@eukrea.com> and fixed by
Christoph Fritz <chf.fritz@googlemail.com> on Linux, from which these #define-s
had been copied.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
The correct bit for H1_PM is 16, not 8, which is the DP pull-up impedance
selection bit.
This issue has been reported by Michael Burkey <mdburkey@gmail.com> and fixed by
Christoph Fritz <chf.fritz@googlemail.com> on Linux, from which these #define-s
had been copied.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
A custom board_ehci_hcd_init() may be unneeded, so add a weak default
implementation doing nothing.
By the way, use simple __weak from linux/compiler.h for
board_ehci_hcd_postinit() instead of weak alias with full attribute.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare
to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at
SoC level.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Make EHCI power and overcurrent polarities configurable. If not set, these new
configurartions keep the default register values so that existing board files
do not have to be changed.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
The i.MX53 has MXC_H*_UCTRL_H*_OC_DIS_BIT bits to disable the oc pin.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
The MXC_*_UCTRL_*PM_BIT bits are available only on i.MX51.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
MXC_OTG_UCTRL_OPM_BIT disables (masks) the power/oc pins if set, like
MXC_H1_UCTRL_H1PM_BIT and MXC_H2_UCTRL_H2PM_BIT, not the opposite.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
MXC_OTG_PHYCTRL_OC_DIS_BIT disables the oc pin if set, like MXC_H1_OC_DIS_BIT,
not the opposite.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Clean up ehci-mxc:
- Remove useless #if's.
- Fix identation.
- Issue a #error if used with an unsupported platform.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
when missing USB PHY clock, u-boot will hang during USB
initialization when issuing "usb start". We should check
USBGP[PHY_CLK_VALID] bit to avoid CPU hanging in this case.
Due to controller issue of PHY_CLK_VALID in ULPI mode, we set
USB_EN before checking PHY_CLK_VALID, otherwise PHY_CLK_VALID
doesn't work.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: David Müller <d.mueller@elsoft.ch>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.denx.de>
The i.MX51 has a single USB PHY clock, while the i.MX53 has two. These 3 clocks
have different clock gate control bit-fields.
The existing code was correct only for i.MX53, so this patch fixes the i.MX51
use case.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Jana Rapava <fermata7@gmail.com>
Cc: Wolfgang Grandegger <wg@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Kill off ehci-core.h
It was used to specify some static controller data. To support more than
one controller being active at any time we have to carry the controller
data ourselfes. Change the ehci interface accordingly.
NOTE: OMAP implemented the ehci stuff a bit backwards and should be fixed
to do the same thing as other platforms. But the change for now is at least
compile clean.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Carry an index in the lowlevel usb functions to make specify the
respective usb controller.
Also pass through an controller struct from lowlevel_init to the
creation of the root usb device of this controller.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Reviewed-by: Marek Vasut <marex@denx.de>
usb_hub_descriptor has to be packed as it's used for
communication with the device. Member wHubCharacteristics
violates the natural alignment rules.
Use explicit unaligned access functions for this member.
Fixes ARMv7 traping while using USB.
v2: fix typo found by Thomas Langer
v3: rebased on top of u-boot-usb/master
Signed-off-by: Lucas Stach <dev@lynxeye.de>
* 'master' of git://git.denx.de/u-boot-usb:
MUSB driver: Timeout is never detected as the while loop does not end
usb: fix ulpi_set_vbus prototype
pxa25x: Add UDC registers definitions
USB: Fix strict aliasing in ohci-hcd
usb: Optimize USB storage read/write
ehci: Optimize qTD allocations
usb_stor_BBB_transport: Do not delay when not required
usb_storage: Remove EHCI constraints
usb_storage: Restore non-EHCI support
ehci-hcd: Boost transfer speed
ehci: cosmetic: Define used constants
ehci: Fail for multi-transaction interrupt transfers
arm:trats: Enable g_dnl composite USB gadget with embedded DFU function on TRATS
arm:trats: Support for USB UDC driver at TRATS board.
dfu:cmd: Support for DFU u-boot command
dfu: MMC specific routines for DFU operation
dfu: DFU backend implementation
dfu:usb: DFU USB function (f_dfu) support for g_dnl composite gadget
dfu:usb: Support for g_dnl composite download gadget.
ehci: cosmetic: Define the number of qt_buffers
Signed-off-by: Wolfgang Denk <wd@denx.de>
commit 5f6aa03fda
USB: Fix complaints about strict aliasing in OHCI-HCD
tried to fix this, but gcc4.4 still complains. So, this
patch basically reverts the above and does a simpler fix.
also, the above commit incorrectly changed
/* corresponds to data_buf[4-7] */
datab [1] = 0;
to
/* corresponds to databuf.u8[4-7] */
databuf.u8[1] = 0;
This patch also fixes that.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Relax the qTD transfer alignment constraints in order to need less qTDs for
buffers that are aligned to 512 bytes but not to pages.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
This patch takes advantage of the hardware EHCI qTD queuing mechanism to avoid
software and transfer splitting overhead so as to make transfers as fast as
possible.
The only drawback is a call to memalign. However, this is fast compared to the
transfer timings, and the heap size to allocate is small, e.g. 128 kiB in the
worst case for a transfer length of 65535 packets of 512 bytes.
Tested on i.MX25, i.MX35 and i.MX51. In my test conditions, the speed gain was
very significant (several times faster), which is really appreciable when
accessing large files.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
Make some light cosmetic code cleanup by the way.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ilya Yanok <ilya.yanok@cogentembedded.com>
Cc: Stefan Herbrechtsmeier <stefan@herbrechtsmeier.net>
