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https://github.com/AsahiLinux/u-boot
synced 2024-11-25 14:10:43 +00:00
sunxi: usb: Do not call phy_probe from hcd code
The 2/3 usb-phys on the sunxi SoCs are really a single separate functional block, and are modelled as such in devicetree. So once we've moved all the sunxi usb code to the driver-model then phy_probe will be called once for the entire block from the driver-model enumeration code. Move to this now as this also avoids problems with phy_probe being called multiple times once we introduce ohci support. This also allows us to get rid of the sunxi_usb_phy_enabled_count variable as phy_probe now is guaranteed to be called only once. Since we're effectively rewriting the probe / remove functions, move them to the end of the file while we are at it, as that is the most logical place for them. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
This commit is contained in:
parent
2aacc4239c
commit
e13afeef6f
10 changed files with 76 additions and 63 deletions
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@ -54,7 +54,7 @@ static struct sunxi_usb_phy {
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.usb_rst_mask = CCM_USB_CTRL_PHY1_RST | CCM_USB_CTRL_PHY1_CLK,
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.id = 1,
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},
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#if (CONFIG_USB_MAX_CONTROLLER_COUNT > 1)
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#if CONFIG_SUNXI_USB_PHYS >= 3
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{
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.usb_rst_mask = CCM_USB_CTRL_PHY2_RST | CCM_USB_CTRL_PHY2_CLK,
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.id = 2,
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@ -62,8 +62,6 @@ static struct sunxi_usb_phy {
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#endif
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};
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static int sunxi_usb_phy_enabled_count;
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static int get_vbus_gpio(int index)
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{
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switch (index) {
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@ -167,57 +165,17 @@ void sunxi_usb_phy_enable_squelch_detect(int index, int enable)
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usb_phy_write(phy, 0x3c, enable ? 0 : 2, 2);
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}
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int sunxi_usb_phy_probe(int index)
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{
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struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
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int ret = 0;
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phy->gpio_vbus = get_vbus_gpio(index);
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if (phy->gpio_vbus >= 0) {
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ret |= gpio_request(phy->gpio_vbus, "usbc_vbus");
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ret |= gpio_direction_output(phy->gpio_vbus, 0);
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}
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phy->gpio_vbus_det = get_vbus_detect_gpio(index);
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if (phy->gpio_vbus_det >= 0) {
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ret |= gpio_request(phy->gpio_vbus_det, "usbc_vbus_det");
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ret |= gpio_direction_input(phy->gpio_vbus_det);
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}
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return ret;
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}
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int sunxi_usb_phy_remove(int index)
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{
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struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
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int ret = 0;
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if (phy->gpio_vbus >= 0)
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ret |= gpio_free(phy->gpio_vbus);
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if (phy->gpio_vbus_det >= 0)
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ret |= gpio_free(phy->gpio_vbus_det);
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return ret;
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}
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void sunxi_usb_phy_init(int index)
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{
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struct sunxi_usb_phy *phy = &sunxi_usb_phy[index];
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struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
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/* enable common PHY only once */
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if (sunxi_usb_phy_enabled_count == 0)
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setbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);
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setbits_le32(&ccm->usb_clk_cfg, phy->usb_rst_mask);
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sunxi_usb_phy_config(phy);
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if (phy->id != 0)
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sunxi_usb_phy_passby(index, SUNXI_USB_PASSBY_EN);
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sunxi_usb_phy_enabled_count++;
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}
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void sunxi_usb_phy_exit(int index)
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@ -229,12 +187,6 @@ void sunxi_usb_phy_exit(int index)
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sunxi_usb_phy_passby(index, !SUNXI_USB_PASSBY_EN);
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clrbits_le32(&ccm->usb_clk_cfg, phy->usb_rst_mask);
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/* disable common PHY only once, for the last enabled phy */
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if (sunxi_usb_phy_enabled_count == 1)
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clrbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);
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sunxi_usb_phy_enabled_count--;
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}
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void sunxi_usb_phy_power_on(int index)
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@ -276,3 +228,59 @@ int sunxi_usb_phy_vbus_detect(int index)
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return err;
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}
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int sunxi_usb_phy_probe(void)
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{
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struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
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struct sunxi_usb_phy *phy;
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int i, ret = 0;
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for (i = 0; i < CONFIG_SUNXI_USB_PHYS; i++) {
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phy = &sunxi_usb_phy[i];
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phy->gpio_vbus = get_vbus_gpio(i);
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if (phy->gpio_vbus >= 0) {
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ret = gpio_request(phy->gpio_vbus, "usb_vbus");
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if (ret)
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return ret;
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ret = gpio_direction_output(phy->gpio_vbus, 0);
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if (ret)
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return ret;
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}
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phy->gpio_vbus_det = get_vbus_detect_gpio(i);
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if (phy->gpio_vbus_det >= 0) {
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ret = gpio_request(phy->gpio_vbus_det, "usb_vbus_det");
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if (ret)
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return ret;
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ret = gpio_direction_input(phy->gpio_vbus_det);
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if (ret)
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return ret;
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}
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}
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setbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);
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return 0;
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}
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int sunxi_usb_phy_remove(void)
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{
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struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
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struct sunxi_usb_phy *phy;
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int i;
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clrbits_le32(&ccm->usb_clk_cfg, CCM_USB_CTRL_PHYGATE);
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for (i = 0; i < CONFIG_SUNXI_USB_PHYS; i++) {
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phy = &sunxi_usb_phy[i];
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if (phy->gpio_vbus >= 0)
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gpio_free(phy->gpio_vbus);
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if (phy->gpio_vbus_det >= 0)
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gpio_free(phy->gpio_vbus_det);
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}
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return 0;
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}
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@ -10,8 +10,8 @@
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* SPDX-License-Identifier: GPL-2.0+
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*/
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int sunxi_usb_phy_probe(int index);
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int sunxi_usb_phy_remove(int index);
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int sunxi_usb_phy_probe(void);
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int sunxi_usb_phy_remove(void);
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void sunxi_usb_phy_init(int index);
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void sunxi_usb_phy_exit(int index);
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void sunxi_usb_phy_power_on(int index);
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@ -510,6 +510,10 @@ int misc_init_r(void)
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}
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}
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ret = sunxi_usb_phy_probe();
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if (ret)
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return ret;
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#if defined(CONFIG_MUSB_HOST) || defined(CONFIG_MUSB_GADGET)
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musb_register(&musb_plat, NULL, (void *)SUNXI_USB0_BASE);
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#endif
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@ -20,11 +20,7 @@ int ehci_hcd_init(int index, enum usb_init_type init, struct ehci_hccr **hccr,
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struct ehci_hcor **hcor)
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{
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struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
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int ahb_gate_offset, err;
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err = sunxi_usb_phy_probe(index + 1);
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if (err)
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return err;
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int ahb_gate_offset;
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ahb_gate_offset = index ? AHB_GATE_OFFSET_USB_EHCI1 :
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AHB_GATE_OFFSET_USB_EHCI0;
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@ -66,5 +62,5 @@ int ehci_hcd_stop(int index)
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#endif
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clrbits_le32(&ccm->ahb_gate0, 1 << ahb_gate_offset);
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return sunxi_usb_phy_remove(index + 1);
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return 0;
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}
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@ -250,15 +250,10 @@ static int sunxi_musb_init(struct musb *musb)
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pr_debug("%s():\n", __func__);
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err = sunxi_usb_phy_probe(0);
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if (err)
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return err;
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if (is_host_enabled(musb)) {
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err = sunxi_usb_phy_vbus_detect(0);
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if (err) {
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eprintf("Error: A charger is plugged into the OTG\n");
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sunxi_usb_phy_remove(0);
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return -EIO;
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}
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}
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@ -296,7 +291,7 @@ static int sunxi_musb_exit(struct musb *musb)
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sunxi_usb_phy_power_off(0);
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sunxi_usb_phy_exit(0);
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return sunxi_usb_phy_remove(0);
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return 0;
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}
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const struct musb_platform_ops sunxi_musb_ops = {
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@ -17,6 +17,8 @@
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#endif
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#define CONFIG_SUNXI_USB_PHYS 3
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/*
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* Include common sunxi configuration where most the settings are
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*/
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@ -17,6 +17,8 @@
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
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#endif
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#define CONFIG_SUNXI_USB_PHYS 2
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/*
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* Include common sunxi configuration where most the settings are
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*/
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@ -20,6 +20,8 @@
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#endif
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#define CONFIG_SUNXI_USB_PHYS 3
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/*
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* Include common sunxi configuration where most the settings are
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*/
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@ -18,6 +18,8 @@
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#endif
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#define CONFIG_SUNXI_USB_PHYS 3
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#define CONFIG_ARMV7_PSCI 1
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#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
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#define CONFIG_TIMER_CLK_FREQ 24000000
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@ -18,6 +18,8 @@
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
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#endif
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#define CONFIG_SUNXI_USB_PHYS 2
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/*
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* Include common sunxi configuration where most the settings are
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*/
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