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arm: mvebu: add multiple usb-hostcontroller support for AXP
This patch adds support for multiple hostcontrollers to the ehci-marvell driver and enables all 3 usb-hcs on the db-mv784mp-gp board. It depends on the initial Armada XP usb support patch from Stefan. Signed-off-by: Anton Schubert <anton.schubert@gmx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
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2 changed files with 12 additions and 8 deletions
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@ -38,13 +38,14 @@ DECLARE_GLOBAL_DATA_PTR;
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#define MVUSB0_BASE \
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(mvebu_soc_family() == MVEBU_SOC_A38X ? \
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MVEBU_USB20_BASE : MVEBU_AXP_USB_BASE)
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#define MVUSB_BASE(port) MVUSB0_BASE + ((port) << 12)
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/*
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* Once all the older Marvell SoC's (Orion, Kirkwood) are converted
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* to the common mvebu archticture including the mbus setup, this
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* will be the only function needed to configure the access windows
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*/
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static void usb_brg_adrdec_setup(void)
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static void usb_brg_adrdec_setup(int index)
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{
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const struct mbus_dram_target_info *dram;
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int i;
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@ -52,8 +53,8 @@ static void usb_brg_adrdec_setup(void)
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dram = mvebu_mbus_dram_info();
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for (i = 0; i < 4; i++) {
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writel(0, MVUSB0_BASE + USB_WINDOW_CTRL(i));
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writel(0, MVUSB0_BASE + USB_WINDOW_BASE(i));
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writel(0, MVUSB_BASE(index) + USB_WINDOW_CTRL(i));
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writel(0, MVUSB_BASE(index) + USB_WINDOW_BASE(i));
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}
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for (i = 0; i < dram->num_cs; i++) {
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@ -62,14 +63,16 @@ static void usb_brg_adrdec_setup(void)
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/* Write size, attributes and target id to control register */
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writel(((cs->size - 1) & 0xffff0000) | (cs->mbus_attr << 8) |
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(dram->mbus_dram_target_id << 4) | 1,
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MVUSB0_BASE + USB_WINDOW_CTRL(i));
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MVUSB_BASE(index) + USB_WINDOW_CTRL(i));
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/* Write base address to base register */
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writel(cs->base, MVUSB0_BASE + USB_WINDOW_BASE(i));
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writel(cs->base, MVUSB_BASE(index) + USB_WINDOW_BASE(i));
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}
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}
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#else
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static void usb_brg_adrdec_setup(void)
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#define MVUSB_BASE(port) MVUSB0_BASE
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static void usb_brg_adrdec_setup(int index)
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{
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int i;
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u32 size, base, attrib;
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@ -118,9 +121,9 @@ static void usb_brg_adrdec_setup(void)
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int ehci_hcd_init(int index, enum usb_init_type init,
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struct ehci_hccr **hccr, struct ehci_hcor **hcor)
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{
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usb_brg_adrdec_setup();
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usb_brg_adrdec_setup(index);
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*hccr = (struct ehci_hccr *)(MVUSB0_BASE + 0x100);
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*hccr = (struct ehci_hccr *)(MVUSB_BASE(index) + 0x100);
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*hcor = (struct ehci_hcor *)((uint32_t) *hccr
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+ HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
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@ -47,6 +47,7 @@
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#define CONFIG_USB_STORAGE
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#define CONFIG_USB_EHCI_MARVELL
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#define CONFIG_EHCI_IS_TDI
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
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/* SPI NOR flash default params, used by sf commands */
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#define CONFIG_SF_DEFAULT_SPEED 1000000
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