Commit graph

23911 commits

Author SHA1 Message Date
Udit Kumar
891180923e clk: ti: clk-k3: Notify AVS driver upon setting clock rate
AVS is enabled at R5 SPL stage, on few platforms like J721E
and J7200 clk-k3 is used instead if clk-sci driver.

Add support in clk-k3 driver as well to notify AVS driver
on setting clock rate so that voltage is changed accordingly.

Cc: Keerthy <j-keerthy@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
2023-10-12 14:06:04 -04:00
Alexey Romanov
3ba8ea4b46 dwc3: add support for Amlogic A1 family
Now the driver supports also A1 phy layer.

Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231005085434.74755-8-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-10-12 13:39:41 +02:00
Igor Prusov
7db7cce356 a1: clk: Add missing USB_PHY_IN and USB_PHY gates
We use this clocks in dwc3 driver.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231005085434.74755-7-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-10-12 13:39:41 +02:00
Alexey Romanov
5533c883ce phy: support Amlogic A1 family
Setting G12A and A1 is similar, so we can use G12A phy
driver with little changes.

Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231005085434.74755-6-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-10-12 13:39:41 +02:00
Alexey Romanov
80f45c3b36 phy: move clk enable/disable in init/exit
It is better to place clk_enable() in phy_meson_g12a_usb2_init()
and clk_disable() in phy_meson_g12a_usb2_exit().

For more detailed information, please see comments in the review of
a similar driver in the Linux Kernel:

https://lore.kernel.org/all/CAFBinCCEhobbyKHuKDWzTYCQWgNT1-e8=7hMhq1mvT6CuEOjGw@mail.gmail.com/

Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231005085434.74755-5-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-10-12 13:39:41 +02:00
Alexey Romanov
881714983e phy: get rid of raw hex values
It is better to use defines instead of write raw
hex values in regmap.

Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231005085434.74755-4-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-10-12 13:39:41 +02:00
Alexey Romanov
cffe312bd7 reset: add support for Amlogic A1 family
This patch adds reset support for the Amlogic A1 family.
We add the structure meson_reset_drvdata, which in the future
will allow this driver to be used for other families by declaring
only the correct parameters reg_count and level_offset.

Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231005085434.74755-3-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-10-12 13:39:41 +02:00
Igor Prusov
1fcf190e70 clk: Add clock driver for Amlogic A1
This patch adds basic clock driver for Amlogic A1 Family which supports
enabling/disabling some gates, getting frequencies and setting rate
with limited reparenting.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20230925155209.130671-3-ivprusov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-10-12 13:39:41 +02:00
Simon Glass
6d225ec0cc video: Mark truetype_measure() static
This function is not used outside this file, so mark it static.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-11 15:43:55 -04:00
Simon Glass
37db20d0a6 video: Support showing a cursor
Add rudimentary support for displaying a cursor on a vidconsole. This
helps the user to see where text is being entered.

The implementation so far is very simple: the cursor is just a vertical
bar of fixed width and cannot be erased. To erase the cursor, the text
must be redrawn over it.

This is good enough for expo but will need enhancement to be useful for
the command-line console. For example, it could save and restore the
area behind the cursor.

For now, enable this only for expo, to reduce code size.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-11 15:43:55 -04:00
Simon Glass
617d7b545b video: Export vidconsole_entry_start()
At present this is called only when a newline is detected, since this
indicates the start of a line of text being entered.

Export this function so it can be used by expo, which may start a new
text line itself, without first writing out a newline.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-11 15:43:55 -04:00
Simon Glass
9899eef2cb video: Allow saving and restoring text-entry state
Text entry operates within a context which includes quite a bit of
information. For example, with Truetype fonts, each character in the
text string has a position stored, so that it is possible to
backspace to that character. This information is built up as strings
are drawn on the display.

For the command line, there is just a single context. It is created
when command-line entry starts and it is destroyed (or at least not
needed anymore) when the user presses <enter> to enter the command.

By contrast, expo needs to be able to switch in and out of a text-entry
context, since it is also displaying other objects in the scene.

Add a way to save and restore the entry context for a vidconsole. This
is only needed for the truetype vidconsole, so add a method for that,
storing the information in an abuf struct.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-11 15:43:55 -04:00
Simon Glass
9e55d09596 video: Allow obtaining the nominal size of a string size
At present there is a method for measuring text, but if the actual text
string is not known, it cannot be used.

For text editor we want to set the size of the entry box to cover the
expected text size. Add the concept of a 'norminal' size with a method
to calculate that for the vidconsole.

If the method is not implemented, fall back to using the font size,
which is sufficient for fixed-width fonts.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-11 15:43:55 -04:00
Sean Anderson
89cfa35bfc misc: fs_loader: Fix alignment of fs_loader driver
DM_DRIVER_GET will redeclare the fs_loader driver without the correct
alignment. This causes GCC to use the default section alignment of 32
bytes. This in turn creates a gap in the linker list due to the padding
required to achieve the correct alignment, corrupting all further entries.
Use DM_DRIVER_REF instead, which doesn't redeclare anything.

Fixes: 0998a20cfc ("misc: fs_loader: Add function to get the chosen loader")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-10-11 13:22:32 -04:00
Andre Przywara
31565bb0aa driver: rng: Add DM_RNG interface for ARMv8.5 RNDR registers
The ARMv8.5 architecture extension defines architectural RNDR/RNDRRS
system registers, that provide 64 bits worth of randomness on every
read. Since it's an extension, and implementing it is optional, there is
a field in the ID_AA64ISAR0_EL1 ID register to query the availability
of those registers.

Add a UCLASS_RNG driver that returns entropy via repeated reads from
those system registers, if the extension is implemented.
The driver always binds, but checks the availability in the probe()
routine.

This helps systems which suffer from low boot entropy, since U-Boot can
provide entropy via the generic UEFI entropy gathering protocol to the OS,
at an early stage.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-11 13:22:32 -04:00
Nicolò Veronese
538b97dd5d spi: mtk_spim: prevent global pll clock override
With commit 793e623011 ("spi: mtk_spim: get spi clk rate only once") a
new system to calculate the SPI clocks has been added.

Unfortunately, the do_div macro overrides the global priv->pll_clk_rate
field. This will cause to have a reduced clock rate on each subsequent
SPI call.

Signed-off-by: Valerio 'ftp21' Mancini <ftp21@ftp21.eu>
Signed-off-by: Nicolò Veronese <nicveronese@gmail.com>
2023-10-11 13:21:33 -04:00
Heinrich Schuchardt
2d307fb9ed input: avoid NULL dereference
Before using the result of env_get("stdin") we must check if it is NULL.

Avoid #if. This resolves the -Wunused-but-set-variable issue and we don't
need a dummy assignment in the else branch. Anyway this warning is
disabled in the Makefile.

For sake of readability use an early return after the configuration check.

Checking CONFIG_SPL_BUILD is incorrect as env_get() is only defined if
CONFIG_$(SPL_TPL)ENV_SUPPORT=y.

Fixes: 985ca3945f ("spl: input: Allow input in SPL and TPL")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-10-11 10:35:24 -04:00
Tom Rini
5ae883c716 Merge tag 'fsl-qoirq-2023-10-10' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Drop legacy PPA secure FW support
support for MC reserved memory
reset the FLSHxCR1 registers for nxp_fspi
2023-10-11 10:21:33 -04:00
Bin Meng
94a846298e dm: blk: Drop blk_{read,write}_devnum()
blk_{read,write}_devnum() are no longer used by anywhere in the
source tree. Drop them.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-10 16:25:48 -04:00
Bin Meng
a9bf25cb93 dm: blk: Rename get_desc() and make it externally visible
get_desc() can be useful outside blk-uclass.c. Let's change it to
an API and make it externally visible.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-10 16:25:48 -04:00
Bin Meng
cf83ff3452 blk: blkmap: Support mapping to device of any block size
At present if a device to map has a block size other than 512,
the blkmap map process just fails. There is no reason why we
can't just use the block size of the mapped device.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-10 16:25:48 -04:00
Bin Meng
6efca7feae blk: blkmap: Make bind/unbind routines static
These 2 are only used in drivers/block/blkmap.c.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-10 16:25:48 -04:00
Bin Meng
e261fbf347 blk: host_dev: Sanity check on the size of host backing file
Since we are emulating a block device, its size should be multiple
of the configured block size.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-10 16:19:43 -04:00
Bin Meng
0491cb8f9b blk: host_dev: Make host_sb_detach_file() and host_sb_ops static
They are only used in drivers/block/host_dev.c.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-10 16:19:43 -04:00
Bin Meng
8897faba2d blk: sandbox: Support binding a device with a given logical block size
Allow optionally set the logical block size of the host device to
bind in the "host bind" command. If not given, defaults to 512.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
2023-10-10 16:19:43 -04:00
Bin Meng
7020b2eca4 blk: Use a macro for the typical block size
Avoid using the magic number 512 directly.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-10 16:19:29 -04:00
Venkatesh Yadav Abbarapu
950fc4a58b net: phy: xilinx_phy: Get rid of using property xlnx, phy-type
As the xlnx,phy-type device tree property is deprecated and phy-mode
is being used, so removing the code references of xlnx,phy-type.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231010030436.11854-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-10-10 14:57:29 +02:00
Han Xu
131e44c544 spi: nxp_fspi: reset the FLSHxCR1 registers
Reset the FLSHxCR1 registers to default value. ROM may set the register
value and it affects the SPI NAND normal functions.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-10-10 10:13:51 +08:00
Laurentiu Tudor
1dd7b56634 drivers: net: fsl-mc: add support for MC reserved memory
Add support for declaring in device tree the reserved memory ranges
required for MC. Since the MC firmware acts as any DMA master present
in the SoC, the reserved memory ranges need also be identity mapped
in the SMMU, so create the required 'iommu-addresses' property in
the reserved memory nodes.
For now this support is used only on LX2160A SoCs.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-10-10 10:13:33 +08:00
Heinrich Schuchardt
6a1e0ae43e dm: serial: fix serial_post_probe()
The size of the name of a udevice is not limited.

When setting the fixed sized name field of a stdio device we must ensure
that the target string is NUL terminated to avoid buffer overflows.

Fixes: 57d92753d4 ("dm: Add a uclass for serial devices")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-09 15:24:31 -04:00
Matthias Schiffer
fb730a2c5a mailbox: k3-sec-proxy: fix error handling for missing scfg in FDT
The wrong field was checked.

Fixes: f9aa41023b ("mailbox: Introduce K3 Secure Proxy Driver")
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-10-09 15:24:31 -04:00
Michal Simek
1e1c23714f Revert "clk: versal: Enable clock driver for Versal NET"
This partially reverts commit ff33227819.

Versal NET clock node should use "xlnx,versal-net-clk", "xlnx,versal-clk"
compatible string that's why it is not necessary to define Versal NET
specific compatible string if there is no any other change needed. It can
be get back if there is a need to differentiate clock support between
Versal and Versal NET.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c09276022db5f1b150679cc7a9f9583363ace2fb.1695808971.git.michal.simek@amd.com
2023-10-09 12:14:05 +02:00
Michal Simek
2036621a61 arm64: zynqmp: Fix Siva's email address format
Some patches didn't have his full name and also there was one more ">" at
the end of email address. That's why correct both of these issues.

Fixes: 174d728471 ("arm64: zynqmp: Switch to amd.com emails")
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e970cc0dfabe293c2baf6b231d34f3af0386f1eb.1695378830.git.michal.simek@amd.com
2023-10-09 10:25:32 +02:00
Venkatesh Yadav Abbarapu
9898d1056d pinctrl: zynqmp: Display the tristate configuration for all pins
Read the tristate config for all the pins and display it.

ZynqMP> pinmux status MIO1
MIO1: slew:fast	bias:enabled pull:up input:cmos	drive:12mA
      volt:1.8	tri_state:enabled

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230914100620.26346-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-10-09 10:25:32 +02:00
Venkatesh Yadav Abbarapu
ecba4380ad net: zynq_gem: Update the MDC clock divisor in the probe function
MDC clock change needs to be done when the driver probe function
is called as mdio is enabled at probe and not when the ethernet starts.
Setup the MDC clock at the probe itself.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230922045010.22852-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-10-09 10:25:32 +02:00
Tom Rini
d9bb6d779b Merge tag 'u-boot-rockchip-20231007' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Add Board: rk3568 Bananapi R2Pro;
- Update pcie bifurcation support;
- dwc_eth_qos controller support for rk3568 and rk3588;
- Compressed binary support for U-Boot on rockchip platform;
- dts and config updates for different board and soc;

[ trini: Fix conflict on include/spl.h ]
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-08 09:58:55 -04:00
Jonas Karlman
c8ebcc921f power: pmic: rk8xx: Fix power-on source check in SPL
The commit 30975fb73d ("rockchip: Add option to prevent booting on
power plug-in") introduce an option to prevent booting a device when the
device was powered on due to power plug-in instead of pressing a power
button.

This feature works by checking the power-on source during PMIC probe
and powers off the device if power-on source was power plug-in.
This check currently runs very late at PMIC probe in U-Boot proper.

Fix so that the power-on source check can work at probe time in SPL.
Also enable probe after bind and remove the PMIC banner in SPL.

With this we can use ROCKCHIP_RK8XX_DISABLE_BOOT_ON_POWERON and
SPL_PMIC_RK8XX to power off the device very quickly after TPL instead
of after TF-A and U-Boot proper has been loaded and run.

  DDR V1.18 f366f69a7d typ 23/07/17-15:48:58
  ln
  LP4/4x derate en, other dram:1x trefi
  ddrconfig:7
  LPDDR4X, 324MHz
  BW=32 Col=10 Bk=8 CS0 Row=17 CS1 Row=17 CS=2 Die BW=16 Size=8192MB

  change to: 324MHz
  clk skew:0x64

  change to: 528MHz
  clk skew:0x58

  change to: 780MHz
  clk skew:0x58

  change to: 1056MHz(final freq)
  clk skew:0x40
  out
  Power Off due to plug-in event

Fixes: 30975fb73d ("rockchip: Add option to prevent booting on power plug-in")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-10-07 16:52:48 +08:00
Jonas Karlman
c12e3a83f1 power: pmic: rk8xx: Use sysreset implementation of the poweroff command
Select SYSRESET_CMD_POWEROFF to use the sysreset implementation of the
poweroff command when PMIC_RK8XX is enabled.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-07 16:50:15 +08:00
Jonas Karlman
01b8ed4754 net: dwc_eth_qos_rockchip: Add support for RK3588
Add rk_gmac_ops and other special handling that is needed for GMAC to
work on RK3588.

rk_gmac_ops was ported from linux commits:
2f2b60a0ec28 ("net: ethernet: stmmac: dwmac-rk: Add gmac support for rk3588")
88619e77b33d ("net: stmmac: rk3588: Allow multiple gmac controller")

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-10-07 16:49:41 +08:00
Jonas Karlman
8e76ff61a3 net: dwc_eth_qos: Add glue driver for GMAC on Rockchip RK3568
Add a new glue driver for Rockchip SoCs, i.e RK3568, with a GMAC based
on Synopsys DWC Ethernet QoS IP.

rk_gmac_ops was ported from linux commit:
3bb3d6b1c195 ("net: stmmac: Add RK3566/RK3568 SoC support")

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-10-07 16:49:41 +08:00
Jonas Karlman
95446f4a4d net: dwc_eth_qos: Stop spam of RX packet not available message
Remove spam of RX packet not available debug messages when waiting to
receive a packet.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-10-07 16:49:41 +08:00
Jonas Karlman
ded6014dfd net: dwc_eth_qos: Return error code when start fails
Return error code when phy_connect fails or no link can be established.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-10-07 16:49:41 +08:00
Jonas Karlman
4ad1dfc7ab net: dwc_eth_qos: Drop unused rx_pkt from eqos_priv
rx_pkt is allocated and not used for anything, remove it.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-10-07 16:49:41 +08:00
Jonas Karlman
09329df25f rockchip: Port IO-domain driver for RK3568 from linux
Port the Rockchip IO-domain driver for RK3568 from linux.

The driver auto probe after bind to configure IO-domain based on the
regulator voltage. Compared to the linux driver this driver is not
notified about regulator voltage changes and only configure IO-domain
based on the initial voltage autoset by the regulator.

It is not recommended to enable MMC_IO_VOLTAGE or the mmc signal voltage
and IO-domain may end up out of sync.

Based on the linux commit 28b05a64e47c ("soc: rockchip: io-domain: add
rk3568 support").

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-07 16:49:41 +08:00
shengfei Xu
bb657ffdd6 regulator: rk8xx: Return correct voltage for switchout converters
The voltage value for switchout converters is always reported as 0 uV.
When the switch is enabled, it's voltage is same as input supply.

Fix this by implementing get_value for switchout converters.

Fixes: ee30068fa5 ("power: pmic: rk809: support rk809 pmic")
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
[jonas@kwiboo.se: fix checkpatch error, update commit message]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-07 16:49:41 +08:00
Joseph Chen
04c38c6c49 regulator: rk8xx: Return correct voltage for buck converters
Information from the first range group is always used to calculate the
voltage returned for buck converters. This may result in wrong voltage
reported back to the regulator_get_value caller.

Traverse all the possible BUCK ranges to fix this issue.

Fixes: addd062bea ("power: pmic: rk816: support rk816 pmic")
Fixes: b62280745e ("power: pmic: rk805: support rk805 pmic")
Fixes: b4a35574b3 ("power: pmic: rk817: support rk817 pmic")
Fixes: ee30068fa5 ("power: pmic: rk809: support rk809 pmic")
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
[jonas@kwiboo.se: fix checkpatch error, simplify buck get_value, update commit message]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-07 16:49:41 +08:00
Jonas Karlman
d99fb64a98 power: regulator: Only run autoset once for each regulator
With the commit 4fcba5d556 ("regulator: implement basic reference
counter"), keeping regulator enablement in balance become more important.
Calling regulator_autoset multiple times on a fixed regulator increase
the enable count for each call, resulting in an unbalanced enable count.

Introduce a AUTOSET_DONE flag and use it to mark that autoset has run
for the regulator. Return -EALREADY on any subsequent call to autoset.

This fixes so that the enable count is only ever increased by one per
regulator for autoset.

Fixes: 4fcba5d556 ("regulator: implement basic reference counter")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-07 16:49:41 +08:00
Jonas Karlman
b37260bca1 phy: rockchip: naneng-combphy: Use signal from comb PHY on RK3588
Route signal from comb PHY instead of PCIe3 PHY to PCIe1l0 and PCIe1l1.

Fixes use of pcie2x1l0 on ROCK 5B.

Code imported from mainline linux driver.

Fixes: c5b4a012bc ("phy: rockchip: naneng-combphy: Support rk3588")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-07 10:23:12 +08:00
Jonas Karlman
50e54e8067 phy: rockchip: snps-pcie3: Add support for RK3588
Add support for the RK3588 variant to the driver.

Code imported almost 1:1 from mainline linux driver.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-07 10:23:12 +08:00
Jonas Karlman
1ebebfcc25 phy: rockchip: snps-pcie3: Add bifurcation support for RK3568
Configure aggregation or bifurcation mode on RK3568 based on the value
of data-lanes property.

Code imported almost 1:1 from mainline linux driver.

Fixes: 6ec62b6ca6 ("phy: rockchip: Add Rockchip Synopsys PCIe 3.0 PHY")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-07 10:23:12 +08:00
Jonas Karlman
6cacdf842d phy: rockchip: snps-pcie3: Refactor to use a phy_init ops
Add a phy_init ops in preparation for upcoming support of a RK3588
variant in the driver.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-07 10:23:12 +08:00
Jonas Karlman
3b39592e8e phy: rockchip: snps-pcie3: Refactor to use clk_bulk API
Change to use clk_bulk API and syscon_regmap_lookup_by_phandle to
simplify in preparation for upcoming support of a RK3588 variant.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-07 10:23:12 +08:00
Jonas Karlman
9af0c7732b pci: pcie_dw_rockchip: Configure number of lanes and link width speed
Set number of lanes and link width speed control register based on the
num-lanes property.

Code imported almost 1:1 from dw_pcie_setup in mainline linux.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-10-07 10:23:12 +08:00
Simon Glass
f69d3d6d10 pci: serial: Support reading PCI-register size with base
The PCI helpers read only the base address for a PCI region. In some cases
the size is needed as well, e.g. to pass along to a driver which needs to
know the size of its register area.

Update the functions to allow the size to be returned. For serial, record
the information and provided it with the serial_info() call.

A limitation still exists in that the size is not available when OF_LIVE
is enabled, so take account of that in the tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
7f5ff034c3 serial: Drop ns16550 serial_getinfo() in SPL
This is typically not needed in SPL/TPL and increases the code size.
Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
a64fec9f17 sandbox: Init the EC properly even if no state file is available
This currently relies on sandbox attempting to read a state file. At
present it always does, even when there is no state file, in which case it
fails, but still inits the EC.

That is a bug, so update this driver to set the current image always, even
if no state is read.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
7071c82bdc dm: core: Support writing a 64-bit value
Add support for writing a single 64-bit value into a property.

Repurpose the existing tests to handle this case too.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
d9216c8683 dm: core: Support writing a boolean
Add functions to write a boolean property. This involves deleting it if
the value is false.

Add a new ofnode_has_property() as well. Add a comment about the behaviour
of of_read_property() when the property value is empty.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
62b1db3377 dm: core: Add a way to convert a devicetree to a dtb
Add a way to flatten a devicetree into binary form. For livetree this
involves generating the devicetree using fdt_property() and other calls.
For flattree it simply involves providing the buffer containing the tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
67fb2159fb dm: core: Add a way to delete a node
Add a function to delete a node in an existing tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:13 -04:00
Simon Glass
c15862ffdd dm: core: Add a way to copy a node
Add a function to copy a node to another place under a new name. This is
useful at least for testing, since copying a test node with existing
properties is easier than writing the code to generate it all afresh.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
e0c3c21d8b dm: core: Add a function to create an empty tree
Provide a function to create a new, empty tree.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
247970978d dm: core: Reverse the argument order in ofnode_copy_props()
Follow the order used by memcpy() as it may be less confusing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
7907a7b99a dm: core: Correct help in TPL_DM and VPL_DM
There are copying errors in the help. Fix these.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
77b9b187e9 serial: Drop mention of SPL/TPL_SYS_MALLOC_F
These symbols do not (yet) exist, so drop the usage of them in the
serial Kconfig file. It has no effect.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:12 -04:00
Simon Glass
82e26e0d68 spl: Use CONFIG_SPL... instead of CONFIG_..._SPL_...
We like to put the SPL first so it is clear that it relates to SPL. Rename
various malloc-related options which have crept in, to stick to this
convention.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-10-06 14:38:11 -04:00
Tom Rini
be2abe73df Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
+ ae350: modify memory layout and target name
+ ae350: use generic RISC-V timer driver in S-mode
+ Support bootstage report for RISC-V
+ Support C extension exception command for RISC-V
+ Add Starfive timer support
2023-10-05 13:26:44 -04:00
Tom Rini
cb59d23584 Merge branch '2023-10-04-TI-dts-updates'
- Resync some TI K3 DTS files, to fix booting on them.
2023-10-05 10:48:21 -04:00
Tom Rini
25453dcf0d moveconfig: enhance output; rename to qconfig
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Merge tag 'dm-pull-4oct23' of https://source.denx.de/u-boot/custodians/u-boot-dm

moveconfig: enhance output; rename to qconfig
2023-10-04 18:49:58 -04:00
Neha Malcom Francis
a9c2b7326b drivers: firmware: ti_sci: Get SCI revision only if TIFS/SYSFW is up
When setting up boot media to load the TIFS binary in legacy boot flow
(followed by J721E), get_timer() is called which calls dm_timer_init()
which then gets the tick-timer: mcu_timer0. mcu_timer0 uses k3_clks
(clock controller) and k3_pds (power controller) from the dmsc node that
forces probe of the ti_sci driver of TIFS that hasn't been loaded yet!
Running ti_sci_cmd_get_revision from the probe leads to panic since no
TIFS and board config binaries have been loaded yet. Resolve this by
moving ti_sci_cmd_get_revision to ti_sci_get_handle_from_sysfw as a
common point of invocation for both legacy and combined boot flows.

Before doing this, it is important to go through whether any sync points
exist where revision is needed before ti_sci_get_handle_from_sysfw is
invoked. Going through the code along with boot tests on both flows
ensures that there are none.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2023-10-04 14:16:01 -04:00
Simon Glass
a535a371a9 dm: core: Adjust dump-sorting to get stats only when needed
If we are not sorting the tree we don't need to get the stats. Adjust the
code to avoid the wasted time.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-04 09:25:20 -06:00
Tom Rini
b83e285866 STM32 MCU:
_ alignment with kernel DT v6.5 for stm32f429 and stm32f746
   _ rework way of displaying ST logo for stm32f746-disco and stm32f769-disco
 
 STM32 MPU:
   _ alignment with kernel DT v6.6-rc1
   _ add RNG support for stm32mp13
   _ add USB, USB boot and stm32prog command support for stm32mp13
   _ add support of USART1 clock for stm32mp1
   _ only print RAM and board code with SPL_DISPLAY_PRINT flag for
     stm32mp1
   _ rename update_sf to dh_update_sd_to_sf and add dh_update_sd_to_emmc
     for stm32mp15xx DHCOR
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Merge tag 'u-boot-stm32-20231004' of https://source.denx.de/u-boot/custodians/u-boot-stm

STM32 MCU:
  _ alignment with kernel DT v6.5 for stm32f429 and stm32f746
  _ rework way of displaying ST logo for stm32f746-disco and stm32f769-disco

STM32 MPU:
  _ alignment with kernel DT v6.6-rc1
  _ add RNG support for stm32mp13
  _ add USB, USB boot and stm32prog command support for stm32mp13
  _ add support of USART1 clock for stm32mp1
  _ only print RAM and board code with SPL_DISPLAY_PRINT flag for
    stm32mp1
  _ rename update_sf to dh_update_sd_to_sf and add dh_update_sd_to_emmc
    for stm32mp15xx DHCOR

[ Fix merge conflict at board/st/common/stm32mp_dfu.c ]
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-04 10:49:30 -04:00
Anatolij Gustschin
062ee99e0a clk: stm32mp1: Add support for USART1 clock
Add USART1 clock parents and mux configuration. This allows
support for configuring the USART1 as the serial console in
SPL and U-Boot via device tree. Without this patch the SPL
with usart1 serial console enabled crashes because it can
not find the clock specified in the device tree for usart1.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:03 +02:00
Harald Seiler
719a8759cd ram: stm32mp1: Only print RAM config with CONFIG_SPL_DISPLAY_PRINT
Ensure that the RAM configuration line is only printed when
CONFIG_SPL_DISPLAY_PRINT is set.

Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:03 +02:00
Gatien Chevallier
e077d7f613 rng: stm32: Implement custom RNG configuration support
STM32 RNG configuration should best fit the requirements of the
platform. Therefore, put a platform-specific RNG configuration
field in the platform data. Default RNG configuration for STM32MP13
is the NIST certified configuration [1].

While there, fix and the RNG init sequence to support all RNG
versions.

[1] https://csrc.nist.gov/projects/cryptographic-module-validation-program/entropy-validations/certificate/53

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:03 +02:00
Gatien Chevallier
6032292534 rng: stm32: add error concealment sequence
Seed errors can occur when using the hardware RNG. Implement the
sequences to handle them. This avoids irrecoverable RNG state.

Try to conceal seed errors when possible. If, despite the error
concealing tries, a seed error is still present, then return an error.

A clock error does not compromise the hardware block and data can
still be read from RNG_DR. Just warn that the RNG clock is too slow
and clear RNG_SR.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:03 +02:00
Gatien Chevallier
01af363623 rng: stm32: add RNG clock frequency restraint
In order to ensure a good RNG quality and compatibility with
certified RNG configuration, add RNG clock frequency restraint.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:03 +02:00
Gatien Chevallier
2d2574b405 rng: stm32: Implement configurable RNG clock error detection
RNG clock error detection is now enabled if the "clock-error-detect"
property is set in the device tree.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:03 +02:00
Gatien Chevallier
77e0c60879 rng: stm32: rename STM32 RNG driver
Rename the RNG driver as it is usable by other STM32 platforms
than the STM32MP1x ones. Rename CONFIG_RNG_STM32MP1 to
CONFIG_RNG_STM32

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-10-04 13:26:02 +02:00
Yu Chien Peter Lin
8a0d5f2f51 riscv: andesv5: Prefer using the generic RISC-V timer driver in S-mode
The Andes PLMT driver directly accesses the mtime MMIO region,
indicating its intended use in the M-mode boot stage. However,
since U-Boot proper (S-mode) also uses the PLMT driver, we need
to specifically mark the region as readable through PMPCFGx (or
S/U-mode read-only shared data region for Smepmp) in OpenSBI.

Granting permission for this case doesn't make sense. Instead,
we should use the generic RISC-V timer driver to read the mtime
through the TIME CSR. Therefore, we add the SPL_ANDES_PLMT_TIMER
config, which ensures that the PLMT driver is linked exclusively
against M-mode U-Boot or U-Boot SPL binaries.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2023-10-04 18:23:54 +08:00
Kuan Lim Lee
c202426d6a timer: starfive: Add Starfive timer support
Add timer driver in Starfive SoC. It is an timer that outside
of CPU core and inside Starfive SoC.

Signed-off-by: Kuan Lim Lee <kuanlim.lee@starfivetech.com>
Reviewed-by: Wei Liang Lim <weiliang.lim@starfivetech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-10-04 17:59:31 +08:00
Chanho Park
6d78473b3d timer: riscv_aclint_timer: add timer_get_boot_us for BOOTSTAGE
timer_get_boot_us function is required to record the boot stages as
us-based timestamp.
To get a micro-second time from a timer tick, this converts the
formula like below to avoid zero result of (tick / rate) part.

From: time(us) = (tick / rate) * 1000000
To  : time(us) = (tick * 1000) / (rate / 1000)

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-10-04 17:55:37 +08:00
Chanho Park
74fbd74ed2 riscv: timer: add timer_get_boot_us for BOOTSTAGE
timer_get_boot_us function is required to record the boot stages as
us-based timestamp.
To get a micro-second time from a timer tick, this converts the
formula like below to avoid zero result of (tick / rate) part.

From: time(us) = (tick / rate) * 1000000
To  : time(us) = (tick * 1000) / (rate / 1000)

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-10-04 17:55:20 +08:00
Tom Rini
65b9b3462b Merge branch 'next_pinctrl_sync' of https://source.denx.de/u-boot/custodians/u-boot-sh
- pinctrl re-sync for Renesas chips
2023-10-02 15:19:02 -04:00
Tom Rini
ac897385bb Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-10-02 10:55:44 -04:00
Marek Vasut
610b078b33 clk: renesas: Synchronize R8A774E1 RZ/G2H clock tables with Linux 6.5.3
Synchronize R8A774E1 RZ/G2H clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
ff682fc80d clk: renesas: Synchronize R8A774C0 RZ/G2E clock tables with Linux 6.5.3
Synchronize R8A774C0 RZ/G2E clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
c94f980524 clk: renesas: Synchronize R8A774B1 RZ/G2N clock tables with Linux 6.5.3
Synchronize R8A774B1 RZ/G2N clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
635811a106 clk: renesas: Synchronize R8A774A1 RZ/G2M clock tables with Linux 6.5.3
Synchronize R8A774A1 RZ/G2M clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
47ce17386b clk: renesas: Synchronize R8A779G0 V4H clock tables with Linux 6.5.3
Synchronize R-Car R8A779G0 V4H clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

The PLL2_VAR is not implemented yet and PLL2 is still configured
as regular PLL2 only.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
79d4ef4b47 clk: renesas: Synchronize R8A779F0 S4 clock tables with Linux 6.5.3
Synchronize R-Car R8A779F0 S4 clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
2387f5613d clk: renesas: Synchronize R8A779A0 V3U clock tables with Linux 6.5.3
Synchronize R-Car R8A779A0 V3U clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
501a4ebb1a clk: renesas: Synchronize R8A77995 D3 clock tables with Linux 6.5.3
Synchronize R-Car R8A77995 D3 clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
41406bc988 clk: renesas: Synchronize R8A77990 E3 clock tables with Linux 6.5.3
Synchronize R-Car R8A77990 E3 clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
f9ef870159 clk: renesas: Synchronize R8A77980 V3H clock tables with Linux 6.5.3
Synchronize R-Car R8A77980 V3H clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
86d2d706df clk: renesas: Synchronize R8A77970 V3M clock tables with Linux 6.5.3
Synchronize R-Car R8A77970 V3M clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
e2c11b3c18 clk: renesas: Synchronize R8A77965 M3-N clock tables with Linux 6.5.3
Synchronize R-Car R8A77965 M3-N clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
0b93899bfb clk: renesas: Synchronize R8A77960 M3-W and R8A77961 M3-W+ clock tables with Linux 6.5.3
Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
3e997e2d7a clk: renesas: Synchronize R8A77951 H3 clock tables with Linux 6.5.3
Synchronize R-Car R8A77951 H3 clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
bf1e81c37b clk: renesas: Synchronize R8A7794 E2 clock tables with Linux 6.5.3
Synchronize R-Car R8A7794 E2 clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
ee6f8888b6 clk: renesas: Synchronize R8A7792 V2H clock tables with Linux 6.5.3
Synchronize R-Car R8A7792 V2H clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
b5ea25f8a6 clk: renesas: Synchronize R8A7791 M2-W and R8A7793 M2-N clock tables with Linux 6.5.3
Synchronize R-Car R8A7791 M2-W and R8A7793 M2-N clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
bd259a0c9c clk: renesas: Synchronize R8A7790 H2 clock tables with Linux 6.5.3
Synchronize R-Car R8A7790 H2 clock tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
bad82145b2 pinctrl: renesas: Synchronize R8A779G0 V4H PFC tables with Linux 6.5.3
Synchronize R-Car R8A779G0 V4H PFC tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
d1fd6c7f52 pinctrl: renesas: Synchronize R8A779F0 S4 PFC tables with Linux 6.5.3
Synchronize R-Car R8A779F0 S4 PFC tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
c58997112e pinctrl: renesas: Synchronize R8A779A0 V3U PFC tables with Linux 6.5.3
Synchronize R-Car R8A779A0 V3U PFC tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
2cc32389bc pinctrl: renesas: Synchronize R8A77995 D3 PFC tables with Linux 6.5.3
Synchronize R-Car R8A77995 D3 PFC tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
a723b2ac32 pinctrl: renesas: Synchronize R8A77990 E3 PFC tables with Linux 6.5.3
Synchronize R-Car R8A77990 E3 PFC tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
827cece3aa pinctrl: renesas: Synchronize R8A77980 V3H PFC tables with Linux 6.5.3
Synchronize R-Car R8A77980 V3H PFC tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
b16bd90a12 pinctrl: renesas: Synchronize R8A77970 V3M PFC tables with Linux 6.5.3
Synchronize R-Car R8A77970 V3M PFC tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
617850accd pinctrl: renesas: Synchronize R8A77965 M3-N PFC tables with Linux 6.5.3
Synchronize R-Car R8A77965 M3-N PFC tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
05329b9a00 pinctrl: renesas: Synchronize R8A77960 M3-W and R8A77961 M3-W+ PFC tables with Linux 6.5.3
Synchronize R-Car R8A77960 M3-W and R8A77961 M3-W+ PFC tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
259aac6a27 pinctrl: renesas: Synchronize R8A77951 H3 PFC tables with Linux 6.5.3
Synchronize R-Car R8A77951 H3 PFC tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
84e367c39a pinctrl: renesas: Synchronize R8A7794 E2 PFC tables with Linux 6.5.3
Synchronize R-Car R8A7794 E2 PFC tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
49e78ea891 pinctrl: renesas: Synchronize R8A7792 V2H PFC tables with Linux 6.5.3
Synchronize R-Car R8A7792 V2H PFC tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
ef16c759d4 pinctrl: renesas: Synchronize R8A7791 M2-W and R8A7793 M2-N PFC tables with Linux 6.5.3
Synchronize R-Car R8A7791 M2-W and R8A7793 M2-N PFC tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
7ad92d52c2 pinctrl: renesas: Synchronize R8A7790 H2 PFC tables with Linux 6.5.3
Synchronize R-Car R8A7790 H2 PFC tables with Linux 6.5.3,
commit 238589d0f7b421aae18c5704dc931595019fa6c7 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
f3a163dc86 pinctrl: renesas: Add support for 1.8V/2.5V I/O voltage levels
Currently, the Renesas pin control driver supports pins that can switch
their I/O voltage levels between either 1.8V and 3.3V, or between 2.5V
and 3.3V.  However, some SoCs have pins that can switch between 1.8V and
2.5V.

Add support for this by replacing the separate SH_PFC_PIN_CFG_IO_VOLTAGE
capability and voltage level flags by a 2-bit field, to cover three
possible I/O voltage switching options.

Ported from Linux kernel commit by Geert Uytterhoeven:
b88e733ac517 ("pinctrl: renesas: Add support for 1.8V/2.5V I/O voltage levels")

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
8cf4d3faec pinctrl: renesas: Drop R8A77950 H3 ES1.x PFC table entry
Drop outstanding R8A77950 H3 ES1.x PFC table entry from sh_pfc.h .
No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
9f482d7c0e pinctrl: renesas: Rename RZ/A1 R7S72100 PFC tables to RZ/A1
Rename pfc-r7s72100.c to pfc-rza1.c to match the file name with Linux.
Rename the Kconfig symbol to match.

No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Marek Vasut
6db2bb63d2 pinctrl: renesas: Rename R8A7795 H3 PFC tables file name to R8A77951
Rename pfc-r8a7795.c to pfc-r8a77951.c to match the file name with Linux
and to indicate the PFC driver does not support R8A77950 H3 ES1.* .

No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-10-01 00:08:28 +02:00
Francois Berder
7b4ffe8c32 clk: at91: Fix initializing arrays
Arrays are not cleared entirely because ARRAY_SIZE
returns the number of elements in an array, not the size
in bytes.
This commit fixes the calls to memset by providing the
array size in bytes instead of the number of elements
in the array.

Signed-off-by: Francois Berder <fberder@outlook.fr>
2023-09-29 16:45:40 +03:00
Alexander Dahl
d6b4359e50 mtd: nand: raw: atmel: Add error handling when rb-gpios missing
Adapt behaviour to Linux kernel driver.

The return value of gpio_request_by_name_nodev() was not checked before,
and thus in case 'rb-gpios' was missing in DT, rb.type was set to
ATMEL_NAND_GPIO_RB nevertheless, leading to output like this for
example (on sam9x60-curiosity with the line removed from dts):

    NAND:  Could not find valid ONFI parameter page; aborting
    device found, Manufacturer ID: 0xc2, Chip ID: 0xdc
    Macronix NAND 512MiB 3,3V 8-bit
    512 MiB, SLC, erase size: 256 KiB, page size: 4096, OOB size: 64
    atmel-nand-controller nand-controller: NAND scan failed: -22
    Failed to probe nand driver (err = -22)
    Failed to initialize NAND controller. (error -22)
    0 MiB

Note: not having that gpio assigned in dts is possible, the driver does
not override nand_chip->dev_ready() then and a generic solution is used.

Fixes: 6a8dfd5722 ("nand: atmel: Add DM based NAND driver")
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com>
Acked-by: Michael Trimarchi <michael@amarulasolutions.com>
2023-09-27 12:43:05 +03:00
Tom Rini
90c81f407d buildman file-keeping and build-progress improvements
dm tree enhancement
 adjust meaning of bootph-pre-ram/sram
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Merge tag 'dm-next-23sep23' of https://source.denx.de/u-boot/custodians/u-boot-dm into next

buildman file-keeping and build-progress improvements
dm tree enhancement
adjust meaning of bootph-pre-ram/sram
2023-09-24 12:43:00 -04:00
Simon Glass
1e94b46f73 common: Drop linux/printk.h from common header
This old patch was marked as deferred. Bring it back to life, to continue
towards the removal of common.h

Move this out of the common header and include it only where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-09-24 09:54:57 -04:00
AKASHI Takahiro
36e45f69c4 cmd: dm: allow for selecting uclass and device
The output from "dm tree" or "dm uclass" is a bit annoying
if the number of devices available on the system is huge.
(This is especially true on sandbox when I debug some DM code.)

With this patch, we can specify the uclass name or the device
name that we are interested in in order to limit the output.

For instance,

=> dm uclass usb
uclass 121: usb
0     usb@1 @ 0bcff8b0, seq 1

uclass 124: usb

=> dm tree usb:usb@1
 Class     Index  Probed  Driver                Name
-----------------------------------------------------------
 usb           0  [   ]   usb_sandbox           usb@1
 usb_hub       0  [   ]   usb_hub               `-- hub
 usb_emul      0  [   ]   usb_sandbox_hub           `-- hub-emul
 usb_emul      1  [   ]   usb_sandbox_flash             |-- flash-stick@0
 usb_emul      2  [   ]   usb_sandbox_flash             |-- flash-stick@1
 usb_emul      3  [   ]   usb_sandbox_flash             |-- flash-stick@2
 usb_emul      4  [   ]   usb_sandbox_keyb              `-- keyb@3

If you want forward-matching against a uclass or udevice name,
you can specify "-e" option.

=> dm uclass -e usb
uclass 15: usb_emul
0     hub-emul @ 0bcffb00, seq 0
1     flash-stick@0 @ 0bcffc30, seq 1
2     flash-stick@1 @ 0bcffdc0, seq 2
3     flash-stick@2 @ 0bcfff50, seq 3
4     keyb@3 @ 0bd000e0, seq 4

uclass 64: usb_mass_storage

uclass 121: usb
0     usb@1 @ 0bcff8b0, seq 1

uclass 122: usb_dev_generic

uclass 123: usb_hub
0     hub @ 0bcff9b0, seq 0

uclass 124: usb

=> dm tree -e usb
 Class     Index  Probed  Driver                Name
-----------------------------------------------------------
 usb           0  [   ]   usb_sandbox           usb@1
 usb_hub       0  [   ]   usb_hub               `-- hub
 usb_emul      0  [   ]   usb_sandbox_hub           `-- hub-emul
 usb_emul      1  [   ]   usb_sandbox_flash             |-- flash-stick@0
 usb_emul      2  [   ]   usb_sandbox_flash             |-- flash-stick@1
 usb_emul      3  [   ]   usb_sandbox_flash             |-- flash-stick@2
 usb_emul      4  [   ]   usb_sandbox_keyb              `-- keyb@3

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-23 12:31:25 -06:00
Jonas Karlman
9e644284ab dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation
Nodes with bootph-pre-sram/ram props are bound in multiple phases:
1. At TPL (bootph-pre-sram) or SPL (bootph-pre-ram) phase
2. At U-Boot proper pre-relocation phase
3. At U-Boot proper normal phase

However the binding and U-Boot Driver Model documentation indicate that
only nodes marked with bootph-all or bootph-some-ram should be bound in
the U-Boot proper pre-relocation phase.

Change ofnode_pre_reloc to report a node with bootph-pre-ram/sram prop
with a pre-reloc status only after U-Boot proper pre-relocation phase.
Also update the ofnode_pre_reloc documentation to closer reflect the
binding and driver model documentation.

This changes behavior of what nodes are bound in the U-Boot proper
pre-relocation phase. Change to bootph-all or add bootph-some-ram prop
to restore prior behavior.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-09-23 12:31:25 -06:00
Francois Berder
8cf61051ae drivers: mediatek: Fix error handling in mtk_i2c_do_transfer
Errors were handled only if an I2C transfer timed out
and received a NACK which is very unlikely. This commit
changes the condition such that errors are handled if
an I2C transfer times out or received a NACK.

Signed-off-by: Francois Berder <fberder@outlook.fr>
Reviewed-by: Heiko Schocher <hs@denx.de>
2023-09-22 15:54:39 -04:00
Ryosuke Saito
c5b42e3e9e net: sni_netsec: Add workaround for timeout error
The NETSEC GMAC occasionally falls into a weird state where
MAC_REG_DESC_SOFT_RST has never been cleared and shows errors like the
below when networking commands are issued:

    => ping 192.168.1.1
    ethernet@522d0000 Waiting for PHY auto negotiation to complete... done
    netsec_wait_while_busy: timeout
    Using ethernet@522d0000 device

    ARP Retry count exceeded; starting again
    ping failed; host 192.168.1.1 is not alive

It happens on not only 'ping' but also 'dhcp', 'tftp' and so on.

Luckily, restarting the NETSEC GMAC and trying again seems to fix the
problematic state. So first ensure that we haven't entered the state by
checking MAC_REG_DESC_SOFT_RST to be cleared; otherwise, restarting
NETSEC/PHY and trying again would work as a workaround.

Signed-off-by: Ryosuke Saito <ryosuke.saito@linaro.org>
Tested-by: Masahisa Kojima <masahisa.kojima@linaro.org>
2023-09-22 15:54:35 -04:00
Simon Glass
1b1d36ec58 bootstd: Keep track of use of usb stop
When 'usb stop' is run, doing 'bootflow scan' does not run the USB hunter
again so does not see any devices. Fix this by telling bootstd about the
state of USB.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-09-22 06:05:40 +08:00
Simon Glass
3fef0def84 x86: coreboot: Enable VIDEO_COPY
At least on modern machines the write-back mechanism for the frame buffer
is quite slow when scrolling, since it must read the entire frame buffer
and write it back.

Enable the VIDEO_COPY feature to resolve this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:05:40 +08:00
Simon Glass
b1350636e6 x86: coreboot: Look for DBG2 UART in SPL too
If coreboot does not set up sysinfo for the UART, SPL currently hangs.
Use the DBG2 technique there as well. This allows coreboot64 to boot from
coreboot even if the console info is missing from sysinfo

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Simon Glass
fb5cfbe17d x86: Update cbmem driver
This driver is not actually built since a Kconfig was never created for
it.

Add a Kconfig (which is already implied by COREBOOT) and update the
implementation to avoid using unnecessary memory. Drop the #ifdef at the
top since we can rely on Kconfig to get that right.

To enable it (in addition to serial and video), use:

   setenv stdout serial,vidconsole,cbmem

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[Modified the comment about overflow a little bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2023-09-22 06:03:46 +08:00
Venkatesh Yadav Abbarapu
a3ade3dae4 spi: zynqmp_qspi: Workaround for small data cache issue
Cache related issues are seen with small sized data reads.
Due to this, proper data is not read. Also some times sf probe
fails randomly. To workaround this issue, invalidate dcache after read DMA
is triggered.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230915031759.28889-3-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-21 13:20:12 +02:00
Ashok Reddy Soma
638189ddea spi: zynqmp_qspi: Change flush cache to invalidate cache
Before DMA read, ideally cache should be invalidated, so that data from
memory will be updated to cache after DMA is completed. But
flush_dcache_range is being used which is incorrect. Change
flush_dcache_range to invalidate_dcache_range.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230915031759.28889-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-21 13:20:12 +02:00
Venkatesh Yadav Abbarapu
c7cce2606d clk: versal: Fix the function versal_clock_ref
For reference clocks, PM_CLK_GET_PARENT call is not allowed.
PM_CLK_GET_PARENT only allowed for MUX clocks. Rename the
versal_clock_ref() with versal_clock_get_ref_rate() for better
readability. Fix the versal_clock_get_ref_rate function by
passing the parent_id, and check whether the parent_id
belongs to ref_clk or pl_alt_ref_clk.
Also adding the function versal_clock_get_fixed_factor_rate()
if the clk_id belongs to the fixed factor clock.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230912033055.2549-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-21 13:20:11 +02:00
Michal Simek
a5d2721bb2 dm: core: ofnode: Fix error message in ofnode_read_bootscript_address/flash()
Missing u-boot node shouldn't be visible in bootlog without debug enabled
that's why change message from printf to debug.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ff62e980237ab271cf05facfbc306e85914a8c6e.1694438999.git.michal.simek@amd.com
2023-09-21 13:20:11 +02:00
Tejas Bhumkar
e31d707d8b net: phy: xilinx-gmii2rgmii: Removed hardcoded phy address 0 for bridge
Current code expects bridge phy address at 0 which is not correct
expectation because bridge phy address is configurable.
That's why update the code to read reg property to figure it out
where bridge is and use it in phy creation code.

Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20230915045043.4167628-1-tejas.arvind.bhumkar@amd.com
2023-09-21 13:20:11 +02:00
Maxim Kochetkov
a77c2bd902 net: axi_emac: Convert to ofnode functions
FDT functions is not working when OF_LIVE is enabled.
Convert fdt parsing functions to ofnode parsing functions.

Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru>
Link: https://lore.kernel.org/r/20230811074351.26916-1-fido_max@inbox.ru
2023-09-21 13:20:11 +02:00
Michal Simek
44f35e1aca dm: core: ofnode: Add ofnode_read_bootscript_flash()
ofnode_read_bootscript_flash() reads bootscript address from
/options/u-boot DT node. bootscr-flash-offset and bootscr-flash-size
properties are read and values are filled. When bootscr-flash-size is not
defined, bootscr-flash-offset property is unusable that's why cleaned.
Both of these properties should be defined to function properly.

Also add test to cover this new function.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/08a3e6c09cce13287c69ad370e409e7f1766b406.1693465465.git.michal.simek@amd.com
2023-09-21 13:20:11 +02:00
Michal Simek
db5e349d3d dm: core: ofnode: Add ofnode_read_bootscript_address()
ofnode_read_bootscript_address() reads bootscript address from
/options/u-boot DT node. bootscr-address or bootscr-ram-offset properties
are read and values are filled. bootscr-address has higher priority than
bootscr-ram-offset and the only one should be described in DT.

Also add test to cover this new function.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/23be3838502efef61803c90ef6e8b32bbd6ede41.1693465140.git.michal.simek@amd.com
2023-09-21 13:20:11 +02:00
Ashok Reddy Soma
99b46477e3 clk: Dont return error when assigned-clocks is empty or missing
There is a chance that assigned-clock-rates is given and assigned-clocks
could be empty. Dont return error in that case, because the probe of the
corresponding driver will not be called at all if this fails.
Better to continue to look for it and return 0.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a9a9d853e0ac396cd9b3577cce26279a75765711.1693384296.git.michal.simek@amd.com
2023-09-21 13:20:11 +02:00
Ashok Reddy Soma
12d2da980e pinctrl: zynqmp: Add support for output-enable and bias-high-impedance
Add support to handle 'output-enable' and 'bias-high-impedance'
configurations in pinctrl driver.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230811054829.13162-4-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-21 13:20:10 +02:00
Ashok Reddy Soma
4af320b10c pinctrl: zynqmp: Add version check for TRISTATE configuration
Support for configuring TRISTATE parameter is added in ZYNQMP PMUFW(Xilinx
ZynqMP Platform Management Firmware) Configuration Param Set version 2.0.
If the requested configuration is TRISTATE then check the version before
requesting Xilinx firmware to set the configuration.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230811054829.13162-3-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-21 13:20:10 +02:00
Ashok Reddy Soma
f16347f41c firmware: zynqmp: Add support to check feature
Add firmware API to check if given feature is supported.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230811054829.13162-2-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-21 13:20:10 +02:00
Michal Simek
fa12dfa08a dm: core: support reading a single indexed u64 value
Add helper function to allow reading a single indexed u64 value from a
device-tree property containing multiple u64 values, that is an array of
u64's.

Co-developed-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/08043c8d204d0068f04c27de86afe78c75c50b69.1692956263.git.michal.simek@amd.com
2023-09-21 13:20:10 +02:00
Neal Frager
f0084f1dfd drivers/mtd/spi/spi-nor-ids.c: add mx25u25635f support
This patch adds support for the MX25U25635F QSPI Flash Memory.

Signed-off-by: Neal Frager <neal.frager@amd.com>
Link: https://lore.kernel.org/r/20230821124502.3308208-1-neal.frager@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-09-21 13:20:10 +02:00
Simon Glass
31b097a265 video: Move the BMP options
These appear prominently in the main menu at present. Move them to the
video Kconfig where they belong.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-09-19 11:36:25 -04:00
Simon Glass
8168359160 video: Move bmp code to drivers/video
This relates to graphics which is only active when CONFIG_VIDEO is
enabled. Move it into that directory.

For most boards there is no harm in compiling it always, since it if not
used it will be dropped by the linker. But for the EFI app this is not
the case, so retain use of the BMP Kconfig.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-09-19 11:36:25 -04:00
Reid Tonking
77269ba93d drivers: misc: k3_avs: Add Linux compatibles to maintain sync
The ti,j7200-vtm and ti,j721e-vtm compatibles are used for voltage
and thermal monitoring (VTM) by (drivers/thermal/k3_j72xx_bandgap.c)
in Linux, but the same hardware is used for adaptive voltage scaling
(AVS) in u-boot, This brings both drivers in line with the same
compatibles.

Since the j7200 uses the config as the j721e, the data is inherited
from j721e vs creating a duplicate

Signed-off-by: Neha Francis <n-francis@ti.com>
Signed-off-by: Reid Tonking <reidt@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-09-19 09:13:19 -04:00
Marek Vasut
2caf974b5f board: usb: Replace legacy usb_gadget_handle_interrupts()
The usb_gadget_handle_interrupts() is no longer used anywhere,
replace the remaining uses with dm_usb_gadget_handle_interrupts()
which takes udevice as a parameter.

Some of the UDC drivers currently ignore the index parameter altogether,
those also ignore the udevice and have to be reworked. Other like the
dwc3_uboot_handle_interrupt() had to be switched from index to udevice
look up to avoid breakage.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # on khadas vim3
Signed-off-by: Marek Vasut <marex@denx.de>
2023-09-15 23:38:02 +02:00
Marek Vasut
890076d20e dm: usb: udc: Drop legacy udevice handler functions
Remove legacy functions limited by the dev_array array,
those are no longer used anywhere, all the code uses
plain udevice based access now.

The usb_gadget_handle_interrupts() is doing udevice look up
until all call sites use dm_usb_gadget_handle_interrupts().

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Marek Vasut <marex@denx.de>
2023-09-15 23:38:02 +02:00
Marek Vasut
bfa352d1cb usb: gadget: ether: Use plain udevice for UDC controller interaction
Convert to plain udevice interaction with UDC controller
device, avoid the use of UDC uclass dev_array .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2023-09-15 23:38:02 +02:00
Marek Vasut
99e0532831 usb: gadget: acm: Use plain udevice for UDC controller interaction
Convert to plain udevice interaction with UDC controller
device, avoid the use of UDC uclass dev_array .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2023-09-15 23:38:02 +02:00
Marek Vasut
5b8c9d1b58 thordown: Use plain udevice for UDC controller interaction
Convert to plain udevice interaction with UDC controller
device, avoid the use of UDC uclass dev_array .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2023-09-15 23:38:02 +02:00
Marek Vasut
6b84acc978 sdp: Use plain udevice for UDC controller interaction
Convert to plain udevice interaction with UDC controller
device, avoid the use of UDC uclass dev_array .

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Marek Vasut <marex@denx.de>
2023-09-15 23:38:02 +02:00
Marek Vasut
f032260c7c cmd: ums: Use plain udevice for UDC controller interaction
Convert to plain udevice interaction with UDC controller
device, avoid the use of UDC uclass dev_array .

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # on khadas vim3
Signed-off-by: Marek Vasut <marex@denx.de>
2023-09-15 23:38:02 +02:00
Marek Vasut
7307b121a5 usb: sandbox: Add DM_USB_GADGET support
Remove local usb_gadget_register_driver()/usb_gadget_unregister_driver()
implementation which is implemented in udc-core.c instead if DM_USB_GADGET
is enabled. Add no-op dm_usb_gadget_handle_interrupts() implementation.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marex@denx.de>
2023-09-15 23:38:01 +02:00
Marek Vasut
a1fa8bbb90 dm: usb: udc: Factor out plain udevice handler functions
Pull the functionality of UDC uclass that operates on plain udevice
and does not use this dev_array array into separate functions and
expose those functions, so that as much code as possible can be
switched over to these functions and the dev_array can be dropped.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Marek Vasut <marex@denx.de>
2023-09-15 23:38:01 +02:00
Marek Vasut
3bb917ee3b wdt: Remove unused NEEDS_MANUAL_RELOC code bits
The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-14 10:42:25 -04:00
Marek Vasut
d66bea2915 timer: Remove unused NEEDS_MANUAL_RELOC code bits
The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-14 10:42:25 -04:00
Marek Vasut
09340a6616 sysreset: Remove unused NEEDS_MANUAL_RELOC code bits
The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-14 10:42:25 -04:00
Marek Vasut
b130e034ce spi: Remove unused NEEDS_MANUAL_RELOC code bits
The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-14 10:42:25 -04:00
Marek Vasut
d55326d629 serial: Remove unused NEEDS_MANUAL_RELOC code bits
The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-14 10:42:25 -04:00
Marek Vasut
09c8b8de02 net: phy: Remove unused NEEDS_MANUAL_RELOC code bits
The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-14 10:42:25 -04:00
Marek Vasut
3903d695b4 net: miiphybb: Remove unused NEEDS_MANUAL_RELOC code bits
The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-14 10:42:25 -04:00
Marek Vasut
7b8c61df20 sf: Remove unused NEEDS_MANUAL_RELOC code bits
The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-14 10:42:25 -04:00
Marek Vasut
4f90349a2e hwspinlock: Remove unused NEEDS_MANUAL_RELOC code bits
The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-14 10:42:24 -04:00
Marek Vasut
4a17f17edf gpio: Remove unused NEEDS_MANUAL_RELOC code bits
The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-14 10:42:24 -04:00
Marek Vasut
9c419d5d19 crypto: rsa: Remove unused NEEDS_MANUAL_RELOC code bits
The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-14 10:42:24 -04:00
Marek Vasut
568e6ae97d cpu: Remove unused NEEDS_MANUAL_RELOC code bits
The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-14 10:42:24 -04:00
Marek Vasut
db87cd50f4 dm: Remove unused NEEDS_MANUAL_RELOC code bits
The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-14 10:42:24 -04:00
Marek Vasut
4fa6511e8c blkcache: Remove unused NEEDS_MANUAL_RELOC code bits
The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2023-09-14 10:42:24 -04:00
Jonas Karlman
565f556d0b phy: Refactor generic_{setup, shutdown}_phy() to reduce complexity
Refactor generic_{setup,shutdown}_phy() to reduce complexity and
indentation. This have no intended functional change.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-09-13 15:52:21 -04:00
Jonas Karlman
1a4293e001 phy: Return success from generic_setup_phy() when phy is not found
Restore the old behavior of ehci_setup_phy() and ohci_setup_phy() to
return success when generic_phy_get_by_index() return -ENOENT.

Fixes: 84e561407a ("phy: Add generic_{setup,shutdown}_phy() helpers")
Fixes: 10005004db ("usb: ohci: Make usage of generic_{setup,shutdown}_phy() helpers")
Fixes: 083f8aa978 ("usb: ehci: Make usage of generic_{setup,shutdown}_phy() helpers")
Fixes: 75341e9c16 ("usb: ehci: Remove unused ehci_{setup,shutdown}_phy() helpers")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-09-13 15:52:21 -04:00
Jonas Karlman
bd78f2c2c2 phy: Fix generic_setup_phy() return value on power on failure
generic_phy_exit() typically return 0 for a struct phy that has been
initialized with a generic_phy_init() call.

generic_setup_phy() returns the value from a generic_phy_exit() call
when generic_phy_power_on() fails. This hides the failed state of the
power_on ops from the caller of generic_setup_phy().

Fix this by ignoring the return value of the generic_phy_exit() call and
return the value from the generic_phy_power_on() call.

Fixes: 84e561407a ("phy: Add generic_{setup,shutdown}_phy() helpers")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-09-13 15:52:21 -04:00
Jonas Karlman
3b4e6e9462 video: rockchip: dw_mipi_dsi: Use generic_phy_valid() helper
The documentation for struct phy state that "The content of the
structure is managed solely by the PHY API and PHY drivers".

Change to use the generic_phy_valid() helper to check if phy is valid.

Fixes: b7d8d40346 ("video: rockchip: dw_mipi_dsi: Fix external phy existence check")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-09-13 15:52:21 -04:00
Jonas Karlman
8ec228b62b net: zynq: Use generic_phy_valid() helper
The documentation for struct phy state that "The content of the
structure is managed solely by the PHY API and PHY drivers".

Change to use the generic_phy_valid() helper to check if phy is valid.

Fixes: 10c50b1fac ("net: zynq: Add support for PHY configuration in SGMII mode")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-09-13 15:52:20 -04:00
Jonas Karlman
017ae4920b scsi: ceva: Use generic_phy_valid() helper
The documentation for struct phy state that "The content of the
structure is managed solely by the PHY API and PHY drivers".

Change to use the generic_phy_valid() helper to check if phy is valid.

Fixes: f6f5451d46 ("scsi: ceva: Enable PHY and reset support")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-09-13 15:52:20 -04:00
Jonas Karlman
5ccfdd8a83 usb: dwc3: Use generic_phy_valid() helper
The documentation for struct phy state that "The content of the
structure is managed solely by the PHY API and PHY drivers".

Change to use the generic_phy_valid() helper to check if phy is valid.
Also remove setting phy->dev to NULL now that generic_phy_get_by_name()
properly initialize phy->dev to NULL.

Fixes: 142d50fbce ("usb: dwc3: Add support for usb3-phy PHY configuration")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-09-13 15:52:20 -04:00
Jonas Karlman
14639bf14d phy: Set phy->dev to NULL when generic_phy_get_by_index_nodev() fails
Generic phy helpers typically use generic_phy_valid() to determine if
the helper should perform its function on a passed struct phy.
generic_phy_valid() treat any struct phy having phy->dev set as valid.

With generic_phy_get_by_index_nodev() setting phy->dev to a valid struct
udevice early, there can be situations where the struct phy is returned
as valid when initialization in fact failed and returned an error.

Fix this by setting phy->dev back to NULL when any of the calls to
of_xlate ops, device_get_supply_regulator or phy_alloc_counts fail. Also
extend the dm_test_phy_base test with a test where of_xlate ops fail.

Fixes: 72e5016f87 ("drivers: phy: add generic PHY framework")
Fixes: b9688df3cb ("drivers: phy: Set phy->dev to NULL when generic_phy_get_by_index() fails")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-09-13 15:52:20 -04:00
Jonas Karlman
feb4b919ab phy: Set phy->dev to NULL when generic_phy_get_by_name() fails
generic_phy_get_by_name() does not initialize phy->dev to NULL before
returning when dev_read_stringlist_search() fails. This can lead to an
uninitialized or reused struct phy erroneously be report as valid by
generic_phy_valid().

Fix this issue by initializing phy->dev to NULL, also extend the
dm_test_phy_base test with calls to generic_phy_valid().

Fixes: b9688df3cb ("drivers: phy: Set phy->dev to NULL when generic_phy_get_by_index() fails")
Fixes: 868d58f69c ("usb: dwc3: Fix non-usb3 configurations")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-09-13 15:52:20 -04:00
Marek Vasut
cba79a1b2e net: phy: broadcom: add support for BCM54210E
It's Broadcom PHY simply described as single-port
RGMII 10/100/1000BASE-T PHY. It requires disabling
delay skew and GTXCLK bits.

BCM54210E support ported from Linux kernel commit
0fc9ae1076697 ("net: phy: broadcom: add support for BCM54210E")
AUX/SHD/bcm54xx_config_clock_delay update ported from Linux 6.5-rc4 commit
28e219aea0b9e ("net: phy: broadcom: drop brcm_phy_setbits() and use phy_set_bits() instead")

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Rafał Miłecki <rafal@milecki.pl>
2023-09-13 15:52:20 -04:00
Nicolas Frattaroli
fb89b69a3f net: phy: motorcomm: Add support for YT8511 PHY
The YT8511 ethernet PHYs can be found on e.g. the SOQuartz or
the Quartz64. Add rudimentary support for them.

Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
2023-09-13 15:52:20 -04:00
Marek Vasut
cad6abff29 ufs: ufs-renesas: Drop include common.h
The "#include <common.h>" is being phased out in favor of more fine
grained header management, i.e. ideally include a subset of headers
that are really needed. Remove it from this driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-09-09 10:13:24 -04:00
Marek Vasut
19f627ecea ufs: ufs-renesas: Add support for Renesas R-Car UFS controller
Add support for Renesas R-Car UFS controller which needs vendor-specific
initialization.

Ported from Linux kernel as of commit
c2ab666072bc ("scsi: ufs: Explicitly include correct DT includes")

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-09-09 04:53:31 +02:00
Marek Vasut
92d5f99633 clk: Add GPIO-controlled clock gate driver
Add driver which implements GPIO-controlled clock. The GPIO is used
as a gate to enable/disable the clock. This matches linux clk-gpio.c
driver, however this does not implement the GPIO mux part, which in
U-Boot DM would be better fit in separate driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
2023-09-09 04:53:31 +02:00
Tom Rini
31d9d64444 Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-usb into next 2023-09-06 13:47:54 -04:00
Tom Rini
c0c08be546 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-usb
- DWC3 fix on Layerscape
2023-09-05 14:44:10 -04:00
Tom Rini
34056394ce Fixes for release
-----------------
 
 - imx9: fix DRAM calculation
 - thermal: fixes
 - fixed for DM, DH and Gateworks boards
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/17639
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Merge tag 'u-boot-imx-20230905' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Fixes for release
-----------------

- imx9: fix DRAM calculation
- thermal: fixes
- fixed for DM, DH and Gateworks boards

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/17639
2023-09-05 09:05:16 -04:00
Heinrich Schuchardt
dfe0837494 risc-v: implement DBCN based debug console
Use the DBCN SBI extension to implement a debug console.
Make it the default for S-mode RISC-V.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-09-05 10:53:55 +08:00
Torsten Duwe
f39f8f77a5 riscv: allow riscv timer to be instantiated via device tree
For the architectural timer on riscv, there already is a defined
device tree binding[1]. Allow timer instances to be created from
device tree matches, but for now retain the old mechanism, which
registers the timer biggy-back with the CPU.

[1] linux/Documentation/devicetree/bindings/timer/riscv,timer.yaml

Signed-off-by: Torsten Duwe <duwe@suse.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-09-05 10:53:36 +08:00
Fabrice Gasnier
adee3ba577 usb: host: ohci-generic: Make usage of clock/reset bulk() API
Make usage of clock and reset bulk API in order to simplify the code

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
2023-09-04 18:25:20 +02:00
Fabrice Gasnier
5b43bc97ee usb: check for companion controller in uclass
EHCI is usually used with companion controller (like OHCI) as companion
controller. This information on the companion is missing currently in
companion drivers.
So, if the usb-uclass isn't aware, it may scan busses in any order: OHCI
first, then EHCI.
This is seen on STM32MP1 where DT probing makes the probe order to occur
by increasing address (OHCI address < EHCI address).

When a low speed or full-speed device is plugged in, it's not detected as
EHCI should first detect it, and give ownership (handover) to OHCI.

Current situation on STM32MP1 (with a low speed device plugged-in)
STM32MP> usb start
starting USB...
Bus usb@5800c000: USB OHCI 1.0
Bus usb@5800d000: USB EHCI 1.00
scanning bus usb@5800c000 for devices... 1 USB Device(s) found
scanning bus usb@5800d000 for devices... 1 USB Device(s) found
   scanning usb for storage devices... 0 Storage Device(s) found

The "companion" property in the device tree allow to retrieve companion
controller information, from the EHCI node. This allow marking the
companion driver as such.

With this patch (same low speed device plugged in):
STM32MP> usb start
starting USB...
Bus usb@5800c000: USB OHCI 1.0
Bus usb@5800d000: USB EHCI 1.00
scanning bus usb@5800d000 for devices... 1 USB Device(s) found
scanning bus usb@5800c000 for devices... 2 USB Device(s) found
   scanning usb for storage devices... 0 Storage Device(s) found
STM32MP> usb tree
USB device tree:
1  Hub (12 Mb/s, 0mA)
|   U-Boot Root Hub
|
+-2  Human Interface (1.5 Mb/s, 100mA)
   HP HP USB 1000dpi Laser Mouse

1  Hub (480 Mb/s, 0mA)
 u-boot EHCI Host Controller

This also optimize bus scan when a High speed device is plugged in, as
the usb-uclass skips OHCI in this case:

STM32MP> usb reset
resetting USB...
Bus usb@5800c000: USB OHCI 1.0
Bus usb@5800d000: USB EHCI 1.00
scanning bus usb@5800d000 for devices... 2 USB Device(s) found
   scanning usb for storage devices... 1 Storage Device(s) found
STM32MP> usb tree
USB device tree:
1  Hub (480 Mb/s, 0mA)
|  u-boot EHCI Host Controller
|
+-2  Mass Storage (480 Mb/s, 200mA)
   SanDisk Cruzer Blade 03003432021922011407

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-09-04 18:25:20 +02:00
Fabio Estevam
a79fca7b44 thermal: imx_tmu: Increase the polling interval
Polling every second to check whether the CPU has cooled down is
too frequent.

Allow more time for the CPU to cool down by increasing the polling
interval to 5 seconds by defaut.

This value is used in the absence of the 'polling-delay' devicetree
property.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-04 17:26:44 +02:00
Fabio Estevam
f4898e4b0e thermal: imx_tmu: Fix the temperature unit
The temperature unit is millidegree Celsius, so divide by 1000 to correctly
print the temperature values in Celsius.

While at it, also change a typo: "has beyond" to "is beyond".

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-04 17:26:44 +02:00
Fabio Estevam
966480fe43 thermal: imx_tmu: Increase the log level for high temperatures
dev_info() message is not printed by default. Increase the log level
to dev_crit(). This allows the critical messages related to the temperature
getting beyong the alert threshold to be displayed.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-09-04 17:26:44 +02:00
Fabio Estevam
402b8106ec thermal: imx_tmu: Fix the polling default
When the 'polling-delay' property is not passed via devicetree,
pdata->polling_delay keeps at 0. This causes the imx_tmu driver to get
stuck inside the busy while() loop when the CPU temperature is above
the alert point.

Fix this problem by passing a one second polling interval, which provides
a proper delay to let the system to cool down and exit the while() loop
when the temperature is below the alert point.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-09-04 17:26:44 +02:00
Tom Rini
ddec4cae62 Prepare v2023.10-rc4
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Merge tag 'v2023.10-rc4' into next

Prepare v2023.10-rc4
2023-09-04 10:51:58 -04:00
Oleksandr Suvorov
7f4b73fe69 usb: dwc3: Fix enabling USB_DR_MODE_HOST
The original logic always enables USB_DR_MODE_HOST operation mode in
dwc3_layerscape_bind() in u-boot. Prevent choosing USB_DR_MODE_HOST
operation mode if USB_HOST is not enabled.

Fixes: 2b0b51d0be ("usb: dwc3: add layerscape support")
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2023-09-04 15:51:38 +02:00