Commit graph

18247 commits

Author SHA1 Message Date
Eugeniy Paltsev
45bd649511 ARC: IO: add MB for __raw_* memory accessors
We add memory barriers for __raw_readX / __raw_writeX accessors same
way as it is done for readX and writeX accessors as lots of U-boot
driver uses __raw_readX / __raw_writeX instead of proper accessor
with barrier.

It will save us from lot's of debugging in the future and it is OK
as U-Boot is not that performance oriented as real run-time
software like OS or user bare-metal app so we may afford being not
super fast as we only being executed once.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-03-31 18:31:53 +03:00
Eugeniy Paltsev
e9a23c98c9 ARC: IO: add compiler barriers to IO accessors
We must use compiler barriers in C-version read/write IO accessors
before and after operation (read or write) so it won't be reordered
by compiler.

Fixes commit 07906b3dad ("ARC: Switch to generic accessors")

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-03-31 18:31:53 +03:00
Eugeniy Paltsev
7e57022823 ARC: IO: add volatile to accessors
We must use 'volatile' in C-version read/write IO accessors
implementation to avoid merging several reads (writes) into
one read (write), or optimizing them out by compiler.

Fixes commit 07906b3dad ("ARC: Switch to generic accessors")

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-03-31 18:25:16 +03:00
Tom Rini
150db4264d Merge branch '2020-03-31-master-imports'
- mpc8xxx GPIO, SPI bugfixes
- Add VxWorks to FIT images
- macb ethernet driver bugfix
2020-03-31 10:07:01 -04:00
Rasmus Villemoes
96e68c1621 gazerbeam: add clocks property to SPI node
Prepare for supporting setting different speeds in mpc8xxx_spi.c.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-03-31 10:06:52 -04:00
Tom Rini
d1048a60cf Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2020-03-31 10:05:25 -04:00
Tom Rini
962bb2e31b Merge branch 'master' of git://git.denx.de/u-boot-sh
- Fixes for Gen 2 V2H Blanche
2020-03-31 10:04:39 -04:00
Ley Foon Tan
df8e15af2b arm: dts: agilex: Enable QSPI
Enable QSPI for Agilex SoC devkit.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-03-31 02:52:38 +02:00
Ley Foon Tan
3d884ff470 arm: socfpga: arria10: Add save_boot_params()
Add save_boot_params() to save reset status value from bootrom.

Bootrom will clear the status register in reset manager and stores the
reset status value in shared memory. Bootrom stores shared data at last
2KB of onchip RAM.

This function save reset status provided by bootrom to rst_mgr_status.
More information about reset status register value can be found in reset
manager register description.

When running in debugger without bootrom, r0 to r3 are random values.
So, skip save the value when r0 is not bootrom shared data address.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-03-31 02:52:38 +02:00
Ley Foon Tan
69f9c8bab8 arm: socfpga: Add onchip RAM size macro
Add OCRAM size macro for Gen5 and Arria 10.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-03-31 02:52:38 +02:00
Tom Rini
8e4af8f6d8 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Fixes env variable for layerscape platforms, disable hs200.
- Fixes board fixup, mux setting, enable gic, fspi on lx2160a, Fixes I2C
  DM Warning on ls1043a, ls1046a
- Fixes RGMII port on ls1046ardb, ls1046ardb and DM_USB Warning on
  ls1012afrdm, ls1021aiot
2020-03-30 14:14:07 -04:00
Tom Rini
3c4fb0e91e Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- SPL SPI support R40, H6 (Andre)
- eMMC boot part on a64-olinuxino (Petr)
2020-03-30 14:13:59 -04:00
Kuldeep Singh
3ec7900b23 arm: dts: ls1028a: Use flexspi in octal I/O mode
Configure RX and TX bus-width values to use flexspi in octal I/O mode.
If bus-widths are not specified, then single I/O mode is set by default.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-03-30 08:12:13 +05:30
Kuldeep Singh
bd294e43dc arm: dts: lx2160a: Use flexspi in octal I/O mode
Configure RX and TX bus-width values to use flexspi in octal I/O mode.
If bus-widths are not specified, then single I/O mode is set by default.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-03-30 08:12:13 +05:30
Kuldeep Singh
4c1a52294f arm: dts: lx2160aqds: Add FSPI node properties
lx2160a-qds has 2 micron "mt35xu512aba" flashes of size 64M each
connected on A0 and B1 i.e on CS0 and CS3. Since flashes are connected
on different buses, only one flash can be probed at a time.

Add fspi node properties aligned with LX2160A-RDB fspi properties.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-03-30 08:12:13 +05:30
Biwen Li
bb1165f900 dm: arm64: ls1046a: add i2c DM support
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1046A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-03-30 08:12:13 +05:30
Biwen Li
fefac937fb dm: arm64: ls1043a: add i2c DM support
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1043A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-03-30 08:12:13 +05:30
Yuantian Tang
c40ebf7e43 board: ls1028ardb: add BOARD_LATE_INIT config
Select BOARD_LATE_INIT config so that many board works can be done
in late init stage.

Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-03-30 08:06:52 +05:30
Marek Vasut
9cf09c799a ARM: dts: rmobile: Enable IIC3 on V2H Blanche
Enable IIC3 to permit access to the PMIC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-03-30 03:49:23 +02:00
Marek Vasut
fd2657314f ARM: dts: rmobile: Add IIC3 node on Gen2 R8A7792 V2H
Add IIC3 node from mainline Linux DT. This will be further updated in
subsequent DT sync, however adding this node for now is sufficient and
minimal change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-03-30 03:49:23 +02:00
Otavio Salvador
99f946976e rv1108: Fix boot regression
Since commit 79030a4861 ("rockchip: Add Single boot image
(with binman, pad_cat)") the following boot regression is seen:

U-Boot 2020.04-rc3-00050-gd16e18ca6c-dirty (Mar 09 2020 - 11:40:07 -0300)

Model: Elgin RV1108 R1 board
DRAM:  128 MiB
initcall sequence 67fd12a0 failed at call 6000b927 (err=-22)

This happens because the above commit missed to include the
"rockchip-u-boot.dtsi" for rv1108, so include this file
like it done for other Rockchip SoC dtsi's.

Fixes: 79030a4861 ("rockchip: Add Single boot image (with binman, pad_cat)")
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-03-26 22:58:46 +08:00
Otavio Salvador
af84b3327a ARM: dts: Activate pullups in the console pins on rv1108-elgin-r1
In order to make the console pins more robust to noise, activate
the pullups and increase its drive strength.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-03-26 22:58:46 +08:00
Patrick Delaunay
9368bdfebd ram: stm32mp1: the property st, phy-cal becomes optional
This parameter "st,phy-cal" becomes optional and when it is
absent the built-in PHY calibration is done.

It is the case in the helper dtsi file "stm32mp15-ddr.dtsi"
except if DDR_PHY_CAL_SKIP is defined.

This patch also impact the ddr interactive mode
- the registers of the param 'phy.cal' are initialized to 0 when
  "st,phy-cal" is not present in device tree (default behavior when
  DDR_PHY_CAL_SKIP is not activated)
- the info 'cal' field can be use to change the calibration behavior
  - cal=1 => use param phy.cal to initialize the PHY, built-in training
             is skipped
  - cal=0 => param phy.cal is absent, built-in training is used (default)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:23:30 +01:00
Patrick Delaunay
e9a20f8a19 ram: stm32mp1: increase vdd2_ddr: buck2 for 32bits LPDDR
Need to increase the LPDDR2/LPDDR3 the voltage vdd2_ddr: buck2
form 1.2V to 1.25V for 32bits configuration.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:20:50 +01:00
Patrick Delaunay
1a4f57c895 ARM: dts: stm32mp1: DT alignment with Linux 5.6-rc1
This commit manages diversity for STM32M15x SOCs with:
- dedicated files to support all STM32MP15 SOCs family.
  The differences between those SOCs are:
  -STM32MP151 [1]: common file.
  -STM32MP153 [2]: STM32MP151 + CANs + a second CortexA7-CPU.
  -STM32MP157 [3]: STM32MP153 + DSI + GPU.
- new files to manage security diversity on STM32MP15x SOCs.
  On STM32MP15xY, "Y" gives information:
  -Y = A means no cryp IP and no secure boot.
  -Y = C means cryp IP + secure boot.
- stm32mp157 pinctrl files to better manage package diversity.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:18:36 +01:00
Ludovic Barre
40e70ab885 stm32mp: psci: set cntfrq register of cpu on
This path allows to set the cntfrq register of targeted cpu.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:17:38 +01:00
Patrick Delaunay
050fed8a97 stm32mp1: add 800 MHz profile support
The STM32MP1 series is available in 3 different lines which are pin-to-pin
compatible:
- STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz,
              3D GPU, DSI display interface and CAN FD
- STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz
              and CAN FD
- STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz

Each line comes with a security option (cryptography & secure boot)
& a Cortex-A frequency option :

- A : Cortex-A7 @ 650 MHz
- C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz
- D : Cortex-A7 @ 800 MHz
- F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz

This patch adds the support of STM32MP15xD and STM32MP15xF in U-Boot.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:16:33 +01:00
Patrick Delaunay
73306a125c arm: stm32mp: fdt: update kernel device tree according the part number
Update the kernel device tree for STM32MP15x product lines according
the used soc and its part number, when CONFIG_OF_SYSTEM_SETUP is activated:
- STM32MP15XA hasn't Crypto (cryp1/2)
- STM32M151 and STM32M153 hasn't 3D GPU and DSI host
- STM32M151 hasn't CAN FD and has single A7

For example:

FDT: cpu 1 node remove for STM32MP151AAA Rev.B
FDT: can@4400e000 node disabled for STM32MP151AAA Rev.B
FDT: gpu@59000000 node disabled for STM32MP151AAA Rev.B
FDT: dsi@5a000000 node disabled for STM32MP151AAA Rev.B

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:15:11 +01:00
Patrick Delaunay
ac5e4d8af8 arm: stm32mp: add function get_soc_name
Add a function get_soc_name to get a string with the full name
of the SOC "STM32MP15xxx Rev.x"

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:15:08 +01:00
Patrick Delaunay
718f7bf7ca arm: stm32mp: improve the error message for smc
Add the SMC code and operation for trace on errors.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:05:35 +01:00
Patrick Delaunay
7ae22d7278 arm: stm32mp: bsec: add permanent lock support in bsec driver
Add BSEC lock access (read / write) at 0xC0000000 offset of misc driver.
The write access only available for Trusted boot mode, based on new
SMC STM32_SMC_WRLOCK_OTP.

With the fuse command, the permanent lock status is accessed with
0x10000000 offset (0xC0000000 - 0x8000000 for OTP sense/program
divided by u32 size), for example:

Read lock status of fuse 57 (0x39)

  STM32MP> fuse sense 0 0x10000039 1

  Sensing bank 0:

  Word 0x10000039: 00000000

Set permanent lock of fuse 57 (0x39)

  STM32MP> fuse prog 0 0x10000039 1

  Sensing bank 0:

  Word 0x10000039: 00000000

WARNING: the OTP lock is updated only after reboot

WARING: Programming lock or fuses is an irreversible operation!
        This may brick your system.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:05:35 +01:00
Patrick Delaunay
df2d1b8fc4 arm: stm32mp: bsec: remove unneeded test
Remove the test offs < 0 , as offs is unsigned.

This patch solves the warnings when compiling with W=1
on stm32mp1 board:

In function ‘stm32mp_bsec_read’:
arch/arm/mach-stm32mp/bsec.c:368:11: warning:
comparison of unsigned expression < 0 is always false [-Wtype-limits]
  368 |  if (offs < 0 || (offs % 4) || (size % 4))
      |           ^
In function ‘stm32mp_bsec_write’:
arch/arm/mach-stm32mp/bsec.c:405:11: warning:
comparison of unsigned expression < 0 is always false [-Wtype-limits]
  405 |  if (offs < 0 || (offs % 4) || (size % 4))
      |           ^

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:05:35 +01:00
Andre Przywara
48313fe510 sunxi: Move common defconfig options to Kconfig
Some config symbols are found in *almost* every _defconfig file for
Allwinner boards, because those options are actually a platform choice,
and not a per-board decision.
Some of these options are older, some have recently been added.

Move those options to be set for all Allwinner boards in their
respective Kconfig files.

The rationales are as follows:
- NR_DRAM_BANKS: All Allwinner SoC map DRAM at one contiguous region of
  address space only, starting at 1 GB. So it's always one bank.
- SPL_{DOS,EFI}_PARTITION: The Allwinner SPL does only support raw MMC
  accesses, we don't care about filesystems or partitions in there, so
  there is no need to define those symbols at all.
- USE_PREBOOT: We start USB early when a keyboard is configured, using the
  preboot env variable, so we need to set this variable.
- SYS_RELOC_GD_ENV_ADDR: We don't specify any ENV_ADDR, so need this
  symbol to be set (according to 8d8ee47e03).
- SYS_USB_EVENT_POLL_VIA_INT_QUEUE: According to commit eab9433aa5,
  specifying this reduces the latency of the USB keyboard handling, so
  this was formerly enabled in config headers for all Allwinner boards.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-03-18 18:25:00 +05:30
Andre Przywara
fd40ad0d57 sunxi: SPL SPI: Add SPI boot support for the Allwinner H6 SoC
The Allwinner H6 SoC uses a quite different memory map, also changes the
clocks quite a bit. This requires some changes to the SPL SPI routine,
which hardcodes these values so far.

Using the just introduced helper functions to determine base address
and SPI controller generation, we can cover some of these differences
easily.
The clock setup is different, so requires some explicit code changes
there (reset and clock gate in one register at a different address).
Also we need to change the pinmux function to use a different set of
pins that the H6 uses for SPI0.

Eventually we can enable the H6 to use SPI booting in Kconfig.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-03-18 18:12:04 +05:30
Andre Przywara
da19a0dbc8 sunxi: SPL SPI: Add SPI boot support for the Allwinner R40 SoC
Now that we can easily select an SoC specific SPI0 base address, adding
support for the Allwinner R40 is fairly trivial:
We set the base address, add this SoC to the ones that use PC23 and
enable it in Kconfig.

This allows booting from SPI flash on R40 boards.

Tested on a Bananapi M2 Berry with SPI flash connected to the header pins.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-03-18 18:11:53 +05:30
Andre Przywara
56f51f3875 sunxi: SPL SPI: Introduce is_sun6i_gen_spi()
So far we were using the CONFIG_SUNXI_GEN_SUN6I symbol to select between
the two SPI controller generations used on Allwinner SoCs. This is a
convenience symbol to roughly differentiate between "older" and "newer"
generation of SoCs.

The H6 SoCs is the newest SoC so far, but is sufficiently different to
not define this symbol. However it is using a SPI controller compatible
to the "new gen" SoCs.

To prepare for H6 support, we replace the check for this single symbol
with an explicit function, which can later be extended.
For now we just return CONFIG_SUNXI_GEN_SUN6I in there, so this does not
create a functional change.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-03-18 18:11:41 +05:30
Andre Przywara
2775e08a2b sunxi: SPL SPI: Split off SPI0 base address
So far on all supported Allwinner SoCs we find the old generation SPI
controller always at address 0x1c05000, and the new generation one at
0x1c68000. However the Allwinner R40 SoC has a new generation SPI at
the old address, and the H6 uses a completely different address.

So split off the base address from the respective SPI registers, by
changing the #defines to just contain offsets.
The base address is provided by a function, so it can easily be extended
later when support for those SoCs materialises.

This does not change the code size (since the toolchain is clever enough
to optimise this properly), also does not bring any functional change at
this point.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-03-18 18:11:30 +05:30
Tom Rini
14eb12a3c8 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- Revert "sunxi: psci: avoid error address-of-packed-member"
2020-03-18 07:48:53 -04:00
Tomasz Duszynski
3586cb8227 Revert "sunxi: psci: avoid error address-of-packed-member"
Using memcpy() for some MMIO access is generally frowned upon and might
break things on some platforms. Allwinner H3, which fails to boot, being
an example here.

Moreover, fields being accessed are naturally aligned and warnings
produced by GCC have been quiesced for some time already by:

53dc8ae ("gcc-9: silence 'address-of-packed-member' warning")

That said, it should be okay to revert this commit.

This reverts commit 9bd34a69a4.

Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Tomasz Duszynski <tduszyns@gmail.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-03-18 15:37:08 +05:30
Tom Rini
2738f0edea Merge tag 'ti-v2020.07-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti into next
K3 J721E:
* OSPI boot support
* Support for loading remote cores in R5 SPL
* PMIC ESM Support
* Minor fixes for R5F and C7x remoteproc drivers

K3 AM654:
* Update AVS class 0 voltages.
* Add I2C nodes

DRA7xx/AM57xx:
* Fixed Android boot on AM57xx

AM33/AM43/Davinci:
* switch to driver model for the net and mdio driver for baltos
* Add DM/DTS support for omap video driver
* Enable fastboot on am335x-evm
2020-03-17 11:59:58 -04:00
Bin Meng
5bde2152d4 riscv: Implement new SBI v0.2 extensions
Few v0.1 SBI calls are being replaced by new SBI calls that follows
v0.2 calling convention.

Implement the replacement extensions and few additional new SBI
function calls that makes way for a better SBI interface in future.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-03-17 11:29:54 +08:00
Bin Meng
1b3c8d6402 riscv: Introduce a new config for SBI v0.1
We now have SBI v0.2 which is more scalable and extendable to handle
future needs for RISC-V supervisor interfaces.

Introduce a new config and move all SBI v0.1 code under that config.
This allows to implement the new replacement SBI extensions cleanly
and remove v0.1 extensions easily in future. Currently, the config
is enabled by default. Once all M-mode software, with v0.1, is no
longer in use, this config option and all relevant code can be easily
removed.

This commit is inspired from Linux kernel patch:
https://patchwork.kernel.org/patch/11407361/

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-03-17 11:29:54 +08:00
Bin Meng
1e32715602 riscv: Add SBI v0.2 extension definitions
Few v0.1 SBI calls are being replaced by new SBI calls that follows
v0.2 calling convention.

This patch just defines these new extensions.

This commit is inspired from Linux kernel patch:
https://patchwork.kernel.org/patch/11407359/

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-03-17 11:29:54 +08:00
Bin Meng
f58fc34a2b riscv: Add basic support for SBI v0.2
The SBI v0.2 introduces a base extension which is backward compatible
with v0.1. Implement all helper functions and minimum required SBI
calls from v0.2 for now. All other base extension function will be
added later as per need.

As v0.2 calling convention is backward compatible with v0.1, remove
the v0.1 helper functions and just use v0.2 calling convention.

Add a new Kconfig options CONFIG_SBI for the new SBI v0.2 codes, and
let CONFIG_SBI_IPI depend on it.

This commit is inspired from Linux kernel patch:
https://patchwork.kernel.org/patch/11407363/

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-03-17 11:29:54 +08:00
Bin Meng
215c3a7701 riscv: Mark existing SBI as v0.1 SBI
As per the new SBI specification, current SBI implementation version
is defined as 0.1 and will be removed/replaced in future. Each of the
function call in 0.1 is defined as a separate extension which makes
easier to replace them one at a time.

Rename existing implementation to reflect that. This patch is just
a preparatory patch for SBI v0.2 and doesn't introduce any functional
changes.

This commit is inspired from Linux kernel patch:
https://patchwork.kernel.org/patch/11407355/

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Pragnesh Patel <pragnesh.patel@sifive.com>
2020-03-17 11:29:54 +08:00
Bin Meng
f295e00c61 riscv: Avoid calling sbi_clear_ipi()
There is no need for S-mode U-Boot to call sbi_clear_ipi() as it
can be cleared directly from S-mode. This saves some cycles.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas@auer.io>
2020-03-17 11:29:40 +08:00
Bin Meng
fe13692e23 riscv: Fix sbi_remote_sfence_vma{,_asid}
Currently sbi_remote_sfence_vma{,_asid} does not pass their arguments
to SBI at all, which is semantically incorrect.

This keeps in sync with Linux kernel commit:
  a21344dfc6ad: fix sbi_remote_sfence_vma{,_asid}

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas@auer.io>
2020-03-17 11:29:40 +08:00
Tom Rini
2c59412a9f mach-davinci: Hard-code the default SPL_LDSCRIPT path
As there is only one linker script to use in this case, rather than use
the BOARDDIR variable hard-code the path.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Suggested-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
2020-03-16 18:54:18 -04:00
Tom Rini
38fec8de5f edminiv2: Move CONFIG_SPL_LDSCRIPT to defconfig
As there is only one machine under mach-orion5x, having a Kconfig entry
for SPL_LDSCRIPT is not helpful, move this to the defconfig file.

Suggested-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
2020-03-16 18:54:18 -04:00
Tom Rini
d91cf006ee Kconfig: Remove redundant variable sets
In a few places we have Kconfig entries that set SPL_LDSCRIPT to what is
the default value anyways.  Drop these.

Cc: Michal Simek <monstr@monstr.eu>
Cc: Rick Chen <rick@andestech.com>
Cc: Philippe Reynes <tremyfr@yahoo.fr>
Cc: Eric Jarrige <eric.jarrige@armadeus.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com> (for Microblaze)
Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
2020-03-16 16:42:50 -04:00
Suman Anna
8f4109e09d armv8: K3: j721e: Add DSP internal memory regions in MMU table
The A72 U-Boot code supports early load and boot of a number of
remote processors including the C66_0 and C66_1 DSPs. The current
code supports only loading into the DDR regions which were already
given the appropriate memory attributes. The C66 DSPs also have L1
and L2 internal memory regions that can behave as normal-memories.

Add a new entry to the J721E MMU table covering these regions with
the appropriate memory attributes to allow the A72 U-Boot code to
support loading directly into these memory regions.

Signed-off-by: Suman Anna <s-anna@ti.com>
2020-03-16 12:32:47 +05:30
Tom Rini
6e3cd0a384 - stm32mp: fix dependency for CONFIG_STM32_ETZPC
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Merge tag 'u-boot-stm32-20200310' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- stm32mp: fix dependency for CONFIG_STM32_ETZPC
2020-03-12 12:50:09 -04:00
Lokesh Vutla
6e44aebdbb arm: mach-k3: Add a separate function for printing sysfw version
Add a separate function for printing sysfw version so that it can be
called independently of k3_sysfw_loader.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-11 08:56:49 +05:30
Tom Rini
36bdcf7f3b Merge tag 'mmc-2020-3-9' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- DM support for CAxxxx SoCs
- eMMC board for presidio-asic
- Add defer probe for mmc sdhci
- TI SoCs mmc misc update
2020-03-10 21:13:26 -04:00
Sam Shih
db41d985f6 arm: mediatek: remove unused binman config
The binman-option BINMAN_FDT is introduced by this commit:
commit 3c10dc95bd ("binman: Add a library to access binman entries")
BINMAN_FDT being selected when BINMAN=y that resulting in mt7623
and mt7622 are unable to boot. The root cause of this issue is commit:
commit cbd2fba1ec ("arm: MediaTek: add basic support for MT7629 boards")
select BINMAN=y in all mediatek SoCs, and others mediatek SoCs not
expect to use BINMAN_FDT.
This patch remove BINMAN=y option when ARCH_MEDIATEK=y and
move this to the specify SoCs part config.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-03-10 17:08:13 -04:00
Patrick Delaunay
7a02e4d53c stm32mp: update dependency for STM32_ETZPC
Correct the dependency for STM32 ETZPC protection, linked to SOC
STM32MP identified by CONFIG_STM32MP15x and not linked to
CONFIG_TARGET_STM32MP1 (no more existing).

This patch fix an issue introduced by commit 846254888e ("stm32mp1:
split board and SOC support for STM32MP15x family").

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-10 18:11:02 +01:00
Alifer Moraes
a604b67b87 arm: dts: imx8mq-evk: add phy-reset-gpios for fec1
Instead of resetting the ethernet phy through functions in imx8mq_evk.c, let the
driver reset the phy via dts description adding a reset duration of 10 ms
following atheros 8031's datasheet recommendation.

Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
2020-03-10 10:59:08 +01:00
Max Krummenacher
d40aa43f3f ARM: dts: imx8mm-verdin: drop rgmii_rxc_dly/txc_dly
The FEC in the i.MX8MM doesn't support this feature. So don't pretend one
can use it.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-03-09 15:06:47 +01:00
Igor Opaniuk
0c45a51970 ARM: dts: imx8mm-verdin: dm-spl for pinctrl_usdhc1 node
Let pinctrl configuration for eMMC node (usdhc1) also be
accessible in SPL.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-03-09 15:06:40 +01:00
Frieder Schrempf
291e3ab904 imx8mm/mn: Add missing root clock entry for ARM core clock
The current implementation in arch/arm/mach-imx/cpu.c uses non-DM
code to retrieve the core clock frequency. As the root clock is not
listed we currently get:

CPU:   Freescale i.MX8MMQ rev1.0 at 0 MHz

Fix this by adding the missing entry, which results in:

CPU:   Freescale i.MX8MMQ rev1.0 at 1200 MHz

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-03-09 15:06:15 +01:00
Oliver Graute
789ddde113 imx: Makefile: added missing ahab.o
added missing ahab.o in Makefile

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-03-09 15:05:38 +01:00
Anatolij Gustschin
823c4cd749 imx: mx6ul_14x14_evk: configure for 24bpp display
Before DM_VIDEO conversion this board used 24bpp
display configuration, so use it again.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-03-09 15:05:03 +01:00
Fabio Estevam
a29d79da43 ARM: dts: imx6sx-sdb: Sync with kernel 5.4.16
Sync the imx6sx-sdb dts files with kernel 5.4.16.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-03-09 15:04:51 +01:00
Fabio Estevam
47c2eae1b8 ARM: dts: imx6sx: Sync with kernel 5.4.16
Sync the imx6sx dts files with kernel 5.4.16.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-03-09 15:04:42 +01:00
Stefano Babic
c82b70bcc3 imx: remove woodburn board
Board is not longer used, remove it.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2020-03-09 15:03:24 +01:00
Faiz Abbas
0abf600746 arm: dts: k3-j721e-r5-common-proc-board: Use unique names for dummy clocks
Update the dummy clock names to use unique identifiers. Otherwise the
previous node just gets overwitten by the next one with the same name.
This fixes eMMC boot not working on J721e-evm.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-03-09 08:33:16 +08:00
Faiz Abbas
d45ffb7937 arm: K3: sysfw-loader: Add a config_pm_pre_callback()
System firmware does not guarantee that clocks going out of the device
will be stable during power management configuration. There are some
DCRC errors when SPL tries to get the next stage during eMMC boot after
sysfw pm configuration.

Therefore add a config_pm_pre_callback() to switch off the eMMC clock
before power management and restart it after it is done.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-09 08:33:16 +08:00
Faiz Abbas
cf00825596 spl: mmc: Fix spl_mmc_get_uboot_raw_sector() implementation
The call to spl_mmc_get_uboot_raw_sector() completely ignores and
overwrites the raw_sect value passed from the caller of spl_mmc_load().

Fix this by passing raw_sect to the function and returning the same
value in the default case.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-09 08:33:16 +08:00
Faiz Abbas
c7d106b4eb mmc: am654_sdhci: Update output tap delay writes
With the latest RIOT, there is a different otap delay value for each
speed mode. Add a new binding with every supported speed mode. Also
disable a given speed mode in the host caps if its corresponding
otap-del-sel is not present.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-09 08:33:16 +08:00
Keerthy
6d310ba50c arm: dts: k3-j721e-r5-common-proc-board: Add ospi1 flash node
Add ospi1 flash node required for QSPI boot.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-06 12:53:00 +05:30
Keerthy
769c94263f arm: dts: k3-j721e-mcu-wakeup: Add assigned-clocks/rates properties for ospi1/qspi
Add assigned-clocks/rates properties for ospi1/qspi.
This is the expected rate as per ROM configuration.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-06 12:53:00 +05:30
Keerthy
896cf0e20a arm: dts: k3-j721e: Enable ospi1/qspi
Enable the ospi1/qspi for both r5 and a72 configurations.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-06 12:53:00 +05:30
Wolfgang Wallner
2c64d11e32 x86: apl: Use cpu_x86_get_count() for cpu_ops.get_count
Use cpu_x86_get_count() to read the number of cores.

cpu_x86_get_count() reads the number of CPUs from the device tree.
Using this function we can support multiple Apollo Lake
variants, e.g.: E3940 (4 cores) and E3930 (2 cores).

This was tested on the E3940 and E3930 Apollo Lake variants.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-05 18:25:22 +08:00
Wolfgang Wallner
fc35d7e1b1 x86: cpu_x86: Make cpu_x86_get_count() non-static
The function cpu_x86_get_count() is also useful for other modules.
Make it non-static and add a prototype + description.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-05 18:25:22 +08:00
Wolfgang Wallner
5a9d7f9c91 x86: p2sb: Drop 'apl' prefix
Drop the Apollo Lake prefix 'apl' from the functions, types and
variables in the P2SB driver.

The P2SB is not Apollo Lake specific, and as such it was moved in
commit 2999846c11 ("x86: Move P2SB from Apollo Lake to a more generic
location") from the Apollo Lake folder to the intel_common folder.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-05 18:25:21 +08:00
Andy Shevchenko
fa97ca161b Revert "x86: use invd instead of wbinvd in real mode start code"
This reverts commit 0d67fac29f.

As real hardware testing (*) shows the above mentioned commit
breaks U-Boot on it. Revert for the upcoming release. We may get
more information in the future and optimize the code accordingly.

(*) on Intel Edison board.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix a typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-05 18:19:40 +08:00
Simon Glass
7149d38005 x86: Correct error return value in mrccache_get_region()
This function doesn't use uclass_find_first_device() correctly. Add a
check that the device is found so we don't try to read properties from a
NULL device.

The fixes booting on minnoxmax.

Fixes: 87f1084a63 ("x86: Adjust mrccache_get_region() to use livetree")

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-05 18:19:04 +08:00
Tom Rini
c12ee850d6 Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- ABB SECU board
- Assorted minor fixes
2020-03-04 10:41:41 -05:00
Holger Brunck
468ba8d00b ARM: socfpga: Add initial support for the ABB SECU board
Add initial support for the ABB SECU board, which is an ArriaV-based
SoCFPGA system with ethernet and booting from Denali NAND.

Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-03-03 22:11:36 +01:00
Vignesh Raghavendra
360c86b162 arm: dts: k3-am654-base-board: Enable I2C nodes
Add DT nodes for main domain I2Cs and its slave devices

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:14 +05:30
Dario Binacchi
72e0a0e1c7 arm: dts: am335x: add 'u-boot, dm-pre-reloc' to panel
Add the "u-boot,dm-pre-reloc" property to the "ti,tilcdc,panel"
compatible node. In this way the video-uclass module can allocate the
amount of memory needed to be assigned to the frame buffer.
For boards that support Linux the property is added to the *-u-boot.dtsi
file since it is a u-boot specific dt flag.

Ran building tests with CONFIG_AM335X_LCD enabled and disabled for the
following configurations:
 - brxre1_defconfig           --> success
 - am335x_guardian_defconfig  --> success
 - am335x_evm_defconfig       --> success
 - da850evm_defconfig         --> failure with CONFIG_AM335X_LCD enabled

Enabling CONFIG_AM335X_LCD in da850evm_defconfig causes building errors
even without applying the patch. The driver has never been enabled on the
da850 and must be adapted for this platform.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Tested-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Felix Brack <fb@ltec.ch>
2020-03-03 13:08:14 +05:30
Dario Binacchi
96b109ba74 video: omap: add support for DM/DTS
Update the driver to support the device tree and the driver model.
Timings and panel parameters are now loaded from the device tree.

The DM code replaces the am335x_lcdpanel structure with
tilcdc_panel_info taken from the linux kernel, as well the management
of additional parameters not covered in the legacy code. In addition,
the am335x_lcdpanel structure contains parameters and operations that
were probably a requirement of the board for which this driver was
developed and which, however, were not developed in the linux kernel.
All this led to rewrite th DM controller initialization code, except
for the pixel clock setting that is executed in a function created in a
previous patch with code taken from the legacy am335xfb_init.

The patch has been tested on a custom board with u-boot 2018.11-rc2 and
the following device-tree configuration:

	panel {
		compatible = "ti,tilcdc,panel";
		pinctrl-names = "default";
		pinctrl-0 = <&lcd_enable_pins>;
		enable-gpios = <&gpio0 31 0>;
		backlight = <&backlight>;
		status = "okay";
		u-boot,dm-pre-reloc;
		panel-info {
			ac-bias           = <255>;
			ac-bias-intrpt    = <0>;
			dma-burst-sz      = <16>;
			bpp               = <16>;
			fdd               = <0x80>;
			sync-edge         = <0>;
			sync-ctrl         = <1>;
			raster-order      = <0>;
			fifo-th           = <0>;
		};
		display-timings {
			native-mode = <&timing0>;
			timing0: 800x480 {
				hactive         = <800>;
				vactive         = <480>;
				hback-porch     = <46>;
				hfront-porch    = <210>;
				hsync-len       = <20>;
				vback-porch     = <23>;
				vfront-porch    = <22>;
				vsync-len       = <10>;
				clock-frequency = <33000000>;
				hsync-active    = <0>;
				vsync-active    = <0>;
			};
		};
	};

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Tested-by: Dario Binacchi <dariobin@libero.it>
2020-03-03 13:08:14 +05:30
Tero Kristo
91600a6a84 arm: dts: k3-j721e: Add ESM PMIC support for tps659413 based board
The ESM handling on J7 processor board requires routing the
MCU_SAFETY_ERROR signal to the PMIC on the board for critical safety
error handling. The PMIC itself should then reset the board based on
receiving it. Enable the support for the board by adding the esm
node in place.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
7304546071 arm: dts: k3-k721e: Add Main domain ESM support
Main domain ESM support is needed to configure main domain watchdogs
to generate ESM pin events by default. On J7 processor board these
propagate to the PMIC to generate a reset when watchdog expires.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
2984b82b3b arm: dts: k3-j721e-r5: Enable r5fss0 cluster in SPL
Enable MAIN domain r5fss0 cluster and its core0 in R5 spl.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-03-03 13:08:14 +05:30
Keerthy
b14d56f284 arm: dts: k3-j721e-r5-u-boot: Add fs_loader node
Add fs_loader node which will be needed for loading firmwares
from the boot media/filesystem.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-03-03 13:08:14 +05:30
Keerthy
d154252fc9 armv7R: K3: Add support for jumping to firmware
MCU Domain rf50 is currently shutting down after loading the ATF.
Load elf firmware and jump to firmware post loading ATF.

ROM doesn't enable ATCM memory, so make sure that firmware that
is being loaded doesn't use ATCM memory or override SPL.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
6dce1cfa56 armv7R: K3: r5_mpu: Enable execute permission for MCU0 BTCM
Enable execute permission for mcu_r5fss0_core0 BTCM so that we can jump
to a firmware directly from SPL.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
3ab34bc028 arm: k3: Add support for loading non linux remote cores
Add MAIN domain R5FSS0 remoteproc support from spl. This enables
loading the elf firmware in SPL and starting the remotecore.

In order to start the core, there should be a file with path
"/lib/firmware/j7-main-r5f0_0-fw" under filesystem
of respective boot mode.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[Guard start_non_linux_remote_cores under CONFIG_FS_LOADER]
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
805b3cac1e lib: elf: Move the generic elf loading/validating functions to lib
Move the generic elf loading/validating functions to lib/
so that they can be re-used and accessed by code existing
outside cmd.

While at it remove the duplicate static version of load_elf_image_phdr
under arch/arm/mach-imx/imx_bootaux.c.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Suggested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-03-03 13:08:14 +05:30
Vignesh Raghavendra
224d7fe263 ARM: dts: k3-j721e: Add OSPI DT nodes
Add OSPI DT nodes to enable OSPI at U-Boot prompt and also to support
OSPI boot.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
9e9dfc1fc4 ARM: dts: k3-am65: Add OSPI DT nodes
Add OSPI DT nodes to enable OSPI at U-Boot prompt and also to support
OSPI boot.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Lokesh Vutla
7d0866b9be ARM: mach-k3: sysfw-loader: Use SPI memmapped addr when loading SYSFW
Since ROM configures OSPI controller to be in memory mapped mode in OSPI
boot, R5 SPL can directly pass the memory mapped pointer to ROM. With
this ROM can directly pull the SYSFW image from OSPI.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
8915a40da4 ARM: mach-k3: arm64-mmu: map 64bit FSS MMIO space in A53 MMU
Populate address mapping entries in A53 MMU for 4 GB of MMIO space
reserved for providing MMIO access to multiple flash devices through
OSPI/HBMC IPs within FSS.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Tom Rini
1e85aaf372 UniPhier SoC updates for v2020.04 (3rd)
- Enable ADMA and HS400 for the eMMC driver on 64-bit SoCs
 
  - Add some convenient environment variables to handle SD card
 
  - Sanitize the NAND controller reset sequence and its WP handling
 
  - Sync DT with Linux
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Merge tag 'uniphier-v2020.04-3' of https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier

UniPhier SoC updates for v2020.04 (3rd)

 - Enable ADMA and HS400 for the eMMC driver on 64-bit SoCs

 - Add some convenient environment variables to handle SD card

 - Sanitize the NAND controller reset sequence and its WP handling

 - Sync DT with Linux
2020-02-29 08:00:53 -05:00
Masahiro Yamada
53265152d2 ARM: dts: uniphier: remove U-Boot own EEPROM compatible and property
The compatible string "i2c-eeprom" is U-Boot own compatible, which
has never been approved by the DT community. "u-boot,i2c-offset-len"
is also a U-Boot own hack.

Linux adds "atmel,*" as generic compatibles, and U-Boot also followed
it by commit d7e28918aa ("i2c_eeprom: Add reading support").

The U-Boot own hack is no longer needed. Just sync with Linux.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-29 14:12:51 +09:00
Masahiro Yamada
5ad159623f ARM: dts: uniphier: add reset-names to NAND controller node
Import Linux commits:

37f3e0096f71 ("ARM: dts: uniphier: add reset-names to NAND controller node")
e98d5023fe1f ("arm64: dts: uniphier: add reset-names to NAND controller node")

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-29 14:11:36 +09:00
Masahiro Yamada
44ebaa8e13 ARM: dts: uniphier: rename DT nodes to follow json-schema
Import the nodename changes I made in Linux for avoiding dt-schama
warnings. This follows the $nodename patterns in the dt-schema.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-29 14:10:54 +09:00
Christophe Leroy
a68256074f watchdog: mpc8xx: Revert the 8xx watchdog back to CONFIG_HW_WATCHDOG
Commit f3729ba6e7 ("watchdog: mpc8xx_wdt: Watchdog driver and macros
cleanup") switched the watchdog to CONFIG_WATCHDOG. But this is not
compatible with the 8xx because it starts the watchdog HW timer at
reset and must be serviced from the very beginning including while
U-boot is executed in the firmware before relocation in RAM.

Select CONFIG_HW_WATCHDOG and make hw_watchdog_reset() visible.

Meanwhile, finalise the cleanup of arch/powerpc/cpu/mpc8xx/Kconfig by
removing the lines put in comment in that commit, and also remove
again the selection of CONFIG_MPC8xx_WATCHDOG which was removed by
that commit and brought back by mistake by commit b3134ffbd9
("watchdog: Kconfig: Sort entry alphabetically")

Note that there was an 'imply WATCHDOG' in the original commit but
it disappeared in the Kconfig alphabetical sorting, so no need to
remove it here.

Fixes: f3729ba6e7 ("watchdog: mpc8xx_wdt: Watchdog driver and macros cleanup")
Fixes: b3134ffbd9 ("watchdog: Kconfig: Sort entry alphabetically")
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Cc: Stefan Roese <sr@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-02-28 10:53:55 -05:00
Masahiro Yamada
2ba1d398d7 ARM: uniphier: detect the base of micro support card at run-time
The base address 0x43f00000 is no longer true for the future SoC.
Extract the base address from the device tree.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-28 02:40:56 +09:00
Masahiro Yamada
1320fa2e55 ARM: uniphier: remove workaround for the NAND write protect
This workaround was previously needed for LD4, Pro4, sLD8, Pro5
SoCs. The boot ROM does not touch this register for PXs2/LD6b or
later.

Now that the reset signal of the Denali NAND controller is always
asserted in board_init() then deasserted in the driver, the
WRITE_PROTECT register gets back to the default value, which means
the write protect is deasserted.

This workaround can go away entirely.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-28 02:40:22 +09:00
Masahiro Yamada
ce4e9ff4d2 ARM: uniphier: move NAND reset assertion to U-Boot proper from SPL
The comment /* deassert reset */ is wrong. It asserts the reset.

It no longer needs to stay in SPL. The NAND controller reset is
handled  in the driver. So, this assert can be moved to the
board_init() of U-Boot proper.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-28 02:38:55 +09:00
Masahiro Yamada
ef5c7d6d5c ARM: uniphier: add sdscript, sdboot, sdupdate environment variables
Add handy macros:

  - sdscript: source boot.scr in the file system of the SD media
  - sdboot  : boot the kernel using the images in the file system
              of the SD media
  - sdscript: update the boot firmware in the SD media
              (in raw block sectors)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-28 02:29:32 +09:00
Tom Rini
1234d178a8 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
- Update Sata node for T2080QDS and revert SATA related unrequired
  patches.
2020-02-25 23:35:53 -05:00
Wasim Khan
f381a26cb5 arch: arm: Fix SZ_64K undeclared compilation error
Macro SZ_64K is undeclared. Include sizes.h to fix the compilation
error.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-02-25 11:39:54 -05:00
Peng Ma
ce92b89c40 arch: powerpc: Rewrite the sata node to fit the driver
The sata of our powerpc platforms are updated. These changes is to
fit the driver probe.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-02-25 10:16:05 +05:30
Peng Ma
a2d4cb2523 Revert "powerpc: mpc85xx: delete FSL_SATA for T2080QDS board."
This reverts commit 856b9cdb53.

Commit 856b9cdb53 ("powerpc: mpc85xx: delete FSL_SATA for T2080QDS
board.") is to fit support sata DM mode, Now the driver will be reverted,
So revert it.

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-02-25 10:16:05 +05:30
Tom Rini
8e51bf746a Merge tag 'u-boot-rockchip-20200220' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- rk3399: split roc-pc-rk3399 out of evb_rk3399
- sync dts from upstream kernel for rk3399,rk3288,px30
- boot_mode: find the saradc device name
2020-02-20 22:14:29 -05:00
Masahiro Yamada
057516308a dma-mapping: add <asm/dma-mapping.h> for all architectures
To avoid "asm/dma-mapping.h: No such file or directory" error,
we need something.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-20 15:09:54 +08:00
Peter Robinson
f9561d8e36 arch: arm: rockchip: order the rk3399 entries alphabetically
Put the target entries for rk3399 devices in alphabetical order.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-20 09:18:14 +08:00
Masahiro Yamada
9d86b89c59 dma-mapping: move dma_map_(un)single() to <linux/dma-mapping.h>
The implementation of dma_map_single() and dma_unmap_single() is
exactly the same for all the architectures that support them.

Factor them out to <linux/dma-mapping.h>, and make all drivers to
include <linux/dma-mapping.h> instead of <asm/dma-mapping.h>.

If we need to differentiate them for some architectures, we can
move the generic definitions to <asm-generic/dma-mapping.h>.

Add some comments to the helpers. The concept is quite similar to
the DMA-API of Linux kernel. Drivers are agnostic about what is
going on behind the scene. Just call dma_map_single() before the
DMA, and dma_unmap_single() after it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-19 21:27:30 +08:00
Masahiro Yamada
950c596867 dma-mapping: fix the prototype of dma_unmap_single()
dma_unmap_single() takes the dma address, not virtual address.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-19 21:27:30 +08:00
Masahiro Yamada
c22c0dbd7d dma-mapping: fix the prototype of dma_map_single()
Make dma_map_single() return the dma address, and remove the
pointless volatile.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-19 21:27:30 +08:00
Suniel Mahesh
5a6d3d1fbc board: roc-pc-rk3399: Add support for onboard LED's and push button to indicate power mode
Added support for onboard LED's and push button. When powered board will be
in low power mode(yellow LED), on button press, board enters full power mode
(red LED) and boots u-boot.

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19 16:45:38 +08:00
Suniel Mahesh
01892d230d rockchip: rk3399: split roc-pc-rk3399 out of evb_rk3399
roc-pc-rk3399 board has one user button & three user LED's. Currently
we don't have any code support for these devices. Since button and LED's are
specific to roc-pc-rk3399 board, split it into its own board file and add code
support here.

Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19 16:45:38 +08:00
Hugh Cole-Baker
80b9882a6e rockchip: boot_mode: find the saradc device name
adc_channel_single_shot() requires the full device name e.g.
"saradc@ff100000", which differs between Rockchip SoC's, but they all
share the prefix "saradc"; find the ADC device with this name prefix and
use its full name.

Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19 16:45:38 +08:00
Jagan Teki
8040d8e00f ARM: dts: rockchip: Sync rk3288-vyasa dts from linux
Sync rk3288-vyasa dts file from Linux.

This sync has changes required to work HDMI output on
Vyasa RK3288 board.

This sync excludes the io_domains node since it is not
available in rk3288.dtsi.

Changes like vcc50_hdmi, vdd10_lcd and ddc-i2c-bus are
not merged to Linux yet but wil resync later if any
further updates on this.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19 16:45:38 +08:00
Jagan Teki
38070170b8 rockchip: rk3288: Enable pre console buffer
Enable pre console buffer for rk3288 platform.

This would help to capture the console messages prior to
the console being initialised. Enabling this would help
to capture all the console messages on video output source
like HDMI. So we can find the full console messages of
U-Boot proper on HDMI display when enabled it for RK3288
platform boards.

Buffer address used for pre console is 0x0f000000 which is
ram base plus 240MiB. right now the Allwinner SoC is using
similar computation.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19 16:45:38 +08:00
Heiko Stuebner
ac3d121c35 rockchip: px30: sync the main px30 dtsi from mainline
There have been multiple peripherals added to the main px30 dtsi
in the Linux kernel since its addition to u-boot. So to make it easier
to sync board devicetrees, update the core dtsi from Linux.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19 16:45:38 +08:00
Peter Robinson
ab800e5a6f arm: dts: rockchip: puma: move U-Boot specific bits to u-boot.dtsi
Move the U-Boot specific bits to a -u-boot.dtsi include so all the
u-boot.dtsi hierarchy is included.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19 16:45:38 +08:00
Peter Robinson
5532e3bb24 arm: dts: rockchip: rk3399: Move U-Boot specific bits to rk3399-u-boot
There's some bits in the U-Boot rk3399.dtsi that aren't yet in the
upstream Linux dtsi but are needed for early boot. This moves them
to the u-boot.dtsi to make it easier to sync the rest of rk3399.dtsi
with upstream.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19 16:45:38 +08:00
Peter Robinson
4d08de5840 arm: dts: rockchip: Update EVB/Puma devices to upstream USB/dwc3 conventions
The upstream linux kernel for the Rockchip 3399 SoC use usbdrd3 naming so move
the two remaining devices over to that for their device trees to make it
easier to sync with upstream DTs.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19 16:45:38 +08:00
Heiko Stuebner
552e7cc61e rockchip: make the global board_fit_config_name_match __weak
The core Rockchip spl code contains a default board_fit_config_name_match
implementation doing nothing. Individual boards may want to handle this
differently, so add a __weak atribute to make it possible to override
this function in other places.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19 16:45:38 +08:00
Heiko Stuebner
dfa64707da rockchip: make_fit_atf: use correct fdt_x references in config nodes
The script iterates over the given devicetrees and creates both
fdt_x node as well as a conf-node for each passed dt.

But there is a slight bug in that it always references fdt_1 in each
conf node instead of the matching fdt_x as expected.

So fix that by referencing the number of the current dt similar to
how the fdt_x nodes gets created.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-02-19 16:45:38 +08:00
Tom Rini
f2a73d6867 - add DH Electronics DHCOM SoM and PDK2 board
- DT alignment with kernel v5.5-rc7 for stm32mp1 boards
 - fix STM32 image format for big endian hosts in mkimage
 - solve warnings in device tree and code for stm32mp1 boards
 - remove fdt_high and initrd_high for stm32 and stih boards
 - add support of STM32MP15x Rev.Z
 - update stm32mp1 readme
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Merge tag 'u-boot-stm32-20200214' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- add DH Electronics DHCOM SoM and PDK2 board
- DT alignment with kernel v5.5-rc7 for stm32mp1 boards
- fix STM32 image format for big endian hosts in mkimage
- solve warnings in device tree and code for stm32mp1 boards
- remove fdt_high and initrd_high for stm32 and stih boards
- add support of STM32MP15x Rev.Z
- update stm32mp1 readme
2020-02-14 07:31:47 -05:00
Patrick Delaunay
cf0818b477 stm32mp1: support of STM32MP15x Rev.Z
Add support for Rev.Z of STM32MP15x cpu.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-13 17:31:08 +01:00
Patrick Delaunay
8d93a9755f ARM: dts: stm32m1: add reg for pll nodes
Fix the following DT dtc warnings for stm32mp1 boards:

Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@0:
  node has a unit name, but no reg property
Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@1:
  node has a unit name, but no reg property
Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@2:
  node has a unit name, but no reg property
Warning (unit_address_vs_reg): /soc/rcc@50000000/st,pll@3:
  node has a unit name, but no reg property

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-13 17:26:23 +01:00
Patrick Delaunay
5c34684b13 ARM: dts: stm32mp1: correct ddr node
This patch fix the warning:
dt.dts: Warning (simple_bus_reg): Node /soc/ddr@5A003000
simple-bus unit address format error, expected "5a003000"

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-13 17:26:23 +01:00
Antonio Borneo
db0cd2d3bc ARM: dts: stm32mp1: move FDCAN to PLL4_R
LTDC modifies the clock frequency to adapt it to the display. Such
frequency change is not detected by the FDCAN driver that instead
cache the value at probe and pretend to use it later.

Keep the LTDC alone on PLL4_Q by moving the FDCAN to PLL4_R.

Signed-off-by: Antonio Borneo <antonio.borneo@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-13 17:26:22 +01:00
Patrick Delaunay
d35a5af321 ARM: dts: stm32mp1: DT alignment with kernel v5.5-rc7
Device tree and binding alignment with kernel v5.5-rc7

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-13 17:26:22 +01:00
Patrick Delaunay
7915b9914e stm32mp1: pwr: use the last binding for pwr
Update the driver to use the latest binding from kernel v5.5-rc1:
no more use syscon or regmap to access to pwr register and
only one pwr_regulators node with the compatibility "st,stm32mp1,pwr-reg"
is available.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-13 17:26:22 +01:00
Patrick Delaunay
4f28092783 ARM: dts: stm32mp1: DT alignment with kernel v5.4
Device tree and binding alignment with kernel v5.4

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-02-13 17:25:34 +01:00
Andreas Dannenberg
96dd223c29 armV7R: K3: am654: Activate early console functionality
Activate early console functionality on AM65x devices to allow for
early diagnostic messages until the main console is ready
to get activated.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-13 21:39:18 +05:30
Andreas Dannenberg
a06df8f339 arm: K3: j721e: Fix boot parameter table index memory address
The boot parameter table index memory address for J721E was configured
to an incorrect value which prevented the use of this definition to
determine which boot parameter table is active which is needed to be
able to distinguish between primary and backup boot modes. Fix this
issue by updating the value to the correct one also in alignment with
the J721E Technical Reference Manual (TRM).

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-13 21:39:18 +05:30
Lokesh Vutla
b9c268c90e arm: mach-k3: Fix nomenclature on Silicon Revisions
Data manual mentions the new silicon revisions as SR instead of PG. Use
the same nomenclature inside U-Boot as well.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-13 21:39:18 +05:30
Lokesh Vutla
fde109dc75 arm: dts: k3-j721e-r5-common-proc-board: Disable power-domains for mcu uart
mcu uart will be used during uart boot for loading sysfw.itb. Since
sysfw is not yet available during uart load, power-domain cannot be
enabled. We need to rely on ROM for doing that, so disable power-domains
and clocks for mcu uart. Also fix the mcu uart frequency.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-13 21:39:17 +05:30
Faiz Abbas
f9dd35330b arm: dts: am437x-gp-evm: Add some nodes to u-boot.dtsi
Add scm_conf syscon node and its parents as well as the ethernet phy
node to u-boot.dtsi. This enables ethernet boot.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-13 21:39:17 +05:30
Marek Vasut
199537309b ARM: dts: stm32: Add DH Electronics DHCOM SoM and PDK2 board
Add support for DH Electronics DHCOM SoM and PDK2 rev. 400 carrier
board. This is an SoM with STM32MP15xx and an evaluation kit. The
baseboard provides Ethernet, UART, USB, CAN and optional display.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-02-12 19:48:39 +01:00
Alexey Brodkin
07906b3dad ARC: Switch to generic accessors
First of all U-Boot is not that performance oriented as real run-time
software like OS or user bare-metal app so we may afford being not super
fast as we only being executed once. That in return allows us to be more
universal and support wider variety of devices.

And looking forward that will significantly reduce maintenance and simplify
support of newer architectures.

And while at it we add quad-word accessors like readq(), writeq() etc.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-02-12 21:11:13 +03:00
Eugeniy Paltsev
c77bbc2215 ARC: rework setting of ARC CPU specific compiler options
It's a very rare if at all existing occasion when ARC CPU template
is used as is w/o any changes - in the end it's a beauty and competitive
advantage of ARC cores to be tailored for a particular use-case - and
so it doesn't make a lot of sense to offer template-based "-mcpu" selection.
Given for each and every platform we end-up adding quite a few more flags
it's logical to move "-mcpu" selection to platform's definition as well
which we exactly do here.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-02-12 21:11:12 +03:00
Alexey Brodkin
95f7103f94 ARC: nsim_hs38: Add support of Virtio NET & BLK
Given now nsim_hs38 configuration is usable on QEMU and in QEMU
we have Virtio working perfectly fine the next logical step
is to add support of supported & known to work net & bkl to this
config.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-02-12 20:40:24 +03:00
Alexey Brodkin
9515e41d38 ARC: nSIM: switch from ARC UART to DW UART
Since v2019.06 DesingWare nSIM supports DesignWare UART simulation
and so we may switch from pretty unusual ARC UART to much more standard
DesignWare UART (which in case of U-Boot is just an ordinary 16650 UART).

This among other things makes built dinaries compatible with our other
platforms to name a few: FPGA-based HAPS boards, QEMU and even ZeBU.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-02-12 20:40:24 +03:00
Tom Rini
9a8942b53d sandbox conversion to SDL2
TPM TEE driver
 Various minor sandbox video enhancements
 New driver model core utility functions
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Merge tag 'dm-pull-6feb20' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm

sandbox conversion to SDL2
TPM TEE driver
Various minor sandbox video enhancements
New driver model core utility functions
2020-02-11 10:58:41 -05:00
Tom Rini
4e5c4683b7 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Move P2SB from Apollo Lake to a more generic location
- Add a function to find a device by drvdata in DM core
- Enhancement of DM IRQ uclass driver
- Add a clock driver for Intel devices
- Add support for ACPI general-purpose events
- Add a TPM driver for H1/Cr50
- Enable TPM on Google Chromebook Coral
2020-02-10 12:27:31 -05:00
Tom Rini
c998cbea87 - Convert to DM:
- bx50v3, mx53ppd, novena, mx6sabresd
 - Fixes for Xea Board
 - Toradex im8m Verdin
 - Cleanup (warp7, mx6sxsabresd)
 
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Merge tag 'u-boot-imx-20200210' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

- Convert to DM:
	- bx50v3, mx53ppd, novena, mx6sabresd
- Fixes for Xea Board
- Toradex im8m Verdin
- Cleanup (warp7, mx6sxsabresd)

Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/648131788
2020-02-10 09:04:11 -05:00
Sean Anderson
404339759e riscv: Remove unnecessary instruction
The add instruction on risc-v can have any three sources and targets, so there
is no need for an intermediate mov.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-10 14:51:52 +08:00
Sean Anderson
fd1f6e9a0b riscv: Add option to print registers on exception
When debugging, it can be helpful to see more information about an
unhandled exception. This patch adds an option to view the registers at
the time of the trap, similar to the linux output on a kernel panic.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-10 14:51:08 +08:00
Sean Anderson
d9f1cee286 riscv: Fix breakage caused by linker relaxation
Due to the two-instruction sequence needed to access arbitrary memory
locations, the RISC-V linker aggressively optimises memory accesses and
jumps at link-time. This is called "linker relaxation," and is discussed
in this SiFive article
<https://www.sifive.com/blog/all-aboard-part-3-linker-relaxation-in-riscv-toolchain>.
One of the optimizations in place is to assume that the __global_pointer
symbol is placed in the gp register. To quote the article:

"...The magic __global_pointer$ symbol is defined to point 0x800 bytes
past the start of the .sdata section. The 0x800 magic number allows
signed 12-bit offsets from __global_pointer$ to address symbols at the
start of the .sdata section. The linker assumes that if this symbol is
defined, then the gp register contains that value, which it can then use
to relax accesses to global symbols within that 12-bit range. The
compiler treats the gp register as a constant so it doesn't need to be
saved or restored, which means it is generally only written by _start,
the ELF entry point."

However, U-Boot instead keeps the global data pointer in gp. This causes
memory accesses and jumps optimized to use the gp pointer to fail. To
fix this problem, we undefine the __global_pointer symbol.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-02-10 14:50:53 +08:00
Ian Ray
bd58b1a785 board: ge: bx50v3: override panel
Override the panel compatible string for LCD in U-Boot.

Include U-Boot device tree overrides in device-specific device trees so
that the panel compatible string is used.

Fixes: 8c26739859 ("board: ge: bx50v3: sync devicetrees from Linux")
Signed-off-by: Ian Ray <ian.ray@ge.com>
2020-02-09 21:47:20 +01:00
Ian Ray
9167c20692 board: ge: mx53ppd: enable DM_VIDEO
Enable DM_VIDEO for mx53ppd.
Enable DM_REGULATOR_FIXED and DM_PWM for the backlight.
Remove unused MX53PPD_LCD_POWER.
Remove old (incorrect) setup_iomux_lcd.
Enable backlight via display enable handler.
Use cls command to initiate display in HW agnostic manner.
Modify `failbootcmd' to use lcdputs.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
2020-02-09 21:47:20 +01:00
Robert Beckett
1d06dc6d16 board: ge: mx53ppd: add i2c eeprom bootcount storage
Add bootcount node, linking to i2c eeprom "bootcount" partitions for
storage.
Enable i2c eeprom bootcount backend storage.
Enable bootcount command and use it for failbootcmd.

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
2020-02-09 21:47:20 +01:00
Robert Beckett
41613a7a58 board: ge: bx50v3: add i2c eeprom bootcount storage
Add bootcount node, linking to i2c eeprom "bootcount" partitions for
storage.
Enable i2c eeprom bootcount backend storage.
Enable bootcount command and use it for failbootcmd.

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
2020-02-09 21:47:20 +01:00
Robert Beckett
1dec7fa797 board: ge: bx50v3, imx53ppd: use DM I2C
Remove old (pre-DM) i2c setup code.
Enable DM i2c.
Convert common code to use DM rtc.
Convert common code to read VPD from eeprom partition.
Convert the generic i2c PMIC init code to use the new da9063 driver.

mx53ppd only:
Correct RTC compatible in device tree.
Enable MXC DM i2c driver.
Define CONFIG_SYS_MALLOC_F_LEN so that DM is available in pre-reloc.
Make GPIO banks available during preloc, since initialisation is done
in board_early_init_f().
Add gpio_request() calls to satisfy the DM_GPIO compatibility API.
Remove unused power configuration.

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Signed-off-by: Ian Ray <ian.ray@ge.com>
2020-02-09 21:47:20 +01:00
Robert Beckett
b64088c5c2 board: ge: bx50v3, imx53ppd: add eeprom partitions
Add eeprom partitions to device tree.

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
2020-02-09 21:47:20 +01:00
Marek Vasut
b91f28de83 ARM: imx: novena: Enable DM ethernet
Convert to DM ethernet to prevent board removal.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Vagrant Cascadian <vagrant@debian.org>
2020-02-09 15:03:54 +01:00
Marek Vasut
e772b4fea8 ARM: imx: novena: Move defconfig bits to arch Kconfig
Just move the defconfig entries which are required into the Novena
entry in arch Kconfig, no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Vagrant Cascadian <vagrant@debian.org>
2020-02-09 15:03:23 +01:00
Joris Offouga
41fe56e3ad mx7dsabre: Fix usbtog probe when use dfu or ums
Before:
=> ums 0 mmc 0
UMS: LUN 0, dev 0, hwpart 0, sector 0x0, count 0x1dacc00
usb dr_mode not found
CTRL+C - Operation aborted
=> dfu 0 mmc 0
usb dr_mode not found

After :
=> ums 0 mmc 0
UMS: LUN 0, dev 0, hwpart 0, sector 0x0, count 0x1dacc00
=> dfu 0 mmc 0

Signed-off-by: Joris Offouga <offougajoris@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-02-09 14:59:54 +01:00
Joris Offouga
b3ebcc7687 arm: dts: imx7s-warp7: Move u-boot specific node in u-boot.dtsi
These nodes are not in upstream kernel, so move these in u-boot.dtsi

Signed-off-by: Joris Offouga <offougajoris@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-02-09 14:59:54 +01:00
Lukasz Majewski
a05eb8b14a arm: xea: dts: Add 'fec-3v3' regulator properties to prevent accidental disablement
The 'enable-active-high' DTS property configures GPIO so it is active with
HIGH state (by default it is low).

The 'regulator-boot-on' property indicates that the regulator was enabled
in the 'earlier' stage - i.e. bootloader/firmware.
In the XEA case the 'fec-3v3' was configured (as a "wrapper" on GPIO0_0) in
very early SPL code, so it shouldn't be modified at latter stages.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-02-09 14:59:16 +01:00
Igor Opaniuk
14d5aeff77 board: toradex: Add Verdin iMX8M Mini support
This adds initial minimal support for the Toradex Verdin iMX8M Mini Quad
2GB WB IT V1.0A module. They are now strapped to boot from eFuses which
are factory fused to properly boot from their on-module eMMC. U-Boot
supports booting from the on-module eMMC only, SDP support is disabled
for now due to missing i.MX 8M Mini USB support.

Functionality wise the following is known to be working:
- eMMC, 8-bit and 4-bit MMC/SD card slots
- Ethernet
- GPIOs
- I2C

Boot sequence is:
SPL ---> ATF (TF-A) ---> U-boot proper

ATF, U-boot proper and u-boot.dtb images are packed into a FIT image,
loaded by SPL.

Boot:
U-Boot SPL 2020.01-00187-gd411d164e5 (Jan 26 2020 - 04:47:26 +0100)
Normal Boot
Trying to boot from MMC1
NOTICE:  Configuring TZASC380
NOTICE:  RDC off
NOTICE:  BL31: v2.0(release):rel_imx_4.14.98_2.3.0-0-g09c5cc994-dirty
NOTICE:  BL31: Built : 01:11:41, Jan 25 2020
NOTICE:  sip svc init

U-Boot 2020.01-00187-gd411d164e5 (Jan 26 2020 - 04:47:26 +0100)

CPU:   Freescale i.MX8MMQ rev1.0 at 0 MHz
Reset cause: POR
DRAM:  2 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Model: Toradex Verdin iMX8M Mini Quad 2GB Wi-Fi / BT IT V1.0A, Serial#
 06535149
Net:   eth0: ethernet@30be0000
Hit any key to stop autoboot:  0
Verdin iMX8MM #

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-02-09 14:50:52 +01:00
Marcel Ziswiler
1c12b67023 arm: dts: imx8mm-pinfunc: sync latest linux-next pin func header
Synchronise with latest linux-next kernel pin func header file.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-02-09 14:50:52 +01:00
Alex Nemirovsky
7d706a886f board: presidio-asic: Add basic G3 engr. development board support
Add basic Presidio G3 engineering board support

Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-02-07 16:16:01 -05:00
Jason Li
f267f84b93 gpio: do not include <asm/arch/gpio.h> for Cortina CAxxxx SoCs
The Cortina CAxxxx GPIO driver maintains DM_GPIO support
across different CPU ISA in the CAxxxx Soc Family; Not just ARM.
Therefore, it is not desirable to split out and maintain separete
gpio header file for each CPU architecture.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jason Li <jason.li@cortina-access.com>
Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
2020-02-07 14:01:21 -05:00
Tom Rini
3f3c153e33 mpc8xx: Expose show_regs()
To match the other PowerPC platforms the function show_regs() must not
be marked static but instead be an exposed global function.

Cc: Christophe Leroy <christophe.leroy@c-s.fr>
Cc: Wolfgang Denk <wd@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Christophe Leroy <christophe.leroy@c-s.fr>
2020-02-07 13:59:58 -05:00
MarkLee
6efa450565 arm: dts: mediatek: add ethernet and sgmii dts node for mt7622
This patch add eth and sgmii dts node for mt7622 to support ethernet

Signed-off-by: MarkLee <Mark-MC.Lee@mediatek.com>
2020-02-07 13:59:58 -05:00
Simon Glass
fa78604da8 x86: coral: Add I2C and TPM device-tree definitions
Add nodes to the device tree for Cr50 and other available I2C ports. Also
enable the ACPI interrupt driver.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07 22:46:35 +08:00
Simon Glass
e85cbe8b34 x86: Add support for ACPI general-purpose events
ACPI GPEs are used to signal interrupts from peripherals that are accessed
via ACPI. In U-Boot these are modelled as interrupts using a separate
interrupt controller. Configuration is via the device tree.

Add a simple driver for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07 22:46:35 +08:00
Simon Glass
025543554c dm: irq: Add support for requesting interrupts
At present driver model supports the IRQ uclass but there is no way to
request a particular interrupt for a driver.

Add a mechanism, similar to clock and reset, to read the interrupts
required by a device from the device tree and to request those interrupts.

U-Boot itself does not have interrupt-driven handlers, so just provide a
means to read and clear an interrupt. This can be useful to handle
peripherals which must use an interrupt to determine when data is
available, for example.

Bring over the basic binding file as well, from Linux v5.4. Note that the
older binding is not supported in U-Boot; the newer 'special form' must be
used.

Add a simple test of the new functionality.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07 22:46:32 +08:00
Simon Glass
d9a5fad808 x86: itss: Add of-platdata support
Allow this driver to be used in TPL by setting up the interrupt type
correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07 22:45:35 +08:00
Simon Glass
69c2dc937a x86: Give each driver an IRQ type
Add an IRQ type to each driver and use irq_first_device_type() to find
and probe the correct one.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07 22:45:35 +08:00
Simon Glass
ba87607971 dm: irq: Add support for interrupt controller types
There can be different types of interrupt controllers in a system and some
drivers may need to distinguish between these. In general this can be
handled using the device tree by adding the interrupt information to
device nodes.

However on x86 devices we have interrupt controllers which are not tied
to any particular device and not really used in U-Boot. These still need
to be inited, so a convenient method is to give each controller a type
and allow a particular controller type to be probed.

Add support for this in sandbox along with a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove the new bland line at EOF of test/dm/irq.c]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07 22:44:59 +08:00
Simon Glass
eb8af95fc5 x86: apl: Drop the I2C config in FSP-S
This config is not actually used here and in U-Boot it seems better to set
this using the device tree for each individual controller. The monolithic
config of the FSP-S is only necessary if the FSP is actually configuring
something, but here it is not.

The FSP-S does enable/disable the various I2C ports. It might be nice to
handle this using the okay/disabled property of each port, but that can be
considered later.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07 22:41:24 +08:00
Simon Glass
659252e7de x86: apl: Use the clock driver
Enable the Intel clock driver and modify coral's device tree to use it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07 22:41:24 +08:00
Wolfgang Wallner
2999846c11 x86: Move P2SB from Apollo Lake to a more generic location
The Primary to Sideband Bridge (P2SB) is not specific to Apollo Lake, so
move its driver to a common location within arch/x86.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-07 22:41:24 +08:00
Tom Rini
457faef262 Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- Gen 5 and Watchdog fixes
2020-02-06 23:18:42 -05:00
Simon Glass
336d4615f8 dm: core: Create a new header file for 'compat' features
At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.

Move the compatibility features into a separate header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
61b29b8268 dm: core: Require users of devres to include the header
At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05 19:33:46 -07:00
Simon Glass
a466db5adb sandbox: Support changing the LCD colour depth
Add a new device-tree property to control the colour depth. At present we
support 16bpp and 32bpp.

While we are here, update the code to use livetree.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05 19:33:46 -07:00
Simon Glass
6be88c7282 sandbox: sdl: Add an option to double the screen size
On high-DPI displays U-Boot's LCD window can look very small. Add a
-K flag to expand it to make things easier to read, while still using
the existing resolution internally.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-02-05 19:33:46 -07:00
Simon Glass
96d0cd4604 sandbox: sdl: Move to use SDL2
Sandbox currently uses SDL1.2. SDL2 has been around for quite a while and
is widely supported. It has a number of useful features. It seems
appropriate to move sandbox over.

Update the code to use SDL2 instead of SDL1.2.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
ac7b730201 sandbox: sdl: Support waiting for audio to complete
At present when audio stops, any in-progress output is cut off. Fix this
by waiting for output to finish.

Also use booleans for the boolean variables.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
5f736f8eca sandbox: sdl: Improve error handling
A few errors are not checked. Fix these and use my preferred spelling for
init.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
c127f191a8 sandbox: Add comments to the sdl struct
Add comments for each struct member. Drop frequency since it is not used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
3062cd17af sound: Add a new stop_play() method
At present there is no positive indication that U-Boot has finished
sending sound data. This means that it is not possible to power down an
audio codec, for example. Add a new method that is called once all sound
data has been sent.

Add a new method for this, called when the sound_play() call is done.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
3ff6fe5fab sandbox: Add a new header for the system malloc()
Some files use U-Boot headers but still need to access the system
malloc(). Allow this by creating a new asm/malloc.h which can be used so
long as U-Boot's malloc.h has not been included.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
1c8c47ec80 sandbox: Ensure that long-options array is terminated
The last member of this array is supposed to be all zeroes according to
the getopt_long() man page. Fix the function to do this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
89cdb0b583 sandbox: Drop os_realloc()
Due to recent changes this function is no-longer used. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
0db1b4305a sandbox: Drop use of special os_malloc() where possible
Some sandbox files are not built with U-Boot headers, so with the renamed
malloc functions there is now no need to use the special os_... allocation
functions to access the system routines. Instead we can just call them
directly.

Update the affected files accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
cf23c7c1dd sandbox: Rename 'free' variable
This name conflicts with our desire to #define free() to something else on
sandbox. Rename it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Simon Glass
4209be3eae sandbox: Sort the help options
At present options are presented in essentially random order. It is easier
to browse them if they are sorted into alphabetical order. Adjust the
help function to handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:46 -07:00
Sean Anderson
19464f4feb cli: Make the sandbox board_run_command the default
If CONFIG_CMDLINE=n, common/cli.c calls board_run_command. This fails to
link on most architectures. However, the sandbox architecture has an
implementation which we can use.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-02-05 19:33:46 -07:00
Simon Glass
bd933bfd83 dm: core: Add ofnode_get_chosen_prop()
Add a function to read a property from the chosen node, providing access
to its length. Update ofnode_get_chosen_string() to make use of it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:45 -07:00
Simon Glass
14ca9f7f5a dm: core: Rename ofnode_get_chosen_prop()
This function is actually intended to read a string rather than a
property. All of its current callers use it that way. Also there is no way
to return the length of the property from this function.

Rename it to better indicate its purpose, using ofnode_read as the prefix
since this matches most other functions.

Also add some tests which are missing for these functions.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-02-05 19:33:45 -07:00
Tom Rini
f5cc89a82a Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Bug fixes on ls1012a, ls1021a, ls1028ardb platforms Integrate fspi for
  ls1028a, add DM-I2C support, update secure boot header offset
2020-02-05 07:19:52 -05:00
Tom Rini
c95215a6ca - DFU support file operations lager then the default max size
- add dfu support to dwc2 for bcm2835
 - enable DFU for RPi4
 - Fix RPi4 memory map to include the genet device
 - add driver for the genet ethernet device
 - enable network support in RPi4 config
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Merge tag 'rpi-next-2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-raspberrypi

- DFU support file operations lager then the default max size
- add dfu support to dwc2 for bcm2835
- enable DFU for RPi4
- Fix RPi4 memory map to include the genet device
- add driver for the genet ethernet device
- enable network support in RPi4 config
2020-02-05 07:18:12 -05:00
Marek Vasut
9a5a90ad9b ddr: altera: Add DDR2 support to Gen5 driver
Add DDR2 support to Gen5 DRAM driver. As the DDR2 macro names generated
by Quartus are named differently than the DDR3 ones, use anon unions to
store them in the same structures, without growing their size.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-02-05 03:01:57 +01:00
Marek Vasut
cf8c836788 watchdog: designware: Convert to DM and DT probing
Convert the designware watchdog timer driver to DM and add DT probing
support. Perform minor coding style clean up, like drop superfluous
braces. These ought to be no functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Philipp Tomisch <philipp.tomisch@theobroma-systems.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3399-pc
2020-02-05 03:01:57 +01:00
Tom Rini
d4827fcd4c Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Various minor fixes for x86
- Switch to ACPI mode on Intel edison
- Support run-time configuration for NS16550 driver
- Update coreboot and slimbootloader serial drivers to use NS16550
run-time configuration
- ICH SPI driver fixes to hardware sequencing erase case
- Move ITSS from Apollo Lake to a more generic location
- Intel GPIO driver bug fixes
- Move to vs2017-win2016 platform build host for Azure pipelines
2020-02-04 11:36:49 -05:00
Biwen Li
a0affb367a dm: arm64: ls1012a: add i2c DM support
This supports i2c DM and enables CONFIG_DM_I2C
for SoC LS1012A

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-02-04 16:20:25 +05:30
Biwen Li
beadf4f28c armv8: fsl-layerscape: spl: fix build error when DM_I2C is enabled
Fix below SPL build error when DM_I2C is enabled,
- arch/arm/cpu/armv8/built-in.o: In function `board_init_f:
  arch/arm/cpu/armv8/fsl-layerscape/spl.c:74: undefined reference to `i2c_init_all'
  arch/arm/cpu/armv8/fsl-layerscape/spl.c:74:(.text.board_init_f+0x30):
  relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol
  `i2c_init_all'
  make[2]: *** [spl/u-boot-spl] Error 1
  make[1]: *** [spl/u-boot-spl] Error 2
  make: *** [sub-make] Error 2
  arch/arm/cpu/armv8/fsl-layerscape/spl.c: In function 'board_init_f':
  arch/arm/cpu/armv8/fsl-layerscape/spl.c:74:2: warning: implicit
  declaration of function 'i2c_init_all'; did you mean 'misc_init_r'?
  [-Wimplicit-function-declaration]`

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-02-04 16:20:25 +05:30
Kuldeep Singh
e5720648e6 arm: dts: lx2160a: Add FSPI node properties
Align flexspi node properties with linux device-tree properties
Tested on LX2160A-RDB

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-02-04 16:19:37 +05:30
Kuldeep Singh
5e2fb3eaa0 arm: dts: ls1028a: Add FSPI node properties
Align flexspi node properties with linux device-tree properties
Tested on LS1028A-RDB

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-02-04 16:19:37 +05:30
Michael Walle
3ffe090d4e arm: dts: ls1028a: fix interrupt properties
Sync the interrupt properties with the ones from Linux. Also use the
constants provided by the dt-bindings header. Please note, that there
are actual changes/fixes in the irq flags. U-Boot won't use the
interrupt properties anyway. It's just to be consistent with the Linux
device tree.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-02-04 16:19:37 +05:30
Michael Walle
922ac0f661 arm: ls1028a: use the new flexspi driver
Also align the fspi node with the kernel one.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-02-04 16:19:37 +05:30
Wolfgang Wallner
03fe85a27b x86: itss: Remove apl-prefix
The Interrupt Timer Subsystem (ITSS) is not specific to Apollo Lake, so
remove the apl-prefix of the implemented functions/structures/...

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04 12:54:54 +08:00
Wolfgang Wallner
1d5bf32f0f x86: itss: Add a Kconfig option to enable/disable ITSS driver
Add a Kconfig option to support enabling/disabling the inclusion of
the ITSS driver depending on the platform.

Atuomatically select the ITSS driver when building for Apollo Lake.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: squashed in http://patchwork.ozlabs.org/patch/1232761/]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04 12:54:54 +08:00
Wolfgang Wallner
43709fa088 x86: Move itss.c from Apollo Lake to a more generic location
The Interrupt Timer Subsystem (ITSS) is not specific to Apollo Lake, so
move it to a common location within arch/x86.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: conditionally build itss.c]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04 12:01:08 +08:00
Faiz Abbas
16217edd03 arm: dts: k3-j721e-main: Add Support for gpio0
Add the main_gpio0 node.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04 09:07:24 +05:30
Vignesh Raghavendra
b6427783a8 arm: dts: k3-j721e-common-proc-board: Enable I2C expander for SPL
IO expanders are required to power cycle SD card. So enable the same

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04 09:07:24 +05:30
Vignesh Raghavendra
18402a104e arm: dts: k3-j721e-common-proc-board: Add I2C GPIO expander
Add I2C GPIO expander required to power cycle MMC/SD

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04 09:07:24 +05:30
Vignesh Raghavendra
01ec6a5ae1 arm: dts: k3-j721e: Add I2C nodes
J721e SoC has 2 I2C instances in MCU domain and 7 I2C instances in main
domain. Add DT nodes for the same

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04 09:07:24 +05:30
Vignesh Raghavendra
b070f58b44 arm: dts: k3-j721e-common-proc-board: Enable USB0 in peripheral mode
Enable USB0 in peripheral mode so that it be used for DFU

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04 09:07:24 +05:30
Vignesh Raghavendra
e15b6e35b1 arm: mach-k3: sysfw-loader: Add support to download SYSFW via DFU
Add support to download SYSFW into internal RAM via DFU in DFU boot
mode. Prepare a DFU config entity entry dynamically using buffer address
allocated for SYSFW and start DFU gadget to get SYSFW.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04 09:07:24 +05:30
Vignesh Raghavendra
eabd591015 arm: mach-k3: j721e: Rename BOOT_DEVICE_USB to BOOT_DEVICE_DFU
J721e does not support USB Host MSC boot, but only supports DFU boot.
Since BOOT_DEVICE_USB is often used for host boot mode and
BOOT_DEVICE_DFU is used for DFU boot, rename BOOT_DEVICE_USB macro to
BOOT_DEVICE_DFU

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04 09:07:24 +05:30
Wolfgang Wallner
142c9751a6 x86: Move itss.h from Apollo Lake to the generic x86 include directory
The code in this file is not specific to Apollo Lake. According to
coreboot sources (where this code comes from), it is common to at least:
  * Apollo Lake
  * Cannon Lake
  * Ice Lake
  * Skylake

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04 01:19:28 +08:00
Wolfgang Wallner
7d53b5a4ce x86: apl: Add the term "Interrupt Timer Subsystem" to ITSS files
ITSS stands for "Interrupt Timer Subsystem", so add that term to the
description of the relevant files.

Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04 01:19:28 +08:00
Masahiro Yamada
2fa863e9aa x86: limit the fs segment to the pointer size
The fs segment is only used to get the global data pointer.
If it is accessed beyond sizeof(new_gd->arch.gd_addr), it is a bug.

To specify the byte-granule limit size, drop the G bit, so the
flag field is 0x8093 instead of 0xc093, and set the limit field
to sizeof(new_gd->arch.gd_addr) - 1.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed the comments about FS segement]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04 01:19:26 +08:00
Masahiro Yamada
0d67fac29f x86: use invd instead of wbinvd in real mode start code
I do not know why the boot code immediately after the system reset
should write-back the cache content. I think the cache invalidation
should be enough.

I tested this commit with qemu-x86_defconfig, and it worked for me.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04 01:19:26 +08:00
Park, Aiden
18416ba119 x86: serial: Use NS16550_DYNAMIC in Slim Bootloader
Slim Bootloader provides serial port info in its HOB to support
both IO or MMIO serial ports, but it's controlled by SYS_NS16550_MEM32
or SYS_NS16550_PORT_MAPPED in U-Boot.
To support both serial port configurations dynamically at runtime,
Slim Bootloader serial driver leverages NS16550_DYNAMIC.

Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove the obsolete comments for data->type]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04 01:19:26 +08:00
Simon Glass
b7c1e67a70 x86: Move coreboot over to use the coreboot UART
Use this UART to improve the compatibility of U-Boot when used as a
coreboot payload.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04 01:19:25 +08:00
Simon Glass
8c3ccb3f6d x86: Update coreboot serial table struct
Since mid 2016, coreboot has additional fields in the serial struct that
it passes down to U-Boot. Add these so we are in sync.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-04 01:19:25 +08:00
Marek Vasut
707c36e2af ARM: socfpga: Drop last use of socfpga_reset_manager
This particular chunk of code was not updated, likely due to the order
in which the patches were posted and applied. Fix this missing part.

Fixes: bb25aca134 ("arm: socfpga: Convert reset manager from struct to defines")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2020-02-03 09:26:14 +01:00
Tom Rini
427da6f028 Merge tag 'u-boot-rockchip-20200130' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Support redundant boot for rk3399
- Support binman for rockchip platform
- Update ram driver and add ddr4 support for rk3328
2020-02-01 15:31:04 -05:00
Tom Rini
80e99adbe4 UniPhier SoC updates for v2020.04 (2nd)
Denali NAND driver changes:
  - Set up more registers in denali-spl for SOCFPGA
  - Make clocks optional
  - Do not assert reset signals in the remove hook
  - associate SPARE_AREA_SKIP_BYTES with DT compatible
  - switch to UCLASS_MTD
 
 UniPhier platform changes:
  - fix a bug in dram_init()
  - specify loadaddr for "source" command
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Merge tag 'uniphier-v2020.04-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier

UniPhier SoC updates for v2020.04 (2nd)

Denali NAND driver changes:
 - Set up more registers in denali-spl for SOCFPGA
 - Make clocks optional
 - Do not assert reset signals in the remove hook
 - associate SPARE_AREA_SKIP_BYTES with DT compatible
 - switch to UCLASS_MTD

UniPhier platform changes:
 - fix a bug in dram_init()
 - specify loadaddr for "source" command
2020-01-31 13:26:28 -05:00
Masahiro Yamada
6da69d33f5 ARM: uniphier: set gd->ram_base correctly
gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-01 01:14:32 +09:00
Masahiro Yamada
407b01b3b3 mtd: rawnand: denali_dt: use UCLASS_MTD instead of UCLASS_MISC
UCLASS_MTD is a better fit for NAND drivers.

Make NAND_DENALI_DT depend on DM_MTD, which is needed to compile
drivers/mtd/mtd-uclass.c

Also, make ARCH_UNIPHIER select DM_MTD because all the defconfig
of this platform enables NAND_DENALI_DT.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-02-01 01:14:32 +09:00
Masahiro Yamada
5bacb4402e ARM: uniphier: remove adhoc reset deassertion for the NAND controller
Now that the reset controlling of the Denali NAND driver (denali_dt.c)
works for this platform, remove the adhoc reset deassert code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-01 01:14:32 +09:00
Kever Yang
a7eb9ae349 rockchip: rk3308: add alias for emmc/sdmmc
Add alias for mmc/sdmmc so that we can have a fix mmc number for emmc.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-30 11:44:02 +08:00
YouMin Chen
4082a68142 ram: rk3328: update lpddr3 setting
update lpddr3 setting for fix init fail about "col error".

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-30 11:44:01 +08:00
YouMin Chen
c7df6483c2 ram: rk3328: add support ddr4 init
Add rk3328-sdram-ddr4-666.dtsi for support ddr4 init.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
79030a4861 rockchip: Add Single boot image (with binman, pad_cat)
All rockchip platforms support TPL or SPL-based bootloader
in mainline with U-Boot proper as final stage. For each
stage we need to burn the image on to flash with respective
offsets.

This patch creates a single boot image component using
- binman, for arm32 rockchip platforms
- pad_cat, for arm64 rockchip platforms.

This would help users to get rid of burning different
boot stage images.

The new image called 'u-boot-rockchip.bin'
which can burn into flash like:

₹ sudo dd if=u-boot-rockchip.bin of=/dev/sda seek=64

This would support all rockchip platforms, except rk3128
since it doesn't support for SPL yet.

Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Cc: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
a1b75cf941 arm: dts: rk3188: Add rk3188-u-boot.dtsi
Add U-Boot specific dtsi file for rk3188 SoC. This
would help to add U-Boot specific dts nodes, properties
which are common across rk3188.

Right now, the file is empty, will add required changes
in future patches.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
f48299a883 arm: dts: rk3036: Add rk3036-u-boot.dtsi
Add U-Boot specific dtsi file for rk3036 SoC. This
would help to add U-Boot specific dts nodes, properties
which are common across rk3036.

Right now, the file is empty, will add required changes
in future patches.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
efebc8edd6 rockchip: rk3399: Add bootcount support
Add bootcount support for Rockchip rk3399.

The bootcount value is preserved in PMU_SYS_REG0 register,
this would help to support redundent boot.

Once the redundant boot triggers, the altboot command
will look for extlinux-rollback.conf on particular
bootable partition which supposed to be a recovery
partition where redundant boot required.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
ee6321fa14 rockchip: Add common reset cause
Add cpu reset cause in common cpu-info file.

This would help to print the reset cause for
various resets.

Right now it support rk3288, rk3399. rest of rockchip
platforms doesn't have reset cause support ye but this
code is more feasible to extend the same.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
b52a199e32 arm: rockchip: Add common cru.h
Few of the rockchip family SoC atleast rk3288,
rk3399 are sharing some cru register bits so
adding common code between these SoC families
would require to include both cru include files
that indeed resulting function declarations error.

So, create a common cru include as cru.h then
include the rk3399 arch cru include file and move
the common cru register bit definitions into it.

The rest of rockchip cru files will add it in future.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
2952f39269 rockchip: Add cpu-info
Add cpu information for rockchip soc.

This would help to print the SoC family number, with
associated temparature, clock and reason for reset etc.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
1c37f60c28 rockpro-rk3399: Enable SPI Flash
Enable winbond SPI flash for ROC-PC-RK3399 board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
3d11196c80 roc-pc-rk3399: Enable SPI Flash
Enable winbond SPI flash for ROC-PC-RK3399 board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
c8b1684a8c rockchip: dts: Sync ROC-RK3399-PC changes from Linux
Sync the ROC-RK3399-PC device tree changes from Linux
with below commit details:

commit <c36308abe4110e4db362d5e2ae3797834a7b1192> ("arm64: dts:
rockchip: Enable MTD Flash on rk3399-roc-pc")

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-30 11:44:01 +08:00
Amit Singh Tomar
fff5d5499d rpi4: Update memory map to accommodate scb devices
Some of the devices(for instance, pcie and gnet controller) sitting on
SCB bus falls behind/below the memory range that we currenty have.

This patch updates the memory range to map those devices correctly.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-01-29 18:30:33 +01:00
Tom Rini
3e12744a90 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-samsung
- Various exynos fixes
2020-01-28 21:10:32 -05:00
Marek Szyprowski
86c8871108 arm: exynos: Read default MMC device from XOM[7:5] pins
XOM pins provide information for iROM bootloader about the boot device.
Those pins are mapped to lower bits of OP_MODE register (0x10000008),
which is common for all Exynos SoC variants. Set the default MMC device id
to reflect the boot device selected by XOM[7:5] pins (2 for the SD or 0 for
the eMMC).

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2020-01-28 09:54:05 +09:00
Tom Rini
051e03c0d7 Merge tag 'u-boot-clk-26Jan2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-clk
- Various clock fixes and enhancements
2020-01-27 07:19:26 -05:00
Pedro Jardim
2f39ab1649 clock_imx8mq: Make frac_pll_init() static
Since frac_pll_init() is only used in this file, change it to 'static'.

This fixes the following sparse warning:

arch/arm/mach-imx/imx8m/clock_imx8mq.c:662:5: warning: no previous
prototype for ‘frac_pll_init’ [-Wmissing-prototypes]

Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com>
2020-01-26 21:57:09 +01:00
Pedro Jardim
852cd55ea7 clock_imx8mq: Remove the function sscg_pll_init()
Function sscg_pll_init() is not used anywhere, so it can simply be deleted.
This was found because of the following sparse
warning:

arch/arm/mach-imx/imx8m/clock_imx8mq.c:702:5: warning: no previous prototype for ‘sscg_pll_init’ [-Wmissing-prototypes]
 int sscg_pll_init(u32 pll)
     ^~~~~~~~~~~~~

Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com>
2020-01-26 21:57:08 +01:00
Pedro Jardim
953d02f001 clock_imx8mq: Make do_imx8m_showclocks() static
Since do_imx8m_showclocks() is only used inside this file, make it 'static'.

This fixes the following sparse warning:

arch/arm/mach-imx/imx8m/clock_imx8mq.c:836:5: warning: no previous prototype
 for ‘do_imx8m_showclocks’ [-Wmissing-prototypes]
 int do_imx8m_showclocks(cmd_tbl_t *cmdtp, int flag, int argc,
     ^~~~~~~~~~~~~~~~~~~

Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com>
2020-01-26 21:57:08 +01:00
Pedro Jardim
fb3c4d926f clock_imx8mq: Delete not used init_usb_clk()
Function init_usb_clk() is not used anywhere, so it can simply be deleted.
This was detected by the following sparse warning:

arch/arm/mach-imx/imx8m/clock_imx8mq.c:377:6: warning: no previous prototype
 for ‘init_usb_clk’ [-Wmissing-prototypes]
 void init_usb_clk(void)
      ^~~~~~~~~~~~

Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com>
2020-01-26 21:57:08 +01:00
Tom Rini
0b23b0d9f9 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- Libre Computer ALL-H3-IT/ALL-H5-CC board (Chen-Yu Tsai)
- Allwinner R40 Ethernet, usb phy enablement (Andre Przywara)
- Sunxi auto load from 128KB MMC offset (Andre Przywara)
- Orange Pi Win Ethernet phy enablement (Jernej Skrabec)
2020-01-26 12:05:11 -05:00
Andre Przywara
7c841d844f sunxi: Automate loading from 128KB MMC offset
Since commit 067e0b9684 ("sunxi: Allow booting from 128KB SD/eMMC offset")
we support having the SPL loaded from either the traditional 8KB SD
card/eMMC offset, or from the alternative location at 128KB. However the
sector to find the U-Boot image was still hard-coded at compile time,
and had to be adjusted for one of the two choices.

Since we can actually override the function to return the sector offset,
we can just check the boot source byte there to select the proper offset
based on from where the SPL was loaded.

This allows the very same binary image to be loaded from either 128KB or
8KB, with the U-Boot proper image always being located just behind the SPL.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-26 19:10:16 +05:30