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Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq

Browse source 
- Fixes env variable for layerscape platforms, disable hs200.
- Fixes board fixup, mux setting, enable gic, fspi on lx2160a, Fixes I2C
  DM Warning on ls1043a, ls1046a
- Fixes RGMII port on ls1046ardb, ls1046ardb and DM_USB Warning on
  ls1012afrdm, ls1021aiot
This commit is contained in:
Tom Rini 2020-03-30 07:46:05 -04:00
commit 8e4af8f6d8
80 changed files with 683 additions and 189 deletions
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1
arch/arm/Kconfig
View file

@ -1368,6 +1368,7 @@ config TARGET_LS1028ARDB
select ARM64
select ARMV8_MULTIENTRY
select ARCH_SUPPORT_TFABOOT
select BOARD_LATE_INIT
help
Support for Freescale LS1028ARDB platform
The LS1028A Development System (RDB) is a high-performance

20
arch/arm/cpu/armv8/fsl-layerscape/Kconfig
View file

@ -74,11 +74,11 @@ config ARCH_LS1043A
select SYS_FSL_HAS_DDR4
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
select SYS_I2C_MXC
select SYS_I2C_MXC_I2C1
select SYS_I2C_MXC_I2C2
select SYS_I2C_MXC_I2C3
select SYS_I2C_MXC_I2C4
select SYS_I2C_MXC if !DM_I2C
select SYS_I2C_MXC_I2C1 if !DM_I2C
select SYS_I2C_MXC_I2C2 if !DM_I2C
select SYS_I2C_MXC_I2C3 if !DM_I2C
select SYS_I2C_MXC_I2C4 if !DM_I2C
imply CMD_PCI
config ARCH_LS1046A
@ -107,11 +107,11 @@ config ARCH_LS1046A
select SYS_FSL_SRDS_2
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
select SYS_I2C_MXC
select SYS_I2C_MXC_I2C1
select SYS_I2C_MXC_I2C2
select SYS_I2C_MXC_I2C3
select SYS_I2C_MXC_I2C4
select SYS_I2C_MXC if !DM_I2C
select SYS_I2C_MXC_I2C1 if !DM_I2C
select SYS_I2C_MXC_I2C2 if !DM_I2C
select SYS_I2C_MXC_I2C3 if !DM_I2C
select SYS_I2C_MXC_I2C4 if !DM_I2C
imply SCSI
imply SCSI_AHCI

2
arch/arm/dts/fsl-ls1028a-qds.dts
View file

@ -49,6 +49,8 @@
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
spi-rx-bus-width = <8>;
spi-tx-bus-width = <1>;
};
};

2
arch/arm/dts/fsl-ls1028a-rdb.dts
View file

@ -48,6 +48,8 @@
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
spi-rx-bus-width = <8>;
spi-tx-bus-width = <1>;
};
};

3
arch/arm/dts/fsl-ls1046a-frwy.dts
View file

@ -32,3 +32,6 @@
};
&i2c0 {
status = "okay";
};

4
arch/arm/dts/fsl-ls1046a-qds.dtsi
View file

@ -80,3 +80,7 @@
&sata {
status = "okay";
};
&i2c0 {
status = "okay";
};

8
arch/arm/dts/fsl-ls1046a-rdb.dts
View file

@ -43,3 +43,11 @@
&sata {
status = "okay";
};
&i2c0 {
status = "okay";
};
&i2c3 {
status = "okay";
};

17
arch/arm/dts/fsl-lx2160a-qds.dts
View file

@ -13,6 +13,9 @@
/ {
model = "NXP Layerscape LX2160AQDS Board";
compatible = "fsl,lx2160aqds", "fsl,lx2160a";
aliases {
spi0 = &fspi;
};
};
&esdhc0 {
@ -46,6 +49,20 @@
};
};
&fspi {
status = "okay";
mt35xu512aba0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
spi-rx-bus-width = <8>;
spi-tx-bus-width = <1>;
};
};
&sata0 {
status = "okay";
};

4
arch/arm/dts/fsl-lx2160a-rdb.dts
View file

@ -39,6 +39,8 @@
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
spi-rx-bus-width = <8>;
spi-tx-bus-width = <1>;
};
mt35xu512aba1: flash@1 {
@ -47,6 +49,8 @@
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <1>;
spi-rx-bus-width = <8>;
spi-tx-bus-width = <1>;
};
};

3
arch/arm/include/asm/gpio.h
View file

@ -4,7 +4,8 @@
!defined(CONFIG_ARCH_ROCKCHIP) && !defined(CONFIG_ARCH_LX2160A) && \
!defined(CONFIG_ARCH_LS1028A) && !defined(CONFIG_ARCH_LS2080A) && \
!defined(CONFIG_ARCH_LS1088A) && !defined(CONFIG_ARCH_ASPEED) && \
!defined(CONFIG_ARCH_LS1012A) && !defined(CONFIG_ARCH_U8500) && \
!defined(CONFIG_ARCH_LS1012A) && !defined(CONFIG_ARCH_LS1043A) && \
!defined(CONFIG_ARCH_LS1046A) && !defined(CONFIG_ARCH_U8500) && \
!defined(CONFIG_CORTINA_PLATFORM)
#include <asm/arch/gpio.h>
#endif

2
board/freescale/ls1012ardb/Kconfig
View file

@ -35,7 +35,7 @@ config SYS_LS_PFE_FW_ADDR
config SYS_LS_PFE_ESBC_ADDR
hex "PFE Firmware HDR Addr"
default 0x40700000
default 0x40640000
config DDR_PFE_PHYS_BASEADDR
hex "PFE DDR physical base address"

98
board/freescale/ls1043aqds/ls1043aqds.c
View file

@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2015 Freescale Semiconductor, Inc.
* Copyright 2019 NXP
*/
#include <common.h>
@ -271,11 +272,24 @@ unsigned long get_board_ddr_clk(void)
return 66666666;
}
int select_i2c_ch_pca9547(u8 ch)
int select_i2c_ch_pca9547(u8 ch, int bus_num)
{
int ret;
#ifdef CONFIG_DM_I2C
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
1, &dev);
if (ret) {
printf("%s: Cannot find udev for a bus %d\n", __func__,
bus_num);
return ret;
}
ret = dm_i2c_write(dev, 0, &ch, 1);
#else
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
#endif
if (ret) {
puts("PCA: failed to select proper channel\n");
return ret;
@ -290,8 +304,10 @@ int dram_init(void)
* When resuming from deep sleep, the I2C channel may not be
* in the default channel. So, switch to the default channel
* before accessing DDR SPD.
*
* PCA9547 mount on I2C1 bus
*/
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
fsl_initdram();
#if (!defined(CONFIG_SPL) && !defined(CONFIG_TFABOOT)) || \
defined(CONFIG_SPL_BUILD)
@ -304,16 +320,83 @@ int dram_init(void)
int i2c_multiplexer_select_vid_channel(u8 channel)
{
return select_i2c_ch_pca9547(channel);
return select_i2c_ch_pca9547(channel, 0);
}
void board_retimer_init(void)
{
u8 reg;
int bus_num = 0;
/* Retimer is connected to I2C1_CH7_CH5 */
select_i2c_ch_pca9547(I2C_MUX_CH7);
select_i2c_ch_pca9547(I2C_MUX_CH7, bus_num);
reg = I2C_MUX_CH5;
#ifdef CONFIG_DM_I2C
struct udevice *dev;
int ret;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_SEC,
1, &dev);
if (ret) {
printf("%s: Cannot find udev for a bus %d\n", __func__,
bus_num);
return;
}
dm_i2c_write(dev, 0, &reg, 1);
/* Access to Control/Shared register */
ret = i2c_get_chip_for_busnum(bus_num, I2C_RETIMER_ADDR,
1, &dev);
if (ret) {
printf("%s: Cannot find udev for a bus %d\n", __func__,
bus_num);
return;
}
reg = 0x0;
dm_i2c_write(dev, 0xff, &reg, 1);
/* Read device revision and ID */
dm_i2c_read(dev, 1, &reg, 1);
debug("Retimer version id = 0x%x\n", reg);
/* Enable Broadcast. All writes target all channel register sets */
reg = 0x0c;
dm_i2c_write(dev, 0xff, &reg, 1);
/* Reset Channel Registers */
dm_i2c_read(dev, 0, &reg, 1);
reg |= 0x4;
dm_i2c_write(dev, 0, &reg, 1);
/* Enable override divider select and Enable Override Output Mux */
dm_i2c_read(dev, 9, &reg, 1);
reg |= 0x24;
dm_i2c_write(dev, 9, &reg, 1);
/* Select VCO Divider to full rate (000) */
dm_i2c_read(dev, 0x18, &reg, 1);
reg &= 0x8f;
dm_i2c_write(dev, 0x18, &reg, 1);
/* Selects active PFD MUX Input as Re-timed Data (001) */
dm_i2c_read(dev, 0x1e, &reg, 1);
reg &= 0x3f;
reg |= 0x20;
dm_i2c_write(dev, 0x1e, &reg, 1);
/* Set data rate as 10.3125 Gbps */
reg = 0x0;
dm_i2c_write(dev, 0x60, &reg, 1);
reg = 0xb2;
dm_i2c_write(dev, 0x61, &reg, 1);
reg = 0x90;
dm_i2c_write(dev, 0x62, &reg, 1);
reg = 0xb3;
dm_i2c_write(dev, 0x63, &reg, 1);
reg = 0xcd;
dm_i2c_write(dev, 0x64, &reg, 1);
#else
i2c_write(I2C_MUX_PCA_ADDR_SEC, 0, 1, &reg, 1);
/* Access to Control/Shared register */
@ -360,9 +443,10 @@ void board_retimer_init(void)
i2c_write(I2C_RETIMER_ADDR, 0x63, 1, &reg, 1);
reg = 0xcd;
i2c_write(I2C_RETIMER_ADDR, 0x64, 1, &reg, 1);
#endif
/* Return the default channel */
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, bus_num);
}
int board_early_init_f(void)
@ -375,8 +459,10 @@ int board_early_init_f(void)
u8 uart;
#endif
#ifdef CONFIG_SYS_I2C
#ifdef CONFIG_SYS_I2C_EARLY_INIT
i2c_early_init_f();
#endif
#endif
fsl_lsch2_early_init_f();
@ -457,7 +543,7 @@ int board_init(void)
erratum_a010315();
#endif
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
board_retimer_init();
#ifdef CONFIG_SYS_FSL_SERDES

17
board/freescale/ls1046afrwy/ls1046afrwy.c
View file

@ -36,11 +36,24 @@
DECLARE_GLOBAL_DATA_PTR;
int select_i2c_ch_pca9547(u8 ch)
int select_i2c_ch_pca9547(u8 ch, int bus_num)
{
int ret;
#ifdef CONFIG_DM_I2C
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
1, &dev);
if (ret) {
printf("%s: Cannot find udev for a bus %d\n", __func__,
bus_num);
return ret;
}
ret = dm_i2c_write(dev, 0, &ch, 1);
#else
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
#endif
if (ret) {
puts("PCA: failed to select proper channel\n");
return ret;
@ -149,7 +162,7 @@ val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
sec_init();
#endif
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
return 0;
}

25
board/freescale/ls1046aqds/ls1046aqds.c
View file

@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2016 Freescale Semiconductor, Inc.
* Copyright 2019 NXP
*/
#include <common.h>
@ -269,11 +270,23 @@ u32 get_lpuart_clk(void)
}
#endif
int select_i2c_ch_pca9547(u8 ch)
int select_i2c_ch_pca9547(u8 ch, int bus_num)
{
int ret;
#ifdef CONFIG_DM_I2C
struct udevice *dev;
ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI,
1, &dev);
if (ret) {
printf("%s: Cannot find udev for a bus %d\n", __func__,
bus_num);
return ret;
}
ret = dm_i2c_write(dev, 0, &ch, 1);
#else
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
#endif
if (ret) {
puts("PCA: failed to select proper channel\n");
return ret;
@ -288,8 +301,10 @@ int dram_init(void)
* When resuming from deep sleep, the I2C channel may not be
* in the default channel. So, switch to the default channel
* before accessing DDR SPD.
*
* PCA9547 mount on I2C1 bus
*/
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
fsl_initdram();
#if (!defined(CONFIG_SPL) && !defined(CONFIG_TFABOOT)) || \
defined(CONFIG_SPL_BUILD)
@ -302,7 +317,7 @@ int dram_init(void)
int i2c_multiplexer_select_vid_channel(u8 channel)
{
return select_i2c_ch_pca9547(channel);
return select_i2c_ch_pca9547(channel, 0);
}
int board_early_init_f(void)
@ -315,8 +330,10 @@ int board_early_init_f(void)
u8 uart;
#endif
#ifdef CONFIG_SYS_I2C
#ifdef CONFIG_SYS_I2C_EARLY_INIT
i2c_early_init_f();
#endif
#endif
fsl_lsch2_early_init_f();
@ -394,7 +411,7 @@ int misc_init_r(void)
int board_init(void)
{
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
#ifdef CONFIG_SYS_FSL_SERDES
config_serdes_mux();

48
board/freescale/lx2160a/lx2160a.c
View file

@ -29,11 +29,14 @@
#include "../common/vid.h"
#include <fsl_immap.h>
#include <asm/arch-fsl-layerscape/fsl_icid.h>
#include <asm/gic-v3.h>
#include <cpu_func.h>
#ifdef CONFIG_EMC2305
#include "../common/emc2305.h"
#endif
#define GIC_LPI_SIZE 0x200000
#ifdef CONFIG_TARGET_LX2160AQDS
#define CFG_MUX_I2C_SDHC(reg, value) ((reg & 0x3f) | value)
#define SET_CFG_MUX1_SDHC1_SDHC(reg) (reg & 0x3f)
@ -149,6 +152,7 @@ int board_fix_fdt(void *fdt)
reg_name = reg_names;
remaining_names_len = names_len - (reg_name - reg_names);
i = 0;
while ((i < ARRAY_SIZE(reg_names_map)) && remaining_names_len) {
old_name_len = strlen(reg_names_map[i].old_str);
new_name_len = strlen(reg_names_map[i].new_str);
@ -274,7 +278,14 @@ int i2c_multiplexer_select_vid_channel(u8 channel)
int init_func_vid(void)
{
if (adjust_vdd(0) < 0)
int set_vid;
if (IS_SVR_REV(get_svr(), 1, 0))
set_vid = adjust_vdd(800);
else
set_vid = adjust_vdd(0);
if (set_vid < 0)
printf("core voltage not adjusted\n");
return 0;
@ -469,10 +480,16 @@ int config_board_mux(void)
reg11 = SET_CFG_MUX3_SDHC1_SPI(reg11, 0x01);
QIXIS_WRITE(brdcfg[11], reg11);
} else {
/* Routes {SDHC1_DAT4} to SDHC1 adapter slot */
/*
* If {SDHC1_DAT4} has been configured to route to SDHC1_VS,
* do not change it.
* Otherwise route {SDHC1_DAT4} to SDHC1 adapter slot.
*/
reg11 = QIXIS_READ(brdcfg[11]);
reg11 = SET_CFG_MUX2_SDHC1_SPI(reg11, 0x00);
QIXIS_WRITE(brdcfg[11], reg11);
if ((reg11 & 0x30) != 0x30) {
reg11 = SET_CFG_MUX2_SDHC1_SPI(reg11, 0x00);
QIXIS_WRITE(brdcfg[11], reg11);
}
/* - Routes {SDHC1_DAT5, SDHC1_DAT6} to SDHC1 adapter slot.
* {SDHC1_DAT7, SDHC1_DS } to SDHC1 adapter slot.
@ -627,8 +644,22 @@ void board_quiesce_devices(void)
}
#endif
#ifdef CONFIG_OF_BOARD_SETUP
#ifdef CONFIG_GIC_V3_ITS
void fdt_fixup_gic_lpi_memory(void *blob, u64 gic_lpi_base)
{
u32 phandle;
int err;
struct fdt_memory gic_lpi;
gic_lpi.start = gic_lpi_base;
gic_lpi.end = gic_lpi_base + GIC_LPI_SIZE - 1;
err = fdtdec_add_reserved_memory(blob, "gic-lpi", &gic_lpi, &phandle);
if (err < 0)
debug("failed to add reserved memory: %d\n", err);
}
#endif
#ifdef CONFIG_OF_BOARD_SETUP
int ft_board_setup(void *blob, bd_t *bd)
{
int i;
@ -639,6 +670,7 @@ int ft_board_setup(void *blob, bd_t *bd)
u64 mc_memory_base = 0;
u64 mc_memory_size = 0;
u16 total_memory_banks;
u64 gic_lpi_base;
ft_cpu_setup(blob, bd);
@ -658,6 +690,12 @@ int ft_board_setup(void *blob, bd_t *bd)
size[i] = gd->bd->bi_dram[i].size;
}
#ifdef CONFIG_GIC_V3_ITS
gic_lpi_base = gd->arch.resv_ram - GIC_LPI_SIZE;
gic_lpi_tables_init(gic_lpi_base, cpu_numcores());
fdt_fixup_gic_lpi_memory(blob, gic_lpi_base);
#endif
#ifdef CONFIG_RESV_RAM
/* reduce size if reserved memory is within this bank */
if (gd->arch.resv_ram >= base[0] &&

1
configs/ls1012afrdm_qspi_defconfig
View file

@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_ENV_OFFSET=0x300000
CONFIG_DM_GPIO=y
CONFIG_BLK=y
CONFIG_FSL_LS_PPA=y
CONFIG_QSPI_AHB_INIT=y
CONFIG_NR_DRAM_BANKS=2

1
configs/ls1012afrdm_tfa_defconfig
View file

@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x40000
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_ENV_OFFSET=0x500000
CONFIG_DM_GPIO=y
CONFIG_BLK=y
CONFIG_QSPI_AHB_INIT=y
CONFIG_NR_DRAM_BANKS=2
CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y

2
configs/ls1012ardb_tfa_SECURE_BOOT_defconfig
View file

@ -60,3 +60,5 @@ CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_FSL_PFE=y
CONFIG_DM_ETH=y

1
configs/ls1012ardb_tfa_defconfig
View file

@ -40,7 +40,6 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DM_I2C=y
CONFIG_DM_MMC=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y

1
configs/ls1021aiot_qspi_defconfig
View file

@ -45,5 +45,6 @@ CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y

1
configs/ls1028ardb_tfa_defconfig
View file

@ -45,7 +45,6 @@ CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_DM_MMC=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y

2
configs/ls1043aqds_defconfig
View file

@ -62,3 +62,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1043aqds_lpuart_defconfig
View file

@ -64,3 +64,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1043aqds_nand_defconfig
View file

@ -78,3 +78,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1043aqds_nor_ddr3_defconfig
View file

@ -63,3 +63,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1043aqds_qspi_defconfig
View file

@ -58,3 +58,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1043aqds_sdcard_ifc_defconfig
View file

@ -79,3 +79,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1043aqds_sdcard_qspi_defconfig
View file

@ -72,3 +72,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
View file

@ -63,3 +63,5 @@ CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1043aqds_tfa_defconfig
View file

@ -71,3 +71,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1043ardb_SECURE_BOOT_defconfig
View file

@ -55,3 +55,5 @@ CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1043ardb_defconfig
View file

@ -55,3 +55,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1043ardb_nand_SECURE_BOOT_defconfig
View file

@ -75,3 +75,5 @@ CONFIG_USB_XHCI_DWC3=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1043ardb_nand_defconfig
View file

@ -74,3 +74,5 @@ CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
View file

@ -74,3 +74,5 @@ CONFIG_USB_XHCI_DWC3=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1043ardb_sdcard_defconfig
View file

@ -73,3 +73,5 @@ CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
# CONFIG_SPL_USE_TINY_PRINTF is not set
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
View file

@ -56,3 +56,5 @@ CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1043ardb_tfa_defconfig
View file

@ -59,3 +59,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046afrwy_tfa_defconfig
View file

@ -62,3 +62,5 @@ CONFIG_USB_HOST_ETHER=y
CONFIG_USB_ETHER_ASIX=y
CONFIG_USB_ETHER_ASIX88179=y
CONFIG_USB_ETHER_RTL8152=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046aqds_SECURE_BOOT_defconfig
View file

@ -60,3 +60,5 @@ CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_RSA=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046aqds_defconfig
View file

@ -62,3 +62,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046aqds_lpuart_defconfig
View file

@ -64,3 +64,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046aqds_nand_defconfig
View file

@ -70,3 +70,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046aqds_qspi_defconfig
View file

@ -58,3 +58,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046aqds_sdcard_ifc_defconfig
View file

@ -80,3 +80,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046aqds_sdcard_qspi_defconfig
View file

@ -74,3 +74,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
View file

@ -61,3 +61,5 @@ CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_RSA=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046aqds_tfa_defconfig
View file

@ -71,3 +71,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046ardb_emmc_defconfig
View file

@ -73,3 +73,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
View file

@ -55,3 +55,5 @@ CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_RSA=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046ardb_qspi_defconfig
View file

@ -57,3 +57,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046ardb_qspi_spl_defconfig
View file

@ -77,3 +77,5 @@ CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_SPL_GZIP=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
View file

@ -70,3 +70,5 @@ CONFIG_USB_XHCI_DWC3=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046ardb_sdcard_defconfig
View file

@ -72,3 +72,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
View file

@ -54,3 +54,5 @@ CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_RSA=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/ls1046ardb_tfa_defconfig
View file

@ -58,3 +58,5 @@ CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y

2
configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
View file

@ -65,6 +65,7 @@ CONFIG_DM_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_NXP_FSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
@ -73,3 +74,4 @@ CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_GIC_V3_ITS=y

5
configs/lx2160aqds_tfa_defconfig
View file

@ -4,6 +4,7 @@ CONFIG_TFABOOT=y
CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_ENV_OFFSET=0x500000
CONFIG_DM_GPIO=y
CONFIG_FSPI_AHB_EN_4BYTE=y
@ -32,6 +33,8 @@ CONFIG_OF_CONTROL=y
CONFIG_OF_BOARD_FIXUP=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-qds"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_ADDR=0x20500000
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
@ -65,8 +68,10 @@ CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_NXP_FSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_GIC_V3_ITS=y

2
configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
View file

@ -60,6 +60,7 @@ CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_NXP_FSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
@ -68,3 +69,4 @@ CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_SOFTWARE_EXP=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_GIC_V3_ITS=y

6
configs/lx2160ardb_tfa_defconfig
View file

@ -4,6 +4,7 @@ CONFIG_TFABOOT=y
CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_ENV_OFFSET=0x500000
CONFIG_DM_GPIO=y
CONFIG_EMC2305=y
@ -33,6 +34,8 @@ CONFIG_OF_CONTROL=y
CONFIG_OF_BOARD_FIXUP=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-lx2160a-rdb"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_ENV_ADDR=0x20500000
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
@ -41,7 +44,6 @@ CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_DM_MMC=y
CONFIG_MMC_HS200_SUPPORT=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
@ -64,8 +66,10 @@ CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_NXP_FSPI=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_EFI_LOADER_BOUNCE_BUFFER=y
CONFIG_GIC_V3_ITS=y

4
drivers/net/fm/ls1043.c
View file

@ -65,12 +65,12 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
if (port == FM1_DTSEC3)
if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC1) ==
FSL_CHASSIS2_RCWSR13_EC1_DTSEC3_RGMII) {
return PHY_INTERFACE_MODE_RGMII_TXID;
return PHY_INTERFACE_MODE_RGMII_ID;
}
if (port == FM1_DTSEC4)
if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC2) ==
FSL_CHASSIS2_RCWSR13_EC2_DTSEC4_RGMII) {
return PHY_INTERFACE_MODE_RGMII_TXID;
return PHY_INTERFACE_MODE_RGMII_ID;
}
/* handle SGMII */

4
drivers/net/fm/ls1046.c
View file

@ -71,12 +71,12 @@ phy_interface_t fman_port_enet_if(enum fm_port port)
if (port == FM1_DTSEC3)
if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC1) ==
FSL_CHASSIS2_RCWSR13_EC1_DTSEC3_RGMII)
return PHY_INTERFACE_MODE_RGMII_TXID;
return PHY_INTERFACE_MODE_RGMII_ID;
if (port == FM1_DTSEC4)
if ((rcwsr13 & FSL_CHASSIS2_RCWSR13_EC2) ==
FSL_CHASSIS2_RCWSR13_EC2_DTSEC4_RGMII)
return PHY_INTERFACE_MODE_RGMII_TXID;
return PHY_INTERFACE_MODE_RGMII_ID;
/* handle SGMII, only MAC 2/5/6/9/10 available */
switch (port) {

4
drivers/net/fm/memac.c
View file

@ -83,6 +83,8 @@ static void memac_set_interface_mode(struct fsl_enet_mac *mac,
if_mode |= IF_MODE_GMII;
break;
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_RGMII_ID:
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_TXID:
if_mode |= (IF_MODE_GMII | IF_MODE_RG);
break;
@ -107,6 +109,8 @@ static void memac_set_interface_mode(struct fsl_enet_mac *mac,
if_mode |= IF_MODE_EN_AUTO;
if (type == PHY_INTERFACE_MODE_RGMII ||
type == PHY_INTERFACE_MODE_RGMII_ID ||
type == PHY_INTERFACE_MODE_RGMII_RXID ||
type == PHY_INTERFACE_MODE_RGMII_TXID) {
if_mode &= ~IF_MODE_EN_AUTO;
if_mode &= ~IF_MODE_SETSP_MASK;

37
drivers/pci/pcie_ecam_generic.c
View file

@ -19,6 +19,8 @@
*/
struct generic_ecam_pcie {
void *cfg_base;
pci_size_t size;
int first_busno;
};
/**
@ -43,7 +45,7 @@ static int pci_generic_ecam_conf_address(const struct udevice *bus,
void *addr;
addr = pcie->cfg_base;
addr += PCI_BUS(bdf) << 20;
addr += (PCI_BUS(bdf) - pcie->first_busno) << 20;
addr += PCI_DEV(bdf) << 15;
addr += PCI_FUNC(bdf) << 12;
addr += offset;
@ -52,6 +54,16 @@ static int pci_generic_ecam_conf_address(const struct udevice *bus,
return 0;
}
static bool pci_generic_ecam_addr_valid(const struct udevice *bus,
pci_dev_t bdf)
{
struct generic_ecam_pcie *pcie = dev_get_priv(bus);
int num_buses = DIV_ROUND_UP(pcie->size, 1 << 16);
return (PCI_BUS(bdf) >= pcie->first_busno &&
PCI_BUS(bdf) < pcie->first_busno + num_buses);
}
/**
* pci_generic_ecam_read_config() - Read from configuration space
* @bus: Pointer to the PCI bus
@ -68,6 +80,11 @@ static int pci_generic_ecam_read_config(const struct udevice *bus,
pci_dev_t bdf, uint offset,
ulong *valuep, enum pci_size_t size)
{
if (!pci_generic_ecam_addr_valid(bus, bdf)) {
*valuep = pci_get_ff(size);
return 0;
}
return pci_generic_mmap_read_config(bus, pci_generic_ecam_conf_address,
bdf, offset, valuep, size);
}
@ -88,6 +105,9 @@ static int pci_generic_ecam_write_config(struct udevice *bus, pci_dev_t bdf,
uint offset, ulong value,
enum pci_size_t size)
{
if (!pci_generic_ecam_addr_valid(bus, bdf))
return 0;
return pci_generic_mmap_write_config(bus, pci_generic_ecam_conf_address,
bdf, offset, value, size);
}
@ -116,9 +136,17 @@ static int pci_generic_ecam_ofdata_to_platdata(struct udevice *dev)
return err;
}
pcie->cfg_base = map_physmem(reg_res.start,
fdt_resource_size(&reg_res),
MAP_NOCACHE);
pcie->size = fdt_resource_size(&reg_res);
pcie->cfg_base = map_physmem(reg_res.start, pcie->size, MAP_NOCACHE);
return 0;
}
static int pci_generic_ecam_probe(struct udevice *dev)
{
struct generic_ecam_pcie *pcie = dev_get_priv(dev);
pcie->first_busno = dev->seq;
return 0;
}
@ -138,6 +166,7 @@ U_BOOT_DRIVER(pci_generic_ecam) = {
.id = UCLASS_PCI,
.of_match = pci_generic_ecam_ids,
.ops = &pci_generic_ecam_ops,
.probe = pci_generic_ecam_probe,
.ofdata_to_platdata = pci_generic_ecam_ofdata_to_platdata,
.priv_auto_alloc_size = sizeof(struct generic_ecam_pcie),
};

46
drivers/power/power_i2c.c
View file

@ -7,6 +7,7 @@
* Stefano Babic, DENX Software Engineering, sbabic@denx.de
*
* (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
* (C) Copyright 2019 NXP
*/
#include <common.h>
@ -21,8 +22,20 @@ int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
if (check_reg(p, reg))
return -EINVAL;
#if defined(CONFIG_DM_I2C)
struct udevice *dev;
int ret;
ret = i2c_get_chip_for_busnum(p->bus, pmic_i2c_addr,
1, &dev);
if (ret) {
printf("%s: Cannot find udev for a bus %d\n", __func__,
p->bus);
return -ENXIO;
}
#else /* Non DM I2C support - will be removed */
I2C_SET_BUS(p->bus);
#endif
switch (pmic_i2c_tx_num) {
case 3:
@ -53,7 +66,11 @@ int pmic_reg_write(struct pmic *p, u32 reg, u32 val)
return -EINVAL;
}
#if defined(CONFIG_DM_I2C)
return dm_i2c_write(dev, reg, buf, pmic_i2c_tx_num);
#else
return i2c_write(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num);
#endif
}
int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
@ -65,9 +82,21 @@ int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
if (check_reg(p, reg))
return -EINVAL;
I2C_SET_BUS(p->bus);
#if defined(CONFIG_DM_I2C)
struct udevice *dev;
ret = i2c_get_chip_for_busnum(p->bus, pmic_i2c_addr,
1, &dev);
if (ret) {
printf("%s: Cannot find udev for a bus %d\n", __func__,
p->bus);
return -ENXIO;
}
ret = dm_i2c_read(dev, reg, buf, pmic_i2c_tx_num);
#else /* Non DM I2C support - will be removed */
I2C_SET_BUS(p->bus);
ret = i2c_read(pmic_i2c_addr, reg, 1, buf, pmic_i2c_tx_num);
#endif
if (ret)
return ret;
@ -100,12 +129,25 @@ int pmic_reg_read(struct pmic *p, u32 reg, u32 *val)
int pmic_probe(struct pmic *p)
{
i2c_set_bus_num(p->bus);
debug("Bus: %d PMIC:%s probed!\n", p->bus, p->name);
#if defined(CONFIG_DM_I2C)
struct udevice *dev;
int ret;
ret = i2c_get_chip_for_busnum(p->bus, pmic_i2c_addr,
1, &dev);
if (ret) {
printf("%s: Cannot find udev for a bus %d\n", __func__,
p->bus);
return -ENXIO;
}
#else /* Non DM I2C support - will be removed */
i2c_set_bus_num(p->bus);
if (i2c_probe(pmic_i2c_addr)) {
printf("Can't find PMIC:%s\n", p->name);
return -ENODEV;
}
#endif
return 0;
}

7
include/configs/ls1012afrwy.h
View file

@ -8,6 +8,9 @@
#include "ls1012a_common.h"
#undef CONFIG_SYS_BOARD
#define CONFIG_SYS_BOARD "ls1012afrwy"
/* Board Rev*/
#define BOARD_REV_A_B 0x0
#define BOARD_REV_C 0x00080000
@ -63,9 +66,9 @@
"fdtheader_addr_r=0x80100000\0" \
"kernelheader_addr_r=0x80200000\0" \
"kernelheader_size=0x40000\0" \
"kernel_addr_r=0x96000000\0" \
"kernel_addr_r=0x92000000\0" \
"fdt_addr_r=0x90000000\0" \
"load_addr=0x96000000\0" \
"load_addr=0x92000000\0" \
"kernel_size=0x2800000\0" \
"kernelheader_size=0x40000\0" \
"console=ttyS0,115200\0" \

5
include/configs/ls1021aiot.h
View file

@ -207,12 +207,13 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \
"initrd_high=0xffffffff\0" \
"fdt_high=0xffffffff\0"
"initrd_high=0xffffffff\0"
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
#define CONFIG_CMD_GREPENV
#define CONFIG_CMD_MEMINFO

3
include/configs/ls1021aqds.h
View file

@ -460,13 +460,11 @@ unsigned long get_board_ddr_clk(void);
#ifdef CONFIG_LPUART
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootargs=root=/dev/ram0 rw console=ttyLP0,115200\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=null\0"
#else
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \
"fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=null\0"
#endif
@ -474,6 +472,7 @@ unsigned long get_board_ddr_clk(void);
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END 0x9fffffff

3
include/configs/ls1021atsn.h
View file

@ -154,7 +154,6 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \
"initrd_high=0xffffffff\0" \
"fdt_high=0xffffffff\0" \
"fdt_addr=0x64f00000\0" \
"kernel_addr=0x61000000\0" \
"kernelheader_addr=0x60800000\0" \
@ -216,6 +215,8 @@
"bootm $load_addr#$board\0"
/* Miscellaneous configurable options */
#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE \
(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)

9
include/configs/ls1021atwr.h
View file

@ -297,9 +297,8 @@
#ifdef CONFIG_LPUART
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootargs=root=/dev/ram0 rw console=ttyLP0,115200\0" \
"bootargs=root=/dev/ram0 rw console=ttyLP0,115200 $othbootargs\0" \
"initrd_high=0xffffffff\0" \
"fdt_high=0xffffffff\0" \
"fdt_addr=0x64f00000\0" \
"kernel_addr=0x65000000\0" \
"scriptaddr=0x80000000\0" \
@ -313,7 +312,6 @@
"kernel_size=0x2800000\0" \
"kernel_addr_sd=0x8000\0" \
"kernel_size_sd=0x14000\0" \
"$othbootargs\0" \
"othbootargs=cma=64M@0x0-0xb0000000\0" \
BOOTENV \
"boot_scripts=ls1021atwr_boot.scr\0" \
@ -355,9 +353,8 @@
"$kernel_size && bootm $load_addr#$board\0"
#else
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \
"bootargs=root=/dev/ram0 rw console=ttyS0,115200 $othbootargs\0" \
"initrd_high=0xffffffff\0" \
"fdt_high=0xffffffff\0" \
"fdt_addr=0x64f00000\0" \
"kernel_addr=0x61000000\0" \
"kernelheader_addr=0x60800000\0" \
@ -375,7 +372,6 @@
"kernel_size_sd=0x14000\0" \
"kernelhdr_addr_sd=0x4000\0" \
"kernelhdr_size_sd=0x10\0" \
"$othbootargs\0" \
"othbootargs=cma=64M@0x0-0xb0000000\0" \
BOOTENV \
"boot_scripts=ls1021atwr_boot.scr\0" \
@ -441,6 +437,7 @@
/*
* Miscellaneous configurable options
*/
#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
#define CONFIG_SYS_MEMTEST_START 0x80000000
#define CONFIG_SYS_MEMTEST_END 0x9fffffff

92
include/configs/ls1028a_common.h
View file

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2019 NXP
* Copyright 2019-2020 NXP
*/
#ifndef __L1028A_COMMON_H
@ -70,96 +70,10 @@
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 0) \
func(MMC, mmc, 1) \
func(USB, usb, 0)
func(USB, usb, 0) \
func(DHCP, dhcp, na)
#include <config_distro_bootcmd.h>
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
"board=ls1028ardb\0" \
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
"ramdisk_addr=0x800000\0" \
"ramdisk_size=0x2000000\0" \
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
"fdt_addr=0x00f00000\0" \
"kernel_addr=0x01000000\0" \
"scriptaddr=0x80000000\0" \
"scripthdraddr=0x80080000\0" \
"fdtheader_addr_r=0x80100000\0" \
"kernelheader_addr_r=0x80200000\0" \
"load_addr=0xa0000000\0" \
"kernel_addr_r=0x81000000\0" \
"fdt_addr_r=0x90000000\0" \
"ramdisk_addr_r=0xa0000000\0" \
"kernel_start=0x1000000\0" \
"kernelheader_start=0x800000\0" \
"kernel_load=0xa0000000\0" \
"kernel_size=0x2800000\0" \
"kernelheader_size=0x40000\0" \
"kernel_addr_sd=0x8000\0" \
"kernel_size_sd=0x14000\0" \
"kernelhdr_addr_sd=0x4000\0" \
"kernelhdr_size_sd=0x10\0" \
"console=ttyS0,115200\0" \
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
BOOTENV \
"boot_scripts=ls1028ardb_boot.scr\0" \
"boot_script_hdr=hdr_ls1028ardb_bs.out\0" \
"scan_dev_for_boot_part=" \
"part list ${devtype} ${devnum} devplist; " \
"env exists devplist || setenv devplist 1; " \
"for distro_bootpart in ${devplist}; do " \
"if fstype ${devtype} " \
"${devnum}:${distro_bootpart} " \
"bootfstype; then " \
"run scan_dev_for_boot; " \
"fi; " \
"done\0" \
"scan_dev_for_boot=" \
"echo Scanning ${devtype} " \
"${devnum}:${distro_bootpart}...; " \
"for prefix in ${boot_prefixes}; do " \
"run scan_dev_for_scripts; " \
"done;" \
"\0" \
"boot_a_script=" \
"load ${devtype} ${devnum}:${distro_bootpart} " \
"${scriptaddr} ${prefix}${script}; " \
"env exists secureboot && load ${devtype} " \
"${devnum}:${distro_bootpart} " \
"${scripthdraddr} ${prefix}${boot_script_hdr} " \
"&& esbc_validate ${scripthdraddr};" \
"source ${scriptaddr}\0" \
"xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \
"sf probe 0:0 && sf read $load_addr " \
"$kernel_start $kernel_size ; env exists secureboot &&" \
"sf read $kernelheader_addr_r $kernelheader_start " \
"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
" bootm $load_addr#$board\0" \
"xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \
"sf probe 0:0 && sf read $load_addr 0x940000 0x30000 " \
"&& hdp load $load_addr 0x2000\0" \
"sd_bootcmd=echo Trying load from SD ...;" \
"mmcinfo; mmc read $load_addr " \
"$kernel_addr_sd $kernel_size_sd && " \
"env exists secureboot && mmc read $kernelheader_addr_r " \
"$kernelhdr_addr_sd $kernelhdr_size_sd " \
" && esbc_validate ${kernelheader_addr_r};" \
"bootm $load_addr#$board\0" \
"sd_hdploadcmd=echo Trying load HDP firmware from SD..;" \
"mmcinfo;mmc read $load_addr 0x4a00 0x200 " \
"&& hdp load $load_addr 0x2000\0" \
"emmc_bootcmd=echo Trying load from EMMC ..;" \
"mmcinfo; mmc dev 1; mmc read $load_addr " \
"$kernel_addr_sd $kernel_size_sd && " \
"env exists secureboot && mmc read $kernelheader_addr_r " \
"$kernelhdr_addr_sd $kernelhdr_size_sd " \
" && esbc_validate ${kernelheader_addr_r};" \
"bootm $load_addr#$board\0" \
"emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;" \
"mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \
"&& hdp load $load_addr 0x2000\0"
#undef CONFIG_BOOTCOMMAND
#define XSPI_NOR_BOOTCOMMAND \

49
include/configs/ls1028aqds.h
View file

@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2019 NXP
* Copyright 2019-2020 NXP
*/
#ifndef __LS1028A_QDS_H
@ -90,8 +90,6 @@
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
"ramdisk_addr=0x800000\0" \
"ramdisk_size=0x2000000\0" \
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
"fdt_addr=0x00f00000\0" \
"kernel_addr=0x01000000\0" \
"scriptaddr=0x80000000\0" \
@ -101,15 +99,16 @@
"load_addr=0xa0000000\0" \
"kernel_addr_r=0x81000000\0" \
"fdt_addr_r=0x90000000\0" \
"fdt2_addr_r=0x90010000\0" \
"ramdisk_addr_r=0xa0000000\0" \
"kernel_start=0x1000000\0" \
"kernelheader_start=0x800000\0" \
"kernelheader_start=0x600000\0" \
"kernel_load=0xa0000000\0" \
"kernel_size=0x2800000\0" \
"kernelheader_size=0x40000\0" \
"kernel_addr_sd=0x8000\0" \
"kernel_size_sd=0x14000\0" \
"kernelhdr_addr_sd=0x4000\0" \
"kernelhdr_addr_sd=0x3000\0" \
"kernelhdr_size_sd=0x10\0" \
"console=ttyS0,115200\0" \
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
@ -141,19 +140,35 @@
"${scripthdraddr} ${prefix}${boot_script_hdr} " \
"&& esbc_validate ${scripthdraddr};" \
"source ${scriptaddr}\0" \
"sd_bootcmd=echo Trying load from SD ..;" \
"mmcinfo; mmc read $load_addr " \
"$kernel_addr_sd $kernel_size_sd && " \
"xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \
"sf probe 0:0 && sf read $load_addr " \
"$kernel_start $kernel_size ; env exists secureboot &&" \
"sf read $kernelheader_addr_r $kernelheader_start " \
"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
" bootm $load_addr#$board\0" \
"xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \
"sf probe 0:0 && sf read $load_addr 0x940000 0x30000 " \
"&& hdp load $load_addr 0x2000\0" \
"sd_bootcmd=echo Trying load from SD ...;" \
"mmc dev 0; mmcinfo; mmc read $load_addr " \
"$kernel_addr_sd $kernel_size_sd && " \
"env exists secureboot && mmc read $kernelheader_addr_r " \
"$kernelhdr_addr_sd $kernelhdr_size_sd " \
" && esbc_validate ${kernelheader_addr_r};" \
"bootm $load_addr#$board\0" \
"emmc_bootcmd=echo Trying load from EMMC ..;" \
"mmcinfo; mmc dev 1; mmc read $load_addr " \
"$kernel_addr_sd $kernel_size_sd && " \
"env exists secureboot && mmc read $kernelheader_addr_r " \
"$kernelhdr_addr_sd $kernelhdr_size_sd " \
"$kernelhdr_addr_sd $kernelhdr_size_sd " \
" && esbc_validate ${kernelheader_addr_r};" \
"bootm $load_addr#$board\0"
"bootm $load_addr#$board\0" \
"sd_hdploadcmd=echo Trying load HDP firmware from SD..;" \
"mmc dev 0;mmcinfo; mmc read $load_addr 0x4a00 0x200 " \
"&& hdp load $load_addr 0x2000\0" \
"emmc_bootcmd=echo Trying load from EMMC ..;" \
"mmc dev 1; mmcinfo; mmc read $load_addr " \
"$kernel_addr_sd $kernel_size_sd && " \
"env exists secureboot && mmc read $kernelheader_addr_r " \
"$kernelhdr_addr_sd $kernelhdr_size_sd " \
" && esbc_validate ${kernelheader_addr_r};" \
"bootm $load_addr#$board\0" \
"emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;" \
"mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \
"&& hdp load $load_addr 0x2000\0"
#endif
#endif /* __LS1028A_QDS_H */

88
include/configs/ls1028ardb.h
View file

@ -72,4 +72,92 @@
#define CONFIG_SCSI_AHCI_PLAT
#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
/* Initial environment variables */
#ifndef SPL_NO_ENV
#undef CONFIG_EXTRA_ENV_SETTINGS
#define CONFIG_EXTRA_ENV_SETTINGS \
"board=ls1028ardb\0" \
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
"ramdisk_addr=0x800000\0" \
"ramdisk_size=0x2000000\0" \
"bootm_size=0x10000000\0" \
"fdt_addr=0x00f00000\0" \
"kernel_addr=0x01000000\0" \
"scriptaddr=0x80000000\0" \
"scripthdraddr=0x80080000\0" \
"fdtheader_addr_r=0x80100000\0" \
"kernelheader_addr_r=0x80200000\0" \
"load_addr=0xa0000000\0" \
"kernel_addr_r=0x81000000\0" \
"fdt_addr_r=0x90000000\0" \
"ramdisk_addr_r=0xa0000000\0" \
"kernel_start=0x1000000\0" \
"kernelheader_start=0x600000\0" \
"kernel_load=0xa0000000\0" \
"kernel_size=0x2800000\0" \
"kernelheader_size=0x40000\0" \
"kernel_addr_sd=0x8000\0" \
"kernel_size_sd=0x14000\0" \
"kernelhdr_addr_sd=0x3000\0" \
"kernelhdr_size_sd=0x20\0" \
"console=ttyS0,115200\0" \
"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
BOOTENV \
"boot_scripts=ls1028ardb_boot.scr\0" \
"boot_script_hdr=hdr_ls1028ardb_bs.out\0" \
"scan_dev_for_boot_part=" \
"part list ${devtype} ${devnum} devplist; " \
"env exists devplist || setenv devplist 1; " \
"for distro_bootpart in ${devplist}; do " \
"if fstype ${devtype} " \
"${devnum}:${distro_bootpart} " \
"bootfstype; then " \
"run scan_dev_for_boot; " \
"fi; " \
"done\0" \
"scan_dev_for_boot=" \
"echo Scanning ${devtype} " \
"${devnum}:${distro_bootpart}...; " \
"for prefix in ${boot_prefixes}; do " \
"run scan_dev_for_scripts; " \
"done;" \
"\0" \
"boot_a_script=" \
"load ${devtype} ${devnum}:${distro_bootpart} " \
"${scriptaddr} ${prefix}${script}; " \
"env exists secureboot && load ${devtype} " \
"${devnum}:${distro_bootpart} " \
"${scripthdraddr} ${prefix}${boot_script_hdr} " \
"&& esbc_validate ${scripthdraddr};" \
"source ${scriptaddr}\0" \
"xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \
"sf probe 0:0 && sf read $load_addr " \
"$kernel_start $kernel_size ; env exists secureboot &&" \
"sf read $kernelheader_addr_r $kernelheader_start " \
"$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
" bootm $load_addr#$board\0" \
"xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \
"sf probe 0:0 && sf read $load_addr 0x940000 0x30000 " \
"&& hdp load $load_addr 0x2000\0" \
"sd_bootcmd=echo Trying load from SD ...;" \
"mmc dev 0;mmcinfo; mmc read $load_addr " \
"$kernel_addr_sd $kernel_size_sd && " \
"env exists secureboot && mmc read $kernelheader_addr_r " \
"$kernelhdr_addr_sd $kernelhdr_size_sd " \
" && esbc_validate ${kernelheader_addr_r};" \
"bootm $load_addr#$board\0" \
"sd_hdploadcmd=echo Trying load HDP firmware from SD..;" \
"mmc dev 0;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \
"&& hdp load $load_addr 0x2000\0" \
"emmc_bootcmd=echo Trying load from EMMC ..;" \
"mmc dev 1;mmcinfo; mmc read $load_addr " \
"$kernel_addr_sd $kernel_size_sd && " \
"env exists secureboot && mmc read $kernelheader_addr_r " \
"$kernelhdr_addr_sd $kernelhdr_size_sd " \
" && esbc_validate ${kernelheader_addr_r};" \
"bootm $load_addr#$board\0" \
"emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;" \
"mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \
"&& hdp load $load_addr 0x2000\0"
#endif
#endif /* __LS1028A_RDB_H */

11
include/configs/ls1043a_common.h
View file

@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2015 Freescale Semiconductor
* Copyright (C) 2019 NXP
*/
#ifndef __LS1043A_COMMON_H
@ -141,7 +142,17 @@
#endif
/* I2C */
#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
#else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
#endif
/* PCIe */
#ifndef SPL_NO_PCIE

14
include/configs/ls1046a_common.h
View file

@ -16,6 +16,7 @@
#define SPL_NO_QSPI
#define SPL_NO_USB
#define SPL_NO_SATA
#undef CONFIG_DM_I2C
#endif
#if defined(CONFIG_SPL_BUILD) && \
(defined(CONFIG_NAND_BOOT) || defined(CONFIG_QSPI_BOOT))
@ -126,7 +127,17 @@
#endif
/* I2C */
#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
#define CONFIG_SYS_I2C_MXC_I2C4 /* enable I2C bus 4 */
#else
#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
#endif
/* PCIe */
#define CONFIG_PCIE1 /* PCIE controller 1 */
@ -217,8 +228,7 @@
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
"ramdisk_addr=0x800000\0" \
"ramdisk_size=0x2000000\0" \
"fdt_high=0xffffffffffffffff\0" \
"initrd_high=0xffffffffffffffff\0" \
"bootm_size=0x10000000\0" \
"fdt_addr=0x64f00000\0" \
"kernel_addr=0x65000000\0" \
"scriptaddr=0x80000000\0" \

63
include/configs/ls1088aqds.h
View file

@ -443,19 +443,47 @@ unsigned long get_board_ddr_clk(void);
"mcinitcmd=sf probe 0:0;sf read 0x80000000 0xA00000 0x100000;" \
"sf read 0x80100000 0xE00000 0x100000;" \
"fsl_mc start mc 0x80000000 0x80100000\0" \
"mcmemsize=0x70000000 \0"
#define QSPI_NOR_BOOTCOMMAND "sf probe 0:0;" \
"sf read 0x80001000 0xd00000 0x100000;"\
" fsl_mc lazyapply dpl 0x80001000 &&" \
" sf read $kernel_load $kernel_start" \
" $kernel_size && bootm $kernel_load"
#define SD_BOOTCOMMAND "mmcinfo;mmc read 0x80001000 0x6800 0x800;"\
" fsl_mc lazyapply dpl 0x80001000 &&" \
" mmc read $kernel_load $kernel_start_sd" \
" $kernel_size_sd && bootm $kernel_load"
#define IFC_NOR_BOOTCOMMAND "fsl_mc lazyapply dpl 0x580d00000 &&" \
" cp.b $kernel_start $kernel_load" \
" $kernel_size && bootm $kernel_load"
"mcmemsize=0x70000000 \0" \
"BOARD=ls1088aqds\0" \
"scriptaddr=0x80000000\0" \
"scripthdraddr=0x80080000\0" \
BOOTENV \
"boot_scripts=ls1088aqds_boot.scr\0" \
"boot_script_hdr=hdr_ls1088aqds_bs.out\0" \
"scan_dev_for_boot_part=" \
"part list ${devtype} ${devnum} devplist; " \
"env exists devplist || setenv devplist 1; " \
"for distro_bootpart in ${devplist}; do " \
"if fstype ${devtype} " \
"${devnum}:${distro_bootpart} " \
"bootfstype; then " \
"run scan_dev_for_boot; " \
"fi; " \
"done\0" \
"boot_a_script=" \
"load ${devtype} ${devnum}:${distro_bootpart} " \
"${scriptaddr} ${prefix}${script}; " \
"env exists secureboot && load ${devtype} " \
"${devnum}:${distro_bootpart} " \
"${scripthdraddr} ${prefix}${boot_script_hdr}; "\
"env exists secureboot " \
"&& esbc_validate ${scripthdraddr};" \
"source ${scriptaddr}\0" \
"qspi_bootcmd=echo Trying load from qspi..; " \
"sf probe 0:0; " \
"sf read 0x80001000 0xd00000 0x100000; " \
"fsl_mc lazyapply dpl 0x80001000 && " \
"sf read $kernel_load $kernel_start " \
"$kernel_size && bootm $kernel_load#$BOARD\0" \
"sd_bootcmd=echo Trying load from sd card..; " \
"mmcinfo;mmc read 0x80001000 0x6800 0x800; "\
"fsl_mc lazyapply dpl 0x80001000 && " \
"mmc read $kernel_load $kernel_start_sd " \
"$kernel_size_sd && bootm $kernel_load#$BOARD\0" \
"nor_bootcmd=echo Trying load from nor..; " \
"fsl_mc lazyapply dpl 0x580d00000 && " \
"cp.b $kernel_start $kernel_load " \
"$kernel_size && bootm $kernel_load#$BOARD\0"
#else
#if defined(CONFIG_QSPI_BOOT)
#undef CONFIG_EXTRA_ENV_SETTINGS
@ -510,6 +538,15 @@ unsigned long get_board_ddr_clk(void);
#endif /* CONFIG_TFABOOT */
#endif /* CONFIG_NXP_ESBC */
#ifdef CONFIG_TFABOOT
#define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; " \
"env exists secureboot && esbc_halt;;"
#define IFC_NOR_BOOTCOMMAND "run distro_bootcmd; run nor_bootcmd; " \
"env exists secureboot && esbc_halt;;"
#define SD_BOOTCOMMAND "run distro_bootcmd; run sd_bootcmd; " \
"env exists secureboot && esbc_halt;;"
#endif
#ifdef CONFIG_FSL_MC_ENET
#define CONFIG_FSL_MEMAC
#define CONFIG_PHYLIB

34
include/configs/ls2080aqds.h
View file

@ -383,7 +383,30 @@ unsigned long get_board_ddr_clk(void);
"kernelheader_size=0x40000\0" \
"BOARD=ls2088aqds\0" \
"mcmemsize=0x70000000 \0" \
"scriptaddr=0x80000000\0" \
"scripthdraddr=0x80080000\0" \
IFC_MC_INIT_CMD \
BOOTENV \
"boot_scripts=ls2088aqds_boot.scr\0" \
"boot_script_hdr=hdr_ls2088aqds_bs.out\0" \
"scan_dev_for_boot_part=" \
"part list ${devtype} ${devnum} devplist; " \
"env exists devplist || setenv devplist 1; " \
"for distro_bootpart in ${devplist}; do " \
"if fstype ${devtype} " \
"${devnum}:${distro_bootpart} " \
"bootfstype; then " \
"run scan_dev_for_boot; " \
"fi; " \
"done\0" \
"boot_a_script=" \
"load ${devtype} ${devnum}:${distro_bootpart} " \
"${scriptaddr} ${prefix}${script}; " \
"env exists secureboot && load ${devtype} " \
"${devnum}:${distro_bootpart} " \
"${scripthdraddr} ${prefix}${boot_script_hdr} " \
"&& esbc_validate ${scripthdraddr};" \
"source ${scriptaddr}\0" \
"nor_bootcmd=echo Trying load from nor..;" \
"cp.b $kernel_addr $load_addr " \
"$kernel_size ; env exists secureboot && " \
@ -429,6 +452,13 @@ unsigned long get_board_ddr_clk(void);
#endif /* CONFIG_NXP_ESBC */
#ifdef CONFIG_TFABOOT
#define BOOT_TARGET_DEVICES(func) \
func(USB, usb, 0) \
func(MMC, mmc, 0) \
func(SCSI, scsi, 0) \
func(DHCP, dhcp, na)
#include <config_distro_bootcmd.h>
#define SD_BOOTCOMMAND \
"env exists mcinitcmd && env exists secureboot "\
"&& mmcinfo && mmc read $load_addr 0x3600 0x800 " \
@ -436,14 +466,14 @@ unsigned long get_board_ddr_clk(void);
"env exists mcinitcmd && run mcinitcmd " \
"&& mmc read 0x80d00000 0x6800 0x800 " \
"&& fsl_mc lazyapply dpl 0x80d00000; " \
"run sd_bootcmd; " \
"run distro_bootcmd;run sd_bootcmd; " \
"env exists secureboot && esbc_halt;"
#define IFC_NOR_BOOTCOMMAND \
"env exists mcinitcmd && env exists secureboot "\
"&& esbc_validate 0x5806C0000; env exists mcinitcmd "\
"&& fsl_mc lazyapply dpl 0x580d00000;" \
"run nor_bootcmd; " \
"run distro_bootcmd;run nor_bootcmd; " \
"env exists secureboot && esbc_halt;"
#endif

37
include/configs/lx2160a_common.h
View file

@ -187,11 +187,15 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
/* Initial environment variables */
#define XSPI_MC_INIT_CMD \
"env exists secureboot && " \
"esbc_validate 0x20640000 && " \
"esbc_validate 0x20680000 ;" \
"fsl_mc start mc 0x20a00000 0x20e00000\0"
#define XSPI_MC_INIT_CMD \
"sf probe 0:0 && " \
"sf read 0x80640000 0x640000 0x80000 && " \
"env exists secureboot && " \
"esbc_validate 0x80640000 && " \
"esbc_validate 0x80680000; " \
"sf read 0x80a00000 0xa00000 0x300000 && " \
"sf read 0x80e00000 0xe00000 0x100000; " \
"fsl_mc start mc 0x80a00000 0x80e00000\0"
#define SD_MC_INIT_CMD \
"mmc read 0x80a00000 0x5000 0x1200;" \
@ -249,10 +253,13 @@ unsigned long get_board_ddr_clk(void);
"source ${scriptaddr}\0"
#define XSPI_NOR_BOOTCOMMAND \
"env exists mcinitcmd && env exists secureboot "\
"&& esbc_validate 0x206C0000; " \
"sf probe 0:0; " \
"sf read 0x806c0000 0x6c0000 0x40000; " \
"env exists mcinitcmd && env exists secureboot" \
" && esbc_validate 0x806c0000; " \
"sf read 0x80d00000 0xd00000 0x100000; " \
"env exists mcinitcmd && " \
"fsl_mc lazyapply dpl 0x20d00000; " \
"fsl_mc lazyapply dpl 0x80d00000; " \
"run distro_bootcmd;run xspi_bootcmd; " \
"env exists secureboot && esbc_halt;"
@ -266,10 +273,22 @@ unsigned long get_board_ddr_clk(void);
"run distro_bootcmd;run sd_bootcmd;" \
"env exists secureboot && esbc_halt;"
#define SD2_BOOTCOMMAND \
"env exists mcinitcmd && mmcinfo; " \
"mmc read 0x80d00000 0x6800 0x800; " \
"env exists mcinitcmd && env exists secureboot " \
" && mmc read 0x80780000 0x3C00 0x20 " \
"&& esbc_validate 0x80780000;env exists mcinitcmd " \
"&& fsl_mc lazyapply dpl 0x80d00000;" \
"run distro_bootcmd;run sd2_bootcmd;" \
"env exists secureboot && esbc_halt;"
#define BOOT_TARGET_DEVICES(func) \
func(USB, usb, 0) \
func(MMC, mmc, 0) \
func(SCSI, scsi, 0)
func(MMC, mmc, 1) \
func(SCSI, scsi, 0) \
func(DHCP, dhcp, na)
#include <config_distro_bootcmd.h>
#endif /* __LX2_COMMON_H */

8
include/configs/lx2160aqds.h
View file

@ -121,7 +121,6 @@ u8 qixis_esdhc_detect_quirk(void);
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
EXTRA_ENV_SETTINGS \
"lx2160aqds_vdd_mv=800\0" \
"boot_scripts=lx2160aqds_boot.scr\0" \
"boot_script_hdr=hdr_lx2160aqds_bs.out\0" \
"BOARD=lx2160aqds\0" \
@ -137,6 +136,13 @@ u8 qixis_esdhc_detect_quirk(void);
"env exists secureboot && mmc read $kernelheader_addr_r "\
"$kernelhdr_addr_sd $kernelhdr_size_sd " \
" && esbc_validate ${kernelheader_addr_r};" \
"bootm $load_addr#$BOARD\0" \
"sd2_bootcmd=echo Trying load from emmc card..;" \
"mmc dev 1; mmcinfo; mmc read $load_addr " \
"$kernel_addr_sd $kernel_size_sd ;" \
"env exists secureboot && mmc read $kernelheader_addr_r "\
"$kernelhdr_addr_sd $kernelhdr_size_sd " \
" && esbc_validate ${kernelheader_addr_r};" \
"bootm $load_addr#$BOARD\0"
#include <asm/fsl_secure_boot.h>

8
include/configs/lx2160ardb.h
View file

@ -93,7 +93,6 @@
EXTRA_ENV_SETTINGS \
"boot_scripts=lx2160ardb_boot.scr\0" \
"boot_script_hdr=hdr_lx2160ardb_bs.out\0" \
"lx2160ardb_vdd_mv=800\0" \
"BOARD=lx2160ardb\0" \
"xspi_bootcmd=echo Trying load from flexspi..;" \
"sf probe 0:0 && sf read $load_addr " \
@ -107,6 +106,13 @@
"env exists secureboot && mmc read $kernelheader_addr_r "\
"$kernelhdr_addr_sd $kernelhdr_size_sd " \
" && esbc_validate ${kernelheader_addr_r};" \
"bootm $load_addr#$BOARD\0" \
"sd2_bootcmd=echo Trying load from emmc card..;" \
"mmc dev 1; mmcinfo; mmc read $load_addr " \
"$kernel_addr_sd $kernel_size_sd ;" \
"env exists secureboot && mmc read $kernelheader_addr_r "\
"$kernelhdr_addr_sd $kernelhdr_size_sd " \
" && esbc_validate ${kernelheader_addr_r};" \
"bootm $load_addr#$BOARD\0"
#include <asm/fsl_secure_boot.h>