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x86: coral: Add I2C and TPM device-tree definitions
Add nodes to the device tree for Cr50 and other available I2C ports. Also enable the ACPI interrupt driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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2 changed files with 89 additions and 0 deletions
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@ -44,6 +44,7 @@ config INTEL_APOLLOLAKE
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imply CLK
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imply CMD_CLK
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imply CLK_INTEL
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imply ACPI_GPE
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if INTEL_APOLLOLAKE
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@ -20,6 +20,7 @@
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#include <asm/arch-apollolake/gpio.h>
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#include <asm/arch-apollolake/iomap.h>
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#include <asm/arch-apollolake/pm.h>
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#include <dt-bindings/clock/intel-clock.h>
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/ {
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model = "Google Coral";
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@ -29,6 +30,14 @@
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cros-ec0 = &cros_ec;
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fsp = &fsp_s;
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spi0 = &spi;
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i2c0 = &i2c_0;
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i2c1 = &i2c_1;
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i2c2 = &i2c_2;
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i2c3 = &i2c_3;
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i2c4 = &i2c_4;
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i2c5 = &i2c_5;
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i2c6 = &i2c_6;
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i2c7 = &i2c_7;
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};
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config {
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@ -80,6 +89,13 @@
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};
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acpi_gpe: general-purpose-events {
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reg = <IOMAP_ACPI_BASE IOMAP_ACPI_SIZE>;
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compatible = "intel,acpi-gpe";
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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keyboard {
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intel,duplicate-por;
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};
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@ -248,6 +264,78 @@
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};
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};
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i2c_0: i2c2@16,0 {
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compatible = "intel,apl-i2c";
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reg = <0x0200b010 0 0 0 0>;
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clocks = <&clk CLK_I2C>;
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i2c-scl-rising-time-ns = <104>;
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i2c-scl-falling-time-ns = <52>;
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};
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i2c_1: i2c2@16,1 {
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compatible = "intel,apl-i2c";
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reg = <0x0200b110 0 0 0 0>;
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clocks = <&clk CLK_I2C>;
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status = "disabled";
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};
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i2c_2: i2c2@16,2 {
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compatible = "intel,apl-i2c";
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reg = <0x0200b210 0 0 0 0>;
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#address-cells = <1>;
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#size-cells = <0>;
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clock-frequency = <400000>;
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clocks = <&clk CLK_I2C>;
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i2c-scl-rising-time-ns = <57>;
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i2c-scl-falling-time-ns = <28>;
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tpm@50 {
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reg = <0x50>;
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compatible = "google,cr50";
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u-boot,i2c-offset-len = <0>;
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ready-gpio = <&gpio_n 28 GPIO_ACTIVE_LOW>;
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interrupts-extended = <&acpi_gpe 0x3c 0>;
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};
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};
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i2c_3: i2c2@16,3 {
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compatible = "intel,apl-i2c";
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reg = <0x0200b110 0 0 0 0>;
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clocks = <&clk CLK_I2C>;
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i2c-scl-rising-time-ns = <76>;
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i2c-scl-falling-time-ns = <164>;
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};
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i2c_4: i2c2@17,0 {
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compatible = "intel,apl-i2c";
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reg = <0x0200b110 0 0 0 0>;
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clocks = <&clk CLK_I2C>;
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i2c-sda-hold-time-ns = <350>;
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i2c-scl-rising-time-ns = <114>;
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i2c-scl-falling-time-ns = <164>;
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};
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i2c_5: i2c2@17,1 {
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compatible = "intel,apl-i2c";
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reg = <0x0200b110 0 0 0 0>;
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clocks = <&clk CLK_I2C>;
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i2c-scl-rising-time-ns = <76>;
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i2c-scl-falling-time-ns = <164>;
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};
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i2c_6: i2c2@17,2 {
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compatible = "intel,apl-i2c";
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reg = <0x0200b110 0 0 0 0>;
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clocks = <&clk CLK_I2C>;
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status = "disabled";
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};
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i2c_7: i2c2@17,3 {
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compatible = "intel,apl-i2c";
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reg = <0x0200b110 0 0 0 0>;
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clocks = <&clk CLK_I2C>;
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status = "disabled";
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};
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serial: serial@18,2 {
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reg = <0x0200c210 0 0 0 0>;
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u-boot,dm-pre-reloc;
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