Mirrors/u-boot
2
0
Fork 0
mirror of https://github.com/AsahiLinux/u-boot synced 2024-11-11 15:37:23 +00:00
Code Issues Projects Releases Packages Wiki Activity

Merge branch 'master' of git://git.denx.de/u-boot-socfpga

Browse source
This commit is contained in:
Tom Rini 2020-03-31 10:05:25 -04:00
commit d1048a60cf
5 changed files with 42 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

3
arch/arm/dts/socfpga_agilex_socdk-u-boot.dtsi
View file

@ -37,3 +37,6 @@
u-boot,dm-pre-reloc;
};
&qspi {
status = "okay";
};

2
arch/arm/mach-socfpga/include/mach/base_addr_a10.h
View file

@ -47,4 +47,6 @@
#define SOCFPGA_SDR_FIREWALL_L3_ADDRESS 0xffd13400
#define SOCFPGA_NOC_FW_H2F_SCR_OFST 0xffd13500
#define SOCFPGA_PHYS_OCRAM_SIZE 0x40000
#endif /* _SOCFPGA_A10_BASE_HARDWARE_H_ */

2
arch/arm/mach-socfpga/include/mach/base_addr_ac5.h
View file

@ -59,4 +59,6 @@
#define SOCFPGA_DMANONSECURE_ADDRESS 0xffe00000
#define SOCFPGA_DMASECURE_ADDRESS 0xffe01000
#define SOCFPGA_PHYS_OCRAM_SIZE 0x10000
#endif /* _SOCFPGA_BASE_ADDRS_H_ */

32
arch/arm/mach-socfpga/spl_a10.c
View file

@ -33,6 +33,38 @@
DECLARE_GLOBAL_DATA_PTR;
#define BOOTROM_SHARED_MEM_SIZE 0x800 /* 2KB */
#define BOOTROM_SHARED_MEM_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
SOCFPGA_PHYS_OCRAM_SIZE - \
BOOTROM_SHARED_MEM_SIZE)
#define RST_STATUS_SHARED_ADDR (BOOTROM_SHARED_MEM_ADDR + 0x438)
static u32 rst_mgr_status __section(.data);
/*
* Bootrom will clear the status register in reset manager and stores the
* reset status value in shared memory. Bootrom stores shared data at last
* 2KB of onchip RAM.
* This function save reset status provided by BootROM to rst_mgr_status.
* More information about reset status register value can be found in reset
* manager register description.
* When running in debugger without Bootrom, r0 to r3 are random values.
* So, skip save the value when r0 is not BootROM shared data address.
*
* r0 - Contains the pointer to the shared memory block. The shared
* memory block is located in the top 2 KB of on-chip RAM.
* r1 - contains the length of the shared memory.
* r2 - unused and set to 0x0.
* r3 - points to the version block.
*/
void save_boot_params(unsigned long r0, unsigned long r1, unsigned long r2,
unsigned long r3)
{
if (r0 == BOOTROM_SHARED_MEM_ADDR)
rst_mgr_status = readl(RST_STATUS_SHARED_ADDR);
save_boot_params_ret();
}
u32 spl_boot_device(void)
{
const u32 bsel = readl(socfpga_get_sysmgr_addr() + SYSMGR_A10_BOOTINFO);

5
include/configs/socfpga_common.h
View file

@ -21,14 +21,15 @@
#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE
#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000
#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
#define CONFIG_SYS_INIT_RAM_SIZE SOCFPGA_PHYS_OCRAM_SIZE
#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
#define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000
/* SPL memory allocation configuration, this is for FAT implementation */
#ifndef CONFIG_SYS_SPL_MALLOC_SIZE
#define CONFIG_SYS_SPL_MALLOC_SIZE 0x10000
#endif
#define CONFIG_SYS_INIT_RAM_SIZE (0x40000 - CONFIG_SYS_SPL_MALLOC_SIZE)
#define CONFIG_SYS_INIT_RAM_SIZE (SOCFPGA_PHYS_OCRAM_SIZE - \
CONFIG_SYS_SPL_MALLOC_SIZE)
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE)
#endif