Commit graph

12569 commits

Author SHA1 Message Date
Vignesh Raghavendra
e15b6e35b1 arm: mach-k3: sysfw-loader: Add support to download SYSFW via DFU
Add support to download SYSFW into internal RAM via DFU in DFU boot
mode. Prepare a DFU config entity entry dynamically using buffer address
allocated for SYSFW and start DFU gadget to get SYSFW.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04 09:07:24 +05:30
Vignesh Raghavendra
eabd591015 arm: mach-k3: j721e: Rename BOOT_DEVICE_USB to BOOT_DEVICE_DFU
J721e does not support USB Host MSC boot, but only supports DFU boot.
Since BOOT_DEVICE_USB is often used for host boot mode and
BOOT_DEVICE_DFU is used for DFU boot, rename BOOT_DEVICE_USB macro to
BOOT_DEVICE_DFU

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-02-04 09:07:24 +05:30
Marek Vasut
707c36e2af ARM: socfpga: Drop last use of socfpga_reset_manager
This particular chunk of code was not updated, likely due to the order
in which the patches were posted and applied. Fix this missing part.

Fixes: bb25aca134 ("arm: socfpga: Convert reset manager from struct to defines")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2020-02-03 09:26:14 +01:00
Tom Rini
427da6f028 Merge tag 'u-boot-rockchip-20200130' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Support redundant boot for rk3399
- Support binman for rockchip platform
- Update ram driver and add ddr4 support for rk3328
2020-02-01 15:31:04 -05:00
Tom Rini
80e99adbe4 UniPhier SoC updates for v2020.04 (2nd)
Denali NAND driver changes:
  - Set up more registers in denali-spl for SOCFPGA
  - Make clocks optional
  - Do not assert reset signals in the remove hook
  - associate SPARE_AREA_SKIP_BYTES with DT compatible
  - switch to UCLASS_MTD
 
 UniPhier platform changes:
  - fix a bug in dram_init()
  - specify loadaddr for "source" command
 -----BEGIN PGP SIGNATURE-----
 
 iQJSBAABCgA8FiEEbmPs18K1szRHjPqEPYsBB53g2wYFAl40VCseHHlhbWFkYS5t
 YXNhaGlyb0Bzb2Npb25leHQuY29tAAoJED2LAQed4NsGhyAP/jVioSrrTggWpstI
 5dkWwyF5d/p2NdZIwFbEm6tSSmistQIE3Hk7D8vLv6tXRSCIa6Qv3pgQ0mTfRELh
 B54yhNs2S7Ur7LyVeHxlVmoIG/6qefd7pGRvgTttXxNkdHi0Ul7wzSBvQJ5v2XCs
 dxy8uhEVxzVNHqqnbQq85eZEPB0viiCGe3K/mr6mTGrbnfocbuRgev41/C+54dSb
 ssz1VfeSTEmAIlynja4kfUff42yWc6GtFEDoLZQ1CyyOicRpvO1ixL0Jo/k5HptG
 thrs3UXplHZbWc7p7Q8JpAv9MyeN+p62ChpqLJSgqB31UmLMhIGk9O799oEkWGTH
 Oeqim56I0mC8FkEqEG9xoZ24aGVz7g2TRs4KYA00ZGtjf482zBLLcfoEK7MzKSlj
 F61ldTJVOjEd8xNnCPilmVOEuZ1fzCnS8FHaNPDeO437u6GsHs4SnHNdDY3Mnqxj
 6pynfYJoXudzN8bnNQ+LQnllOVt7JwFTmlXLaVTeSJeJWIoO6QbOSlCxpLNR+ajb
 dc6bFMWScMqElO3UkktxXKbQQOgLKwHUUcgdL4poKksbY3Wq7N3rIfhhVbSLzcyn
 Py6mZgVVbMYzYtmirlGj/tzd9LNpb1cH7mVPJsT7eB07co3H7kEdvoCatUEoEaQA
 ju63tX0lCg7MEonxWstcIqMGy0Ql
 =PvYc
 -----END PGP SIGNATURE-----

Merge tag 'uniphier-v2020.04-2' of https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier

UniPhier SoC updates for v2020.04 (2nd)

Denali NAND driver changes:
 - Set up more registers in denali-spl for SOCFPGA
 - Make clocks optional
 - Do not assert reset signals in the remove hook
 - associate SPARE_AREA_SKIP_BYTES with DT compatible
 - switch to UCLASS_MTD

UniPhier platform changes:
 - fix a bug in dram_init()
 - specify loadaddr for "source" command
2020-01-31 13:26:28 -05:00
Masahiro Yamada
6da69d33f5 ARM: uniphier: set gd->ram_base correctly
gd->ram_base is not set at all if the end address of the DRAM ch0
exceeds the 4GB limit.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-01 01:14:32 +09:00
Masahiro Yamada
407b01b3b3 mtd: rawnand: denali_dt: use UCLASS_MTD instead of UCLASS_MISC
UCLASS_MTD is a better fit for NAND drivers.

Make NAND_DENALI_DT depend on DM_MTD, which is needed to compile
drivers/mtd/mtd-uclass.c

Also, make ARCH_UNIPHIER select DM_MTD because all the defconfig
of this platform enables NAND_DENALI_DT.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2020-02-01 01:14:32 +09:00
Masahiro Yamada
5bacb4402e ARM: uniphier: remove adhoc reset deassertion for the NAND controller
Now that the reset controlling of the Denali NAND driver (denali_dt.c)
works for this platform, remove the adhoc reset deassert code.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-02-01 01:14:32 +09:00
Kever Yang
a7eb9ae349 rockchip: rk3308: add alias for emmc/sdmmc
Add alias for mmc/sdmmc so that we can have a fix mmc number for emmc.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-30 11:44:02 +08:00
YouMin Chen
4082a68142 ram: rk3328: update lpddr3 setting
update lpddr3 setting for fix init fail about "col error".

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-30 11:44:01 +08:00
YouMin Chen
c7df6483c2 ram: rk3328: add support ddr4 init
Add rk3328-sdram-ddr4-666.dtsi for support ddr4 init.

Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
79030a4861 rockchip: Add Single boot image (with binman, pad_cat)
All rockchip platforms support TPL or SPL-based bootloader
in mainline with U-Boot proper as final stage. For each
stage we need to burn the image on to flash with respective
offsets.

This patch creates a single boot image component using
- binman, for arm32 rockchip platforms
- pad_cat, for arm64 rockchip platforms.

This would help users to get rid of burning different
boot stage images.

The new image called 'u-boot-rockchip.bin'
which can burn into flash like:

₹ sudo dd if=u-boot-rockchip.bin of=/dev/sda seek=64

This would support all rockchip platforms, except rk3128
since it doesn't support for SPL yet.

Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Cc: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
a1b75cf941 arm: dts: rk3188: Add rk3188-u-boot.dtsi
Add U-Boot specific dtsi file for rk3188 SoC. This
would help to add U-Boot specific dts nodes, properties
which are common across rk3188.

Right now, the file is empty, will add required changes
in future patches.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
f48299a883 arm: dts: rk3036: Add rk3036-u-boot.dtsi
Add U-Boot specific dtsi file for rk3036 SoC. This
would help to add U-Boot specific dts nodes, properties
which are common across rk3036.

Right now, the file is empty, will add required changes
in future patches.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
efebc8edd6 rockchip: rk3399: Add bootcount support
Add bootcount support for Rockchip rk3399.

The bootcount value is preserved in PMU_SYS_REG0 register,
this would help to support redundent boot.

Once the redundant boot triggers, the altboot command
will look for extlinux-rollback.conf on particular
bootable partition which supposed to be a recovery
partition where redundant boot required.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
ee6321fa14 rockchip: Add common reset cause
Add cpu reset cause in common cpu-info file.

This would help to print the reset cause for
various resets.

Right now it support rk3288, rk3399. rest of rockchip
platforms doesn't have reset cause support ye but this
code is more feasible to extend the same.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
b52a199e32 arm: rockchip: Add common cru.h
Few of the rockchip family SoC atleast rk3288,
rk3399 are sharing some cru register bits so
adding common code between these SoC families
would require to include both cru include files
that indeed resulting function declarations error.

So, create a common cru include as cru.h then
include the rk3399 arch cru include file and move
the common cru register bit definitions into it.

The rest of rockchip cru files will add it in future.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
2952f39269 rockchip: Add cpu-info
Add cpu information for rockchip soc.

This would help to print the SoC family number, with
associated temparature, clock and reason for reset etc.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
1c37f60c28 rockpro-rk3399: Enable SPI Flash
Enable winbond SPI flash for ROC-PC-RK3399 board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
3d11196c80 roc-pc-rk3399: Enable SPI Flash
Enable winbond SPI flash for ROC-PC-RK3399 board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-30 11:44:01 +08:00
Jagan Teki
c8b1684a8c rockchip: dts: Sync ROC-RK3399-PC changes from Linux
Sync the ROC-RK3399-PC device tree changes from Linux
with below commit details:

commit <c36308abe4110e4db362d5e2ae3797834a7b1192> ("arm64: dts:
rockchip: Enable MTD Flash on rk3399-roc-pc")

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-01-30 11:44:01 +08:00
Amit Singh Tomar
fff5d5499d rpi4: Update memory map to accommodate scb devices
Some of the devices(for instance, pcie and gnet controller) sitting on
SCB bus falls behind/below the memory range that we currenty have.

This patch updates the memory range to map those devices correctly.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2020-01-29 18:30:33 +01:00
Tom Rini
3e12744a90 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-samsung
- Various exynos fixes
2020-01-28 21:10:32 -05:00
Marek Szyprowski
86c8871108 arm: exynos: Read default MMC device from XOM[7:5] pins
XOM pins provide information for iROM bootloader about the boot device.
Those pins are mapped to lower bits of OP_MODE register (0x10000008),
which is common for all Exynos SoC variants. Set the default MMC device id
to reflect the boot device selected by XOM[7:5] pins (2 for the SD or 0 for
the eMMC).

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2020-01-28 09:54:05 +09:00
Tom Rini
051e03c0d7 Merge tag 'u-boot-clk-26Jan2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-clk
- Various clock fixes and enhancements
2020-01-27 07:19:26 -05:00
Pedro Jardim
2f39ab1649 clock_imx8mq: Make frac_pll_init() static
Since frac_pll_init() is only used in this file, change it to 'static'.

This fixes the following sparse warning:

arch/arm/mach-imx/imx8m/clock_imx8mq.c:662:5: warning: no previous
prototype for ‘frac_pll_init’ [-Wmissing-prototypes]

Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com>
2020-01-26 21:57:09 +01:00
Pedro Jardim
852cd55ea7 clock_imx8mq: Remove the function sscg_pll_init()
Function sscg_pll_init() is not used anywhere, so it can simply be deleted.
This was found because of the following sparse
warning:

arch/arm/mach-imx/imx8m/clock_imx8mq.c:702:5: warning: no previous prototype for ‘sscg_pll_init’ [-Wmissing-prototypes]
 int sscg_pll_init(u32 pll)
     ^~~~~~~~~~~~~

Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com>
2020-01-26 21:57:08 +01:00
Pedro Jardim
953d02f001 clock_imx8mq: Make do_imx8m_showclocks() static
Since do_imx8m_showclocks() is only used inside this file, make it 'static'.

This fixes the following sparse warning:

arch/arm/mach-imx/imx8m/clock_imx8mq.c:836:5: warning: no previous prototype
 for ‘do_imx8m_showclocks’ [-Wmissing-prototypes]
 int do_imx8m_showclocks(cmd_tbl_t *cmdtp, int flag, int argc,
     ^~~~~~~~~~~~~~~~~~~

Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com>
2020-01-26 21:57:08 +01:00
Pedro Jardim
fb3c4d926f clock_imx8mq: Delete not used init_usb_clk()
Function init_usb_clk() is not used anywhere, so it can simply be deleted.
This was detected by the following sparse warning:

arch/arm/mach-imx/imx8m/clock_imx8mq.c:377:6: warning: no previous prototype
 for ‘init_usb_clk’ [-Wmissing-prototypes]
 void init_usb_clk(void)
      ^~~~~~~~~~~~

Signed-off-by: Pedro Jardim <jardim.c.pedro@gmail.com>
2020-01-26 21:57:08 +01:00
Tom Rini
0b23b0d9f9 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi
- Libre Computer ALL-H3-IT/ALL-H5-CC board (Chen-Yu Tsai)
- Allwinner R40 Ethernet, usb phy enablement (Andre Przywara)
- Sunxi auto load from 128KB MMC offset (Andre Przywara)
- Orange Pi Win Ethernet phy enablement (Jernej Skrabec)
2020-01-26 12:05:11 -05:00
Andre Przywara
7c841d844f sunxi: Automate loading from 128KB MMC offset
Since commit 067e0b9684 ("sunxi: Allow booting from 128KB SD/eMMC offset")
we support having the SPL loaded from either the traditional 8KB SD
card/eMMC offset, or from the alternative location at 128KB. However the
sector to find the U-Boot image was still hard-coded at compile time,
and had to be adjusted for one of the two choices.

Since we can actually override the function to return the sector offset,
we can just check the boot source byte there to select the proper offset
based on from where the SPL was loaded.

This allows the very same binary image to be loaded from either 128KB or
8KB, with the U-Boot proper image always being located just behind the SPL.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-26 19:10:16 +05:30
Andre Przywara
ee98d76893 sunxi: SPL: Factor out sunxi_get_boot_source()
The Boot ROM write some boot source ID (SD card, eMMC, SPI, ...) into
a certain location in SRAM, so the SPL can easily determine where to
load U-Boot proper from.
Factor out reading this value, as it will come in handy again shortly.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-26 19:09:34 +05:30
Tom Rini
40521a6c90 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
Updates and fixes for ls1028a, lx2160a, ls1012a, ls1021a, ls2080a,
ls1088a platforms:
- lx2-rev2 pcie support, enetc related updates, layerscape-pcie fixes
2020-01-25 12:20:51 -05:00
Vignesh Raghavendra
c0a5a81f74 asm: dma-mapping.h: Fix dma mapping functions
Subsystems such as USB expect dma_map_single() and dma_unmap_single() to
do dcache flush/invalidate operations as required. For example, see
see drivers/usb/gadget/udc/udc-core.c::usb_gadget_map_request().
Currently drivers do this locally, (see drivers/usb/dwc3/ep0.c,
drivers/mtd/nand/raw/denali.c etc..)
Update arch specific dma_map_single() and dma_unmap_single() APIs to do
cache flush/invalidate  operations, so that drivers need not implement
them locally.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-01-25 12:04:36 -05:00
mingming lee
7d017d607e usb: musb-new: mt85xx: add musb-new gadget driver.
Using musb-new structure for mt85xx gadget driver.
Add gadget driver dts for mt8518 SoCs.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-25 12:04:36 -05:00
Andre Przywara
a2f729f49b phy: sun4i-usb: Add Allwinner R40 support
Since every Allwinner USB PHY seems to be slightly different from each
other, we need to add the compatible string and the respective data
structure to make it work on the R40/V40 SoC.
Nothing spectacular this time, just one less USB controller than the H3.
Copied from the Linux kernel.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-24 23:06:50 +05:30
Andre Przywara
69d06935de sunxi: dts: R40: Update Bananapi M2 Berry .dts
Update the .dts file from the kernel, which carries much more nodes,
some of them we need to enable USB and Ethernet support for the board.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-24 23:06:50 +05:30
Chen-Yu Tsai
b5fe523bbc sunxi: H3/H5 Sync DT files from upstream Linux kernel as of next-20200108
Sync the device tree files and device tree header files from upstream
Linux kernel, as of 2020-01-08. The commit synced to in the sunxi repo

    98d25b0b266d Merge branch 'sunxi/dt-for-5.6' into sunxi/for-next

which is also part of next-20200108.

Changes brought in include:

  - cleanup of pinmux node names
  - addition of Security ID, MBUS, CSI, crypto engine, video codec,
    pmu, and thermal sensor device nodes for both SoCs
  - addition of deinterlacing engine device node on H3
  - cleanup of RTC device node and addition of its clocks
  - various board cleanups and improvements
    - removal of pinmux node for GPIO lines
    - cpufreq / DVFS
    - HDMI output
    - UART-based Bluetooth
    - audio codec
    - USB ports
  - new boards

Most of the changes don't concern U-boot.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-24 23:06:49 +05:30
Simon Glass
29a4a9f105 common: Move hang() to the same header as panic()
At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Migrate a few more files]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-24 23:06:49 +05:30
Simon Glass
91527c9a30 common: Move RAM-sizing functions to init.h
These functions relate to memory init so move them into the init
header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-24 23:06:49 +05:30
Simon Glass
657afb14a0 common: Move reset_cpu() to the CPU header
Move this function out of common.h and into a relevant header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-24 23:06:49 +05:30
Simon Glass
6321c66cdf common: Move reset_misc() function to arch header
This function is only used on ARM devices. Move it out of the common file
and to a arch-specific header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-24 23:06:49 +05:30
Simon Glass
98c338bcb6 common: Move get_tbclk() to time.h
This function related to timer and most of the timer functions are in
time.h, so move this function there.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-24 23:06:49 +05:30
Simon Glass
b63ff2ae54 common: Move clock functions into a new file
These three clock functions don't use driver model and should be migrated.
In the meantime, create a new file to hold them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-24 23:06:48 +05:30
Simon Glass
b14d1af81d common: arm: Move s_init() to an ARM-specific header
This function is only used on ARM devices so does not belong in the global
common header file. Move it to an ARM header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-24 23:06:48 +05:30
Simon Glass
9d89bcd8e5 common: Move reset_phy() to net.h
This is a network function so let's move it into that header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-24 23:06:48 +05:30
Simon Glass
532f90235a common: Move relocate_code() to init.h
This is an init function so move it out of the common header. Avoid using
the typedef so that we don't have to include the global_data header file.

Also tidy up the function style in comments while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-24 23:06:48 +05:30
Michael Trimarchi
906e3cc552 arm: Add arm handoff header file
Add an arch-specific handoff header so that we can use the HANDOFF feature
on arm devices.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-24 11:19:52 -05:00
Alex Marginean
0d9d557de5 arch: armv8: fsl-layerscape: export serdes config to environment
Exports the serdes configuration as an environment variable for LS gen 3
SoCs, so it can be used in u-boot command line.  It should particularly
be useful for applying Linux DT overlays for the given serdes
configuration.
This code is called from arch_misc_init and not from the existing
serdes_init function because it depends on U-Boot environment being set
up.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-24 14:28:26 +05:30
Alex Marginean
a2a1474674 board: fsl: ls1028a: free up arch_misc_init
Currently LS1028A board code uses arch_misc_init to set up the board mux
on QDS.  Move this code to misc_init_r.  This is consistent with LS gen 2
and T series SoCs/boards.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-24 14:28:26 +05:30
Alex Marginean
9d7df5015d board: fsl: ls1088a: remove empty arch_misc_init
The arch_misc_init function is empty on LS108x SoCs/boards, remove it.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-24 14:28:26 +05:30
Alex Marginean
196ada6a69 board: fsl: ls2080a/ls2081a: remove empty arch_misc_init
The arch_misc_init function is empty on LS2 SoCs/boards, remove it.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-24 14:28:26 +05:30
Alex Marginean
2a322ff812 board: fsl: lx2160a: free up arch_misc_init
Currently LX2 board code uses arch_misc_init to set up the board mux on
RDB and QDS.  Move this code to misc_init_r.  This is consistent with LS
gen 2 and T series SoCs/boards.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-24 14:28:26 +05:30
Alex Marginean
430a5542f3 armv8: ls1028a_serdes: Add few missing serdes protocols
Add serdes protocol 0x7777, 0x9999, 0xb998, 0xbb56 to supported list.
These protocols are supported and functional but they trigger a warning
in U-Boot console at boot because they are not on this list.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-24 14:28:26 +05:30
Pramod Kumar
0b7435107b armv8: fsl-layerscape: LS1044A/1048A: enable Only 1x 10GE port
LS1088A has four personalities, LS1088A, LS1084A, LS1048A and LS1044A.
LS1044A, LS1048A are LS1088A personalities, which support only one
1x 10GE port.
MAC1 and MAC2 are associated with 1G SGMII, 2.5G SGMII, and XFI.
Disable MAC1 to have only one 1x 10GE port for LS1044A, LS1048A.

Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-24 14:28:26 +05:30
Masahiro Yamada
6ce26f8fd3 ARM: LS1021A: remove redundant "depends on ARCH_LS1021A"
These config entries are inside the menu block, which already
depends on ARCH_LS1021A:

  menu "LS102xA architecture"
          depends on ARCH_LS1021A

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-24 14:28:26 +05:30
Ran Wang
d085c9ad06 armv8: ls1012a: Make USB masters snoopable
Program register bit of SCFG_SNPCNFGCR_USBRDSNP and
SCFG_SNPCNFGCR_USBWRSNP to drive USB read/write
snoop signal on LS1012A.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-24 14:28:26 +05:30
Philippe Reynes
645b7ec52c bcm968360bg: add initial support
This add the initial support of the broadcom reference
board bcm968360bg with a bcm68360 SoC.

This board has 512 MB of RAM, 256 MB of flash (nand),
2 USB port, 1 UART, and 4 ethernet ports.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-01-23 07:29:58 -05:00
Philippe Reynes
e520036f9d gpio: do not include <asm/arch/gpio.h> on ARCH_BCM68360
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch bcm68360.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-01-23 07:29:58 -05:00
Philippe Reynes
6454e95f4f bcm68360: add initial support
This add the initial support of the broadcom bcm68360 SoC family.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2020-01-23 07:29:58 -05:00
Marek Szyprowski
da63b5da61 arm: dts: exynos: Use common alias for Odroid U3/X2 MMC2 (SD-card)
Use MMC0 for eMMC and MMC2 for SD-card as other Exynos-based boards do.
This allows to use common code to get MMC device id based on the XOM[7:5]
pins.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2020-01-23 11:43:10 +09:00
Marek Szyprowski
1bca28a5d9 arm: dts: exynos: Fix card-detect polarity for SD card on Odroid U3/X2
Card detect line for SD-card on Odroid U3/X2 boards are active low, so
add cd-inverted property to indicate this, as u-boot's GPIO driver doesn't
support specifying line polarity. This restores S5P_SDHCI driver operation
on Odroid U3/X2 boards.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2020-01-23 11:43:10 +09:00
Marek Szyprowski
a6ee3fe19d arm: dts: exynos: Extend board description
u-boot uses the same DTS for the all Odroid XU3-based boards, so list
them in the model description to let user know that those boards are
supported.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2020-01-23 11:41:49 +09:00
Stephan Gerhold
43d28855d8 board: Add new Samsung "stemmy" board based on ST-Ericsson U8500
The ST-Ericsson U8500 SoC has been used in mass-production for
some Android smartphones released around 2012.
In particular, Samsung has released more than 5 different
smartphones based on U8500, e.g.

  - Samsung Galaxy S III mini (GT-I8190) "golden"
  - Samsung Galaxy S Advance (GT-I9070)  "janice"
  - Samsung Galaxy Xcover 2 (GT-S7710)   "skomer"

and a few others.

Mainline Linux has great support for the Ux500 SoC, so these
smartphones can also run Linux mainline quite well.

Unfortunately, the original Samsung bootloader used on these devices
has limitations that prevent booting Linux mainline directly.
It keeps the L2 cache enabled, which causes Linux to crash very early,
shortly after decompressing the kernel.

Using U-Boot allows to circumvent these limitations. We can let the
Samsung bootloader chain-load U-Boot and U-Boot locks the L2 cache
before booting into Linux. U-Boot has several other advantages
- it supports device-trees directly and we are no longer limited to
flashing Android boot images through Samsung's proprietary download
mode.

The Samsung "stemmy" board covers all Samsung devices based on U8500.
Add minimal support for "stemmy". For now only UART is supported but
this will be extended later.

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-01-22 17:47:57 -05:00
Stephan Gerhold
689088f9da arm: Add support for ST-Ericsson U8500 SoC
The NovaThor U8500 SoC was released by ST-Ericsson in 2011.
It was used for some development boards like the CALAO Systems
Snowball SBC, but mass production was primarily for Android
smartphones like the Samsung Galaxy S III mini.

Previous support for U8500 was removed in
commit 68282f55b8 ("arm: Remove unused ST-Ericsson u8500 arch")
since none of the boards were converted to generic boards
before the deadline.

The new code does not have much in common with the previous code.
I have completely rewritten everything, embracing the Driver Model
and device trees wherever possible.

The U8500 support is a bit more minimal for now - my primary
use case is to use U-Boot as alternative bootloader for some of the
U8500 Samsung smartphones. At the moment U-Boot is chain-loaded from
the original Samsung bootloader. A side effect of this is that we
can (temporarily) get away without implementing some functionality
- e.g. all clocks are already enabled by the original bootloader.

More functionality will be added in future patches.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: John Rigby <john.rigby@linaro.org>
Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-01-22 17:47:57 -05:00
Stephan Gerhold
f13dc8cbd9 arm: dts: Import device tree for ST-Ericsson Ux500
from https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson.git/
tag "ux500-armsoc-v5.6-2"
commit 224bf0fe7292 ("ARM: dts: ux500: samsung-golden: Add Bluetooth")

(queued for merge in Linux 5.6)

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-01-22 17:47:57 -05:00
Tom Rini
75dd53055a Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Clearfog: Add run-time board detection with TLV EEPROM support
  (Baruch)
2020-01-21 18:10:28 -05:00
Baruch Siach
867572f09e ARM: mvebu: clearfog: run-time selection of DT file
Set the kernel device-tree file (fdtfile environment variable) based on
run-time detection of the platform.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-01-21 15:56:15 +01:00
Baruch Siach
ae7ba525a5 ARM: mvebu: clearfog: add EEPROM devices
Add device-tree description for the EEPROM devices on Armada 388 SOM rev
2.1.

Another EEPROM is now on Clearfog Pro carrier rev 2.2, and Clearfog Base
rev 1.3.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-01-21 15:55:46 +01:00
Tom Rini
ad647690b1 ---------------------------------
imx8: cleanup, fix warnings
 imx6ull: add VisionSOM SoM and EVK
 mx7ulp: fix warning due network, cleanup
 mx7dsabre: Fix dm probe pmic
 imx6: fixed for vining2000
 
 Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/639512296
 -----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAl4m+D4PHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3hz0L/Rm48j733TNi7ZokndEr0+caMqk6PmJWE0Dy
 Uq4MwhhCkbPWP+uLQUY6yq64HXdx1fNaQnRzPiiaX2Ng9E/E9piOaYOKtKKs1j4q
 W+RiWfrGebgMemb8f2j4cot23KMUVk5/rv+EFn+oJkX7HD4ou/ikB4269/7b75Dg
 1HsrsjWQq7Wsi4baVZZcfs92xTXltpkGEzgKFURt1tqU1TT1I+PX92aM/Df+qUYu
 ++DQTMr0kZ/yMlzxTvUJYN0KRkMnn6W07X/qQyU1YwioQmC1ZJ7zYBNZfoAG1XFs
 0g6+XqfgLsDrTIeqz4/b98exXPdQqFNgRlUFnbVa0hZcehwxFUsb8J9edPl60k3r
 SYTOaIB8KuKstaNnaWJZm678THDrAXwpxSH9/ORRLX9tCnGBOY1Uy9Q+TJtpQ4K+
 YGEeoKhMTMFcWxxZvpT75tvJMtcRdUw9rT+a5yuyD56NdYUmwiEw5c8hBa3vc26X
 C9P5jBxXbZIQQW67wMt0fFT1QdU5RA==
 =qKsO
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20200121' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

---------------------------------

imx8: cleanup, fix warnings
imx6ull: add VisionSOM SoM and EVK
mx7ulp: fix warning due network, cleanup
mx7dsabre: Fix dm probe pmic
imx6: fixed for vining2000

Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/639512296
2020-01-21 08:36:50 -05:00
Tom Rini
07add22cab Merge tag '2020-01-20-ti-2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
K3 J721E:
* DMA support.
* MMC and ADMA support.
* EEPROM support.
* J721e High Security EVM support.
* USB DT nodes

K3 AM654:
* Fixed boot due to pmic probe error.
* USB support and DT nodes.
* ADMA support

DRA7xx/AM57xx:
* BBAI board support
* Clean up of net platform code under board/ti

AM33/AM43/Davinci:
* Reduce SPL size for omap3 boards.
* SPL DT support for da850-lcdk
* PLL divider fix for AM335x
2020-01-20 14:54:55 -05:00
Tom Rini
cd304e2180 - stm32mp1: split SOC and board and cleanup config
-----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEE56Yx6b9SnloYCWtD4rK92eCqk3UFAl4h3TEACgkQ4rK92eCq
 k3UiXAgAnGuC8+RXI5CBln+CT8PUV6u7SWIFfGoi9sV8f1lROm/KusWBdGstZdgC
 nY8qymperg6aaya61MtlT0dw+S4Cr1VE74NgSVwaJtAWXgC2EpdSftKXWYP77oex
 wp4aosEAV88tQcaJvCvFyKsBt1pjc4oM1ruI5rfZFvgP9Z0nuVuIkpKWZ1w3E8bn
 FIaTFEvpG4X7FtyRDfsCm2V7NZpzXSRVbwgYjeMPmckXE/PFOM7gitAogzgniz9w
 MZNn/M0E3h9XZiCP+m6qvdea2Ek+LQXlPTPgDmCOLPjtT/X9FptoZ8/ZC8QxkO4x
 UwdOs2aidY64ujBBsuQcUBP6zfnBTA==
 =xBM4
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20200117' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- stm32mp1: split SOC and board and cleanup config
2020-01-20 14:54:42 -05:00
Alifer Moraes
c27483fcb0 imx8m: clock_imx8mm: Staticize functions
Functions fracpll_configure(), decode_intpll(), decode_fracpll(),
get_root_src_clk() and get_root_clk() are used only in the scope of this
file, so make them static to fix the following sparse warnings:

arch/arm/mach-imx/imx8m/clock_imx8mm.c:50:5: warning: no previous
prototype for ‘fracpll_configure’ [-Wmissing-prototypes]
arch/arm/mach-imx/imx8m/clock_imx8mm.c:271:5: warning: no previous
prototype for ‘decode_intpll’ [-Wmissing-prototypes]
arch/arm/mach-imx/imx8m/clock_imx8mm.c:418:5: warning: no previous
prototype for ‘decode_fracpll’ [-Wmissing-prototypes]
arch/arm/mach-imx/imx8m/clock_imx8mm.c:483:5: warning: no previous
prototype for ‘get_root_src_clk’ [-Wmissing-prototypes]
arch/arm/mach-imx/imx8m/clock_imx8mm.c:527:5: warning: no previous
prototype for ‘get_root_clk’ [-Wmissing-prototypes]

Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>
2020-01-20 15:38:16 +01:00
Jorge Ramirez-Ortiz
4cd1f979b2 arm: dts: imx7ulp-evk: remove mux value from pad configuration
The mux mode is embedded in the PAD definition and therefore there is
no need to repeat it in the PAD configuration value (more over since
this information will be masked out when the configuration value is
applied).

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-01-20 15:38:16 +01:00
Jorge Ramirez-Ortiz
30b8eb5ee6 mx7ulp: soc: s_init should only be executed once
On SPL enabled systems, the current s_init code (wdog, clock and ldo
init) is executed twice (by SPL and u-boot). This is not necessary and
might lead to boot issues (ie, starting PMC1 when it is already running).

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-01-20 15:38:16 +01:00
Anatolij Gustschin
68b49056e6 arm: dts: i.mx8x: add #cooling-cells properties
Fix dtb building warnings:
Warning (cooling_device_property): /thermal-zones/cpu-thermal0/cooling-maps/map0:
Missing property '#cooling-cells' in node /cpus/cpu@0 or bad phandle (referred from cooling-device[0])

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-01-20 15:38:16 +01:00
Arkadiusz Karas
5b6f8f3083 ARM: imx: mx6ull: Add iMX6ULL VisionSOM SoM and EVK
Add iMX6ULL VisionSOM SoM and VisionCB-RT-STD evaluation board support.
The SoM has an iMX6ULL, 512 MiB of DRAM and microSD slot. The carrier
board has Ethernet, USB host port, USB OTG port.

Signed-off-by: Arkadiusz Karas <arkadiusz.karas@somlabs.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2020-01-20 15:38:16 +01:00
Stefano Babic
0e78c9181c Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
2020-01-20 15:36:13 +01:00
Dario Binacchi
1adea9cc03 arm: omap: fix MPU DPLL divisor for 800MHz clock
In locked condition CLKOUT = CLKINP * [M / (N + 1)].

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:29 +05:30
Vignesh Raghavendra
60120071da arm: dts: k3-am654-base-board: enable USB1
Add pinmux for USB1 and enable it as a peripheral port in U-Boot
specific dtsi since U-Boot does not support OTG.
Disable USB0 as its not available on the baseboard.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:29 +05:30
Vignesh Raghavendra
a1ac85dad2 arm: dts: k3-am65-main: add USB support
Add support for USB0 and USB1 instances on the AM6 SoC.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:29 +05:30
Adam Ford
e36c70e86b ARM: dts: omap3/omap35 Torpedo and SOM-LV: Unify and shrink SPL dtb
None of these boards boot, but the solution appears to be the same.
All the boards have SPL that is too large.  With a few defconfig
options removed, these corresponding options can be removed from
their respective SPL dtb files.

This patch unifies the DM37/OMAP35 boards' -u-boot.dtsi files
to remove gpio's, i2c, bandgap, thermal zones, unneeded uarts, and
unneeded MMC nodes.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:28 +05:30
Andrew F. Davis
c0910bb3a0 arm: K3: Increase default SYSFW image size allocation
The memory allocated to store the FIT image containing SYSFW and board
configuration data is statically defined to the largest size expected.
This was 276000 bytes but now needs to be grown to 277000 to make room
for the slightly larger SYSFW image used on J721e High-Security devices.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:28 +05:30
Andrew F. Davis
ea70da142c arm: K3: Disable ROM configured firewalls
ROM configures certain firewalls based on its usage, which includes
the one in front of boot peripherals. In specific case of boot
peripherals, ROM does not open up the full address space corresponding
to the peripherals. Like in OSPI, ROM only configures the firewall region
for 32 bit address space and mark 64bit address space flash regions
as in-accessible.

When security-cfg is initialized by sysfw, all the non-configured
firewalls are kept in bypass state using a global setting. Since ROM
configured firewalls for certain peripherals, these will not be touched.
So when bootloader touches any of the address space that ROM marked as
in-accessible, system raises a firewall exception causing boot hang.

It would have been ideal if sysfw cleans up the ROM configured boot
peripheral firewalls. Given the memory overhead to store this
information provided by ROM and the boot time increase in re configuring
the firewalls, it is concluded to clean this up in bootloaders.

So disable all the firewalls that ROM doesn't open up the full address
space.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Venkateswara Rao Mandela <venkat.mandela@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:28 +05:30
Andrew F. Davis
9b322dbd52 arm: K3: Fix header comment match AM6 specific file function
This file used to be the common location for K3 init when AM6 was the
only device, but common code was moved to common.c and this file became
AM6 specific, correct this header text.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:28 +05:30
Lokesh Vutla
57a088a0f0 arm: dts: k3-am654-r5-base-board: Fix power-domains for wkup_vtm0
wkup_vtm populates only 1 power-domain cell in it's node. But the
power-domain cell are defined as 2. Due to this the following warning
comes during build:

arch/arm/dts/k3-am654-r5-base-board.dtb: Warning (power_domains_property):
/interconnect@100000/interconnect@28380000/interconnect@42040000/
wkup_vtm@42050000:power-domains: property size (8) too small for cell size 2

Fix this by updating the power-domain cells.

Fixes: cfa6bd549c ("arm: dts: k3-am654-r5-base-board: Add VTM node")
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:28 +05:30
Andrew F. Davis
95b256ec3f arm: mach-k3: security: Clean image out of cache before authentication
On K3 systems U-Boot runs on both an R5 and a large ARM cores (usually
A53 or A72). The large ARMs are coherent with the DMA controllers and
the SYSFW that perform authentication. And previously the R5 core did
not enable caches. Now that R5 does enable caching we need to be sure
to clean out any of the image that may still only be in cache before we
read it using external DMA for authentication.

Although not expected to happen, it may be possible that the data was
read back into cache after the flush but before the external operation,
in this case we must invalidate our stale local cached version.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:28 +05:30
Andrew F. Davis
28b90a4656 arm: mach-k3: Warn when node to disable is not found
Not finding a node that we try to disable does not always need to be
fatal to boot but should at least print out a warning. Return error
from fdt_disable_node as it did fail to disable the node, but only
warn in the case of disabling the TRNG as this will not prevent boot.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:28 +05:30
Andreas Dannenberg
c44fb27af8 arm64: dts: k3-j721e-common-proc-board: Fully enable wkup_i2c0 use
Make the wkup_i2c0 module usable across all stages of U-Boot by adding
the needed definitions including the associated pinmux definitions.

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:28 +05:30
Andreas Dannenberg
643eb6ea07 board: ti: j721e: Use EEPROM-based board detection
The TI J721E EVM system on module (SOM), the common processor board, and
the associated daughtercards have on-board I2C-based EEPROMs containing
board config data. Use the board detection infrastructure to do the
following:

1) Parse the J721E SOM EEPROM and populate items like board name, board
   HW and SW revision as well as board serial number into the TI common
   EEPROM data structure residing in SRAM scratch space
2) Check for presence of daughter card(s) by probing associated I2C
   addresses used for on-board EEPROMs containing daughter card-specific
   data. If such a card is found, parse the EEPROM data such as for
   additional Ethernet MAC addresses and populate those into U-Boot
   accordingly
3) Dynamically apply daughter card DTB overlays to the U-Boot (proper)
   DTB during SPL execution
4) Dynamically create an U-Boot ENV variable called name_overlays
   during U-Boot execution containing a list of daugherboard-specific
   DTB overlays based on daughercards found to be used during Kernel
   boot.

This patch adds support for the J721E system on module boards containing
the actual SoC ("J721EX-PM2-SOM", accessed via CONFIG_EEPROM_CHIP_ADDRESS),
the common processor board ("J7X-BASE-CPB"), the Quad-Port Ethernet
Expansion Board ("J7X-VSC8514-ETH"), the infotainment board
("J7X-INFOTAN-EXP") as well as for the gateway/Ethernet switch/industrial
expansion board ("J7X-GESI-EXP").

Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:28 +05:30
Jason Kridner
a84189464c board: ti: beagleboneai: add dts file
BeagleBoard.org BeagleBone AI is an open source hardware single board
computer based on the Texas Instruments AM5729 SoC featuring dual-core
1.5GHz Arm Cortex-A15 processor, dual-core C66 digital signal
processor (DSP), quad-core embedded vision engine (EVE), Arm Cortex-M4
processors, dual programmable realtime unit industrial control
subsystems and more. The board features 1GB DDR3L, USB3.0 Type-C, USB
HS Type-A, microHDMI, 16GB eMMC flash, 1G Ethernet, 802.11ac 2/5GHz,
Bluetooth, and BeagleBone expansion headers.

For more information, refer to:
https://beaglebone.ai

The corresponding patch against the mainline linux kernel can be found
at: https://patchwork.kernel.org/patch/11254903/

This patch introduces the BeagleBone AI device tree.

Note that the device use the "ti,tpd12s016" component which is software
compatible with "ti,tpd12s015". Thus we only use the latter driver.

Signed-off-by: Jason Kridner <jdk@ti.com>
Signed-off-by: Caleb Robey <c-robey@ti.com>
Cc: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:28 +05:30
Caleb Robey
b4309846db board: ti: beagleboneai: add initial support
These are necessities for beaglebone ai boot. There is the addition of
CONFIG_SUPPORT_EMMC_CONFIG to the Kconfig file. This is present upstream
but not in 19.01 yet.

Signed-off-by: Jason Kridner <jdk@ti.com>
Signed-off-by: Caleb Robey <c-robey@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:28 +05:30
Faiz Abbas
ccc855e9d9 arm: dts: k3-j721e-common-proc-board: Add pinmux for SD card
Add pinmux for sdhci1 node connected to the SD card.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:28 +05:30
Faiz Abbas
2e6e3a4e8c arm: dts: k3-j721e-common-proc-board: Remove voltage-ranges from sdhci nodes
voltage-ranges properties are NOP. Remove them.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:28 +05:30
Faiz Abbas
fe0e30c7ba mmc: am654_sdhci: Get Xin clock by name
Get clk_xin by name instead of by index to avoid having to put clocks in
the same order in all devices.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:28 +05:30
Adam Ford
d2a67e362f ARM: dts: da850-lcdk: Update DTS files for SPL device tree support
Currently, the da850-lcdk uses SPL_OF_PLATDATA and manually loads
the necessary source code instead of using the auto-generated,
because the drivers don't properly autogenerate the code.

This patch simply enables the various device tree options to
mimic the da850-evm which doesn't need or use OF_PLATDATA for
device tree support.  It does not disable OF_PLATDATA.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:28 +05:30
Vignesh Raghavendra
5aeab3bf5e arm: dts: k3-j721e: Add DT nodes for USB
J721e has two instances of Cadence USB3 controller. Add DT nodes for the
same. USB0 is configured to device mode and USB1 is configured to host
mode. For now only high speed mode is supported.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20 10:10:28 +05:30
Simon Glass
db41d65a97 common: Move hang() to the same header as panic()
At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Migrate a few more files]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-01-17 17:53:40 -05:00
Simon Glass
9b4a205f45 common: Move RAM-sizing functions to init.h
These functions relate to memory init so move them into the init
header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 14:02:35 -05:00
Simon Glass
9a3b4ceb37 common: Move reset_cpu() to the CPU header
Move this function out of common.h and into a relevant header file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 14:02:31 -05:00
Simon Glass
9101a5ec4a common: Move reset_misc() function to arch header
This function is only used on ARM devices. Move it out of the common file
and to a arch-specific header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 13:27:30 -05:00
Simon Glass
049f8d6f4a common: Move get_tbclk() to time.h
This function related to timer and most of the timer functions are in
time.h, so move this function there.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 13:27:30 -05:00
Simon Glass
d96c26040e common: Move clock functions into a new file
These three clock functions don't use driver model and should be migrated.
In the meantime, create a new file to hold them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 13:27:29 -05:00
Simon Glass
6f5fb71240 common: arm: Move s_init() to an ARM-specific header
This function is only used on ARM devices so does not belong in the global
common header file. Move it to an ARM header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 13:27:27 -05:00
Simon Glass
5e6267af31 common: Move reset_phy() to net.h
This is a network function so let's move it into that header.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 13:26:50 -05:00
Simon Glass
941338725d common: Move relocate_code() to init.h
This is an init function so move it out of the common header. Avoid using
the typedef so that we don't have to include the global_data header file.

Also tidy up the function style in comments while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-01-17 13:26:49 -05:00
Marek Vasut
db48e11b1e ARM: dts: stm32: Add missing ETHCK clock to ethernet node
Add missing 'eth-ck' clock to the ethernet node. These clock are used to
generate external clock signal for the PHY in case 'st,eth_ref_clk_sel'
is specified.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-01-17 16:26:42 +01:00
Philippe Reynes
8302d1708a aes: add support of aes192 and aes256
Until now, we only support aes128. This commit add the support
of aes192 and aes256.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-17 10:15:49 -05:00
Patrick Delaunay
846254888e stm32mp1: split board and SOC support for STM32MP15x family
Split the board and SOC support for STM32MP15x family and
prepare the introduction of new boards with STM32MP15x.

This path define the 2 configurations:
- STM32MP15x: STM32MP15x soc support (new)
- TARGET_ST_STM32MP15x: STMicroelectronics board support (choice)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-01-17 13:58:27 +01:00
Marek Vasut
e71b9a64a2 ARM: stm32: Allow overriding setup_mac_address()
Let board code override setup_mac_address(), which is useful e.g. if the
board derives the MAC address from another source, like an I2C EEPROM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-01-17 11:44:42 +01:00
Thomas Hebb
541911f479 stm32mp: remove redundant SYS_TEXT_BASE prompt
The main prompt for this (defined in /Kconfig) is visible at all times,
which means there's no reason to have an additional, machine-specific
prompt to set the same option.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
2020-01-17 11:44:42 +01:00
Fabio Estevam
9c27310ac2 mx7ulp: Move SoC base address to a common file
SoC base addresses should better go into a common SoC file instead
of repeating the definition in each board file.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-01-16 21:02:56 +01:00
Tom Rini
d7bb6aceb2 Merge tag 'mmc-1-16-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- Cleanup of fsl_esdhc driver together with arch/defconfig change
- Add quirk for APP_CMD retry
2020-01-16 13:20:51 -05:00
Tom Rini
92329e2413 Xilinx/FPGA changes for v2020.04
ARM64:
 - Add INIT_SPL_RELATIVE dependency
 
 SPL:
 - FIT image fix
 - Enable customization of bl2_plat_get_bl31_params()
 
 Pytest:
 - Add test for octal/hex conversions
 
 Microblaze:
 - Fix manual relocation for one SPI instance
 
 Nand:
 - Convert zynq/zynqmp drivers to DM
 
 Xilinx:
 - Enable boot script location via Kconfig
 - Support OF_SEPARATE in board FDT selection
 - Remove low level uart setup it is done later by code
 - Add support for DEVICE_TREE variable passing for SPL
 
 Zynq:
 - Enable jtag boot mode via distro boot
 - Removing unused baseaddresses from hardware.h
 - DT fixups
 
 ZynqMP:
 - Fix emmc boot sequence
 - Simplify spl logic around bss and board_init_r()
 - Support psu_post_config_data() calling
 - Tune mini-nand DTS
 - Fix psu wiring for a2197 boards
 - Add runtime MMC device boot order filling in spl
 - Clear ATF handoff handling with custom bl2_plat_get_bl31_params()
 - Add support u-boot.its generation
 - Use single image configuration for all platforms
 - Enable PANIC_HANG via Kconfig
 - DT fixups
 - Firmware fixes
 - Add support for zcu208 and zcu1285
 
 Versal:
 - Fix emmc boot sequence
 - Enable board_late_init() by default
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCXiAK2AAKCRDKSWXLKUoM
 IX3VAJ41GJXBwP7Z9hX9RFhsqOu0M+NdegCdFvMUaCQ1bSvgAMOnDL+JeB21+Qo=
 =qSbv
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx/FPGA changes for v2020.04

ARM64:
- Add INIT_SPL_RELATIVE dependency

SPL:
- FIT image fix
- Enable customization of bl2_plat_get_bl31_params()

Pytest:
- Add test for octal/hex conversions

Microblaze:
- Fix manual relocation for one SPI instance

Nand:
- Convert zynq/zynqmp drivers to DM

Xilinx:
- Enable boot script location via Kconfig
- Support OF_SEPARATE in board FDT selection
- Remove low level uart setup it is done later by code
- Add support for DEVICE_TREE variable passing for SPL

Zynq:
- Enable jtag boot mode via distro boot
- Removing unused baseaddresses from hardware.h
- DT fixups

ZynqMP:
- Fix emmc boot sequence
- Simplify spl logic around bss and board_init_r()
- Support psu_post_config_data() calling
- Tune mini-nand DTS
- Fix psu wiring for a2197 boards
- Add runtime MMC device boot order filling in spl
- Clear ATF handoff handling with custom bl2_plat_get_bl31_params()
- Add support u-boot.its generation
- Use single image configuration for all platforms
- Enable PANIC_HANG via Kconfig
- DT fixups
- Firmware fixes
- Add support for zcu208 and zcu1285

Versal:
- Fix emmc boot sequence
- Enable board_late_init() by default
2020-01-16 09:45:40 -05:00
Sam Shih
098c063765 arm: dts: mediatek: move u-boot properties to -u-boot.dtsi file
This patch move u-boot properties to -u-boot.dtsi file.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Sam Shih
c7fbc62082 Add support for MT7622 reference board
This adds a general board file based on MT7622 SoCs from MediaTek.
This commit is adding the basic boot support for the MT7622 rfb.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-01-16 09:39:45 -05:00
Sam Shih
ac57e2b013 ARM: MediaTek: Add support for MediaTek MT7622 SoC
Add support for MediaTek MT7622 SoC. This include the file
that will initialize the SoC after boot and its device tree.

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Ryder Lee <ryder.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
mingming lee
b9bf3cbfd6 ARM: MediaTek: add basic support for MT8512 boards
This adds a general board file based on MT8512 SoCs from MediaTek.

Apart from the generic parts (cpu) we add some low level init codes
and initialize the early clocks.

This commit is adding the basic boot support for the MT8512 eMMC board.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
mingming lee
953bb4c3ce ARM: MediaTek: Add support for MediaTek MT8512 SoC
Add support for MediaTek MT8512 SoC. This include the file
that will initialize the SoC after boot and its device tree.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2020-01-16 09:39:45 -05:00
Yangbo Lu
f1bce08426 Drop CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK usage
The eSDHC reference clocks should be provided by speed.c in arch/.
And we do not need CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK option to
select which clock to use. Because we can make the driver to select
the periperhal clock which is better (provides higher frequency)
automatically if its value is provided by speed.c.

This patch is to drop this option and make driver to select clock
automatically. Also fix peripheral clock calculation issue in
fsl_lsch2_speed.c/fsl_lsch3_speed.c.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2020-01-16 13:20:33 +08:00
Yangbo Lu
ac76dd0836 Add global variable sdhc_per_clk for arm/powerpc
The QorIQ eSDHC controller supports two reference clocks. They are
platform clock and periperhal clock. The global variable sdhc_clk
has already been used for platform clock.
This patch is to add another global variable sdhc_per_clk for
periperhal clock, which provides higher frequency and is required
to be used for SD UHS and eMMC HS200/HS400 speed modes.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2020-01-16 13:16:26 +08:00
Tom Rini
fb537657d9 -----------------------------------
- imx8:
 	add capricorn giedi deneb boards
 - imx6:
 	fixed fow wandboard
 - imx7: DM_ETHER for pico-imx7d
 - fsl_esdhc_imx: add broken-cd property
 - New SOC: IMXRT10xx
 
 Travis:
 	https://travis-ci.org/sbabic/u-boot-imx/builds/637126531
 -----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAl4fDV8PHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3rIoMAJpEFx8ModHg3Xx69zQDcjHgzQn+dPatKgZc
 btSMCuAU3Toxifxj+/QR1NNNNYLBFG4BneqahbKV/c3seIbQjPJLxqTf4ceAJY6o
 MdsbcYSm8KwkLv2UWHV0CHTKtVJzNAxprPoW5ZxrULDORPyl56hdUWOKiDnKPx0z
 /vUeF7R3jglIMZ84rEDLSOew0xiYxhicMXfZB4oc2Jj8lXrpSHYf4adFitk9zG1j
 dumCkYSfDVyqeZytbkDa0CEZdJrXuy+tat2nTc30Asb4g/HoAuuST33cO29IMwqC
 foz3SMRFYgpHahYhVyNW8X+qLPxXGvIWi9md3fm9dNc44MRjVdj0dIq+vVY5lbct
 FWkayqmeMZLHLzzlbziIOsgDSo4n12MtAfcA8fLDN6OcxJL13A2xfR6E6BoaCgwY
 a7SRJWvr9AnVayOAH07rCCMvJNtppD5fi54a65LEKs7cUgeUY030ebhhqvzcDosH
 n++s1ukmD44yoX6vxruDQz2yWcmW3Q==
 =v3rf
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20200115' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

-----------------------------------
- imx8:
	add capricorn giedi deneb boards
- imx6:
	fixed fow wandboard
- imx7: DM_ETHER for pico-imx7d
- fsl_esdhc_imx: add broken-cd property
- New SOC: IMXRT10xx

Travis:
	https://travis-ci.org/sbabic/u-boot-imx/builds/637126531
2020-01-15 09:22:15 -05:00
Giulio Benetti
8d9c0762a8 imx: imxrt1050-evk: Add support for the NXP i.MXRT1050-EVK
This commit adds board support for i.MXRT1050-EVK from NXP. This board
is an evaluation kit provided by NXP for i.MXRT105x processor family.

More information about this board can be found here:
https://www.nxp.com/design/development-boards/i.mx-evaluation-and-development-boards/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK

The initial supported/tested devices include:
- Debug serial
- SD

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14 22:54:00 +01:00
Giulio Benetti
77eb9a90dd imx: Add basic support for the NXP IMXRT10xx SoC family
Add i.IMXRT family basic support.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14 22:54:00 +01:00
Giulio Benetti
e12b737e93 ARM: dts: imxrt1050: add dtsi file
Add dtsi file for i.MXRT1050.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14 22:53:59 +01:00
Giulio Benetti
e403316634 armv7m: cache: add mmu_set_region_dcache_behaviour() stub for compatibility
Since some driver requires this function add it as an empty stub
when DCACHE is OFF.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-01-14 22:53:59 +01:00
Anatolij Gustschin
85d89b9399 imx: dts: imx8dx: add I2C IPG clock for bus 0 and 2
IPG clock description is missing for I2C0 and I2C2 busses,
add it. Otherwise we see -ENODATA error when trying to get
I2C clock for these busses.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2020-01-14 22:49:05 +01:00
Fabio Estevam
80d37c7959 ARM: dts: imx6ul-14x14-evk: Pass the "broken-cd" property
imx6ul-14x14-evk does not have a GPIO dedicated for reading the card
detect pin on the eSDHC2 port. In such cases the "broken-cd" property
must be passed, otherwise the card cannot be detected.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2020-01-14 22:48:10 +01:00
Anatolij Gustschin
eb79cafea2 imx: add imx8x based deneb board
Add support for Capricorn Deneb SoM variant.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-01-14 22:15:21 +01:00
Anatolij Gustschin
7b5b934313 imx: add imx8x capricorn giedi board
Add support for i.MX8X based Capricorn Giedi SoM.

Supported interfaces: GPIO, ENET, eMMC, I2C, UART.

Console output:

  U-Boot SPL 2020.01-00003-gfd1c98f (Jan 07 2020 - 15:51:25 +0100)
  Trying to boot from MMC1
  Load image from MMC/SD 0x3e400

  U-Boot 2020.01-00003-gfd1c98f (Jan 07 2020 - 15:51:25 +0100) ##v01.07

  CPU:   NXP i.MX8QXP RevB A35 at 1200 MHz at 30C

  Model: Siemens Giedi
  Board: Capricorn
  Boot:  MMC0
  DRAM:  1022 MiB
  MMC:   FSL_SDHC: 0
  Loading Environment from MMC... OK
  In:    serial@5a080000
  Out:   serial@5a080000
  Err:   serial@5a080000
  Net:   eth1: ethernet@5b050000 [PRIME]
  Autobooting in 1 seconds, press "<Esc><Esc>" to stop

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2020-01-14 22:15:21 +01:00
Stephen Warren
fddfe87359 tegra: fdt: Add tegra186-u-boot.dtsi
All Tegra chips except Tegra186 have a tegraNNN-u-boot.dtsi. Duplicate
Tegra210's copy of this file for Tegra186. This ensures that a /binman node
exists in U-Boot's control DT. Subsequent to 3c10dc95bd ("binman: Add a
library to access binman entries") this appears to be required. I haven't
really investigated why all this is necessary or how it works, but simply
observed the boot failure listed below, bisected it, noticed the
inconsistency in DT files, and found that fixing it resolved the boot
issue.

    U-Boot 2020.01-rc4-00256-g3c10dc95bdd0 (Jan 07 2020 - 10:25:00 -0700)

    SoC: tegra186
    Model: NVIDIA P2771-0000-500
    Board: NVIDIA P2771-0000
    DRAM:  7.8 GiB
    initcall sequence 00000000fffb7858 failed at call 00000000800955a8 (err=-22)
    ### ERROR ### Please RESET the board ###

Fixes: 3c10dc95bd ("binman: Add a library to access binman entries")
Fixes: f2faffecb0 ("binman: tegra: Convert to use binman")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-01-14 10:35:19 -07:00
Zumeng Chen
d12c8ccdc4 ARM: dts: zynq: enablement of coresight topology
This patch is to build the coresight topology structure of zynq-7000
series according to the docs of coresight and userguide of zynq-7000.

Signed-off-by: Zumeng Chen <zumeng.chen@windriver.com>
Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:56 +01:00
Michal Simek
b0f36d5ec1 arm64: zynqmp: Sync gem clock nodes with mainline Linux
Just fixing indentation and update year in Copyright.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:56 +01:00
Michal Simek
b94a3c2ebe arm64: zynqmp: Sync gpio-controller name location
Sync location with mainline kernel.
Added by Linux kernel commit 75926f07baae
("arm64: dts: zynqmp: Add missing gpio-controller to ps gpio").

Fixes: 0b33e0b156 ("arm64: zynqmp: Add missing gpio property to dtsi")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:56 +01:00
Sudeep Holla
ad967af6bd arm64: dts: zynqmp: replace gpio-key,wakeup with wakeup-source property
Most of the legacy "gpio-key,wakeup" boolean property is already
replaced with "wakeup-source". However few occurrences of old property
has popped up again, probably from the remnants in downstream trees.

This patch replaces the legacy properties with the unified
"wakeup-source" property introduced by:
"Input: gpio_keys - switch to using generic device properties"
(sha1: 700a38b27eefc582099fdf69effacfad0ad738a4)

Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:56 +01:00
Jan Kiszka
85eeaae3cc arm64: dts: zcu100-revC: Give wifi some time after power-on
Somewhere along recent changes to power control of the wl1831, power-on
became very unreliable on the Ultra96, failing like this:

wl1271_sdio: probe of mmc2:0001:1 failed with error -16
wl1271_sdio: probe of mmc2:0001:2 failed with error -16

After playing with some dt parameters and comparing to other users of
this chip, it turned out we need some power-on delay to make things
stable again. In contrast to those other users which define 200 ms,
Ultra96 is already happy with 10 ms.

Fixes: 5869ba0653b9 ("arm64: zynqmp: Add support for Xilinx zcu100-revC")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:55 +01:00
Michal Simek
096d7f5b3e arm64: dts: zynqmp: Fix node names which contain "_"
s/_/-/ for node names.

It fixes warnings like this:
... Warning (node_name_chars_strict): /cpu_opp_table:
Character '_' not recommended in node name ...

Issues reported by make dtbs W=12

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:55 +01:00
Rob Herring
8e3501ec90 arm64: dts: Remove inconsistent use of 'arm,armv8' compatible string
The 'arm,armv8' compatible string is only for software models. It adds
little value otherwise and is inconsistently used as a fallback on some
platforms. Remove it from those platforms.

This fixes warnings generated by the DT schema.

Reported-by: Michal Simek <michal.simek@xilinx.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Chanho Min <chanho.min@lge.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Chunyan Zhang <zhang.lyra@gmail.com>
Acked-by: Robert Richter <rrichter@cavium.com>
Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-01-14 09:05:55 +01:00
Michal Simek
32da535b89 arm64: zynqmp: Remove incorrect phy from DT for zcu102-revB up
zcu102-revB/up are not removing phy from revA properly because of incorrect
name.

Fixes: 2975a42b42 ("arm64: zynqmp: Use ethernet-phy as node name for ethernet phys")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:55 +01:00
Michal Simek
4ed9732471 arm64: zynqmp: Add support for zcu1285 revA board
zcu1285 is the same as zcu1275 but it is using Avnet FMC
http://www.ultrazed.org/product/network-fmc-module

Unfortunately not everything is connected now that's why this is only
describing system which Xilinx is using.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:55 +01:00
Michal Simek
cecf7f4958 arm64: zynqmp: Switch zcu100 revC to use firmware clock driver
There is no issue with using firmware based driver instead of fixed clock
one.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:55 +01:00
T Karthik Reddy
166fb46ad3 zynqmp: dts: Cleanup no-1-8-v property from sdhci dt nodes
Removed no-1-8-v property from zynqmp sdhci devicetree nodes to
allow UHS-I capable SD cards to work in SD3.0 UHS modes.

Boards that does not have level shifter for SD, does not support 1.8v.
so no-1-8-v property to sdhci dt nodes should be present in zcu102 Rev-A,B,
zcu104 Rev-A,C, zcu100, zcu1275 Rev-B boards.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:55 +01:00
Michal Simek
a81186fd9f arm64: zynqmp: Add support for zcu208
The board is very similar to zcu216 with zu49dr device.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:55 +01:00
Michal Simek
4cd8bf47ed ARM: zynq: Add missing nand/smcc nodes
Add missing nand/smcc description.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:55 +01:00
Raviteja Narayanam
268695dbd1 arm64: zynqmp: Correct the type of eeprom for zcu216 boards
Corrected the type of eeprom in device tree for zcu216 boards according
to schematic.

Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:55 +01:00
Michal Simek
50e45b7c6e arm64: zynqmp: Fix ina226 shunt resistor value
Fix shunt resistor value for ina226 vccint_ams and vccint_io_bram_ps.
2mOhm shunt was only in early board revision schematics but never got to
real revA board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:55 +01:00
Michal Simek
5b21d648cb arm64: zynqmp: Add support for u-boot.itb generation with ATF
Follow i.MX, Sunxi, RISC-V and Rockchip to generate u-boot.itb which
includes U-Boot proper, ATF and DTBs in FIT format. ZynqMP supports FIT for
quite a long time but with using out of tree solution. The patch is filling
this gap.

Tested on zcu102, zcu104 and zcu100/Ultra96.

zcu100/Ultra96 v2.2 ATF build by:
make DEBUG=0 ZYNQMP_CONSOLE=cadence1 RESET_TO_BL31=1 PLAT=zynqmp bl31

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:54 +01:00
Michal Simek
40128bbd68 ARM: zynq: Remove unused QSPI and USB addresses
All drivers should be converted to DM already that's why these hardcoded
base addresses are not needed anymore.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:54 +01:00
Ashok Reddy Soma
2507ecf18b zynq: mtd: nand: Remove hardcoded base addresses
Remove hardcoded base addresses of smc controller and nand controller.
Get those addresses from dt and replace wherever they are used.
Remove smc and nand base address from header file too.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:54 +01:00
Michal Simek
3b26c860d3 arm: zynqmp: Wire SPL/ATF handoff structure properly
handoff_setup() was used to generate fixed handoff structure for ATF on
ZynqMP platform.
Switching to bl2_plat_get_bl31_params() platform brings more flexibility
because information can be taken from fit image where /fit-images node is
created at run time.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:54 +01:00
Michal Simek
b4f8468187 arm64: zynqmp: Fix return value of board_fit_config_name_match
Empty implementation should not return 0 (success) because that mean that
passed name matches the board configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:53 +01:00
Michal Simek
de79ca9512 arm64: zynqmp: Add board_boot_order for MMC boot extension
In past SPL_ZYNQMP_TWO_SDHCI symbol was introduced to handle boards with
two sdhci controllers. The problem was that U-Boot is registering
controllers based on aliases in DT but bootmode targets specific controller
ID. That's why on boards with one "second" sdhci controller bootmode was
pointing to second controller(MMC2) but alias was setup to mmc0 (the first
controller). And SPL requires to point to mmc0 in this case.

Long time ago commit f101e4bd37
("spl: add support for alternative boot device") added support for handling
multiple bootmodes in SPL. Use this functionality and setup second sdhci
controller as backup boot device.

Below is table with behavior:
HW/bootmode  bootorder
sd0/sd0      mmc0/mmc1 (mmc1 never called)
sd1/sd1      mmc1/mmc0 (mmc0 fails and mmc1 is called)
sd0+sd1/sd0  mmc0/mmc1 (mmc1 never called)
sd0+sd1/sd1  mmc1/mmc0 (mmc0 never called)

All other bootmodes are not affected but order can be extended to cover
advance boot flows.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:53 +01:00
Michal Simek
bc12dec017 arm64: zynqmp: Remove nand partition description from mini-nand
There shouldn't be a need to use any partition description because it
can be used for writing data anywhere.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:53 +01:00
Michal Simek
e82024def6 arm64: zynqmp: Do not assing MIO34 that early on zcu100
MIO34 is connected to POWER_KILL signal. When MIO configuration is done in
psu_init() and this pin is assigned to PMU but PMU configuration is not
loaded yet. PMU gpio output is high that means board is powered off
immediately.
The patch is fixing this sequence that MIO34 stays assing to ps gpio IP.
PMU config is loaded in SPL and then pin assigned to PMU through
psu_post_config_data().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:53 +01:00
Michal Simek
f071cdab85 arm64: Enable INIT_SP_RELATIVE by default when POC is enabled
When position-independent pre-relocation code is enable there is also
necessary to enable relative early stack pointer not to use origin location
pointed by CONFIG_SYS_INIT_SP_ADDR macro.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:53 +01:00
Michal Simek
724caaba4c arm64: zynqmp: Do not call bss init and board_init_r from board_init_f
There is no reason to clear bss and call board_init_r() from board_init_f()
beca it can be called directly from crt0_64.S with also support for SPL
stack relocation to SDRAM.
For more information please take a look at arch/arm/lib/crt0_64.S

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:53 +01:00
Ashok Reddy Soma
3dd0f8cccd mtd: nand: Remove hardcoded base address of nand
Remove hardcoded base address of nand and replace it with the
value taken from device tree. Remove base address from header
file too.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-14 09:05:52 +01:00
Rajesh Ravi
41acbc53f4 arm: cpu: armv8: add support for arm psci reset2.
Current U-Boot has only support for psci reset.
Adding support for arm psci reset2 allows passing of reset level
and other platform sepcific parameters like strap settings
to lowlevel psci implementation.

Signed-off-by: Rajesh Ravi <rajesh.ravi@broadcom.com>
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
2020-01-10 14:18:26 -05:00
Bharat Kumar Reddy Gooty
0bc4356dea arch: arm: Program GIC LPI configuration table
Programs the following:
1. Redistributor PROCBASER configuration table (which
is common for all redistributors)
2. Redistributor pending table (PENDBASER), for all the
available redistributors.

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
2020-01-10 14:18:26 -05:00
Tom Rini
21aede21b0 UniPhier SoC updates for v2020.04
- add pinmux nodes for I2C ch5, ch6
 
 - enable SPI driver and command
 -----BEGIN PGP SIGNATURE-----
 
 iQJSBAABCgA8FiEEbmPs18K1szRHjPqEPYsBB53g2wYFAl4WDlkeHHlhbWFkYS5t
 YXNhaGlyb0Bzb2Npb25leHQuY29tAAoJED2LAQed4NsG/tAP/3V1E52ESaMjqjSn
 eU2jrXMJFTWcvkVUfLzWnXuApPPx5Xm7nGVVlJory3z8PI6KJFuZJTejeS2tOtU3
 5JjQ56GyldXwyGQp8WsQL8RhGCMovlbUNXuGSR4MNoN0U+81Y1RGYuaNP+qwXfnK
 BVtQBdtnAuH4RxywNNVsxwGoCra7b30cKdmiowc6cb6u4RSnDv42EpgHan2JCgYx
 pui7+hLK7ZdN/ssgc6LquuwIW6IICAdlLosMjsmVty53yLrcXRZtiVHEZskgLC+O
 L84fqDSShgoNnaJJFC2kebuf6iFzw4ZPmSU2tEW4mGvXLC7OEqwvOZqrs0GVsFhz
 48CnkqXYCbfm696minmikXDSVSy1A2ZlRV8bJID0vFjUNot5bor9VSRpe9UV9hqv
 PsevZWPfTuravk7TUBzdn2/dAEtDuzUHSt6v5AJI+08Sph1qYVyGOizpAOJUkv7E
 p0dBM3hhSeGE3kNPwWOB1bHjEmyIc1dXeH5ZNYf0mb1tIEOVSzJMJIoluBJHO6BA
 56F9eBi2rC9gL9R5qV9guugdidYeLE7tys7Q6P3NFyxiouENB/Dcd0e2TSc474Uj
 FaDSUONYNbMP0wr8ShCPQ0RGw8dyCvYBPEdSqYVdNLZZ2TQMX/cgjz+0bDxhFq3r
 9Ol9Tlf9qPGLRDLmmA9d+xFEjyS7
 =3xuH
 -----END PGP SIGNATURE-----

Merge tag 'uniphier-v2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-uniphier

UniPhier SoC updates for v2020.04

- add pinmux nodes for I2C ch5, ch6

- enable SPI driver and command
2020-01-08 15:25:13 -05:00
Tom Rini
deb287b561 ---------------------------------------------------------------------
Add i.MX8MP SoC and EVK board
 Update README for i.MX8MN EVK and fix mmc env
 Add pca9450 driver
 --------------------------------------------------------------------
 
 Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/634211885
 -----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAl4WDPkPHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et30w0L/RGSJLeO460ULkMQMGEkbMLODzWinIuVSUUe
 wEGikQZwI4AiDWX1NA57Dpx7uVF/ADa/NT2x9YLZL8VPHgzuU7RDp57pdBymU0Wk
 k/kDqSPVkIA0CX8iF/l092vOOIKecIpxpEXblRYs+Az7Vusrwm6SxQ3hjSn6KgpY
 gtu/VB+XizejiYmE5hJhu8cvMpAeCrJ0a+qPJC+hVsvFC2wV3NoqJspMOIUt+rPm
 UCv4uSisSWf2MgR2rEYbX9IDgu7S3hcj/8Ml4f9aqQQBciS4X/Af+iUjZL/mXY2K
 ZerDGQhC92TRmTj9Ir6mf8CEAdt0scsNgTVvteN/evP85K25s2l7yrYWjyp5H/vm
 tao0H/Lr8gKlLKgMSgdLixoV8eaMHPE4I/BD+DGVIK1rOQ35zzYTJRd2PIxg7GiP
 7orW29rJrPMAMDBbeEi657u/zUS7ZUzkrLWnIIoFurUfZ83pjlqlxcT1zfZ0juJk
 z8iQKU4oKdN4gL5zQPbyqCHcCdlDJw==
 =YoPF
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20200108' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

---------------------------------------------------------------------
Add i.MX8MP SoC and EVK board
Update README for i.MX8MN EVK and fix mmc env
Add pca9450 driver
--------------------------------------------------------------------

Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/634211885
2020-01-08 15:24:50 -05:00
Tom Rini
ce022f2857 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2020-01-08 15:23:49 -05:00
Tom Rini
9af51fb3a5 - Khadas VIM3L based on Amlogic S905D3 support
- Various fixups for amlogic boards
 - Unnecessary header includes drop into video/meson
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAl4V0PgACgkQd9zb2sjI
 SdEuPw//c0APhovWXXCsRckccBF8SK3WRsVcj5M36g7WXVdUo+MXaPzDUEyDAMfU
 xS51FaN7lJJ7ntxEvJ3loFDYh0WrYoanCW+9KxMnJ0GVTdWg6nL0u4yq4exD9f4d
 N9Tv8NaN0y2Jn97Y3L70qlutVJjTzUd1oRKWmGDESvXj3+WrJdffEL0uBrCcbmF/
 kyEQ3RiDuGhfNrC/mSdhQFG2kmeQc43+Fb1OYq8Wm28zwtYvZuJpdn7FTtwGQk0+
 iCjIUN0RKcD+HedJVxHmSnOOTehydk6xQX9215ebo/tTz+WtoqXrFPjEr1mgAhRV
 ojEdJcEKAFGwTYuRDmeO6lwAv+k0fkF4drGi7uAOQa3JwD90aKgR0Ig80CzVq1vW
 m79WDHFbaQnpIGf94kONF8X0M9nWN9/XYmpJe6KuQaO7YEsIIBsbFP657pJp1J1m
 xfwzl2xlx7yaDeR8xv4/N67REuSF/ILeJA0tykkm7NEWkkBrz1d+dXiOaTceY/Wu
 z7s3QGpHINMOzuxMZKEZazt+0KQ4UlbAxYRQU3oNRkW3WaCoGimpbjC9FJa4FpoA
 Cx2PBRunzx8rK87ZS/X7VUa2v454MSkCGwpmqP+PrekoL2rsRNx/3gWHpzb+Z7E/
 nAd0uukYy/WSlzv6bfpRdemQi27gSvDnERf4dj/4kiAiMoKkeiA=
 =rkHZ
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-amlogic-20200108' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

- Khadas VIM3L based on Amlogic S905D3 support
- Various fixups for amlogic boards
- Unnecessary header includes drop into video/meson
2020-01-08 15:23:37 -05:00
Masahiro Yamada
49a7282d76 ARM: dts: uniphier: add pinmux nodes for I2C ch5, ch6
The next generation SoC can connect on-board slave devices via
I2C ch5 and ch6.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-01-09 01:57:05 +09:00
Peng Fan
439321b264 imx: add i.MX8MP EVK board
Add basic i.MX8MP EVK board support

U-Boot SPL 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)
power_pca9450b_init
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Failed to find clock node. Check device tree
WDT:   Not found!
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt offset 0x0

U-Boot 2020.01-rc4-00388-gb1bf40c0ae-dirty (Dec 30 2019 - 17:55:33 +0800)

CPU:   Freescale i.MX8MP rev1.0 at 1000 MHz
Reset cause: POR
Model: NXP i.MX8MPlus EVK board
DRAM:  6 GiB
MMC:   FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Net:   No ethernet found.
Hit any key to stop autoboot:  0
u-boot=> mmc list
FSL_SDHC: 1 (SD)
FSL_SDHC: 2

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
234187e2bc imx: imx8m: add imximage-8mp-lpddr4.cfg
Add imximage-8mp-lpddr4.cfg for imximage usage, almost same
as i.MX8MN ddr4 cfg, but with different ddr firmware

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
19957ee33d imx: imx8m: only support non-dm code in clock_imx8mm.c
The drivers/clk/imx/*.c are used for CLK dm case, the
clock_imx8mm.c is used for non CLK dm case, let's split
it. Sometimes it is hard to enable CLK dm in SPL stage,
considering code size, malloc size requirement, the splittion
will make it easy to use non CLK dm in SPL stage.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
9d5e1aa78b imx: Kconfig: make SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MP
i.MX8MP ROM support ROMAPI as i.MX8MN, so make
SPL_IMX_ROMAPI_LOADADDR visible to i.MX8MP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:09 +01:00
Peng Fan
20cd453f97 imx: add i.MX8MP PE property
i.MX8MP does not have LVTTL, it has a PE property

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
b7590fc43c imx: imx8mp: add pin header file
Add pin header file for i.MX8MP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
c86987d067 arm: dts: freescale: Add i.MX8MP dtsi support
The i.MX8M Plus Media Applications Processor is part of the growing
mScale family targeting the consumer and industrial market. It brings
an effective Machine Learning and AI accelerator that enables a new
class of applications. It is built in Samsung 14LPP to achieve both
high performance and low power consumption and relies on a powerful
fully coherent core complex based on a quad core ARM Cortex-A53 cluster
and Cortex-M7 low-power coprocessor, audio digital signal processor,
machine learning and graphics accelerators.

Add the basic dtsi support for i.MX8MP.

Patch from Anson Huang for Kernel
https://patchwork.kernel.org/patch/11310915/

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
e997d30be8 imx: imx8m: add 1GHz fracpll entry
4000MTS DDR needs 1GHz fracpll, so add the entry

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
db4510ff8e imx: imx8mp: add basic clock
i.MX8MP has similar architecture as i.MX8MN, but it has different
clk root and index, so add that to make i.MX8MP could use
the non-dm clock driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
d857a6a697 arm: dts: add i.MX8MP pinfunc header
Add i.MX8MP pinfunc header for dts usage

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
7df6397eb4 imx: spl: support i.MX8MP spl_boot_device
i.MX8MP follows i.MX8MN, so just let it use spl_board_boot_device

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
de749aecbb imx: imx8m: add Kconfig entry for i.MX8MP
Add Kconfig entry for i.MX8MP

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
13868eaf06 imx: cpu: enlarge bit mask to 0x1FF for cpu type
i.MX8MP use 0x182 as dummy id, 0xFF is not able the get the highest
bit, so enlarge bit mask to 0x1FF to make it could detect
cpu type correctly

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
a07c718129 imx8mp: set BYPASS ID SWAP to avoid AXI bus errors
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
625b03d810 imx: get cpu id/type of i.MX8MP
Support get i.MX8MP cpu id and cpu type

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-08 13:20:08 +01:00
Peng Fan
392a4e6dd3 imx: imx8mq: handle ESDHC in mxc_get_clock
fsl_esdhc_imx driver will call "mxc_get_clock(MXC_ESDHC_CLK +
dev->seq)", however mxc_get_clock wrongly handle MXC_ESDHC_CLK
as root clk and cause sd card could not be detected in U-Boot proper,
as below:
"Loading Environment from MMC... unable to select a mode"

Handle MXC_ESDHC_CLK in mxc_get_clock to fix the issue.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Tested-by: Fabio Estevam <festevam@gmail.com>
2020-01-08 13:18:55 +01:00
Fabien Dessenne
7bff971a14 stm32mp1: reset coprocessor status at cold boot
Reset ResourceTableAddress and CoprocessorState at cold boot, preserve
these values at standby wakeup.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-01-07 11:13:25 -05:00
Fabien Dessenne
ee16c9a60b stm32mp1: declare backup registers for coprocessor
Use the backup register #17 as coprocessor resource table address and
backup register #18 as coprocessor state.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-01-07 11:13:25 -05:00
Anand Moon
262d343633 board: amlogic: select PWRSEQ for all amlogic platform
commit a10388dc69 ("mmc: meson-gx: add support for mmc-pwrseq-emmc")
introduce CONFIG_PWRSEQ for power sequence for eMMC module on
amlogic platform, so enable this to all amlogic boards.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-01-07 14:50:41 +01:00
Tom Rini
d8a3f5259a New for 2020.04
---------------
 
 - New boards
 	Embedded Artists COM board
 	Xea Board
 - Switch to DM:
 	Aristainetos boards
 	Toradex colibri (DM_ETH)
 	iCubox
 	GE bx50v3
 	mx7dsabre (DM_ETH)
 	cx9020
 - New features:
 	Bootaux with elf files
 	Default SYS_THUMB_BUILD for i.MX6/7
 - Fixes:
 	DHCOM i.MX6 PDK
 	Engicam
 	i.MX8M tools (imx8m_image)
 
 Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/633679664
 -----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAl4UhxIPHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3MZYMAMEttt0cNxBg0/zBjNuMSn3Bq1lpN+KKsY97
 Cme06wZQdlbdfHhXyKiVfky2vjrZa1nacUgqSQlJdzvsPQbg9TE/8zxTd13BNw6C
 Tn6IHS7godvz9Puf0HD8skoYBpVm/LQKmSEfcPAEGOSnHzZx/MrMU0Qze3PgqWu5
 0xbp8yBsyVw96/zBRZtbwXy4COuS1viFrbf82EgHAZUsmXpgvJB59i8rOewwWNR1
 TpyhPbHlq42X+0Qrwq0RGtUr+t4tI6czlxeReOBgb1/YqJGJ6rEqbGm90XROW3sA
 IeU5PY7LUk8OFRQtyfBSSYgFgFmgOYzfpXe9YSUoIxV55OvCad7ksaRctjPJnKqy
 CndINrG9JnV9T5N0LczAgVFXWT49ybPziyZRDHERDg1XosuHnNk7r0co05uacYUN
 ZFgB21mzQ8qGPAd1C3tMXG05ZA9cdRCmWxKxxF6z2/2FT15euZQ0obwAR1HsiJmZ
 wLbyPl1Hi7ZkwvTT/Wk3se0zGpNj2A==
 =vOZ+
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20200107' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

New for 2020.04
---------------

- New boards
	Embedded Artists COM board
	Xea Board
- Switch to DM:
	Aristainetos boards
	Toradex colibri (DM_ETH)
	iCubox
	GE bx50v3
	mx7dsabre (DM_ETH)
	cx9020
- New features:
	Bootaux with elf files
	Default SYS_THUMB_BUILD for i.MX6/7
- Fixes:
	DHCOM i.MX6 PDK
	Engicam
	i.MX8M tools (imx8m_image)

Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/633679664
2020-01-07 08:45:43 -05:00
Tom Rini
ac0f978afd First set of u-boot-atmel features for 2020.04 cycle
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJeFDfVAAoJEB6zHgIOrC/IKfsH/2cUfXuc9IgA7L90L3g7htlS
 zLAQSC8Xk0WbgbmBJh/lq6zFWj2Mu2yfkZqRzwN8bHkmOPq40F+pEAszVtjH77HM
 FpSjMSDVWfNXuhmoiS571dehA0TGi1b2kknrAXqpOwVuMRncMCwaPi8yZYZSGlSV
 VzMtguQxD0sZg4oMZVde3tCd41smPTPNDjzLZnXdLa0b09+EtW6enGuk3vzXlS/8
 QUT68wUzkeoptJhf3pQ3BXNvkFwdNdYJ74uevDmkAYtvxyl10WNykcwYmH50Q9qq
 9plF11EizmTHlj16rWpZLx66RP0s4pziKaeGMr6S8uln33Cr9N496wPqtuDBnvA=
 =FYPj
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-atmel-2020.04-a' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

First set of u-boot-atmel features for 2020.04 cycle

This feature set is a patch series from Tudor Ambarus which includes
parsing of the spi flash SFDP parser for SST flashes, and using those
tables to retrieve unique saved per device MAC address. This is then
used as base mac address on the SAMA5D2 Wireless SOM EK board.
2020-01-07 08:44:56 -05:00
Thor Thayer
62079b2211 arm: socfpga: stratix10: Enable SMMU access
Enable TCU access through the Stratix10 CCU so that the
SMMU can access the SDRAM.

Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-01-07 14:38:34 +01:00
Ley Foon Tan
a76b711dea arm: socfpga: agilex: Enable Agilex SoC build
Add build support for Agilex SoC.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:34 +01:00
Ley Foon Tan
fb3862823b arm: dts: agilex: Add base dtsi and devkit dts
Add device tree files for Agilex SoC platform.

socfpga_agilex-u-boot.dtsi and socfpga_agilex_socdk-u-boot.dts contains
Uboot specific DT properties.

socfpga_agilex.dtsi and socfpga_agilex_socdk.dts are from Linux
(kernel/git/dinguyen/linux.git, commit 6f0bf971bacacc)

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:34 +01:00
Ley Foon Tan
594cacf063 arm: socfpga: agilex: Add SPL for Agilex SoC
Add SPL support for Agilex SoC.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
a6e5b06bea arm: agilex: Add clock handoff offset for Agilex
Add clock handoff offset for Agilex. Remove S10 prefix to avoid confusion.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
b4a20cb300 arm: socfpga: agilex: Add clock wrapper functions
Add clock wrapper functions call to clock DM functions to get clock
frequency and used in cm_print_clock_quick_summary().

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
c168fc71a3 clk: agilex: Add clock driver for Agilex
Add clock manager driver for Agilex. Provides clock initialization
and get_rate functions.

agilex-clock.h is from Linux commit ID cd2e1ad12247.

Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
20322cea64 arm: socfpga: Fix CLKMGR_INTOSC_HZ to 400MHz
CLKMGR_INTOSC_HZ should be 400MHz, instead of 460MHz.
Removed also unused macros CLKMGR_EOSC1_HZ and CLKMGR_FPGA_CLK_HZ.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
38229994af arm: socfpga: Move Stratix10 and Agilex clock manager common code
Move Stratix10 and Agilex clock manager common code to new header file.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
975f66bb57 arm: socfpga: agilex: Add system manager support
Add system manager support for Agilex.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
2fd1dc5593 arm: socfpga: Move Stratix10 and Agilex system manager common code
Move Stratix10 and Agilex system manager common code to
system_manager_soc64.h. Changed macros to use SYSMGR_SOC64_*.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
50278d4ade arm: socfpga: agilex: Add reset manager support
Add reset manager support for Agilex.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
fd5374aa29 arm: socfpga: Move Stratix10 and Agilex reset manager common code
Move Stratix10 and Agilex reset manager common code to
reset_manager_soc64.h. Changed macros to RSTMGR_SOC64_*.

Remove unused RSTMGR_XXX defines.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
8b7962a349 arm: socfpga: Move firewall code to firewall file
Move firewall related code to new firewall.c, to share
code in Stratix 10 and Agilex.

SDMMC will transfer data to OCRAM in SPL. So, enable privilege for SDMMC
to allow DMA transfer to OCRAM.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
2145e611fc arm: socfpga: agilex: Add base address for Intel Agilex SoC
Add base address for Intel Agilex SoC.

Reuse base_addr_s10.h for Agilex, only one base address is
different from S10.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
94172c7961 arm: socfpga: Convert clock manager from struct to defines
Convert clock manager for Gen5, Arria 10 and Stratix 10 from struct
to defines.

Change to get clock manager base address from DT node instead of using
#define.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
db5741f7a8 arm: socfpga: Convert system manager from struct to defines
Convert system manager for Gen5, Arria 10 and Stratix 10 from struct
to defines.

Change to get system manager base address from DT node instead of
using #define.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
bb25aca134 arm: socfpga: Convert reset manager from struct to defines
Convert reset manager for Gen5, Arria 10 and Stratix 10 from struct
to defines.

Change to get reset manager base address from DT node instead of using
#define.

spl_early_init() initializes the DT setup. So, move spl_early_init() to
beginning of function and before get base address from DT.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Ley Foon Tan
dd72cbd9e9 arm: dts: socfpga: Add u-boot, dm-pre-reloc for sysmgr and clkmgr nodes
Add u-boot,dm-pre-reloc for sysmgr and clkmgr nodes to use it in SPL.
In preparation to get base address from DT.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-01-07 14:38:33 +01:00
Christian Hewitt
b9d5480fdb ARM: dts: Import Khadas VIM3L DT from Linux 5.5-rc1
Import the Khadas VIM3L device-tree from [1]

[1] e42617b825f8 ("Linux 5.5-rc1")

Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-01-07 11:16:53 +01:00
Rasmus Villemoes
b6e7ef4bf7 ARM: mxs: spl_boot.c: make early_delay more robust
It's true that booting normally doesn't take long enough for the
register to roll (which actually happens in a little over an hour, not
just a few seconds). However, the counter starts at power-on, and if
the board is held in reset to be booted over USB, one actually risks
hitting wrap-around during boot, which can both result in too short
delays (if the "st += delay" calculation makes st small) and
theoretically also unbound delays (if st ends up being UINT_MAX and
one just misses sampling digctl_microseconds at that point).

It doesn't take more code to DTRT, and once bitten, twice shy.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-01-07 10:26:57 +01:00
Michael Trimarchi
b1278a8e3e ARM: dts: imx6qdl-icore-1.5: Remove duplicate phy reset methods
Engicam i.CoreM6 1.5 Quad/Dual MIPI dtsi is reusing fec node
from Engicam i.CoreM6 dtsi but have sampe copy of phy-reset-gpio
and phy-mode properties.

So, drop this phy reset methods from imx6qdl-icore-1.5 dsti file.

Cc: Jacopo Mondi <jacopo@jmondi.org>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-07 10:26:57 +01:00
Jagan Teki
f838ebfe5a ARM: dts: imx6q-icore-mipi: Use 1.5 version of i.Core MX6DL
The EDIMM STARTER KIT i.Core 1.5 MIPI Evaluation is based on
the 1.5 version of the i.Core MX6 cpu module. The 1.5 version
differs from the original one for a few details, including the
ethernet PHY interface clock provider.

With this commit, the ethernet interface works properly:
SMSC LAN8710/LAN8720 2188000.ethernet-1:00: attached PHY driver

While before using the 1.5 version, ethernet failed to startup
do to un-clocked PHY interface:
fec 2188000.ethernet eth0: could not attach to PHY

Similar fix has merged for i.Core MX6Q but missed to update for DL.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-07 10:26:57 +01:00
Jagan Teki
d159b0236b ARM: dts: icorem6: Sync engicam device trees from v5.4
Sync Engicam device tree file from v5.4 linux-next.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-01-07 10:26:57 +01:00
Rasmus Villemoes
abaf5c9804 arm: mxs: be more careful when enabling gpmi_clk
The data sheet says that the DIV field cannot change while the CLKGATE
bit is set or modified. So do it a little more carefully, by first
clearing the bit, waiting for that to appear, then setting the DIV
field.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-01-07 10:26:57 +01:00
Rasmus Villemoes
fb94625229 arm: mxs: fix comments in arch_cpu_init to match the code
The comment says to clear the bypass bit, but in fact it sets it, thus
selecting ref_xtal. And the next line of code does not set the divider
to 12, but to (the reset value of) 1.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-01-07 10:26:57 +01:00
Rasmus Villemoes
bb09bd5f69 arm: mxs: fix register definitions for clkctrl_gpmi and clkctrl_sspX
I tried clearing a bit by writing to hw_clkctrl_gpmi_clr, then
busy-waiting for it to actually clear. My board hung. The data sheet
agrees, these registers do not have _set, _clr, _tog, so fix up the
definitions. git grep -E 'clkctrl_(gpmi|ssp[0-9])_' says that nobody
uses those non-existing ops registers.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-01-07 10:26:57 +01:00
Igor Opaniuk
061b63b775 mach-imx: nandbcb: improve cmd help
Add info about supported i.MX7, improve details the usage of
bcbonly subcommand.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-01-07 10:26:57 +01:00
Frieder Schrempf
83083febf5 ddr: imx8m: Return error values from LPDDR4 training
In cases when the same SPL should run on boards with i.MX8MM, that
differ in DDR configuration, it is necessary to try different
parameters and check if the training done by the firmware suceeds or
not.

Therefore we return the DDR training/initialization success to the
upper layer in order to be able to retry with different settings if
necessary.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2020-01-07 10:26:57 +01:00
Tom Rini
44ad496143 arm: imx: Default to SYS_THUMB_BUILD for i.MX6/7
In the case of i.MX6 and i.MX7 family SoCs it is safe (from an errata
point of view) to use thumb2 by default to save space.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-01-07 10:26:57 +01:00
Igor Opaniuk
c0f037f6a2 mach-imx: bootaux: elf firmware support
Currently imx-specific bootaux command doesn't support ELF format
firmware for Cortex-M4 core.

This patches introduces a PoC implementation of handling elf firmware
(load_elf_image_phdr() was copy-pasted from elf.c just for PoC).
ELF64 binaries isn't supported yet.

This has the advantage that the user does not need to know to which
address the binary has been linked to. However, in order to handle
and load the elf sections to the right address, we need to translate the
Cortex-M4 core memory addresses to primary/host CPU memory
addresses (Cortex A7/A9 cores).

This allows to boot firmwares from any location with just using
bootaux, e.g.:
> tftp ${loadaddr} hello_world.elf && bootaux ${loadaddr}

Similar translation table can be found in the Linux remoteproc
driver [1].

[1] https://elixir.bootlin.com/linux/latest/source/drivers/remoteproc/imx_rproc.c

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-01-07 10:26:56 +01:00
Igor Opaniuk
45997eb6c0 ARM: dts: imx7: imx7_colibri: introduce fec node
Sync DTS with the mainline Linux and introduce fec node and
regulator configuration for rn5t567 PMU.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-01-07 10:26:56 +01:00
Igor Opaniuk
f9be62a608 ARM: dts: imx6_apalis: introduce fec node
Sync DTS with the mainline Linux and introduce fec node.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-01-07 10:26:56 +01:00
Igor Opaniuk
fbcd88095d ARM: dts: imx6_colibri: introduce fec node
Sync DTS with the mainline Linux and introduce fec node.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-01-07 10:26:56 +01:00
Joris Offouga
0d52bab462 mx7dsabre: Enable DM_ETH
Also sync device tree with v5.5-rc1
Signed-off-by: Joris Offouga <offougajoris@gmail.com>
2020-01-07 10:26:56 +01:00
Fabio Estevam
0417ef17ac mx7ulp: Add support for Embedded Artists COM board
The Embedded Artists COM board is based on NXP i.MX7ULP.

It has a BD70528 PMIC from Rohm with discrete DCDC powering option and
improved current observability (compared to the existing NXP i.MX7ULP EVK).

Add the initial support for the board.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-01-07 10:26:56 +01:00
Steffen Dirkwinkel
ba1444eab6 imx: cx9020: migrate cx9020 to CONFIG_DM_USB
Note: gpio7_8 was never used for usb power regulator so we remove it here

Acked-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Signed-off-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
2020-01-07 10:26:56 +01:00
Steffen Dirkwinkel
9c2b1b0f03 imx: cx9020: migrate cx9020 to CONFIG_DM_ETH
Acked-by: Patrick Bruenn <p.bruenn@beckhoff.com>
Signed-off-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
2020-01-07 10:26:56 +01:00
Parthiban Nallathambi
d98929d636 imx: sync with kernel device tree for Phycore SoM
Sync the Linux Kernel 5.4-rc6 device tree for Phytec Phycore
SoM and Segin board based on imx6UL and imx6ULL.

Changes includes Phytec naming convention for the devicetree files.

Signed-off-by: Parthiban Nallathambi <parthitce@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2020-01-07 10:26:56 +01:00
Igor Opaniuk
89038264bb mach-imx: bootaux: add dcache flushing before enabling M4
This patch fixes the issue with broken bootaux command,
when M4 binary is loaded and data cache isn't flushed
before M4 core is enabled.

Reproducing:
> tftpboot ${loadaddr} ${board_name}/hello_world.bin
> cp.b ${loadaddr} 0x7F8000 $filesize
> bootaux 0x7F8000

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-01-07 10:26:56 +01:00
Igor Opaniuk
0ba1b4de0e mach-imx: bootaux: print stack pointer and reset vector
1. Change information printed about loaded M4 binary, print the stack
pointer and reset vector addressed.
2. Add sanity check for the address provided as param.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-01-07 10:26:56 +01:00
Marek Vasut
c35b19531d ARM: mx6: ddr: Add support for iMX6SX
This patch adds support for iMX6SX MMDC into the DDR calibration
code. The only difference between MX6DQ and MX6SX is that the SX
has 2 SDQS registers, while the DQ has 8.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Eric Nelson <eric@nelint.com>
2020-01-07 10:26:56 +01:00
Marek Vasut
b314003fda ARM: mx6: ddr: Configure all SDQS pullups using loop
Instead of explicitly setting up each SDQS register, use a loop.
No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Eric Nelson <eric@nelint.com>
2020-01-07 10:26:56 +01:00
Marek Vasut
7ec0e39ec4 ARM: mx6: ddr: Factor out SDQS configuration code
Pull out the code turning SDQS pullups on and off into a separate
function, since it is replicated in two places in the code and it
is the single place in the entire function which is SoC dependent.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Eric Nelson <eric@nelint.com>
2020-01-07 10:26:56 +01:00
Marek Vasut
736b491f31 ARM: mx6: ddr: Make debug prints work with tiny printf
The %08X format returns just zeroes with tiny printf, which is
horribly confusing, especially when debugging DRAM calibration
problems. Change the format to %08x (with lowercase x), which
behaves correctly with either implementation of printf in SPL.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Eric Nelson <eric@nelint.com>
2020-01-07 10:26:56 +01:00
Claudius Heine
f8420d7c0f ARM: dts: dh-imx6: add u-boot specific wdt-reboot node
The wdt-reboot node is needed for the sysreset_watchdog driver to
register a watchdog as a reset handler in case 'CONFIG_SYSRESET' is
enabled.

Signed-off-by: Claudius Heine <ch@denx.de>
2020-01-07 10:26:56 +01:00
Baruch Siach
281d5e435b arm: dts: hummingboard: add cubox/hummingboard DT (part 2 of 2)
These DT files are copied from kernel v5.3 with no changes.

This is part 2 of 2 commits. Included are DT files for SOM rev 1.5, and
Hummingboard2 Gate/Edge.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-01-07 10:26:56 +01:00
Baruch Siach
730e6a0ca1 arm: dts: hummingboard: add cubox/hummingboard DT (part 1 of 2)
These DT files are copied from kernel v5.3 with no changes.

This is part 1 of 2 commits. Included are DT files for the original
Cubox-i and Hummingboard Base/Pro.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2020-01-07 10:26:56 +01:00
Robert Beckett
7915e150d6 board: ge: mx53ppd: use imx wdt
Enable DM imx WDT
Enable SYSRESET_WATCHDOG to maintain WDT based reset ability

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
2020-01-07 10:26:56 +01:00
Robert Beckett
d494aeca46 board: ge: bx50v3: use imx wdt
Enable DM imx WDT
Enable SYSRESET_WATCHDOG to maintain WDT based reset ability

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
2020-01-07 10:26:56 +01:00
Robert Beckett
6388f9921a board: ge: ppd: sync device tree from Linux
Copy device tree from linux for PPD.

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
2020-01-07 10:26:56 +01:00
Robert Beckett
8c26739859 board: ge: bx50v3: sync devicetrees from Linux
Copy device trees from linux, keeping them as separate files for
each board to ease future sync.

Update board code to use generic bx50v3 dt initially, then select
the specific dt based on board detection.

Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
2020-01-07 10:26:56 +01:00
Lukasz Majewski
010e58d448 imx: Add support for i.MX28 based XEA board
This patch introduces support for i.MX28 based XEA board.

This board supports DM/DTS in U-Boot proper as well as DM aware drivers
in SPL (u-boot.sb) by using OF_PLATDATA.
More detailed information regarding usage of it can be found in
./board/liebherr/xea/README file.

U-Boot SPL 2019.10-rc1-00233-g6aa549f05c (Aug 12 2019 - 09:23:36 +0200)
Trying to boot from MMC1
MMC0: Command 8 timeout (status 0xf0344020)
mmc_load_image_raw_sector: mmc block read error

U-Boot 2019.10-rc1-00233-g6aa549f05c (Aug 12 2019 - 09:23:36 +0200)

CPU:   Freescale i.MX28 rev1.2 at 454 MHz
BOOT:  SSP SPI #3, master, 3V3 NOR
Model: Liebherr (LWE) XEA i.MX28 Board
DRAM:  128 MiB
MMC:   MXS MMC: 0
Loading Environment from SPI Flash... SF: Detected n25q128a13 with page size 256 Bytes, erase size 64 KiB, total 16 MiB
OK
In:    serial
Out:   serial
Err:   serial
Net:
Warning: ethernet@800f0000 (eth0) using random MAC address - ce:e1:9e:46:f3:a2
eth0: ethernet@800f0000
Hit any key to stop autoboot:  0

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-01-07 10:26:56 +01:00
Heiko Schocher
227cb30047 imx6: aristainetos: add support for rev C board
add support for revision C boards. This board has
no longer a NAND.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07 10:26:56 +01:00
Heiko Schocher
c08aa77173 imx6: aristainetos: add aristainetos 2b csl
add aristainetso board version CSL.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07 10:26:56 +01:00
Heiko Schocher
1204b9675e imx6: aristainetos: readd aristainetos 2b board
readd aristainetos 2b board.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07 10:26:56 +01:00
Heiko Schocher
f44b4ab3c8 imx6: aristainetos: add DM_SERIAL support
add DM_SERIAL support for the aristainetos board, and
remove not used code from board code.

remove CONSOLE_OVERWRITE_ROUTINE.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07 10:26:55 +01:00
Heiko Schocher
ccc7595a81 imx6: aristainetos: prepare dts for other board versions
as we switch to support DM and DTS, rework the existing
DTS trees. Change also Linux specific Device trees, goal
is to push this changes to linux.

Collect U-Boot specific changes in separate "*u-boot*" dts
files.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07 10:26:55 +01:00
Heiko Schocher
8fb028ee20 imx6: aristainetos: add device tree from linux
Add device trees from Linux in preparation for driver model
conversions.

device tree files taken from Linux:
71ae5fc87c34: "Merge tag 'linux-kselftest-5.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest"

and added SPDX license identifier.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07 10:26:55 +01:00
Heiko Schocher
1b857f1a92 imx6: aristainetos: remove 2b version
remove 2b version of aristainetos board, as it
is easier to make the DM / DTS port and introduce
the 2b board version again (also some more board
version).

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07 10:26:55 +01:00
Heiko Schocher
3882e6fc01 imx6: aristainetos: move defines to Kconfig
move defines, which are already moved to Kconfig
out of board config.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07 10:26:55 +01:00
Heiko Schocher
a7e2dc9cf6 imx6: remove aristainetos board
remove not anymore used aristainetos board.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07 10:26:55 +01:00
Tom Rini
5a8fa095cb Merge branch 'next'
Bring in the following merges:

commit 8fbbec12f7
Merge: 87f69f467a 63618e71e8
Author: Tom Rini <trini@konsulko.com>
Date:   Fri Jan 3 09:48:47 2020 -0500

    Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next

    - updates and fixes on ls1028a, lx2, ls1046a, MC-DPSPARSER support

commit 87f69f467a
Merge: c0912f9bbf 4466b99703
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Dec 24 08:18:19 2019 -0500

    Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx into next

    - Enable DM driver on ppc/km boards
    - Enable DM_USB for some of NXP powerpc platforms: P5040, T4240, T208x,
      T104x, P4080, P2041, P2020, P1020, P3041
    - Some updates in mpc85xx-ddr driver, km boards

commit c0912f9bbf
Merge: 533c9f5714 a1d6dc3f84
Author: Tom Rini <trini@konsulko.com>
Date:   Wed Dec 18 07:20:19 2019 -0500

    Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 into next

    - Various x86 common codes updated for TPL/SPL
    - I2C designware driver updated for PCI
    - ICH SPI driver updated to support Apollo Lake
    - Add Intel FSP2 base support
    - Intel Apollo Lake platform specific drivers support
    - Add a new board Google Chromebook Coral

commit 533c9f5714
Merge: 553cb06887 033e18b47b
Author: Tom Rini <trini@konsulko.com>
Date:   Tue Dec 17 07:53:08 2019 -0500

    Merge tag '20191217-for-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c into next

    i2c: for next
    - misc: i2c_eeprom:
      Add partition support and add ability to query size
      of eeprom device and partitions
    - i2c common:
      add support for offset overflow in to address and add
      sandbox tests for it.

commit 553cb06887
Merge: f39abbbc53 b4f98b3b16
Author: Tom Rini <trini@konsulko.com>
Date:   Thu Dec 12 08:18:59 2019 -0500

    Merge tag 'dm-next-13dec19' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm into next

    buildman improvements including toolchain environment feature
    sandbox unicode support in serial
2020-01-06 17:07:49 -05:00
Lokesh Vutla
40109f4d7e arm: mach-k3: Enable WA for R5F deadlock
On K3 devices there are 2 conditions where R5F can deadlock:
1.When software is performing series of store operations to
  cacheable write back/write allocate memory region and later
  on software execute barrier operation (DSB or DMB). R5F may
  hang at the barrier instruction.
2.When software is performing a mix of load and store operations
  within a tight loop and store operations are all writing to
  cacheable write back/write allocates memory regions, R5F may
  hang at one of the load instruction.

To avoid the above two conditions disable linefill optimization
inside Cortex R5F which will make R5F to only issue up to 2 cache
line fills at any point of time.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-03 09:47:11 -05:00
Lokesh Vutla
196d3e4017 arm: dts: k3-j721e: ddr: Update to 0.2 version of DDR config tool
Update the ddr settings to use the DDR reg config tool rev 0.2.0.
This reduces the aging count(in DDRSS_CTL_274_DATA reg) to 15 in-order
to avoid DSS underflow errors.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Kevin Scholz <k-scholz@ti.com>
2020-01-03 09:47:10 -05:00
Tom Rini
28aa6dc29a Merge tag 'u-boot-rockchip-20191231' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- Fix latest mainline kernel for rk3308
- Update rk3288-evb config to suport OP-TEE
- Fix for firefly-px30 DEBUG_UART channel and make it standalone
- Script make_fit_atf add python3 support
- Fix rk3328 timer with correct COUNTER_FREQUENCY
- Fix rk3328 ATF support with enable spl-fifo-mode
2020-01-02 10:28:26 -05:00
Robert P. J. Day
e852b30b23 arch/arm/Kconfig: typo/grammar/punctuation fixes
Various (mostly minor) spelling, grammar and punctuation tweaks for
arch/arm/Kconfig.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
2020-01-02 10:27:23 -05:00
Pankaj Bansal
ba7c966c0f pci: layerscape: move PCIE related CONFIG to PCI Kconfig
move the PCIE related config from arch Kconfig to PCI Kconfig.
As the PCI_LAYERSCAPE driver is being used in platform other than
fsl-layerscape platforms like ls102xa.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-01-02 14:36:57 +05:30
Kever Yang
fa2047c473 rockchip: rk3328: enable spl-fifo-mode for emmc and sdmmc
Since mmc to sram can't do dma, add patch to prevent aborts transfering
TF-A parts.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-31 15:57:55 +08:00
Tom Rini
6cb87cbb14 Fixes for 2020.01
-----------------
 - Fixes for Nitrogen6x
 - Fix corruption for mx51evk
 - colibri i.MX6: fix broken ESDHC conversion
 - mx6sxsabresd: fix broken mmcdev
 - imx6q_logic: cleanup boot sequence
 - update ATF for imx8mq_evk
 - pfuze: fix pmic_get()
 
 Travis CI: https://travis-ci.org/sbabic/u-boot-imx/builds/630007464
 -----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAl4HLywPHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3cB0L/jRElnVFGaZC6Bii7jVS9u/oJ03yYM73Qp4M
 AWlITWIHQtB6PAGBVYz+Ts17grkYWT5fwuV3TqE+yfOeeD76cfo37L9iSePIQ7mC
 SYWfId3E3xz++2/64HM1PETWmPXi76QxeJ4GMP9amZMLW+huS6sWi1tfVEURedl0
 LXddxpa4DkjMeU4sKLgrGLv3+wIu5P6ELcpQXrBQs7uVQxiwvWh3rrldHlLzacHm
 o2DUE4rDrtN5K2khT/Gq9wf7eG1vCbIKFvDTTFjgkg5nlfeeiiEHXqAKiLN/hPmq
 BrrxBXucPqUj9V/tozcBMrQ6bFfGkaGaBUVT8AqBWe/CUKaicrcxZLh1Ef18fo0y
 yxh3RfnW6kYIokRxP4uf9kRXxip7hYciqlvhHdO7pY6TkwweuzFVvUmlKD6dCS9z
 iulDyZfAXNXYxtEFqBBO7A2bQo5u9MqR7xYjNc3aALOeXt8H+wcM7BQZ1ga72d2X
 nNw1XHR84Kjr/lc5PJRVp/Nz9s4VVw==
 =GLWM
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20191228' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Fixes for 2020.01
-----------------
- Fixes for Nitrogen6x
- Fix corruption for mx51evk
- colibri i.MX6: fix broken ESDHC conversion
- mx6sxsabresd: fix broken mmcdev
- imx6q_logic: cleanup boot sequence
- update ATF for imx8mq_evk
- pfuze: fix pmic_get()

Travis CI: https://travis-ci.org/sbabic/u-boot-imx/builds/630007464
2019-12-28 08:07:16 -05:00
Troy Kisky
61d7e2bcc7 ARM: i.MX6: TARGET_NITROGEN6X: add 'select MX6QDL'
This fixes commit <91435cd40d30> "ARM: i.MX6: exclude the ARM errata
 from i.MX6 UP system"

for nitrogen6x. The above commit removed the errata for the board
since MX6Q/MXDL/MX6S is selected via CONFIG_SYS_EXTRA_OPTIONS

This restores the errata configs.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-12-27 14:28:42 +01:00
Jorge Ramirez-Ortiz
e97bdfa5da tools/imximage: share DCD information via Kconfig
IMX based platforms can have the DCD table located on different
addresses due to differences in their memory maps (ie iMX7ULP).

This information is required by the user to sign the images for secure
boot so continue making it accessible via mkimage.

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
2019-12-27 12:55:59 +01:00
Thomas Hebb
d4e4187b8c rockchip: add description for TPL_ROCKCHIP_COMMON_BOARD
SPL_ROCKCHIP_COMMON_BOARD, an almost identical option, has a title but
this one doesn't for some reason. Add a description to make the menu
easier to read.

Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-27 14:26:13 +08:00
Kever Yang
3176d47d35 rockchip: px30-firefly add standalone dts
Firefly Core-PX30-JD4 use UART2M1 while PX30 evb using UART2M0, the U-Boot
proper will use the dts setting to do the IOMUX init, and a separate dts
is needed for px30-firefly.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-27 14:26:13 +08:00
Jack Mitchell
6d06ea3423 rockchip: make_fit_atf: explicitly use python3
On a distribution with no python2 installed and no
python->python3 symlink the script will fail to execute.
Specify python3 explicitly as it's already a requirement
to build u-boot.

Signed-off-by: Jack Mitchell <ml@embed.me.uk>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-27 14:26:13 +08:00
Kever Yang
7c337710fc rockchip: fit_spl_optee: get text and optee base from build
Instead of hardcode the base address, we can get them from the build
output, eg. get the SYS_TEXT_BASE from .config and get optee base from
DRAM_BASE.
We can use this script for SoCs with DRAM base not from 0x60000000(rk3229
and many other 32bit Rockchip SoCs), eg. rk3288 DRAM base is 0.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-26 20:34:28 +08:00
Wasim Khan
7cd4272821 armv8: lx2160a: Add FSL_PEX_STREAM_ID_END for LX2160A
Add FSL_PEX_STREAM_ID_END and remove FSL_PEX_STREAM_ID_NUM
for lx2160a.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-12-26 16:00:21 +05:30
Kuldeep Singh
ce3bead608 fsl-lsch3: soc: Enable AHB read support for Flexspi controller
Enable AHB support for Flexspi controller interface meaning
memory can be accessed via md command using absolute addresses

Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-12-26 16:00:20 +05:30
Kuldeep Singh
0b6c3706ab fsl-lsch3: Add FlexSPI address space in immap_lsch3
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
2019-12-26 16:00:20 +05:30
Alex Marginean
3499dd033c ls1028a: Configure stream IDs for integrated PCI and fix up Linux DT
Hardware comes out of reset with implicit values, but these are outside
the accepted range for Layerscape gen 3 chassis spec used on LS1028A.
Allocate different IDs and fix up Linux DT to use them.

Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-12-26 16:00:20 +05:30
Vabhav Sharma
c1ead04bc4 arm64: lx2160a: dts: Fix UART node status
LX2160A PL011 UART driver fetch IP block values using
platform data from board file instead of device tree.

Modified UART nodes in device tree to disable state.

Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-12-26 16:00:20 +05:30
Ran Wang
0cfa00cdb9 armv8: Add workaround for USB erratum A-050106
USB3.0 Receiver needs to enable fixed equalization
for each of PHY instances in an SOC. This is similar
to erratum A-009007, but this one is for LX2160A,
and the register value is different.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-12-26 16:00:20 +05:30
Michael Walle
055aa33ff9 armv8: layerscape: fix SPL multi DTB loading
Mark board_fit_config_name_match() as weak so a board can overwrite the
empty function.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-12-26 16:00:20 +05:30
Heinrich Schuchardt
421e7a41c6 sunxi: remove __packed from struct sunxi_prcm_reg
struct sunxi_prcm_reg is naturally packed. There is no need to define it as
packed. Defining it as packed leads to compilation errors with GCC 9.2.1:

  CC      arch/arm/lib/reloc_arm_efi.o
arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’:
:qarch/arm/cpu/armv7/sunxi/psci.c:163:21: error: taking address of packed
member of ‘struct sunxi_prcm_reg’ may result in an unaligned pointer value
[-Werror=address-of-packed-member]
  163 |  sunxi_power_switch(&prcm->cpu_pwr_clamp[cpu], &prcm->cpu_pwroff,
      |                     ^~~~~~~~~~~~~~~~~~~~~~~~~

Remove __packed attribute from struct sunxi_prcm_reg.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-12-18 20:19:58 +05:30
Diego Rondini
e7c15b7ab8 sun8i: h3: Support H3 variant of Orange Pi Zero Plus 2
Orangepi Zero Plus 2 is an open-source single-board computer, available
in two Allwinner SOC variants, H3 and H5. We add support for H3 variant
here, as the H5 is already supported.

H3 Orangepi Zero Plus 2 has:
- Quad-core Cortex-A7
- 512MB DDR3
- microSD slot and 8GB eMMC
- Debug TTL UART
- HDMI
- Wifi + BT
- OTG + power supply

Sync dts from linux v5.2 commit:
"ARM: dts: sunxi: h3/h5: Remove stale pinctrl-names entry"
(sha1: 75f9a058838be9880afd75c4cb14e1bf4fe34a0b)
Commit:
"ARM: dts: sun8i: h3: Refactor the pinctrl node names"
(sha1: a4dc791974e568a15f7f37131729b1a6912f4811)
has been avoided as it breaks U-Boot build.

Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-12-18 20:14:16 +05:30
Heinrich Schuchardt
9bd34a69a4 sunxi: psci: avoid error address-of-packed-member
Compiling with GCC 9.2.1 leads to build errors:

arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’:
arch/arm/cpu/armv7/sunxi/psci.c:144:21: error: taking address of packed
member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer
value [-Werror=address-of-packed-member]
  144 |  sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff,
      |                     ^~~~~~~~~~~~~~~~~~~~~~~
arch/arm/cpu/armv7/sunxi/psci.c:144:46: error: taking address of packed
member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer
value [-Werror=address-of-packed-member]
  144 |  sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff,
      |                                              ^~~~~~~~~~~~~~~~~~~~

Use memcpy() and void* pointers to resolve the problem caused by packing
the struct sunxi_cpucfg_reg.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
2019-12-18 20:13:34 +05:30
Patrick Delaunay
16fec9b0bc stm32mp1: remove the imply BOOTSTAGE
This patch is only a temporarily workaround for crash introduced by
commit ac9cd4805c ("bootstage: Correct relocation algorithm").

The crash occurs because the bootstage struct is not correctly aligned
when BOOTSTAGE feature is activated.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-12-18 11:58:36 +01:00
Patrick Delaunay
eee15806fc stm32mp1: imply CMD_CLS
Activate by default the command CLS (clear screen);
this command used in pxe or sysboot command (DISTRO support)
when the "menu background" keyword is present.

This patch avoid the warning "Unknown command 'cls'"
with extlinux.conf:

# Generic Distro Configuration file generated by OpenEmbedded
menu title Select the boot mode
MENU BACKGROUND /splash.bmp
TIMEOUT 20
DEFAULT stm32mp157c-ev1-emmc
LABEL stm32mp157c-ev1-emmc
	KERNEL /uImage
	FDT /stm32mp157c-ev1.dtb
	APPEND root=/dev/mmcblk1p4 rootwait rw console=ttySTM0,115200

  ...
  Retrieving file: /mmc0_stm32mp157c-ev1_extlinux/extlinux.conf
  614 bytes read in 36 ms (16.6 KiB/s)
  Retrieving file: /splash.bmp
  46180 bytes read in 40 ms (1.1 MiB/s)
  Unknown command 'cls' - try 'help'
  Select the boot mode
  1:	stm32mp157c-ev1-sdcard
  ...

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-12-18 11:52:35 +01:00
Tudor Ambarus
f10b4006a6 board: atmel: sama5d27_wlsom1_ek: Set ethaddr from spi-nor flash
The SST26VF064BEUI spi-nor flash is programmed at the factory with a
globally unique address stored in the SFDP vendor parameter table and
it is permanently writeprotected. Retrieve the EUI-48 address and set it
as ethaddr env.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-12-17 09:49:05 +02:00
Simon Glass
bcee8d6764 dm: gpio: Allow control of GPIO uclass in SPL
At present if CONFIG_SPL_GPIO_SUPPORT is enabled then the GPIO uclass
is included in SPL/TPL without any control for boards. Some boards may
want to disable this to reduce code size where GPIOs are not needed in
SPL or TPL.

Add a new Kconfig option to permit this. Default it to 'y' so that
existing boards work correctly.

Change existing uses of CONFIG_DM_GPIO to CONFIG_IS_ENABLED(DM_GPIO) to
preserve the current behaviour. Also update the 74x164 GPIO driver since
it cannot build with SPL.

This allows us to remove the hacks in config_uncmd_spl.h and
Makefile.uncmd_spl (eventually those files should be removed).

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-12-15 08:52:29 +08:00
Hannes Schmelzer
05767707a8 dts: am335x-brsmarc1/xre1: insert phy_id again
commit 3b3e8a37d3
("arm: dts: am335x: sync cpsw/mdio/phy with latest linux - drop phy_id")

did sync with recent linux kernel and replaced therefore the 'phy_id'
property with a phy-handle pointing to the mdio.

This is OK for linux, but introduces trouble with the already running
vxWorks on this target.

So this commit here re-inerts the phy_id property beside the phy-handle
property to be compatible with both.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-12-13 13:01:12 -05:00
Suman Anna
1045ff4d1a ARM: DRA7: Fixup DSP OPP_HIGH clock rate on DRA76P/DRA77P SoCs
The commit 1b42ab3eda ("ARM: DRA7: Fixup DSPEVE, IVA and GPU clock
frequencies based on OPP") added the core logic to update the kernel
device-tree blob to adjust the DSP, IVA and GPU DPLL clocks based on
a one-time OPP choice selected in U-Boot for most of the DRA7xx/AM57xx
family of SoCs.

The DSPs on DRA76xP/DRA77xP SoCs (DRA76x ACD package SoCs) though
provide a higher performance and can run at a higher clock frequency
of 850 MHz at OPP_HIGH instead of 750 MHz. Fix up the logic to use the
correct clock rates on these SoCs. Note that this higher clock rate is
not applicable to other Jacinto 6 Plus SoCs (DRA75xP/DRA74xP SoCs or
AM574x SoCs) that follow the ABZ package.

Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-12-09 14:00:24 -05:00
Tom Rini
ac1ca99926 Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-net 2019-12-09 13:48:22 -05:00
Vignesh Raghavendra
4886f1cb59 arm: dts: k3-j721e-common-proc-board: Add DMA and CPSW related DT nodes
Add DT nodes related to DMA and CPSW to -u-boot.dtsi to get networking
up on J721e EVM.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
2019-12-09 09:47:43 -06:00
Nevo Hed
06f555274e arm: dts: armada-cp110-*dtsi: add xmdio nodes
Based on upstream-linux
See https://github.com/torvalds/linux/commit/f66b2aff.

However made the XSMI register window 0x16 (22) bytes per my reading
of the functional spec.  Similar commits in Marvels own repo bump it
to 0x200 (512) bytes but I did not see the reasoning for that.

https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/4d932b4.

Also added device-name attributes to prevent ambiguity in the `mdio`
command.

Signed-off-by: Nevo Hed <nhed+github@starry.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-09 09:47:42 -06:00
Grygorii Strashko
5efb69298b arm: dts: k3-am654-base-board-u-boot: change cpsw2g interface mode to rgmii-rxid
The AM654 SoC doesn't allow to disabling RGMII TX internal delay in CPSW2G
MAC. Hence, change CPSW2G interface mode to "rgmii-rxid" - RGMII with
internal RX delay provided by the PHY, the MAC will add an TX delay in this
case.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-12-09 09:47:42 -06:00
Joe Hershberger
fb8977c5be net: Always build the string_to_enetaddr() helper
Part of the env cleanup moved this out of the environment code and into
the net code. However, this helper is sometimes needed even when the net
stack isn't included.

Move the helper to lib/net_utils.c like it's similarly-purposed
string_to_ip(). Also rename the moved function to similar naming.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reported-by: Ondrej Jirman <megous@megous.com>
2019-12-09 09:47:41 -06:00
Heinrich Schuchardt
0c5c3f2935 arm: -march=armv5t for ARM11
In GCC 9 support for the Armv5 and Armv5E architectures (which have no
known implementations) has been removed, cf.
https://gcc.gnu.org/gcc-9/changes.html

Commit 16540d07fd ("arm: fix -march for ARM11") changed the value of the
compiler flag from -march=armv5 and -march=armv5t into -march=armv6 for
ARM11.

The values prior to this patch were:

    arch-$(CONFIG_CPU_ARM1136)     =-march=armv5
    arch-$(CONFIG_CPU_ARM1176)     =-march=armv5t

The change lead to a regression with the Raspberry Pi Zero W not booting
anymore.

Use -march=armv5t both for ARM1136 and ARM1176.

Fixes: 16540d07fd ("arm: fix -march for ARM11")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Joris Offouga <offougajoris@gmail.com>
2019-12-09 10:36:00 -05:00
Tom Rini
2f02845817 Fixes for 2020.01
-----------------
 
 - imx8qxp_mek: increase buffer sizes and args number
 - Fixes for imx7ulp
 - imx8mm: Fix the first root clock in imx8mm_ahb_sels[]
 - colibri_imx7: reserve DDR memory for Cortex-M4
 - vining2000: fixes and convert to ethernet DM
 - imx8m: fix rom version check to unbreak some B0 chips
 - tbs2910: Disable VxWorks image booting support
 -----BEGIN PGP SIGNATURE-----
 
 iQHDBAABCgAtFiEEiZClFGvhzbUNsmAvKMTY0yrV63cFAl3uLqsPHHNiYWJpY0Bk
 ZW54LmRlAAoJECjE2NMq1et3YEEL/jAKMnREGNHCjvwvxkVVZ7sWHeRtqh+OXb8V
 VnZB0glptth1NDxWyHFZkcsVqjpRlUsm3/lA91xaFXcUB8EWnJMKVReHkB7v0bZW
 zHziN0rNPoTBVocRlpgPXt3zeSOR3Qg+rFesg4zmlXNIVPyvBanpDCxXDK60gdIi
 JDrAdIarP0UMK0roIFLIyvnJ+J/ib1ky1aJI8cdktXb+nSyVrMw5VDdmSBtTCp10
 6o/fJGtWfzXp59a8y9XnnVxNsU2c0URcsswub4fvWhhwJ86xiWGSEfm5Sybql6kS
 6PYjB7jGmdWJjYug7rFthl1Hnn1FULIH9qrxPePtD2ooUUjHPlDmElQqWkHoVlib
 yUAlWG87ZdjhmEMR1iSFlkcBpOD7SlmcvfYZdeedCdtzTwW0kj6lcX9fUKHE+17e
 3SJQtPxpMrVfnUDRn0ciAbwg8+1Tow6sv39j6iYi7jAITny9q16ErdRGup0wB19Y
 tZkmRdnhtjCalrfDoEaRGXZJDE15XQ==
 =L2zo
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20191209' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

Fixes for 2020.01
-----------------

- imx8qxp_mek: increase buffer sizes and args number
- Fixes for imx7ulp
- imx8mm: Fix the first root clock in imx8mm_ahb_sels[]
- colibri_imx7: reserve DDR memory for Cortex-M4
- vining2000: fixes and convert to ethernet DM
- imx8m: fix rom version check to unbreak some B0 chips
- tbs2910: Disable VxWorks image booting support
2019-12-09 10:32:08 -05:00
Patrick Wildt
6a4b07e086 imx8m: fix rom version check to unbreak some B0 chips
Recently the version check was improved to be able to determine that
we're running on SoC revision 2.1.  A check for B0 was tightened so
that it now must equal 0x20 instead of being bigger than 0x20.  On
some B0 chips the value returned is 0x1020 instead of 0x20.  This
means even though it's B0, the check will fail and code relying on
the correct chip revision will make wrong decisions.  There is no
documentation of those bits, but it seems that NXP always uses a
byte to encode the revision.  Thus remove the upper bits to fix the
regression.

Signed-off-by: Patrick Wildt <patrick@blueri.se>
2019-12-09 11:52:06 +01:00
Tom Rini
bead4f2f2c Merge tag 'u-boot-rockchip-20191206' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip
- rockchip pwm driver update to support all the SoCs
- RK3308 GMAC and pinctrl support
- More UART interface support on PX30 and pmugrf reg fix
- Fixup on misc for eth_addr/serial#
- Other updates on variant SoCs
2019-12-06 10:35:18 -05:00
Marek Vasut
edaec53212 ARM: imx: vining2000: Repair PCIe support
Ever since the conversion to DM PCI, the board was missing the PCIe DT
nodes, hence the PCI did not really work. Fill in the DT nodes and add
missing PCIe device reset.

Moreover, bring the PCIe power domain up before booting Linux. This is
mandatory to keep old broken vendor kernels working, as they do not do
so and depend on the bootloader to bring the power domain up.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
2019-12-06 13:57:42 +01:00
Marek Vasut
7d84f4469f ARM: imx: vining2000: Convert to SPL framework
In preparation for use of DDR DRAM fine-tuning upon boot,
convert the board to SPL framework instead of using DCD
tables to bring up DRAM and pinmux.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
2019-12-06 13:57:42 +01:00
Marek Vasut
df1b721f60 ARM: mx6: pmu: Expose PMU LDO configuration interface
Make the PMU LDO configuration interface available to board code,
so that board code can reconfigure the internal LDOs of the SoC.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Eric Nelson <eric@nelint.com>
2019-12-06 13:57:42 +01:00
Igor Opaniuk
c671d8af0b board: colibri_imx7: reserve DDR memory for Cortex-M4
i.MX 7's Cortex-M4 core can run from DDR and uses DDR memory for
the rpmsg communication. Both use cases need a fixed location of
memory reserved. For the rpmsg use case the reserved area needs
to be in sync with the kernel's hardcoded vring descriptor location.

Use the linux,usable-memory property to carve out 1MB of memory
in case the M4 core is running. Also make sure that the i.MX 7
specific rpmsg driver does not get loaded in case we do not carve
out memory.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-12-06 12:09:30 +01:00
Fabio Estevam
d396f1384c mx6: Allow configuring the NoC registers on i.MX6QP
The NoC registers on i.MX6QP needs to be configured, otherwise some
usecases in the kernel behave incorrectly, such as rotation and resize.

Currently the NoC registers are not configured in the kernel, so
configure them in U-Boot like it is done in the NXP U-Boot tree.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2019-12-06 12:09:25 +01:00
Fabio Estevam
2d4b87f867 mx7ulp: Sync the device tree related files
Sync the mx7ulp device tree related files with the one from
NXP U-Boot vendor tree (imx_v2019.04_4.19.35_1.0.0).

The mainline support for i.MX7ULP is very premature at this stage.

We should probably re-sync with mainline Linux dts when it gets
in better shape, but for now sync with the U-Boot vendor code.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06 12:05:08 +01:00
Fabio Estevam
d136eb9bfe mx7ulp: scg: Remove unnused scg_a7_apll_init()
scg_a7_apll_init() is not called anywhere, so remove such dead code

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06 12:05:08 +01:00
Fabio Estevam
0619af0942 mx7ulp: Remove the _RUN notation from the PMC1 LDOVL definitions
The LDOVL definitions is common to all the modes, not only RUN mode,
so in order to avoid confusion, remove the _RUN notation from the PMC1
LDOVL definitions.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06 12:05:08 +01:00
Fabio Estevam
b8cabb0e3d mx7ulp: Introduce the CONFIG_LDO_ENABLED_MODE option
Introduce the CONFIG_LDO_ENABLED_MODE option so that i.MX7ULP boards
designed to operate with LDO enabled mode can work with 0.95V at LDO
output in RUN mode as per the datasheet.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06 12:05:08 +01:00
Fabio Estevam
72a093a8ac mx7ulp: Print the LDO mode status
As per the i.MX7ULP datasheet, it can boot in LDO enabled mode
or LDO bypass mode.

Print the LDO mode status in the U-Boot log for convenience.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06 12:05:08 +01:00
David Wu
e0e6c96a67 arm: rockchip: rk3308: Initialize the iomux configuration
When we want to use plus pinctrl feature, we need to enable
them at spl.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06 00:06:23 +08:00
David Wu
4ee6d51c5a pwm: rk_pwm: Make PWM driver to support all Rockchip Socs
This PWM driver can be used to support pwm functions
for on all Rockchip Socs.

The previous chips than RK3288 did not support polarity,
and register layout was different from the RK3288 PWM.

The RK3288 keep the current functions.

RK3328 and the chips after it, which can support hardware lock,
configure duty, period and polarity at next same period, to
prevent the intermediate temporary state.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06 00:06:23 +08:00
David Wu
aebd9eddb3 dts: rk3308: Enable ethernet function supported for Firefly ROC_RK3308_CC
The Firefly ROC_RK3308_CC use ref_clock of input mode,
and rmii pins of m1 group.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06 00:06:23 +08:00
David Wu
982fab393d arm: dts: Add mac node for rk3308 at dtsi level
The rk3308 only support RMII mode, and if it is output clock
mode, better to use ref_clk pin with drive strength 12ma.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-06 00:06:23 +08:00
Heiko Stuebner
fd3a7ae8e6 rockchip: misc: protect serial# from getting overwritten
serial# is one of the vendor properties and thus protected from being
overwritten if already set. If env_set is called anyway this result in
some nasty warnings, so check for presence before trying that.

In the same direction check for the presence of cpuid# and compare it
to the actual hardware and emit a warning if they don't match.

Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05 23:53:07 +08:00
Heiko Stuebner
d490fadc70 rockchip: misc: don't fail if eth_addr already set
rockchip_setup_macaddr() runs from an initcall, so returning an error
code will make that initcall fail thus breaking the boot process.

And if an ethernet address is already set this is definitly not a
cause for that, so just return success in that case.

Fixes: 0482538499 ("rockchip: rk3399: derive ethaddr from cpuid");
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05 23:53:07 +08:00
Paul Kocialkowski
c541bfda2f rockchip: px30: Add support for using UART3 as debug UART
Some generic PX30 SoMs found in the wild use UART3 as their debug output
instead of UART2 (used for MMC) and UART5.

Make it possible to use UART3 as early debug output, with the associated
clock and pinmux configuration. Two sets of output pins are supported (M0/M1).

Future users should also note that the pinmux default in the dts is to use
the M1 pins while the Kconfig option takes M0 as a default.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
2019-12-05 23:53:07 +08:00
Paul Kocialkowski
ec4fafdf1f rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to CONFIG_DEBUG_UART_CHANNEL
UART3 also has two sets of pins that can be selected.

Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05 23:53:07 +08:00
Paul Kocialkowski
b0c5e37d0e rockchip: px30: Fixup PMUGRF registers layout order
According to the PX30 TRM, the iomux registers come first, before the pull
and strength control registers.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
2019-12-05 23:53:07 +08:00
Andy Yan
afe18f205e rockchip: px5: enable spl-fifo-mode for emmc for px5-evb
We need load some parts of ATF to sram, but rockchip
dwmmc controllers can't do dma to non-ddr addresses
space, so set the mmc controller into fifo mode in spl.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05 23:53:07 +08:00
Andy Yan
081a51c937 rockchip: rk3308: enable spl-fifo-mode for emmc
We need load some parts of ATF to sram, but rockchip
dwmmc controllers can't do dma to non-ddr addresses
space, so set the mmc controller into fifo mode in spl.

And show my best respect to Heiko's work for this solution.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-12-05 23:53:07 +08:00
Thomas Hebb
9f67b56772 Fix typo in macros, "FIRMEWARE" -> "FIRMWARE"
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
2019-12-05 10:28:39 -05:00
Miquel Raynal
eb446ef625 cmd: nand/sf: isolate legacy code
The 'sf' command is not supposed to rely on the MTD stack, but both
'sf' and 'nand' commands use helpers located in mtd_uboot.c. Despite
their location, these functions do not depend at all on the MTD
stack.

This file (drivers/mtd/mtd_uboot.c) is only compiled if CONFIG_MTD is
selected, which is inconsistent with the current situation. Solve this
by moving these three functions (which are only used by the above two
commands) out of mtd_uboot.c and put them in a C file only compiled
with cmd/sf.c and cmd/nand.c.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
[trini: Don't export get_part function now]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-12-04 17:10:51 -05:00
Miquel Raynal
88718be300 mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NAND
Add more clarity by changing the Kconfig entry name.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
[trini: Re-run migration, update a few more cases]
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2019-12-03 23:04:10 -05:00
mingming lee
abf2c68566 ARM: MediaTek: add basic support for MT8518 boards
This adds a general board file based on MT8518 SoCs from MediaTek.

Apart from the generic parts (cpu) we add some low level init codes
and initialize the early clocks.

This commit is adding the basic boot support for the MT8518 eMMC board.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
[trini: Migrate env location to defconfig, set ENV_IS_IN_MMC]
Signeed-off-by: Tom Rini <trini@konsulko.com>
2019-12-03 12:00:03 -05:00
mingming lee
485627dd5f pinctrl: add driver for MT8518
Add Pinctrl driver for MediaTek MT8518 SoC.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2019-12-03 08:44:14 -05:00
mingming lee
13e89d7522 ARM: MediaTek: Add support for MediaTek MT8518 SoC
Add support for MediaTek MT8518 SoC. This include the file
that will initialize the SoC after boot and its device tree.

Signed-off-by: mingming lee <mingming.lee@mediatek.com>
2019-12-03 08:44:14 -05:00
Bartosz Golaszewski
598d9bccc5 board: omapl138_lcdk: add the mmc device to SPL
We don't have full device-tree support in SPL yet - add an appropriate
U_BOOT_DEVICE() to the board file.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-12-03 08:44:14 -05:00
Bartosz Golaszewski
6a97153cbf mmc: davinci: drop support for ti,dm6441-mmc
The DM family of DaVinci SoCs is no longer supported. Drop the
irrelevant code from the driver.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
2019-12-03 08:44:13 -05:00
Giulio Benetti
1b3d24b735 armv7m: cache: add invalidate_icache_all() stub
This commit:
d409c96216
causes build failure with ICACHE enabled. This is due to missing
invalidate_icache_all() stub. Let's add empty invalidate_icache_all() in
the case where ICACHE is not enabled.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2019-12-03 08:43:24 -05:00
Thomas Hebb
32f2ca2a7e cosmetic: Fix spelling and whitespace errors
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
2019-12-03 08:43:23 -05:00
Simon Glass
5255932f01 common: Move some board functions out of common.h
A number of board function belong in init.h with the others. Move them.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:25:21 -05:00
Simon Glass
67c4e9f815 common: Move board_get_usable_ram_top() out of common.h
Move this function into init.h which seems to be designed for this sort
of thing. Also update the header to declare struct global_data so that it
can be included without global_data.h being needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:25:04 -05:00
Simon Glass
288b29e44d common: Move command functions out of common.h
Move these functions into the command.h header file which is a better fit.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:25:02 -05:00
Simon Glass
36bf446b64 common: Move enable/disable_interrupts out of common.h
Move these two functions into the irq_funcs.h header file. Also move
interrupt_handler_t as this is used by the irq_install_handler() function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:25:01 -05:00
Simon Glass
c30b7adbca common: Move interrupt functions into a new header
These functions do not use driver model but are fairly widely used in
U-Boot. But it is not clear that they will use driver model anytime soon,
so we don't want to label them as 'legacy'.

Move them to a new irq_func.h header file. Avoid the name 'irq.h' since it
is widely used in U-Boot already.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:25:00 -05:00
Simon Glass
9d3915b2df arm: powerpc: Tidy up code style for interrupt functions
Remove the unwanted space before the bracket.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:24:59 -05:00
Simon Glass
1eb69ae498 common: Move ARM cache operations out of common.h
These functions are CPU-related and do not use driver model. Move them to
cpu_func.h

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:24:58 -05:00
Simon Glass
9edefc2776 common: Move some cache and MMU functions out of common.h
These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.

Move them over.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:55 -05:00
Simon Glass
6cc915b5fb arm: powerpc: Tidy up code style for cache functions
Remove the unwanted space before the bracket.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:14 -05:00
Simon Glass
62270f4395 common: Move some SMP functions out of common.h
These functions belong in cpu_func.h so move them over.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:14 -05:00
Simon Glass
b5981474f1 common: Move some CPU functions out of common.h
These functions belong in cpu_func.h since they do not use driver model.
Move them over. Don't bother adding comments since these functions should
be deleted.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:13 -05:00
Simon Glass
68a6aa85ec common: Move mii_init() function out of common.h
This function belongs in mii.h so move it over.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:13 -05:00
Simon Glass
1045315df0 common: Move get_ticks() function out of common.h
This function belongs in time.h so move it over and add a comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:13 -05:00
Simon Glass
e3107d159c arm: pxa: Drop pxa_wait_ticks()
This function has a similar name to the common wait_ticks(). It is only
used in one place and seems small enough to drop.

Inline it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:11 -05:00
Simon Glass
6887c5bed9 common: Move some time functions out of common.h
These functions belong in time.h so move them over and add comments.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:11 -05:00
Simon Glass
b03e0510d7 common: Move serial functions out of common.h
These functions belong in serial.h so move them over.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:11 -05:00
Simon Glass
2189d5f1e8 Move strtomhz() to vsprintf.h
At present this function sits in its own file but it does not really
justify it. There are similar string functions in vsprintf.h, so move it
there. Also add the missing function comment.

Use the vsprintf.h include file explicitly where needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:09 -05:00
Simon Glass
3db7110857 crc32: Use the crc.h header for crc functions
Drop inclusion of crc.h in common.h and use the correct header directly
instead.

With this we can drop the conflicting definition in fw_env.h and rely on
the crc.h header, which is already included.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:08 -05:00
Simon Glass
62f9b65447 common: Move older CPU functions to their own header
These should be moved to driver model, but in the meantime, move them
out of the common header to help reduce its size.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02 18:23:06 -05:00
Tom Rini
dd38416d6b Merge git://git.denx.de/u-boot-socfpga
- Assorted Gen5 fixes
2019-11-28 07:34:41 -05:00
Tom Rini
089612da33 Merge tag 'mmc-11-27-2019' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- fsl_esdhc update and some cleanup in ls1021a/mpc83xx code
- mmc tmio sdhi update for hs400
2019-11-28 07:33:45 -05:00
Yangbo Lu
d3eb317ea5 arm: drop eSDHC clock getting in mxc_get_clock() for layerscape
Although layerscape platforms reuse mxc_get_clock() of i.MX platforms,
eSDHC clock getting do not have to use it. It uses global data
gd->arch.sdhc_clk directly in fsl_esdhc driver. Even there are more
than one eSDHC controllers on SoC, they use same reference clock.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-27 16:55:56 +08:00
Patrick Delaunay
4d7d0e2e78 ARM: dts: stm32: update eMMC configuration for stm32mp157c-ev1
Update the sdmmc2 node for eMMC support on eval board stm32mp157c-ev1.
- update slew-rate for pin configuration
- update "vqmmc-supply"
- remove "st,sig-dir"
- add mandatory "pinctrl-names"
- add "mmc-ddr-3_3v"

This patch solve the eMMC detection issue for command "mmc dev 1".

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-11-26 10:11:48 +01:00
Patrick Delaunay
62d620c243 ARM: dts: stm32: DT alignment with kernel v5.4-rc4
Device tree and binding alignment with kernel v5.4-rc4

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-11-26 10:11:48 +01:00
Patrick Delaunay
e07a86b5e3 ARM: dts: stm32: DT alignment with kernel v5.3
Device tree and binding alignment with kernel v5.3
and converted to SPDX.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2019-11-26 10:11:48 +01:00
Tom Rini
4b19b89ca4 - add RPi4 upstream compatible to pinctrl
- fix boot banner on RPi3/4
 - add support for one binary on RPi3/4
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl3a8R4SHG1icnVnZ2Vy
 QHN1c2UuY29tAAoJEC9tfk32wqh+AfQP/iO4qiJWUsY1WgChKl0wZNnkJKViNu6v
 F7zczCIUyI7krdVb3E3PB/ZJwXY/ay1rQeY91cU/9f0Z3yOlsoiwnEfOT/HwwkmD
 KnS6nhisqL0W1yd8sK8XaLOydIFfe05Do1UvF1JhOl3061R81fdruXygkHlgFXiK
 /hrEXLb9l0Zf4XMSD9hQJZiC/K3qeUZV1KsEdSGArjjTj3kivvS++Z0XD1YZsBVs
 rsEl3ZhPeUmzAxmg26IfyJan02NjWY+MyuoSd8QW5kVGsF4WOgvDuBOY1YJ08C/7
 NhLGkub/XhqHVSaMDwiSoX9d2z7ZqTaw7+IZW38+fCMUFAEHiErqMDq+Zfk1DKCd
 WynOzMj6k+Kli+amHQMHuUqIY54XPwpXdn671C7XbQ8xWh7HhWH/sEHP7ekrSV74
 Et7dy5fcleCcrr8EDhdC5iO2fLKhswq4iT0PbnFMtha4jhPqFVHVaAZDacucJ1/V
 JpfYRkLrmEbva3G1emve80tzlDNDxjraX8G6/6trN+F0xjorcbImp64RtRjgdL62
 DwIuba15BGR18LQJY/yHSHT4h3ReEG5qF9vxX+r6vMiFACZbnBPAP/b/REDQ6LWs
 dwW01JQ343dmZiegBQOe98fRDMGhmTd52mAJ/8p60X+byIh5I4XFKCdEdUpSVBpK
 ARrdtg9vtLxv
 =4Z+A
 -----END PGP SIGNATURE-----

Merge tag 'rpi-next-2020.01' of https://github.com/mbgg/u-boot

- add RPi4 upstream compatible to pinctrl
- fix boot banner on RPi3/4
- add support for one binary on RPi3/4
2019-11-25 12:56:27 -05:00
Marek Vasut
a1a9843a29 ARM: socfpga: Unreset NAND in SPL on Gen5
In case the SPL on Gen5 loads U-Boot from NAND, unreset the NAND IP
explicitly in the platform code as the denali-spl driver is not aware
of DM at all.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-11-25 13:12:56 +01:00
Marek Vasut
2007a730ee ARM: socfpga: Add ArriaV ST/SX ID
Add new FPGA ID for ArriaV ST/D3 or SX/B3 .

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-11-25 13:12:56 +01:00
Marek Vasut
97a72bc286 ARM: socfpga: Purge pending transactions upon enabling bridges on Gen5
On Gen5, when the FPGA is loaded and there was some prior interaction
between the HPS and the FPGA via bridges (e.g. Linux was running and
using some of the IPs in the FPGA) followed by warm reset, it has been
observed that there might be outstanding unfinished transactions. This
leads to an obscure misbehavior of the bridge.

When the bridge is enabled again in U-Boot and there are outstanding
transactions, a read from within the bridge address range would return
a result of the previous read instead. Example:
=> bridge enable ; md 0xff200000 1
ff200000: 1234abcd
=> bridge enable ; md 0xff200010 1
ff200010: 5678dcba <------- this is in fact a value which is stored in
                            a memory at 0xff200000
=> bridge enable ; md 0xff200000 1
ff200000: 90effe09 <------- this is in fact a value which is stored in
                            a memory at 0xff200010
and so it continues. Issuing a write does lock the system up completely.

This patch opens the FPGA bridges in 'bridge enable' command, the tears
them down again, and then opens them again. This allows these outstanding
transactions to complete and makes this misbehavior go away.

However, it is not entirely clear whether this is the correct solution.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-11-25 13:12:56 +01:00
Marek Vasut
446cf811c5 ARM: socfpga: Actually put bridges into reset on Gen5 in bridge disable
On Gen5, the 'bridge disable' command write 0x0 to brgmodrst register,
which releases all bridges from reset, instead of putting all bridges
into reset. Fix this by inverting the mask and actually putting the
bridges into reset.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-25 13:12:55 +01:00
Matthias Brugger
5694090670 ARM: defconfig: add unified config for RPi3 and RPi4
Provide a defconfig which allows us to boot Raspberrry Pi 4
and Raspberry Pi 3 Model B/B+
Instead of using the embedded DTB as done in RPi3 we use the
devicetree provided by the firmware.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-24 10:46:28 +01:00
Matthias Brugger
917a1e9a78 ARM: bcm283x: Set memory map at run-time
For bcm283x based on arm64 we also have to change the mm_region.
Add assign this in mach_cpu_init() so we can create now one binary
for RPi3 and RPi4.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-24 10:46:28 +01:00
Matthias Brugger
dd47ca7873 ARM: bcm283x: Set rpi_bcm283x_base at run-time
As part of the effort to create one binary for several bcm83x SoCs
we read the IO base address from device-tree.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
2019-11-24 10:46:27 +01:00