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arm: agilex: Add clock handoff offset for Agilex
Add clock handoff offset for Agilex. Remove S10 prefix to avoid confusion. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
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2 changed files with 10 additions and 4 deletions
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@ -26,8 +26,13 @@
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#define S10_HANDOFF_OFFSET_LENGTH 0x4
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#define S10_HANDOFF_OFFSET_DATA 0x10
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#define S10_HANDOFF_CLOCK_OSC (S10_HANDOFF_BASE + 0x608)
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#define S10_HANDOFF_CLOCK_FPGA (S10_HANDOFF_BASE + 0x60C)
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#ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
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#define HANDOFF_CLOCK_OSC (S10_HANDOFF_BASE + 0x608)
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#define HANDOFF_CLOCK_FPGA (S10_HANDOFF_BASE + 0x60C)
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#else
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#define HANDOFF_CLOCK_OSC (S10_HANDOFF_BASE + 0x5fc)
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#define HANDOFF_CLOCK_FPGA (S10_HANDOFF_BASE + 0x600)
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#endif
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#define S10_HANDOFF_SIZE 4096
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@ -33,7 +33,8 @@ const struct cm_config * const cm_get_default_config(void)
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const unsigned int cm_get_osc_clk_hz(void)
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{
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#ifdef CONFIG_SPL_BUILD
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u32 clock = readl(S10_HANDOFF_CLOCK_OSC);
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u32 clock = readl(HANDOFF_CLOCK_OSC);
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writel(clock,
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socfpga_get_sysmgr_addr() + SYSMGR_SOC64_BOOT_SCRATCH_COLD1);
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@ -50,7 +51,7 @@ const unsigned int cm_get_intosc_clk_hz(void)
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const unsigned int cm_get_fpga_clk_hz(void)
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{
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#ifdef CONFIG_SPL_BUILD
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u32 clock = readl(S10_HANDOFF_CLOCK_FPGA);
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u32 clock = readl(HANDOFF_CLOCK_FPGA);
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writel(clock,
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socfpga_get_sysmgr_addr() + SYSMGR_SOC64_BOOT_SCRATCH_COLD2);
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