arm: agilex: Add clock handoff offset for Agilex

Add clock handoff offset for Agilex. Remove S10 prefix to avoid confusion.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
This commit is contained in:
Ley Foon Tan 2019-11-27 15:55:25 +08:00 committed by Marek Vasut
parent fec7ddc190
commit a6e5b06bea
2 changed files with 10 additions and 4 deletions

View file

@ -26,8 +26,13 @@
#define S10_HANDOFF_OFFSET_LENGTH 0x4
#define S10_HANDOFF_OFFSET_DATA 0x10
#define S10_HANDOFF_CLOCK_OSC (S10_HANDOFF_BASE + 0x608)
#define S10_HANDOFF_CLOCK_FPGA (S10_HANDOFF_BASE + 0x60C)
#ifdef CONFIG_TARGET_SOCFPGA_STRATIX10
#define HANDOFF_CLOCK_OSC (S10_HANDOFF_BASE + 0x608)
#define HANDOFF_CLOCK_FPGA (S10_HANDOFF_BASE + 0x60C)
#else
#define HANDOFF_CLOCK_OSC (S10_HANDOFF_BASE + 0x5fc)
#define HANDOFF_CLOCK_FPGA (S10_HANDOFF_BASE + 0x600)
#endif
#define S10_HANDOFF_SIZE 4096

View file

@ -33,7 +33,8 @@ const struct cm_config * const cm_get_default_config(void)
const unsigned int cm_get_osc_clk_hz(void)
{
#ifdef CONFIG_SPL_BUILD
u32 clock = readl(S10_HANDOFF_CLOCK_OSC);
u32 clock = readl(HANDOFF_CLOCK_OSC);
writel(clock,
socfpga_get_sysmgr_addr() + SYSMGR_SOC64_BOOT_SCRATCH_COLD1);
@ -50,7 +51,7 @@ const unsigned int cm_get_intosc_clk_hz(void)
const unsigned int cm_get_fpga_clk_hz(void)
{
#ifdef CONFIG_SPL_BUILD
u32 clock = readl(S10_HANDOFF_CLOCK_FPGA);
u32 clock = readl(HANDOFF_CLOCK_FPGA);
writel(clock,
socfpga_get_sysmgr_addr() + SYSMGR_SOC64_BOOT_SCRATCH_COLD2);