Use net device priv to pass usb ether priv and use it in
net device ops callback.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Consolidate the net device, usb eth device and gadget device
struct to single struct and a single global variable so that the
same can be passed as priv of ethernet driver.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Convert usb ether gadget to adopt usb driver model
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
network_started of struct eth_dev can be accessed using local
variable dev and no reason to access it with the global struct.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Current get_desc() implementation is not able to succesfully
finish and return pointer to block device descriptor.
Also function always return non zero value even device is found.
The patch fills block device descriptor and return 0 if device is found.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When CONFIG_SPL_STACK_R is enabled, and spl_init() is called before
board_init_r(), spl_relocate_stack_gd() will move global_data to a new
place in memory. This affects driver model since it uses a list for the
uclasses. Unless this is updated the list will become invalid. When
looking for a non-existent uclass, such as when adding a new one, the loop
in uclass_find() may continue forever, thus causing a hang.
Add a function to correct this rather obscure bug.
Signed-off-by: Simon Glass <sjg@chromium.org>
For ease of use and accounting a condition that on SH4
pci_phys_to_bus() and pci_bus_to_phys() are one in one mappings due to
unimplemented __iomem() conversion, this change fixes access to SDRAM
memory by PCI devices.
This change also generalizes PCI system memory configuration, which is
taken from board specific defines rather than hardcoded in the PCI
host driver.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The change actually maps PCI I/O window to the same address on PCI bus
as it is stated by a comment, before the change transfers to the PCI I/O
space are failed due to misconfiguration of the most significant 14 bits
of the PCI address in PCIIOBR (note that it is set to 0x0).
Most probably the problem remained unnoticed, because communcation
to all tested PCI devices is done over PCI memory space only.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
The Atmel AT97SC3204 is also TIS compliant.
Modify the tpm_tis_lpc driver to check for the vid/did used by the
Atmel AT97SC3204 and report an appropriate description.
Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It is confusing that mdio commands work and report phy id as
decimal value when mii is working with hex values.
For example:
ZynqMP> mdio list
gem:
21 - TI DP83867 <--> ethernet@ff0e0000
ZynqMP> mdio read ethernet@ff0e0000 0
Reading from bus gem
PHY at address 21:
0 - 0x1140
ZynqMP> mii dump 21 0
Incorrect PHY address. Range should be 0-31
...
ZynqMP> mii dump 15
0. (1140) -- PHY control register --
(8000:0000) 0.15 = 0 reset
U-Boot normally takes hex values that's why this patch is changing mdio
command to handle hex instead of changing mii command to handle decimal
values.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Add new configuration option CONFIG_MMC_TINY which strips away all
memory allocation within the MMC code and code for handling multiple
cards. This allows extremely space-constrained SPL code use the MMC
framework.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
If debug() is not used, then the whole content of debug(...) will
be removed by the preprocessor, which will result in the following
warning. This patch adds __maybe_unused annotation to fix this.
drivers/mmc/mmc.c: In function ‘mmc_init’:
drivers/mmc/mmc.c:1685:11: warning: variable ‘start’ set but not used [-Wunused-but-set-variable]
unsigned start;
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Add new command that provides possibility to enable the
background operations handshake functionality
(BKOPS_EN, EXT_CSD byte [163]) on eMMC devices.
This is an optional feature of eMMCs, the setting is write-once.
The command must be explicitly taken into use with
CONFIG_CMD_BKOPS_ENABLE.
Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
At sdhci_get_config(), there was wrong condition to check pimux
id, so this patch fixes to check proper pinmux id.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com>
This patch increases supported PWMs from previously PWM4 now up to PWM8
if i.MX6SX is in use.
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
To enable working efifb support, let's map the frame buffer as 32bpp
instead of 16bpp.
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Add support to detect RGMII link interface from link-interface
device tree entry. Also rename the existing link type enums so
that it provides meaningful interface like SGMII.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reported-by: Sekhar Nori <nsekhar@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
For the Raspberry Pi 3 it needs to be possible to disable the serial
device after initialization happens, as only after the GPIO device is available
it is known whether the mini uart is usable.
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
To be able to represent the skip-init platdata element with OF_CONTROL,
it needs to be read from the device tree as well and put into the platform data.
Cc: Eric Anholt <eric@anholt.net>
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds device tree support for the bcm283x mini-uart driver.
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds device tree support for the bcm2835 GPIO driver.
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Introduce USB Gadget config option. This allows to combine Makefile
entries for SPL_USBETH_SUPPORT and SPL_DFU_SUPPORT.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Ravi Babu <ravibabu@ti.com>
The DFU Kconfig menu entries should be part of the SPL
Kconfig file. Also avoid using the top level Makefile by
moving the config dependent build artifacts to the driver/
and driver/usb/gadget/ Makfiles.
With that, DFU can be built again in SPL if
CONFIG_SPL_DFU_SUPPORT is enabled.
Fixes: 6ad6102246 ("usb:gadget: Disallow DFU in SPL for now")
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
This patch fixes the warning about misaligned cache on Armada XP:
CACHE: Misaligned operation at range [7ffff000, 7fffffac]
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
To send a parametrized command to the PHY over MDIO, we should write
the data first, the trigger the execution by the command register
write. Fix the access pattern in our MDIO write routine.
Apparently this doesn't really matter with the Realtek PHY on the
Pine64, but other PHYs (which require more setup) will choke on
the wrong order.
[Andre: add commit message]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Add the description of the Toshiba TC58NVG2S0H SLC nand to the nand_ids
table so we can use the NAND ECC infos and the ONFI timings.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
It makes not sense using u8 to hold a value on a 32-bit or 64-bit machine.
It can only bloat the code by forcing the compiler to mask the value.
Change it to uint.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add basic support for setting the ARM clock, since this allows us to run
at maximum speed in U-Boot. Currently only a single speed is supported
(1.8GHz).
Signed-off-by: Simon Glass <sjg@chromium.org>
Check whether a display device is in use before using it. Add a comment as
to why two displays cannot currently be used at the same time.
This allows us to remove the device-tree change that disables vopb on
jerry.
Signed-off-by: Simon Glass <sjg@chromium.org>
Mark a display as in use when display_enable() is called. This can avoid
a display being used by multiple video-output devices.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes the frame buffer is not a multiple of the cache line size.
Adjust the cache-flushing code to avoid cache warnings/errors in this
case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some boards may want to use these subsystems with of-platdata in SPL. Add
support for this by avoiding any device tree access in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code incorrectly uses the oscillator. It should use the clock
selected in the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 135aa95 (clk: convert API to match reset/mailbox style)
This code currently always selects the second source. It only worked
because both sources are set up.
With the change to only init video devices that are present in the stdout
environment variable, this fails. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Currently the specific set ops functions are directly
called without any check for min/max current limits for a regulator.
Check for them and proceed.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Fixed checking of current limits:
Signed-off-by: Simon Glass <sjg@chromium.org>
Currently the specific set ops functions are directly
called without any check for voltage limits for a regulator.
Check for them and proceed.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fixed checking of voltate limits:
Signed-off-by: Simon Glass <sjg@chromium.org>
In case we want to force a particular value on a regulator
irrespective of the min/max constraints for testing purposes
one can call regulator_set_value_force function.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
P1017 is a single-core version of P1023. There is no P1017 target
configured. Drop related macros. P1017 SoC is still supported.
Signed-off-by: York Sun <york.sun@nxp.com>
P1012 is a single-core version of P1021. There is no P1012 target
configured. Drop related macros. P1012 SoC is still supported.
Signed-off-by: York Sun <york.sun@nxp.com>
Migrate the PXA serial driver to be configured via Kconfig.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Marek Vasut <marex@denx.de>
This commit adds support for the Macronix MX66U51235F,
MX66L1G45G and Micron MT25QU02G, MT25QL02G flash parts.
Signed-off-by: Radu Bacrau <dumitru.bacrau@intel.com>
Cc: Chin Liang See <clsee@altera.com>
Cc: Radu Bacrau <radu.bacrau@gmail.com>
[Update proper commit header and 80-line cut on body]
Reviewed-by: Jagan Teki <jagan@openedev.com>
The IP supports two ports, A and B, each providing up to 32 gpios.
The driver already creates a 2nd gpio bank by reading the 2nd node
from DT, so this is quite a simple change to support the 2nd bank.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
It's not always true that LPUART clock is CONFIG_SYS_CLK_FREQ. This
patch provides a weak function get_lpuart_clk(), so that the clock
can be ovreridden on a specific board which uses different clock
for LPUART.
Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com>
[YS: Reformat commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Somehow an int returning function without a return statement sneaked
in, fix it.
Also fix some whitespace damage on the way.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
s25fs512s and s25fl512s_256k have common id information
till 5 bytes and 6th byte have different family id
like FS and FL-S as 0x81 and 0x80.
Reported-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
- fix single line comments
- remove unneeded spaces
- ascending order of include files
- rename SPI DATAFLASH to dataflash
- rename SPI DataFlash to dataflash
- return NULL replaced with error code
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
This patch fixed the add_dataflash return logic,
so-that it can handle both jedec and older chips
same as Linux.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Flash id detection should be the first step to enumerate
the connected flash on the board, once ie done checking
with respective id codes locally in the driver all this
should be part of jedec_probe instead of id detection and
validated through flash_info{} table separatly.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
dataflash doesn't require options, memory_map from spi.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Dual flash code in spi are usually take the spi controller
to work with dual connected flash devices. Usually these
dual connection operation's are referred to flash controller
protocol rather with spi controller protocol, these are still
present in flash side for the usage of spi-nor controllers.
So, this patch remove the dual_flash options or flags in sf
which are triggered from spi controller side.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
spi_flash_write_bar-> write_bar
spi_flash_write_bar -> read_bar
spi_flash_cmd_wait_ready -> spi_flash_wait_till_ready
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Use small 'd' in s25s512s ext_jedec
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
For readability use small letter's with flash name.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Now the flash params table as renamed to spi_flash_ids structure,
so rename the sf_params.c to spi_flash_ids.c and remove the legacy.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Remove unneeded/non-meaningful commit message on
params and flash.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
In spansion S25FS-S family the physical sectors are grouped as
normal and parameter sectors. Parameter sectors are 4kB in size
with 8 set located at the bottom or top address of a device.
Normal sectors are similar to other flash family with sizes of
64kB or 32 kB.
To erase whole flash using sector erase(D8h or DCh) won't effect
the parameter sectors, so in order to erase these we must use 4K
sector erase commands (20h or 21h) separately.
So better to erase the whole flash using 4K sector erase instead
of detecting these family parts again and do two different erase
operations.
For this:
- Removed spansion_s25fss_disable_4KB_erase code
- Add SECT_4K for S25FS512S chip
Cc: Yunhui Cui <yunhui.cui@nxp.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Add Spansion S25FS256S_64K spi flash to the list of spi_flash_ids.
In spansion S25FS-S family the physical sectors are grouped as
normal and parameter sectors. Parameter sectors are 4kB in size
with 8 set located at the bottom or top address of a device.
Normal sectors are similar to other flash family with sizes of
64kB or 32 kB.
To erase whole flash using sector erase(D8h or DCh) won't effect
the parameter sectors, so in order to erase these we must use 4K
sector erase commands (20h or 21h) separately.
So better to erase the whole flash using 4K sector erase instead
of detecting these family parts again and do two different erase
operations.
Cc: Yunhui Cui <yunhui.cui@nxp.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
INFO6 is for tabulating 6 byte flash parts, Ex: S25FS256S_64K
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
So, now SPI_FLASH_ID_MAX_LEN is 6 bytes useful for
few spansion flash families S25FS-S
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Add id length of 5 bytes numerical value to macro.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Rename nr_sectors as n_sectors to sync with Linux.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
- Proper tabs spaces
- Removed unnecessary
- Add comments in spi_flash_info members
- Add comments for spi_flash_info.flags
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Instead of extracting id's separately better
to use JEDEC_MFR|ID for code simplicity.
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Simplify the flash_lock ops detection code and added
meaningful comment.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
INFO macro make flash table entries more adjustable like
adding new flash_info attributes, update ID length bytes
and so on and more over it will sync to Linux way of defining
flash_info attributes.
- Add JEDEC_ID
- Add JEDEC_EXT macro
- Add JEDEC_MFR
- spi_flash_params => spi_flash_info
- params => info
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jagan Teki <jagan@openedev.com>
Set the appropriate bits in the interface config register based
on the SPI_ mode flags.
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Highlights this time around:
- x86 efi_loader support
- hello world efi test case
- network device name is now representative
- terminal output reports modes correctly
- fix psci reset for ls1043/ls1046
- fix efi_add_runtime_mmio definition for x86
- efi_loader support for ls2080
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Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2016-11-17
Highlights this time around:
- x86 efi_loader support
- hello world efi test case
- network device name is now representative
- terminal output reports modes correctly
- fix psci reset for ls1043/ls1046
- fix efi_add_runtime_mmio definition for x86
- efi_loader support for ls2080
On ls2080 we have a separate network fabric component which we need to
shut down before we enter Linux (or any other OS). Along with that also
comes configuration of the fabric using a description file.
Today we always stop and configure the fabric in the boot script and
(again) exit it on device tree generation. This works ok for the normal
booti case, but with bootefi the payload we're running may still want to
access the network.
So let's add a new fsl_mc command that defers configuration and stopping
the hardware to when we actually exit U-Boot, so that we can still use
the fabric from an EFI payload.
For existing boot scripts, nothing should change with this patch.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: York Sun <york.sun@nxp.com>
[agraf: Fix x86 build]
The sun8i SoCs also have a 8 bits capable MMC2 controller. Enable the
support for those too.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Some eMMC will fail at the first switch, but would succeed in a subsequent
one.
Make sure we try several times to cover those cases. The number of retries
(and the behaviour) is currently what is being used in Linux.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Correct the SGMII enable bit position to 27 instead
of 31.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Modify the nwcfg bit definitions to have 32-bit
by removing the extra nibble.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Clear ecc ON bit while sending read command as all types
of read command(like reading spare) doesnt need ECC to be
enabled. It has been anyway taken care in other places
whereever required using arasan_nand_enable_ecc().
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Compiling the 'bmp' command with DM and having one of the following macros
enabled:
CONFIG_BMP_16BPP, CONFIG_BMP_24BPP ONFIG_BMP_32BPP
generates this error:
drivers/video/video_bmp.c: In function ‘video_bmp_display’:
drivers/video/video_bmp.c:315:22: error: ‘lcd_line_length’ undeclared (first use in this function)
fb -= width * 2 + lcd_line_length;
^
This patch moves to using the correct variable instead and enables the
'bmp' command for DM again.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Anatolij Gustschin <agust@denx.de>
Fix the divider calculation logic to choose a value so that the
resulting baudrate is either equal to or closest possible baudrate less
than the requested value. While at that, cleanup ti_spi_set_speed().
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Commit 5a49f17481 ("net: mii: Use spatch to update miiphy_register")
updated the mvgbe implementation of smi_reg_read/smi_reg_write. Prior to
that change mvgbe_phy_read and mvgbe_phy_write where used as wrappers to
satisfy the phylib APIs. Because these functions weren't updated in that
commit build errors where triggered when CONFIG_PHYLIB was enabled.
Fix these build errors by removing mvgbe_phy_read and mvgbe_phy_write
and using smi_reg_read/smi_reg_write directly.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Like [1], reset the FLP burst timing for the KSZ9031 to the 16ms
specified by the IEEE802.3 standard from the chip's default of 8ms.
For more details, see the "Auto-Negotiation Timing" section of the
KSZ9031RNX datasheet.
[1] https://patchwork.kernel.org/patch/6558371/
Signed-off-by: Ash Charles <ash.charles@savoirfairelinux.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This driver supports the Synopsys Designware Ethernet QoS (Quality of
Service) a/k/a eqos IP block, which is a different design than the HW
supported by the existing designware.c driver. The IP supports many
options for bus type, clocking/reset structure, and feature list. This
driver currently supports the specific configuration used in NVIDIA's
Tegra186 chip, but should be extensible to other combinations quite
easily, as explained in the source.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org> # V1
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cover-Letter: Fixes several spelling errors for the words "resetting",
"extended", "occur", and "multiple".
Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This function is called from outside the driver. It should be placed into
common SoC code. Move it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This function is called from outside the driver. It should be placed into
common SoC code. Move it.
Also rename the driver symbol to be more consistent with the other rockchip
clock drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This function is called from outside the driver. It should be placed into
common SoC code. Move it.
Also rename the driver symbol to be more consistent with the other rockchip
clock drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Mostly by adding MACH_SUN50I to some existing #ifdefs enable support
for the the HCI0 USB host controller on the A64.
Fix up some minor 64-bit hiccups on the way.
Add the bare minimum DT bits to the A64 .dtsi and enable the controllers
and the PHY on the Pine64.
This is limited to the first USB controller at the moment, which is
connected to the lower USB socket on the Pine64 board.
[Andre: remove unneeded defines, enable OHCI, add commit message]
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
CONFIG_SUNXI -> CONFIG_ARCH_SUNXI
and removed CONFIG_SUNIX from config_whitelist.txt
Cc: Simon Glass <sjg@chromium.org>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
OHCI has a known limitation of allowing only 32-bit DMA buffer
addresses, so we have a lot of u32 variables around, which are assigned
to pointers and vice versa. This obviously creates issues with 64-bit
systems, so the compiler complains here and there.
To allow compilation for 64-bit boards which use only memory below 4GB
anyway (and to avoid more invasive fixes), adjust some casts and types
and assume that the EDs and TDs are all located in the lower 4GB.
This fixes compilation of the OHCI driver for the Pine64.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Add driver model support while retaining the existing legacy code.
This allows the driver to support boards that have converted to
driver model as well as those that have not.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Add support to enable an early debug UART for debugging.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Add ATMEL_USART option to support to enable the Atmel usart driver
from Kconfig.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Due to the peripheral and generated clock driver improvement,
remove the unnecessary clock calling.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Due to the peripheral clock driver improvement, remove the
unnecessary clock calling.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Change the error return value -ENODEV from to -EINVAL for more
reasonable.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Due to the peripheral clock driver improvement, remove the
unnecessary clock calling.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Due to the peripheral clock driver improvement, remove the
unnecessary clock calling.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
For the peripheral clock, provide the clock ops for the clock
provider, such as spi0_clk. The .of_xlate is to get the clk->id,
the .enable is to enable the spi0 peripheral clock, the .get_rate
is to get the clock frequency.
The driver for periph32ck node is responsible for recursively
binding its children as clk devices, not provide the clock ops.
So do the generated clock and system clock.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
In order to make clk->dev available in ops->of_xlate() to get the
clock ID from the 'reg' property of the clock node, assign the
clk->dev before calling ops->of_xlate().
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
The at91-pmc and at91-sckc aren't the clock providers, change their
class ID from UCLASS_CLK to UCLASS_SIMPLE_BUS, they also don't
need to bind the child nodes explicitly, the .post_bind callback
of simple_bus uclass will do it for them.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Introduce CONFIG_PCI_PNP in Kconfig and move over boards' defconfig
to use that.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Re-generate configs and include/configs/ changes]
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that CONFIG_BLK and CONFIG_MMC_OPS are enabled by default with
CONFIG_DM_MMC, the DWMMC driver on the socfpga platform fails at
runtime.
This adds the missing fields in the driver declaration.
Signed-off-by: Sylvain Lesne <lesne@alse-fr.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
If vmmc didn't supply, we didn't know which card didn't supply vmmc.
And changed from "put" to "debug".
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Now that CONFIG_BLK and CONFIG_MMC_OPS are enabled by default with
CONFIG_DM_MMC, the DWMMC driver on the socfpga platform fails at
runtime.
This adds the missing fields in the driver declaration.
Signed-off-by: Sylvain Lesne <lesne@alse-fr.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This pathc is fixed the below thing.
If misaligned the cache range, Just flush to CACHLINE_SIZE.
"CACHE: Misaligned operation at range [7ae55b00, 7ae55b08]"
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
In device tree, there is vmmc-supply property for SD/MMC.
Introduce mmc_power_init function to handle vmmc-supply.
mmc_power_init will first invoke board_mmc_power_init to
avoid break boards which already implement board_mmc_power_init.
If DM_MMC and DM_REGULATOR is defined, the regulator
will be enabled to power up the device.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
