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sun8i_emac: Fix mdio read sequence

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To send a parametrized command to the PHY over MDIO, we should write
the data first, the trigger the execution by the command register
write. Fix the access pattern in our MDIO write routine.
Apparently this doesn't really matter with the Realtek PHY on the
Pine64, but other PHYs (which require more setup) will choke on
the wrong order.
[Andre: add commit message]

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jagan Teki <jagan@openedev.com>
This commit is contained in:
Philipp Tomsich 2016-11-16 01:40:27 +00:00 • committed by Tom Rini
parent 5782954c2b
commit 1deeecb6e4
1 changed files with 1 additions and 1 deletions
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2
drivers/net/sun8i_emac.c
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@ -180,8 +180,8 @@ static int sun8i_mdio_write(struct mii_dev *bus, int addr, int devad, int reg,
miiaddr |= MDIO_CMD_MII_WRITE;
miiaddr |= MDIO_CMD_MII_BUSY;
writel(miiaddr, priv->mac_reg + EMAC_MII_CMD);
writel(val, priv->mac_reg + EMAC_MII_DATA);
writel(miiaddr, priv->mac_reg + EMAC_MII_CMD);
start = get_timer(0);
while (get_timer(start) < timeout) {