Commit graph

4475 commits

Author SHA1 Message Date
Masahiro Yamada
4e0c8abcdd kbuild: use shorten logs for IMX images
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-02-25 11:01:29 -05:00
Masahiro Yamada
04a34c96b1 kbuild: use shorten logs for misc targets
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-02-25 11:01:29 -05:00
Masahiro Yamada
ad0fed46b9 kbuild: use shorten log for linking u-boot
Move sandbox-specific link rule to arch/sandbox/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-02-25 11:01:29 -05:00
Masahiro Yamada
9bf215b035 kbuild: use shorten logs for mkimage rules
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-02-25 11:01:29 -05:00
Masahiro Yamada
95ddcd68ab kbuild: rename OBJCFLAGS to OBJCOPYFLAGS
Rename OBJCFLAGS to OBJCOPYFLAGS beforehand to use
"cmd_objcopy" in scripts/Makefile.lib in an upcoming commit.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-02-25 11:01:28 -05:00
Shengzhou Liu
35c471e509 powerpc/t208x: some update to support t2081
- fix serdes definition for t2081.
- fix clock speed for t2081.
- update ids, as CONFIG_FSL_SATA_V2 is needed only for t2080,
  T2081 has no SATA.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-02-24 15:22:36 -08:00
Masahiro Yamada
f55e911ff4 arm: delete unused macro CONFIG_ARCH_DEVICE_TREE
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Rajeshwari Birje <rajeshwari.s@samsung.com>
Cc: Inderpal Singh <inderpal.singh@linaro.org>
2014-02-24 10:56:33 -05:00
Albert ARIBAUD
fae56934a0 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2014-02-24 10:29:59 +01:00
Darwin Rambo
989ce04999 arch: bcm281xx: Initial commit of bcm281xx architecture code
Add bcm281xx architecture support code including a clock framework and
chip reset.  Define register block base addresses for the bcm281xx
architecture and create an empty gpio header file required when
CONFIG_CMD_GPIO is set.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Steve Rae <srae@broadcom.com>
Reviewed-by: Tim Kryger <tkryger@linaro.org>
2014-02-22 19:30:24 +01:00
Darwin Rambo
b3134fce89 arch: kona: Initial commit of kona-common architecture code
The Kona architecture is present on a number of Broadcom mobile SoCs
including the bcm281xx family of chips.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Steve Rae <srae@broadcom.com>
Reviewed-by: Tim Kryger <tkryger@linaro.org>
2014-02-22 19:30:18 +01:00
Måns Rullgård
11f2968706 ti814x: Fix illegal use of FP ops in clock_ti814x.c
The function pll_sigma_delta_val uses "float" data which is not correct.
The exact "why" of this mangling is lost to history, but this changes us
to equivalent non-FP math to get the same results.

Reported-by: Wolfgang Denk <wd@denx.de>
Acked-by: Matt Porter <mporter@linaro.org>
2014-02-21 14:03:44 -05:00
Nishanth Menon
82da4410f8 DRA7: fix ABB efuse offset for OPP_NOM
commit 194dd74ad9
(DRA7: add ABB setup for MPU voltage domain)

Made an offset typo error by using 0x4A003B24 as the efuse offset
for OPP_NOM. As per TI documentation, 0x4A003B24 is for OPP_OD, and
0x4A003B20 is for OPP_NOM. Fix the same.

Reported-by: Praveen Rao <prao@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2014-02-21 13:55:41 -05:00
Janne Grunau
6e2192a3d8 ARM: OMAP4: fix DDR timings for OMAP4430 ES2.0
DDR timings were broken since 47abc3df70
for PandaBoard EA1.

Signed-off-by: Janne Grunau <j@jannau.net>
2014-02-21 13:55:41 -05:00
Dave Gerlach
cd8341b7eb ARM: AM43xx: GP-EVM: Correct GPIO used for VTT regulator control
Schematic indicates GPIO5_7 is to be used for VTT regulator control
rather than GPIO0_21 so modify enable_vtt_regulator to reflect this.
Without this some boards will experience DDR3 corruption and fail to
boot.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[trini: Rework patch against mainline]
Signed-off-by: Tom Rini <trini@ti.com>
2014-02-21 13:55:40 -05:00
Hannes Petermaier
072cefe07d Add support for B&R KWB Motherboard
Adds support for Bernecker & Rainer Industrieelektronik GmbH KWB
Motherboard, using TI's AM3352 SoC.

Most of code is derived from TI's AM335x_EVM

Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
Cc: trini@ti.com
2014-02-21 13:55:40 -05:00
Lothar Felten
da4105dfcd am335x: Initial support for Silica Pengwyn board
This patch add support for the Silica Pengwyn board [1]
The board is based on a TI AM3354 CPU [2]
All jumpers removed it will boot from the SDcard, the console is on
UART1 accessible via the FDTI -> USB. The on board NAND flash is
supported and can act as boot medium, depending on jumper settings.
USB Host, USB Device and Ethernet are also provided but untested.

[1]
http://www.silica.com/product/silica-pengwyn-board.html
[2]
http://www.ti.com/product/am3354

Signed-off-by: Lothar Felten <lothar.felten@gmail.com>
[trini: Move CONFIG_BOARD_LATE_INIT into am335x_evm.h, drop unused
spi0_pin_mux from Pengwyn support]
Signed-off-by: Tom Rini <trini@ti.com>
2014-02-21 13:54:57 -05:00
York Sun
e38661634b common: Add get_effective_memsize() to memsize.c
This function has been around for powerpc. It is used for systems with
memory more than CONFIG_MAX_MEM_MAPPED. In case of non-contiguous memory,
this feature can limit U-boot to one block without going over the limit.

Signed-off-by: York Sun <yorksun@freescale.com>
Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
2014-02-21 11:06:13 -05:00
Tom Rini
4c89a369c7 Merge branch 'master' of git://git.denx.de/u-boot-spi 2014-02-21 08:00:22 -05:00
Alexey Brodkin
36ae5cd2a8 arc: fix relocation for big-endian target
In case of little-endian ARC700 instructions (which may include target
address) are encoded as middle-endian. That's why it's required to swap
bytes after read and ten right before write back.

But in case of big-endian ARC700 instructions are encoded as a plain
big-endian. Thus no need for byte swapping.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Tom Rini <trini@ti.com>
cc: Noam Camus <noamc@ezchip.com>
2014-02-21 07:56:42 -05:00
Tom Rini
6853e6aa77 Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-02-20 12:18:59 -05:00
Tom Rini
130fbeb1c5 blackfin: Add <asm/clock.h> to numerous drivers
With d6a320d we moved some clock externs out of blackfin_local.h and
into clock.h but now need to include <asm/clock.h> in more drivers to
avoid warnings.

Cc: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Tom Rini <trini@ti.com>
2014-02-20 12:00:27 -05:00
Masahiro Yamada
3241e3d08c venice2: move device tree to fix build error
Commit 5ab502cb gathered all device tree sources
to arch/$(ARCH)/dts/.
So tegra124-venice2.dts also must go to arch/arm/dts directory
to build venice2 board.

(Commit 5ab502cb had been posted before venice2 board support
was merged. So an unvisible conflict happened.)

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@ti.com>
2014-02-20 12:00:20 -05:00
Albert ARIBAUD
3e11350255 Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
	Makefile
	drivers/net/npe/Makefile

These two conflicts arise from commit 0b2d3f20
("ARM: NET: Remove the IXP NPE ethernet driver") and are
resolved by deleting the drivers/net/npe/Makefile file
and removing the CONFIG_IXP4XX_NPE line from Makefile.
2014-02-20 13:16:05 +01:00
Alexey Brodkin
39abd65c34 arc: remove "hardware.h"
This file was only required for compilation of designware_i2c driver.
Since explicit inclusion of "hardware.h" is now removed from the driver
we may safely remove this empty header as well.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Tom Rini <trini@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Armando Visconti <armando.visconti@st.com>
2014-02-20 06:49:19 +01:00
Alexey Brodkin
f93f589ca2 spear: move CONFIG_SYS_I2C_BASE from arch-spear/hardware to board configs
Having CONFIG_SYS_I2C_BASE requires DW I2C driver to explicitly include
<arch/hardware.h> which other platforms may not have at all.

It's always good to have a driver platform-independent.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Tom Rini <trini@ti.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Armando Visconti <armando.visconti@st.com>
2014-02-20 06:49:02 +01:00
Sonic Zhang
86bdd70a09 blackfin: rename bfin-twi_i2c driver to adi_i2c
The ADI twi peripheral is not binding to Blackfin processor only.
Change to a generic name.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2014-02-20 06:46:56 +01:00
Sonic Zhang
d6a320d5bb blackfin: add spi and i2c specific get clock functions
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2014-02-20 06:46:56 +01:00
Masahiro Yamada
2aa43f70cf kbuild,tegra124: add dummy obj- for Kbuild
In Kbuild, every makefile must have non-empty obj- or obj-y.
Otherwise, built-in.o will not be created and the link stage
will fail.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-02-19 15:43:46 -05:00
Masahiro Yamada
ca53735a4c Move CONFIG_DISPLAY_CPUINFO to Makefile
If the whole code is surrounded by #ifdef(CONFIG_ ) .. #endif,
it should be moved to Makefile.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-02-19 11:10:05 -05:00
Masahiro Yamada
365475e6d1 Move #ifdef(CONFIG_DISPLAY_CPUINFO) from caller to callee
- When CONFIG_DISPLAY_CPUINFO is not enabled,
   print_cpuinfo() should be defined as an empty function
   in a header, include/common.h

 - Remove #ifdef CONFIG_DISPLAY_CPUINFO .. #endif
   from caller, common/board_f.c and arch/arm/lib/board.c

 - Remove redundant prototypes in arch/arm/lib/board.c,
   arch/arm/include/asm/arch-am33x/sys_proto.h and
   board/nokia/rx51/rx51.h, keeping the one in include/common.h

 - Add #ifdef CONFIG_DISPLAY_CPUINFO to the func definition
   where it is missing

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-02-19 11:10:05 -05:00
Masahiro Yamada
3284c8b8ca dts: generate multiple device tree blobs
It is convenient to have all device trees on the same SoC compiled.
It allows for later easy repackaging without the need to re-run
the make file.

  - Build device trees with the same SoC under arch/$(ARCH)/dts

  - Copy the one specified by CONFIG_DEFAULT_DEVICE_TREE or
    DEVICE_TREE=... to dts/dt.dtb

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-02-19 11:10:05 -05:00
Masahiro Yamada
5ab502cb89 dts: move device tree sources to arch/$(ARCH)/dts/
Unlike Linux Kernel, U-Boot historically had *.dts files under
board/$(VENDOR)/dts/ and *.dtsi files under arch/$(ARCH)/dts/.

I think arch/$(ARCH)/dts dicretory is a better location
to store both *.dts and *.dtsi files.

For example, before this commit, board/xilinx/dts directory
had both Microblaze dts (microblaze-generic.dts) and
ARM dts (zynq-*.dts), which are totally unrelated.

This commit moves *.dts to arch/$(ARCH)/dts/ directories,
allowing us to describe nicely mutiple DTBs generation in the next commit.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-02-19 11:10:05 -05:00
Masahiro Yamada
6ab6b2afa0 dts: re-write dts/Makefile more simply with Kbuild
Useful rules in scripts/Makefile.lib allows us to easily
generate a device tree blob and wrap it in assembly code.

We do not need to parse a linker script to get output format and arch.

This commit deletes ./u-boot.dtb since it is a copy of dts/dt.dtb.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-02-19 11:10:05 -05:00
Masahiro Yamada
efcf861931 kbuild: use scripts/Makefile.clean
This commit refactors cleaning targets such as
clean, clobber, mrpropper, distclean
with scripts/Makefile.clean.

By using scripts/Makefile.clean, we can recursively descend
into subdirectories and delete generated files there.

We do not need add a big list of generated files
to the "clean" target.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-02-19 11:10:04 -05:00
Masahiro Yamada
6825a95b0b kbuild: use Linux Kernel build scripts
Now we are ready to switch over to real Kbuild.

This commit disables temporary scripts:
  scripts/{Makefile.build.tmp, Makefile.host.tmp}
and enables real Kbuild scripts:
  scripts/{Makefile.build,Makefile.host,Makefile.lib}.

This switch is triggered by the line in scripts/Kbuild.include
  -build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build.tmp obj
  +build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj

We need to adjust some build scripts for U-Boot.
But smaller amount of modification is preferable.

Additionally, we need to fix compiler flags which are
locally added or removed.

In Kbuild, it is not allowed to change CFLAGS locally.
Instead, ccflags-y, asflags-y, cppflags-y,
CFLAGS_$(basetarget).o, CFLAGS_REMOVE_$(basetarget).o
are prepared for that purpose.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Gerhard Sittig <gsi@denx.de>
2014-02-19 11:07:50 -05:00
Masahiro Yamada
7c8278a866 kbuild: add dummy obj-y to create built-in.o
We are going to switch over to Kbuild in upcoming commits.

Each makefile must have non-empty obj- or obj-y
to generate built-in.o on Kbuild.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-02-19 11:07:50 -05:00
Masahiro Yamada
9e4140329e kbuild: change out-of-tree build
This commit changes the working directory
where the build process occurs.

Before this commit, build process occurred under the source
tree for both in-tree and out-of-tree build.

That's why we needed to add $(obj) prefix to all generated
files in makefiles like follows:
  $(obj)u-boot.bin:  $(obj)u-boot

Here, $(obj) is empty for in-tree build, whereas it points
to the output directory for out-of-tree build.

And our old build system changes the current working directory
with "make -C <sub-dir>" syntax when descending into the
sub-directories.

On the other hand, Kbuild uses a different idea
to handle out-of-tree build and directory descending.

The build process of Kbuild always occurs under the output tree.
When "O=dir/to/store/output/files" is given, the build system
changes the current working directory to that directory and
restarts the make.

Kbuild uses "make -f $(srctree)/scripts/Makefile.build obj=<sub-dir>"
syntax for descending into sub-directories.
(We can write it like "make $(obj)=<sub-dir>" with a shorthand.)
This means the current working directory is always the top
of the output directory.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Tested-by: Gerhard Sittig <gsi@denx.de>
2014-02-19 11:07:50 -05:00
Masahiro Yamada
56746d8010 microblaze: remove an empty file arch/microblaze/lib/time.c
Commit 779bf42c moved timer functions from
arch/microblaze/lib/time.c to arch/microblaze/cpu/timer.c.

But the empty file, arch/microblaze/lib/time.c
has been remaining probably for a human mistake.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Michal Simek <michal.simek@xilinx.com>
2014-02-19 10:47:47 -05:00
Dan Murphy
e9024ef27d ARM: O5/dra7xx: Add SATA boot support
Add the SATA boot support for OMAP5 and dra7xx.

Renamed the omap_sata_init to the common init_sata(int dev)
for commonality in with sata stack.

Added the ROM boot device ID for SATA.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Reviewed-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
2014-02-19 10:47:45 -05:00
Albert ARIBAUD
e7538fee99 Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' 2014-02-19 12:04:45 +01:00
Andy Ng
da781c60e5 imx6 SION bit has to be on for the pins that are used as ENET_REF_CLK
Signed-off-by: Andy Ng <andreas2025@gmail.com>
2014-02-19 10:57:25 +01:00
Siva Durga Prasad Paladugu
e158665c1e arm: zynq: correct the argument to lldiv
Typecast the argument with unsigned long long
for proper calculation of lldiv

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-19 09:41:22 +01:00
Michal Simek
d7e269cfbd zynq: Add support for U-BOOT SPL
SPL is using ps7_init.c/h files which are generated
from design tools which have to be copied to
boards/xilinx/zynq folder before compilation.

BSS section is moved to SDRAM because fat support
requires more space than SRAM size.

Added:
- MMC and QSPI support
- Boot OS directly from SPL
- Enable SPL command

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@ti.com>
2014-02-19 09:41:22 +01:00
Michal Simek
96a5d4dc1e zynq: Update CLK in bdinfo
ARM has specific clk entries which should be also setup.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-19 09:41:22 +01:00
Soren Brinkmann
d6c9bbaad1 zynq: Implement dump clock command
Enable and implement dump clock command which shows
soc frequencies.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-19 09:41:22 +01:00
Soren Brinkmann
97598fcf10 net: zynq_gem: Calculate clock dividers dynamically
Remove hard coded clock divider setting and use the Zynq clock framework
to dynamically calculate appropriate dividers at run time.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-19 09:41:21 +01:00
Soren Brinkmann
1cd46ed2d3 net: zynq_gem: Move RCLK details out of driver
The GEM driver should not need to know about Zynq specific details of
RCLK related registers and bitfields in the SLCR. Move those details to
the slcr driver.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-19 09:41:21 +01:00
Michal Simek
2826fd320c zynq: timer: Fix hangs if network activity attempted after about one hour
Cortex-A9 MPCore TRM' from ARM (ARM DDI 0407G ID072711) describes
in the section 4.1.1 how this value calculation should be done.

This patch fixes the problem if network activity such as ping or
tftp is attempted after u-boot has been idle for an hour,
it hangs, and cannot control-C out of it.

Signed-off-by: Uday Hegde <udayh@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-19 09:41:21 +01:00
Soren Brinkmann
614c272511 zynq: timer: Migrate to zynq clock framework
Remove hardcoded frequencies in favor of Zynq clock framework.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-19 09:41:21 +01:00
Soren Brinkmann
6c3e61de3c zynq: Provide a framework to read clock frequencies
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-19 09:41:21 +01:00
Michal Simek
bf83495040 zynq: serial: Simplify serial driver initialization
Define both serial uarts in the driver and return
default uart based on board configuration.

- Move baseaddresses to hardware.h
- Define default baudrate and clock values

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-19 09:41:21 +01:00
Michal Simek
627981213a zynq: Move bootmode to headers
These numbers will be reused by SPL.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-19 09:41:21 +01:00
Michal Simek
673ba27a85 zynq: Enable dcache support
Enable dcache.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-19 09:41:20 +01:00
Albert ARIBAUD
a87a0ce702 Merge branch 'u-boot-pxa/master' into 'u-boot-arm/master' 2014-02-19 07:15:01 +01:00
Sourav Poddar
b56e71e2d4 am43xx: Add qspi support
Add QSPI definitions and clock configuration support.

Signed-off-by: Sourav Poddar <sourav.poddar@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-02-18 22:41:08 +05:30
Markus Niebel
060aaada06 spi: mxc_spi: i.MX6 DL/S have only 4 eCSPI controller
The dual lite and solo variant have only 4 SPI controller.
respect this in the MXC_SPI_BASE_ADRESSES macro

Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-02-18 22:29:26 +05:30
Markus Niebel
d7cbcc762e spi: spi-mxc: add defines for clk inactive state for ECSPI
Provide define for the SCLK_CTL field of the config reg of ECSPI.
While at it, oder the defines to improve readability and make
adding more defines easier.

Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
2014-02-18 22:29:26 +05:30
Tom Rini
c4d376fd1c Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-02-17 14:22:02 -05:00
Tom Rini
18c83588bc Merge branch 'master' of git://git.denx.de/u-boot-mmc 2014-02-17 14:16:08 -05:00
Stephen Warren
5e77a745b2 ARM: bcm2835: fix mbox POWER_STATE_RESP_ON value
Typo: The correct value is 1 not 2.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2014-02-14 07:57:14 +01:00
Michal Simek
38716189d4 zynq: Fix elf header generation
This patch is here because of:
"arm: keep all sections in ELF file"
(sha1: 47ed5dd031)

Our tools expect to have elf with only LOAD header.
Without this fix also PHDR, INTERP and DYNAMIC headers
are available in ELF.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-13 15:33:00 +01:00
Stephen Warren
3cd534e455 ARM: bcm2835: config.mk isn't needed
The entries in config.mk were needed so that U-Boot could be built
with an old version of the Raspberry Pi Foundation's toolchain. Without
them, the build would error out with:

...-ld: error: .../libgcc.a(_bswapsi2.o) uses VFP register arguments,
u-boot does not

However, none of the 3 toolchains in the latest version of their
tools.git, nor the Ubuntu/Linaro ARM compilers in at least Ubuntu Quantal
or Saucy, need these options set in order to compile a working U-Boot.
Hence, remove the options for simplicity.

Reported-by: Tom Rini <trini@ti.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Andreas Färber <afaerber@suse.de>
2014-02-13 15:06:02 +01:00
Albert ARIBAUD
d53ccdb341 Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' 2014-02-13 13:30:54 +01:00
Stefano Babic
17998eff90 Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-02-11 12:55:32 +01:00
Markus Niebel
adadc915b3 ARM: imx6: fix wrong fec clk
imx_get_fecclk() returns enet_ref instead of ipg.
Since the clock is used to calculate the prescaler
for the MDIO interface wrong values can be calculated.

Tested on a custom MX6S board with 100MBit interface

Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
2014-02-11 11:31:52 +01:00
Fabio Estevam
6d73c23410 mx6: Enable L2 cache support
Add L2 cache support and enable it by default.

Configure the L2 cache in the same way as done by FSL kernel:
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_4.1.0

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-02-11 11:24:12 +01:00
Fabio Estevam
94db665579 mx6: Distinguish mx6dual from mx6quad
Currently when we boot a mx6dual U-boot reports that it is a mx6quad.

Report it as MX6D instead:

CPU:   Freescale i.MX6D rev1.2 at 792 MHz

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano babic <sbabic@denx.de>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2014-02-11 11:24:12 +01:00
Fabio Estevam
6a99f03d69 imx: Introduce a header for the imx cpu versions
Instead of duplicating the CPU definitions at mx5 and mx6 sys_proto.h header
files, introduce a common header to centralize such definitions.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-02-11 11:24:11 +01:00
Anson Huang
16197bb8ba imx6: make sure MMDC_CHx_MASK is clear to avoid warm reset failure
Boot ROM may mask MMDC_CHx_MASK in CCM_CCDR(such as i.MX6SL TO1.2),
it will cause warm reset fail, need to clear this MMDC_CHx_MASK field
to make sure all the i.MX6 series SOCs reset function work. Otherwise,
uboot "reset" command will fail, tested on i.MX6SL EVK board with TO1.2.

Signed-off-by: Anson Huang <b20788@freescale.com>
2014-02-11 11:24:01 +01:00
Anson Huang
5c92edc21c imx6: ensure AHB clock is 132MHz in low freq boot mode
For low freq boot mode(ARM boot up with 396MHz), ROM
will not set AHB clock to 132MHz, and the reset value of
AHB divider is incorrect which will lead to wrong AHB
rate, need to correct it. To enable low freq boot mode,
need to set BOOT_CFG2[2] to high, tested on i.MX6Q/DL
SabreSD board and i.MX6SL EVK board.

Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Anson Huang <b20788@freescale.com>
2014-02-11 11:17:10 +01:00
Inha Song
e25bfecf7b exynos: clock: use the clear and set bits macros.
Use setbits/clrbits macro instead of readl/writel function.
(Suggested by Wolfgang)

Signed-off-by: Inha Song <ideal.song@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-02-10 16:01:44 +09:00
Inha Song
3cb007a9f2 exynos: clock: fixed that cfg is set to wrong value.
This patch fixed that cfg value is set to wrong value.
Because it didn't read the related register.

Signed-off-by: Inha Song <ideal.song@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-02-10 16:00:27 +09:00
Tom Rini
7dbe63bc95 SPL: Add CONFIG_SUPPORT_EMMC_BOOT support to CONFIG_SPL_FRAMEWORK
We use the switch CONFIG_SUPPORT_EMMC_BOOT today to enable some
additional features of the eMMC boot partitions.  Add support for being
told that we have booted from one of these partitions to the spl
framework and implement this on TI OMAP/related.

Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-02-07 18:17:48 +02:00
Rajeshwari S Shinde
d3e016cc28 MMC: DWMMC: Correct the CLKDIV register value
This patch corrects the divider value written to CLKDIV register.
Since SDCLKIN is divided inside controller by the DIVRATIO value set
in the CLKSEL register, we need to use the same output clock value to
calculate the CLKDIV value.
as per user manual: cclk_in = SDCLKIN / (DIVRATIO + 1)

Input parameter to mmc_clk is changed to dwmci_host, since
we need the same to read DWMCI_CLKSEL register.

This improves the read timing values for channel 0 on SMDK5250
from 0.288sec to 0.144sec

Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com>
2014-02-07 17:42:26 +02:00
Alexey Brodkin
2272382879 arc: add library functions
These are library functions used by ARC700 architecture.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2014-02-07 08:14:32 -05:00
Alexey Brodkin
2f16ac9df4 arc: add cpu files
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2014-02-07 08:14:32 -05:00
Alexey Brodkin
288aaacf2d arc: add architecture header files
These are header files used by ARC700 architecture.

Also note that "arch-arc700/hardware.h" is only required for compilation of
"designware_i2c" driver which refers to "asm/arch/hardware.h".
It would be good to fix mentioned driver sometime soon but it will cause
changes in ARM board configs that use "designware_i2c".

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: Francois Bedard <fbedard@synopsys.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
2014-02-07 08:14:32 -05:00
Aaron Wu
819ca38fa7 blackfin: Initialize the EMAC VLAN with proper default value
EMAC_VLANx regs is not properly initiallized in u-boot, once it's overwrite in the
kernel when DSA enabled, hot reset will lead to bringing up EMAC fail in u-boot.

Signed-off-by: Aaron Wu <Aaron.Wu@analog.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2014-02-07 11:18:06 +08:00
Sonic Zhang
861aa63d6b blackfin: Change SMC dcplb entry flag to cover 16M address region
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2014-02-07 11:18:06 +08:00
Bob Liu
28bfc40ce9 blackfin: init bss early
Signed-off-by: Bob Liu <lliubbo@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2014-02-07 11:18:06 +08:00
Sonic Zhang
ab784696fc blackfin: The logic of the BF609 macro is opposite.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
2014-02-07 11:18:06 +08:00
Piotr Wilczek
d1cbf0a5ad arm:s5pc110: add cpu revision
This patch adds s5p_cpu_rev.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-02-07 10:06:24 +09:00
Piotr Wilczek
34991bbf47 arm:exynos: add cpu revision
This patch enables to read cpu revision on Exynos CPU.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-02-07 10:06:24 +09:00
Marek Vasut
c8d4b2f826 ARM: IXP: Remove the IXP architecture support
The architecture is unmaintained and dead, remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Michael Schwingen <michael@schwingen.org>
Cc: Tom Rini <trini@ti.com>
2014-02-06 02:51:52 +01:00
Minkyu Kang
0ab9a03ca4 exynos: pinmux: remove unnecessary routine
Because of the list of peripherals is not sequential,
such a routine does not check for valid correctly.
Error check will be done when call the exynos_pinmux_config function.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
2014-02-05 15:37:56 +09:00
Minkyu Kang
1501cc9416 exynos: pinmux: remove unnecessary define
The value of PERIPH_ID_COUNT was wrong, and unnecessary.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-02-05 15:37:56 +09:00
Minkyu Kang
790991b0e1 exynos: pinmux: sort the list of peripherals
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Rajehswari Shinde <rajeshwari.s@samsung.com>
2014-02-05 15:37:55 +09:00
Tom Rini
9c1d0e9f16 Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze 2014-02-04 11:51:20 -05:00
Michal Simek
9d24274509 microblaze: Add SPL support
Add support for U-BOOT SPL. NOR and RAM mode are supported.
There are 3 images in NOR flash. u-boot.img, dtb and kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-04 16:39:50 +01:00
Michal Simek
ef2c1d8583 microblaze: Report priviledged or stack protection exception
Just list one more exception.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-04 16:39:25 +01:00
Michal Simek
6ba64f24a4 microblaze: Show u-boot banner
It is nice to see u-boot version.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-02-04 16:39:25 +01:00
Tom Warren
a57c5846a2 ARM: tegra: add DT files for Tegra124 and Venice2
These are fairly complete, and near-clones of Tegra114 Venice, with an
additional I2C port, and MMC address changes for Tegra124.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:47 -07:00
Tom Warren
2f5dac9214 ARM: tegra: add common (shared) CPU files
These files are used by both SPL and main U-Boot.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:46 -07:00
Tom Warren
52ef43b052 ARM: tegra: Add CPU (armv7) files for Tegra124
These files are for code that runs on the CPU (A15) on Tegra124 boards.
At this time, there is no A15-specific code here. The warmboot/LP0 files
aren't included as that code hasn't been ported yet.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:46 -07:00
Tom Warren
32edd2ede2 ARM: tegra: add SPL/AVP (arm720t) CPU files for Tegra124
This provides SPL support for Tegra124 boards - AVP early init, plus
CPU (A15) init/jump to main U-Boot.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:46 -07:00
Tom Warren
999c6baf79 ARM: tegra: add/edit headers for Tegra124
These headers define the Tegra124 hardware. Add them to the usual
place.

Add Tegra124 chip ID/SKU ID definitions to common headers.

There's no real HW change on Tegra124 for 90% of the toys, so it might
make sense for a future patch to unify some of the content of these
files in a common location.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:46 -07:00
Stephen Warren
49941b22ec ARM: tegra: fix a typo in the tegra114.dtsi
The reg property for node spi@7000d800 was wrong. Fix it to match the
HW. This change was verified against the Linux kernel.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:46 -07:00
Stephen Warren
a4bcd67c72 ARM: tegra: remove a conditional for CSITE rate
There's already an SoC-specific conditional in cpu.h to determine the
PLLP rate. Define the CSITE clock rate inside the same conditional, so
that we can remove a conditional from clock_enable_coresight(). This
means one less place to update the code for new SoCs.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:46 -07:00
Stephen Warren
41447fb2cf ARM: tegra: enable PLLX only once it's been fully configured
This programming sequence is correct per Jimmy Zhang, and makes sense
too!

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:46 -07:00
Stephen Warren
cad38a57d3 ARM: tegra: pass just partition ID to power_partition()
Pass just the partition ID to power_partition(), rather than also passing
the partition's status register mask too. This makes it simpler to get
call-sites correct, since they don't need to pass two different values
that define the same thing and must match.

Consequently, we can remove the mask definitions from pmc.h.

Suggested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:46 -07:00
Stephen Warren
41cd530d6d ARM: tegra: misc cleanups triggered by Tegra124 review
Use a named constant for the PLL lock bit in enable_cpu_clocks().

Construct the complete value of pmc_pwrgate_toggle, rather than doing a
read-modify-write; the register is simple enough and doesn't need to
maintain state between operations.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:46 -07:00
Jimmy Zhang
b9dd6215ce ARM: tegra: don't exceed AVP limits when configuring PLLP
Based on the Tegra TRM, the system clock (which is the AVP clock) can
run up to 275MHz. On power on, the default sytem clock source is set to
PLLP_OUT0. In function clock_early_init(), PLLP_OUT0 will be set to
408MHz which is beyond system clock's upper limit.

The fix is to set the system clock to CLK_M before initializing PLLP,
and then switch back to PLLP_OUT4, which has an appropriate divider
configured, after PLLP has been configured

Implement this logic in new function tegra30_set_up_pllp(),
which sets up PLLP and all PLLP_OUT* dividers, and handles the AVP
clock switching. Remove the duplicate PLLP setup from pllx_set_rate()
and adjust_pllp_out_freqs().

Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
[swarren, significantly refactored the change]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:45 -07:00
Stephen Warren
9399e540ca ARM: tegra: amend pmc.h for Tegra114+
Tegra114 and later's PMC module removes the pwrgate_timer_on register
and replaces it with a clamp_status register. Adjust pmc.h to reflect
this, and update any code affected by the change.

The cpu.c change in this patch was extracted from a much larger patch
by Jimmy Zhang. The pmc.h change was written from scratch, but inspired
by related changes made by Tom Warren.

There could well be other differences in the PMC register set for chips
after Tegra20/30. However, they don't affect the code in U-Boot at
present, so I haven't attempted an exhaustive update of pmc.h.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:45 -07:00
Tom Warren
c82014daf5 ARM: tegra: implement MASK_BITS_31_29
Some clock sources have 3-bit muxes in bits 31:29. Implement core
support for this mux field.

Signed-off-by: Tom Warren <twarren@nvidia.com>
[swarren, extracted from a larger patch by Tom]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:45 -07:00
Stephen Warren
04b8e8e745 ARM: tegra: MASK_BITS_ no longer needs specific values
Since all code that sets or interprets MASK_BITS_* now uses the enums
to define/compare the values, there is no need for MASK_BITS_* to have
a specific integer value. In fact, having a specific integer value may
encourage people to hard-code those values, or interpret the values in
incorrect ways.

As such, remove the logic that assigns a specific value to the enum
values in order to make it completely clear that it's just an enum, not
something that directly represents some integer value.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:45 -07:00
Stephen Warren
54d2e18292 ARM: tegra: use MASK_BITS_* macros everywhere
Not all code that set or interpreted "mux_bits" was using the named
macros, but rather some was simply using hard-coded integer constants.
This makes it hard to determine which pieces of code are affected by
changes to those constants.

Replace the integer constants with the equivalent macro definitions so
that everything is nicely tied together.

Note that I'm not convinced all the code was using the correct integer
constants, and hence I'm not convinced that all the code is now using
the desired macros. However, this change is a purely mechanical
replacement and should have no functional change. Fixing any bugs will
come later, separately.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:45 -07:00
Stephen Warren
9cb0c6dc69 ARM: tegra: rename OUT_CLK_SOURCE_*
OUT_CLK_SOURCE_ are currently named after the number of bits the mask
they represent includes. However, bit count is not the only possible
variable; bit position may also vary. Rename OUT_CLK_SOURCE_ to
OUT_CLK_SOURCE_31_30_ and OUT_CLK_SOURCE4_ to OUT_CLK_SOURCE_31_28 to
more completely describe exactly what they represent, without having to
go look up the definitions.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:45 -07:00
Stephen Warren
5916a36ee9 ARM: tegra: rename MASK_BITS_29_28 to MASK_BITS_31_28
The only place where the MASK_BITS_* values are used is in
adjust_periph_pll(), which interprets the value 4 (old MASK_BITS_29_28,
new MASK_BITS_31_28) as being associated with mask OUT_CLK_SOURCE4_MASK,
i.e. bits 31:28. Rename the MASK_BITS_ macro to reflect how it's actually
implemented.

Note that no Tegra clock register actually uses all of bits 31:28 as
the mux field. Rather, bits 30:28, 29:28, or 28 are used. However, in
those cases, nothing is stored in the bits above the mux field, so it's
safe to pretend that the mux field extends all the way to the end of the
register. As such, the U-Boot clock driver is currently a bit lazy, and
doesn't distinguish between 31:28, 30:28, 29:28 and 28; it just lumps
them all together and pretends they're all 31:28. This patch doesn't
cause this issue; it was pre-existing. Hopefully, future patches will
clean this up.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:45 -07:00
Tom Warren
0b01b53aa5 ARM: tegra: deduplicate MASK_BITS_xxx clock mux enum
The enum used to define the set of register bits used to represent a
clock's input mux, MUX_BITS_*, is defined separately for each SoC at
present. Move this definition to a common location to ease fixing up
some issues with the definition, and the code that uses it.

Signed-off-by: Tom Warren <twarren@nvidia.com>
[swarren, extracted from a larger patch by Tom]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:44 -07:00
Stephen Warren
86b657878b ARM: tegra: accept any SKU ID for most chips
For Tegra20, the SKU ID actually impacts how U-Boot programs the chip,
and hence we need to explicitly know about each and every SKU ID in order
to operate correctly.

However, for Tegra30/114, this isn't the case. Rather than forcing each
new user with a different SKU to manually add their SKU ID into the code,
simply accept any SKU ID.

If U-Boot ever starts e.g. programming maximal CPU clocks etc., we'll
need to undo this, or make the default case map to conservative defaults,
but for now it's likely the path to least support cost.

Reported-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-02-03 09:46:44 -07:00
Prabhakar Kushwaha
1b4175d6fa driver/ifc:Change accessor function to take care of endianness
IFC registers can be of type Little Endian or big Endian depending upon
Freescale SoC. Here SoC defines the register type of IFC IP.

So update acessor functions with common IFC acessor functions to take care
both type of endianness.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
2014-02-03 08:38:51 -08:00
Nikhil Badola
a4f7cba64e powerpc/usb: Enable dual phy for T1040
Define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE macro for enabling dual
phy in t1040

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-02-03 08:38:49 -08:00
Prabhakar Kushwaha
5b7672fc49 boards/t1040qds: Adds ethernet support for T1040
Enable entherent for T1040QDS. It enables FM1@DTSEC3, FM1@DTSEC4, FM1@DTSEC5
    Define MDIO related configs
    Added eth.c file
    Update t1040.c to support RGMII and SGMII
    Update t1040qds.c to support ethernet
    Define the PHY address

Signed-off-by: Arpit Goel <B44344@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: remove dash from commit message]
Signed-off-by: York Sun <yorksun@freescale.com>
2014-02-03 08:38:48 -08:00
Prabhakar Kushwaha
96bda02c9e powerpc/mpc85xx: Update serdes protocols for T1040
T1040 has only one SerDes block. so update the code accordingly.

Also, add support of SerDes Protocol 0x00, 0x06, 0x40, 0x69 0x85,
0xA7 and 0xAA

Signed-off-by: Arpit Goel <B44344@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-02-03 08:38:48 -08:00
poonam aggrwal
4393fd40ad powerpc/mpc85xx: Update LIODNs for T1040
Removed LIODNs for RMAN, RIO, 10G. T1040 has 10 QMAN portals so assigned
LIODNs accordingly.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-02-03 08:38:48 -08:00
Przemyslaw Marczak
8475c869c3 s5p: gpio: change gpio coding method for s5p gpio.
Old s5p gpio coding method was not clean and was not working properly
for all parts and banks. New method is clean and easy to extend.

Gpio coding mask:
0x000000ff - pin number
0x00ffff00 - bank offset
0xff000000 - part number

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-02-03 15:36:14 +09:00
Masahiro Yamada
3d83efbce9 sandbox: Use system headers first for sandbox's os.c in a different way
Commit cbe5cdfcd changed config.mk and arch/sandbox/cpu/Makefile
to use -idirafter instead of -I and remove -nostdinc.

But
 * Sandbox-specific code dirties config.mk
 * os.c is compiled without such compiler flags as:
      -Wall -Wstrict-prototypes -Wno-format-security
      -fno-builtin -ffreestanding -fno-stack-protector
      -fstack-usage -Wno-format-nonliteral

This commit use -idirafter and remove the -nostdinc
differently and more simply.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-01-29 16:08:52 -05:00
Albert ARIBAUD
e97f9d817e Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2014-01-29 14:07:50 +01:00
rick
f889cc81c1 nds32: add support for leopard and orca board boot flow auto detect
hardware difference between leopard and orca as below:

flash setting     leoaprd     orca
bank size         32MB        64MB
bus width         32-bits     16-bits

Signed-off-by: rick <rick@andestech.com>
Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com>
2014-01-28 19:23:01 +08:00
Marek Vasut
e9be4292e4 ARM: mx6: Add PCI express driver
Add PCIe driver for the Freescale i.MX6 SoC . This driver operates the
PCIe block in RC mode only, the EP mode is NOT supported. The driver is
tested with the Intel e1000 NIC driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2014-01-26 12:41:20 +01:00
Marek Vasut
7981449280 ARM: mx6: Add PCI express clock configuration
Split the SATA clock enabling function and add PCI express clock
enabling function. The SATA clock enabling function starts up the
100MHz SATA reference PLL in ENET_PLL register, but the code can
be re-used to enable the 125MHz PCIe reference in ENET_PLL, so pull
this code into separate function. Moreover, add the PCIe clock
enabling code.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2014-01-26 12:41:20 +01:00
Marek Vasut
7cbe638e41 ARM: armv7: Make indirect vector addresses globl
Make indirect vectors addresses global, so they can be replaced by
various code that needs to do so. For example the MX6 PCI express
driver needs to temporarily replace data abort handler when reading
the config space.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
2014-01-26 12:41:20 +01:00
Stefano Babic
707acd01de Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-01-26 12:11:54 +01:00
Dan Murphy
8cffe5bd0d spl: common: Support for USB MSD FAT image loading
Add SPL support to be able to detect a USB Mass Storage device
connected to a USB host.  Once a USB Mass storage device is detected
the SPL will load the u-boot.img from a FAT partition to target address.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
2014-01-24 16:59:22 -05:00
Masahiro Yamada
b2a6dfe4f8 powerpc: mpc5xxx: remove redundant CONFIG_MPC5xxx definition
We do not have to define CONFIG_MPC5xxx in board config headers
(and start.S) because it is defined in arch/powerpc/cpu/mpc5xxx/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24 16:59:21 -05:00
Masahiro Yamada
347d06dec4 sandbox: fix the return type of os_free() function
The function os_free() returns nothing.
Its return type should be "void" rather than "void *".

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24 16:59:08 -05:00
Masahiro Yamada
bf1af3d872 ARM: merge commonly-defined PLATFORM_RELFLAGS
Before this commit, all arch/arm/cpu/${CPU}/config.mk except ARMv8
had the same option:
$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))

This commit moves it into arch/arm/config.mk.

If the compiler does not support the option,
it is ignored by $(call cc-option,...).
So this commit gives no harm to ARMv8.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24 16:59:08 -05:00
Masahiro Yamada
84acd1e179 powerpc: mpc86xx: move CONFIG_MPC86xx definition to CPU config.mk
Define CONFIG_MPC86xx in arch/powerpc/cpu/mpc86xx/config.mk
because all target boards with mpc86xx cpu define it.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24 16:59:08 -05:00
Masahiro Yamada
d40ddae4b3 powerpc: mpc85xx: move CONFIG_MPC85xx definition to CPU config.mk
Define CONFIG_MPC85xx in arch/powerpc/cpu/mpc85xx/config.mk
because all target boards with mpc85xx cpu define it.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24 16:59:08 -05:00
Masahiro Yamada
4b0065c644 powerpc: mpc5xx: remove redundant CONFIG_5xx definition
We do not have to define CONFIG_5xx in a source file
because it is defined in arch/powerpc/cpu/mpc5xx/config.mk.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24 16:59:08 -05:00
Masahiro Yamada
07344edde2 powerpc: mpc8xx: remove redundant CONFIG_8xx definition
We do not have to define CONFIG_8xx in source files
because it is defined in arch/powerpc/cpu/mpc8xx/config.mk

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24 16:59:08 -05:00
Masahiro Yamada
df05ff7789 x86: delete unused header files
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
2014-01-24 16:59:07 -05:00
Masahiro Yamada
36aa822880 powerpc: delete unused header files
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24 16:59:07 -05:00
Masahiro Yamada
2bf9557744 blackfin: delete unused header files
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24 16:59:07 -05:00
Masahiro Yamada
4d54b43a59 avr32: delete unused header files
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24 16:59:07 -05:00
Masahiro Yamada
5378d5eabe avr32: move CONFIG_AVR32 definition to arch/avr32/config.mk
Like other architectures, CONFIG_AVR32 can be defined
in arch/avr32/config.mk rather than board header files.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
2014-01-24 16:59:07 -05:00
Masahiro Yamada
d937326ffc Remove obsolete _LINUX_CONFIG_H macro
Commit 643aae1406
deleted include/linux/config.h but missed to
delete _LINUX_CONFIG_H macro.
It is no longer used at all.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2014-01-24 16:59:07 -05:00
Darwin Rambo
de351d6be6 lib: time: add weak timer_init() function
If timer_init() is made a weak stub function, then it allows us to
remove several empty timer_init functions for those boards that
already have a timer initialized when u-boot starts. Architectures
that use the timer framework may also remove the need for timer.c.

Signed-off-by: Darwin Rambo <drambo@broadcom.com>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
2014-01-24 16:59:06 -05:00
Nishanth Menon
194dd74ad9 DRA7: add ABB setup for MPU voltage domain
Patch adds modification to shared omap5 abb_setup() function, and
proper registers definitions needed for ABB setup sequence. ABB is
initialized for MPU voltage domain at OPP_NOM.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2014-01-24 11:41:17 -05:00
Nishanth Menon
3ac8c0bf65 DRA7: Add support for ES1.1 silicon ID code
ES1.1 silicon is a very minor variant of ES1.0. Add priliminary support
for ES1.1 IDCODE change.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
2014-01-24 11:41:17 -05:00
Satyanarayana, Sandhya
e9b13ce0b6 ARM: AM335x: Enable DDR dynamic IO power down
This patch enables dynamically powering down the
IO receiver when not performing a read on boards using DDR3.
This optimizes both active and standby power consumption.
This bit is not set on EVM SK and EVM 1.5 and later boards.
Setting the same.

This has been tested on PG2.0 EVM1.5, EVM1.2, EVM-SK, BBB.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
2014-01-24 11:38:39 -05:00
Enric Balletbò i Serra
ac02aa9763 ARM: OMAP3: Rename OMAP3_PUBLIC_SRAM_* to NON_SECURE_SRAM_*
Other TI processors like am33xx, omap4 and omap5 have called these variables
as NON_SECURE_SRAM_*, shouldn't be a big problem rename these variables to
be coherent.

One reason more to rename these variables is to have the possibility of any
OMAP3 board to use the ti_armv7_common.h include as the NON_SECURE_SRAM_END
is used to define the CONFIG_SYS_INIT_SP_ADDR variable.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
2014-01-24 11:38:39 -05:00
Jassi Brar
e81f63f0d2 ARM: OMAP4/5: Remove dead code against CONFIG_SYS_ENABLE_PADS_ALL
The commit
f3f98bb0 : "ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls"
removed the config option aimed towards moving that stuff into kernel, which
renders some code unreachable. Remove that code.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2014-01-24 09:38:39 -05:00
Jassi Brar
02c41535b6 ARM: OMAP4/5: Remove dead code against CONFIG_SYS_CLOCKS_ENABLE_ALL
The commit
 f3f98bb0 : "ARM: OMAP4/5: Do not configure non essential pads, clocks, dplls"
removed the config option aimed towards moving that stuff into kernel, which
renders some code unreachable. Remove that code.

Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
2014-01-24 09:34:22 -05:00
Haijun.Zhang
f28bea0003 eSDHC: Calculate envaddr accroding to the address format
On BSC9131, BSC9132, P1010 : For High Capacity SD Cards (> 2 GBytes), the
32-bit source address specifies the memory address in block address
format. Block length is fixed to 512 bytes as per the SD High Capacity
specification. So we need to convert the block address format
to byte address format to calculate the envaddr.

If there is no enough space for environment variables or envaddr
is larger than 4GiB, we relocate the envaddr to 0x400. The address
relocated is in the front of the first partition that is assigned
for sdboot only.

Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-01-22 08:56:44 -08:00
Po Liu
6609916efb powerpc:mpc85xx: Add ifc nand boot support for TPL/SPL
Using the TPL method for nand boot by sram was already
supported. Here add some code for mpc85xx ifc nand boot.

	- For ifc, elbc, esdhc, espi, all need the SPL without
	section .resetvec.
	- Use a clear function name for nand spl boot.
	- Add CONFIG_SPL_DRIVERS_MISC_SUPPORT to compile the fsl_ifc.c
	in spl/Makefile;

Signed-off-by: Po Liu <Po.Liu@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-01-21 13:42:01 -08:00
York Sun
b518816423 powerpc/mpc85xx: Fix a typo in workaround message for DDR erratum A003474
Unfortunately a typo presents "DDR-A003473" instead of "DDR-A003474".

Signed-off-by: York Sun <yorksun@freescale.com>
2014-01-21 13:40:18 -08:00
Shengzhou Liu
842eaa1361 powerpc/85xx: update erratum a006379
Enable Erratum A006379 for T2080, T2081, T4160, B4420.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-01-21 13:39:19 -08:00
Ramneek Mehresh
3f283f4bdc powerpc/83xx: Add support for get_svr() for 83xx devices
Defines get_svr() for 83xx devices

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
2014-01-21 13:35:43 -08:00
Stephen Warren
004c10598b ARM: bcm2835: fix mailbox timeout
My original intention was to have a 100ms timeout. However, the timer
operations used return values in ms not us, so we ended up with a 100s
timeout instead. Fixing this exposes that some operations need longer
to operate than 100ms, so bump the timeout up to a whole second.

Reported-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2014-01-20 17:11:39 -05:00