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41cd530d6d
Use a named constant for the PLL lock bit in enable_cpu_clocks(). Construct the complete value of pmc_pwrgate_toggle, rather than doing a read-modify-write; the register is simple enough and doesn't need to maintain state between operations. Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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| blackfin | ||
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| nds32 | ||
| nios2 | ||
| openrisc | ||
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| sh | ||
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| .gitignore | ||