ARM: tegra: add DT files for Tegra124 and Venice2

These are fairly complete, and near-clones of Tegra114 Venice, with an
additional I2C port, and MMC address changes for Tegra124.

Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Tom Warren 2014-01-24 12:46:17 -07:00 committed by Tom Warren
parent 2f5dac9214
commit a57c5846a2
2 changed files with 334 additions and 0 deletions

250
arch/arm/dts/tegra124.dtsi Normal file
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#include "skeleton.dtsi"
/ {
compatible = "nvidia,tegra124";
tegra_car: clock@60006000 {
compatible = "nvidia,tegra124-car";
reg = <0x60006000 0x1000>;
#clock-cells = <1>;
};
apbdma: dma@60020000 {
compatible = "nvidia,tegra124-apbdma", "nvidia,tegra148-apbdma";
reg = <0x60020000 0x1400>;
interrupts = <0 104 0x04
0 105 0x04
0 106 0x04
0 107 0x04
0 108 0x04
0 109 0x04
0 110 0x04
0 111 0x04
0 112 0x04
0 113 0x04
0 114 0x04
0 115 0x04
0 116 0x04
0 117 0x04
0 118 0x04
0 119 0x04
0 128 0x04
0 129 0x04
0 130 0x04
0 131 0x04
0 132 0x04
0 133 0x04
0 134 0x04
0 135 0x04
0 136 0x04
0 137 0x04
0 138 0x04
0 139 0x04
0 140 0x04
0 141 0x04
0 142 0x04
0 143 0x04>;
};
gpio: gpio@6000d000 {
compatible = "nvidia,tegra124-gpio", "nvidia,tegra30-gpio";
reg = <0x6000d000 0x1000>;
interrupts = <0 32 0x04
0 33 0x04
0 34 0x04
0 35 0x04
0 55 0x04
0 87 0x04
0 89 0x04
0 125 0x04>;
#gpio-cells = <2>;
gpio-controller;
#interrupt-cells = <2>;
interrupt-controller;
};
i2c@7000c000 {
compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
reg = <0x7000c000 0x100>;
interrupts = <0 38 0x04>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car 12>;
status = "disabled";
};
i2c@7000c400 {
compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
reg = <0x7000c400 0x100>;
interrupts = <0 84 0x04>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car 54>;
status = "disabled";
};
i2c@7000c500 {
compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
reg = <0x7000c500 0x100>;
interrupts = <0 92 0x04>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car 67>;
status = "disabled";
};
i2c@7000c700 {
compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
reg = <0x7000c700 0x100>;
interrupts = <0 120 0x04>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car 103>;
status = "disabled";
};
i2c@7000d000 {
compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
reg = <0x7000d000 0x100>;
interrupts = <0 53 0x04>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car 47>;
status = "disabled";
};
i2c@7000d100 {
compatible = "nvidia,tegra124-i2c", "nvidia,tegra114-i2c";
reg = <0x7000d100 0x100>;
interrupts = <0 53 0x04>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&tegra_car 47>;
status = "disabled";
};
spi@7000d400 {
compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
reg = <0x7000d400 0x200>;
interrupts = <0 59 0x04>;
nvidia,dma-request-selector = <&apbdma 15>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
clocks = <&tegra_car 41>;
};
spi@7000d600 {
compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
reg = <0x7000d600 0x200>;
interrupts = <0 82 0x04>;
nvidia,dma-request-selector = <&apbdma 16>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
clocks = <&tegra_car 44>;
};
spi@7000d800 {
compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
reg = <0x7000d800 0x200>;
interrupts = <0 83 0x04>;
nvidia,dma-request-selector = <&apbdma 17>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
clocks = <&tegra_car 46>;
};
spi@7000da00 {
compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
reg = <0x7000da00 0x200>;
interrupts = <0 93 0x04>;
nvidia,dma-request-selector = <&apbdma 18>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
clocks = <&tegra_car 68>;
};
spi@7000dc00 {
compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
reg = <0x7000dc00 0x200>;
interrupts = <0 94 0x04>;
nvidia,dma-request-selector = <&apbdma 27>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
clocks = <&tegra_car 104>;
};
spi@7000de00 {
compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi";
reg = <0x7000de00 0x200>;
interrupts = <0 79 0x04>;
nvidia,dma-request-selector = <&apbdma 28>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
clocks = <&tegra_car 105>;
};
sdhci@700b0000 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x700b0000 0x200>;
interrupts = <0 14 0x04>;
clocks = <&tegra_car 14>;
status = "disabled";
};
sdhci@700b0200 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x700b0200 0x200>;
interrupts = <0 15 0x04>;
clocks = <&tegra_car 9>;
status = "disabled";
};
sdhci@700b0400 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x700b0400 0x200>;
interrupts = <0 19 0x04>;
clocks = <&tegra_car 69>;
status = "disabled";
};
sdhci@700b0600 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x700b0600 0x200>;
interrupts = <0 31 0x04>;
clocks = <&tegra_car 15>;
status = "disabled";
};
usb@7d000000 {
compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
reg = <0x7d000000 0x4000>;
interrupts = < 52 >;
phy_type = "utmi";
clocks = <&tegra_car 22>; /* PERIPH_ID_USBD */
status = "disabled";
};
usb@7d004000 {
compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
reg = <0x7d004000 0x4000>;
interrupts = < 53 >;
phy_type = "hsic";
clocks = <&tegra_car 58>; /* PERIPH_ID_USB2 */
status = "disabled";
};
usb@7d008000 {
compatible = "nvidia,tegra124-ehci", "nvidia,tegra30-ehci";
reg = <0x7d008000 0x4000>;
interrupts = < 129 >;
phy_type = "utmi";
clocks = <&tegra_car 59>; /* PERIPH_ID_USB3 */
status = "disabled";
};
};

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/dts-v1/;
#include "tegra124.dtsi"
/ {
model = "NVIDIA Venice2";
compatible = "nvidia,venice2", "nvidia,tegra124";
aliases {
i2c0 = "/i2c@7000d000";
i2c1 = "/i2c@7000c000";
i2c2 = "/i2c@7000c400";
i2c3 = "/i2c@7000c500";
i2c4 = "/i2c@7000c700";
i2c5 = "/i2c@7000d100";
sdhci0 = "/sdhci@700b0600";
sdhci1 = "/sdhci@700b0400";
spi0 = "/spi@7000d400";
spi1 = "/spi@7000da00";
usb0 = "/usb@7d008000";
};
memory {
device_type = "memory";
reg = <0x80000000 0x80000000>;
};
i2c@7000c000 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000c400 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000c500 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000c700 {
status = "okay";
clock-frequency = <100000>;
};
i2c@7000d000 {
status = "okay";
clock-frequency = <400000>;
};
i2c@7000d100 {
status = "okay";
clock-frequency = <400000>;
};
spi@7000d400 {
status = "okay";
spi-max-frequency = <25000000>;
};
spi@7000da00 {
status = "okay";
spi-max-frequency = <25000000>;
};
sdhci@700b0400 {
status = "okay";
cd-gpios = <&gpio 170 0>; /* gpio PV2 */
power-gpios = <&gpio 136 0>; /* gpio PR0 */
bus-width = <4>;
};
sdhci@700b0600 {
status = "okay";
bus-width = <8>;
};
usb@7d008000 {
status = "okay";
nvidia,vbus-gpio = <&gpio 109 0>; /* gpio PN5, USB_VBUS_EN1 */
};
};