Commit graph

23607 commits

Author SHA1 Message Date
Chin Liang See
ddfeb0aaf4 socfpga: Adding Clock Manager driver
Clock Manager driver will be called to reconfigure all the
clocks setting based on user input. The input are passed to
Preloader through handoff files

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@ti.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
2014-04-07 10:41:50 +02:00
Marek Vasut
1a9df13d5b arm: mxs: Add support for generating signed BootStream
This patch adds the groundwork for generating signed BootStream, which
can be used by the HAB library in i.MX28. We are adding a new target,
u-boot-signed.sb , since the process for generating regular non-signed
BootStream is much easier. Moreover, the signed bootstream depends on
external _proprietary_ _binary-only_ tool from Freescale called 'cst',
which is available only under NDA.

To make things even uglier, the CST or HAB mandates a kind-of circular
dependency. The problem is, unlike the regular IVT, which is generated
by mxsimage, the IVT for signed boot must be generated by hand here due
to special demands of the CST. The U-Boot binary (or SPL binary) and IVT
are then signed by the CST as a one block. But here is the problem. The
size of the entire image (U-Boot, IVT, CST blocks) must be appended at
the end of IVT. But the size of the entire image is not known until the
CST has finished signing the U-Boot and IVT. We solve this by expecting
the CST block to be always 3904B (which it is in case two files, U-Boot
and the hand-made IVT, are signed in the CST block).

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2014-04-04 11:44:59 +02:00
Stefano Babic
1cad23c5f4 Merge branch 'master' of git://git.denx.de/u-boot-arm into master
Conflicts:
	arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg
	arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg

Signed-off-by: Stefano Babic <sbabic@denx.de>
2014-04-04 11:35:30 +02:00
Stefano Babic
5dd73bc0a4 Revert "arm: mxs: Add support for generating signed BootStream"
This reverts commit 53e6b14e03.

Patch does not merge anymore with u-boot-arm and must be rebased.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2014-04-04 11:29:29 +02:00
Łukasz Majewski
00b132bf34 config:trats2: Change u-boot's TEXT_BASE from 0x78100000 to 0x43e00000
The u-boot's image TEXT_BASE needs to be changed to 0x43e00000 from 0x78100000.

This change provides compatibility with other trats2 (RD_PQ) devices
(http://download.tizen.org/releases/system/).

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2014-04-02 21:00:04 +09:00
Stefano Babic
fa9c021632 mx6: add example DTB for mx6qsabreauto
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
2014-04-02 10:46:21 +02:00
Stefano Babic
e64348f5eb imx: add rules for U-Boot DTB support
Signed-off-by: Stefano Babic <sbabic@denx.de>
2014-04-02 10:45:35 +02:00
Stefano Babic
bb2637be09 mxs: fix warning in SPL with console support
Signed-off-by: Stefano Babic <sbabic@denx.de>
2014-04-02 10:42:06 +02:00
Albert ARIBAUD
da0c5748a3 Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' 2014-04-02 06:43:09 +02:00
Marek Vasut
9926eb31b7 arm: mxs: Add serial console support into SPL
Add support for serial console into the i.MX23/i.MX28 SPL. A full,
uncrippled serial console support comes very helpful when debugging
various spectacular hardware bringup issues early in the process.
Because we do not use SPL framework, but have our own minimalistic
SPL, which is compatible with the i.MX23/i.MX28 BootROM, we do not
use preloader_console_init(), but instead use a similar function to
start the console. Nonetheless, to avoid blowing up the size of the
SPL binary, this support is enabled only if CONFIG_SPL_SERIAL_SUPPORT
is defined, which is disabled by default.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2014-04-01 10:25:11 +02:00
Marek Vasut
65ed5e8572 arm: mxs: Properly set GD pointer in SPL
Set the GD pointer in the SPL to a defined symbol so various
functions from U-Boot can be used without adverse side effects.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2014-04-01 10:23:01 +02:00
Marek Vasut
97334c6616 arm: mx5: Avoid hardcoding memory sizes on M53EVK
The DRAM size can be easily detected at runtime on i.MX53. Implement
such detection on M53EVK and adjust the rest of the macros accordingly
to use the detected values.

An important thing to note here is that we had to override the function
for trimming the effective DRAM address, get_effective_memsize(). That
is because the function uses CONFIG_MAX_MEM_MAPPED as the upper bound of
the available DRAM and we don't have gd->bd->bi_dram[0].size set up at
the time the function is called, thus we cannot put this into the macro
CONFIG_MAX_MEM_MAPPED . Instead, we use custom override where we use the
size of the first DRAM block which we just detected.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2014-03-31 18:28:51 +02:00
Marek Vasut
2f844e76da arm: mx5: Fix memory slowness on M53EVK
Fix memory access slowness on i.MX53 M53EVK board. Let us inspect the
issue: First of all, the i.MX53 CPU has two memory banks mapped at
0x7000_0000 and 0xb000_0000 and each of those can hold up to 1GiB of
DRAM memory. Notice that the memory area is not continuous. On M53EVK,
each of the banks contain 512MiB of DRAM, which makes a total of 1GiB
of memory available to the system.

The problem is how the relocation of U-Boot is treated on i.MX53 . The
U-Boot is placed at the ((start of first DRAM partition) + (gd->ram_size)) .
This in turn poses a problem, since in our case, the gd->ram_size is 1GiB,
the first DRAM bank starts at 0x7000_0000 and contains 512MiB of memory.
Thus, with this algorithm, U-Boot is placed at offset:

    0x7000_0000 + 1GiB - sizeof(u-boot and some small margin)

This is past the DRAM available in the first bank on M53EVK, but is still
within the address range of the first DRAM bank. Because of the memory
wrap-around, the data can still be read and written to this area, but the
access is much slower.

There were two ideas how to solve this problem, first was to map both of
the available DRAM chunks next to one another by using MMU, second was to
define CONFIG_VERY_BIG_RAM and CONFIG_MAX_MEM_MAPPED to size of the memory
in the first DRAM bank. We choose the later because it turns out the former
is not applicable afterall. The former cannot be used in case Linux kernel
was loaded into the second DRAM bank area, which would be remapped and one
would try booting the kernel, since at some point before the kernel is started,
the MMU would be turned off, which would destroy the mapping and hang the
system.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2014-03-31 18:28:51 +02:00
Marek Vasut
31c832f93c arm: mx5: Avoid hardcoding memory sizes on MX53QSB
The DRAM size can be easily detected at runtime on i.MX53. Implement
such detection on MX53QSB and adjust the rest of the macros accordingly
to use the detected values.

An important thing to note here is that we had to override the function
for trimming the effective DRAM address, get_effective_memsize(). That
is because the function uses CONFIG_MAX_MEM_MAPPED as the upper bound of
the available DRAM and we don't have gd->bd->bi_dram[0].size set up at
the time the function is called, thus we cannot put this into the macro
CONFIG_MAX_MEM_MAPPED . Instead, we use custom override where we use the
size of the first DRAM block which we just detected.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2014-03-31 18:28:51 +02:00
Marek Vasut
f79a023f41 arm: mx5: Fix memory slowness on MX53QSB
Fix memory access slowness on i.MX53 MX53QSB board. Let us inspect the
issue: First of all, the i.MX53 CPU has two memory banks mapped at
0x7000_0000 and 0xb000_0000 and each of those can hold up to 1GiB of
DRAM memory. Notice that the memory area is not continuous. On MX53QSB,
each of the banks contain 512MiB of DRAM, which makes a total of 1GiB
of memory available to the system.

The problem is how the relocation of U-Boot is treated on i.MX53 . The
U-Boot is placed at the ((start of first DRAM partition) + (gd->ram_size)) .
This in turn poses a problem, since in our case, the gd->ram_size is 1GiB,
the first DRAM bank starts at 0x7000_0000 and contains 512MiB of memory.
Thus, with this algorithm, U-Boot is placed at offset:

    0x7000_0000 + 1GiB - sizeof(u-boot and some small margin)

This is past the DRAM available in the first bank on MX53QSB, but is still
within the address range of the first DRAM bank. Because of the memory
wrap-around, the data can still be read and written to this area, but the
access is much slower.

There were two ideas how to solve this problem, first was to map both of
the available DRAM chunks next to one another by using MMU, second was to
define CONFIG_VERY_BIG_RAM and CONFIG_MAX_MEM_MAPPED to size of the memory
in the first DRAM bank. We choose the later because it turns out the former
is not applicable afterall. The former cannot be used in case Linux kernel
was loaded into the second DRAM bank area, which would be remapped and one
would try booting the kernel, since at some point before the kernel is started,
the MMU would be turned off, which would destroy the mapping and hang the
system.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2014-03-31 18:28:51 +02:00
Marek Vasut
e919aa23ef ARM: mx6: Add PCIe on SabreSDP
Add support for PCIe on MX6 SabreSDP board and enable the support
in the config file.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Liu Ying <Ying.Liu@freescale.com>
2014-03-31 18:28:50 +02:00
Marek Vasut
a778aeae05 pci: mx6: Implement power callback
Implement a callback to toggle the slot power supply. The callback
can be overriden in case some more complex power supply for the slot
was implemented in hardware, yet for the usual case, one can define
a GPIO which toggles the power to the slot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Liu Ying <Ying.Liu@freescale.com>
2014-03-31 18:28:50 +02:00
Eric Nelson
ed2f0e1ffa ARM: mx6: Disable PCIe on SABRE Lite/Nitrogen6x
Use of PCIe on SABRE Lite and Nitrogen6x boards
is atypical and requires the use of custom daughter
boards.

Use in U-Boot is even rarer, so this patch removes it from
the standard configuration.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
2014-03-31 18:28:50 +02:00
Fabio Estevam
3e94380b75 woodburn_sd: Remove CONFIG_BOOT_INTERNAL
CONFIG_BOOT_INTERNAL is not used anywhere, so let's remove it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2014-03-31 18:28:50 +02:00
Marek Vasut
2bbcccf552 ARM: mxs: Add OCOTP driver
Add yet another OCOTP driver for this i.MX family. This time, it's a driver for
the OCOTP variant found in the i.MX23 and i.MX28. This version of OCOTP is too
different from the i.MX6 one that I could not use the mxc_ocotp.c driver without
making it into a big pile of #ifdef . This driver implements the regular fuse
command interface, but due to the IP blocks' limitation, we support only READ
and PROG functions.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2014-03-31 18:28:50 +02:00
Marek Vasut
53e6b14e03 arm: mxs: Add support for generating signed BootStream
This patch adds the groundwork for generating signed BootStream, which
can be used by the HAB library in i.MX28. We are adding a new target,
u-boot-signed.sb , since the process for generating regular non-signed
BootStream is much easier. Moreover, the signed bootstream depends on
external _proprietary_ _binary-only_ tool from Freescale called 'cst',
which is available only under NDA.

To make things even uglier, the CST or HAB mandates a kind-of circular
dependency. The problem is, unlike the regular IVT, which is generated
by mxsimage, the IVT for signed boot must be generated by hand here due
to special demands of the CST. The U-Boot binary (or SPL binary) and IVT
are then signed by the CST as a one block. But here is the problem. The
size of the entire image (U-Boot, IVT, CST blocks) must be appended at
the end of IVT. But the size of the entire image is not known until the
CST has finished signing the U-Boot and IVT. We solve this by expecting
the CST block to be always 3904B (which it is in case two files, U-Boot
and the hand-made IVT, are signed in the CST block).

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2014-03-31 18:28:50 +02:00
Marek Vasut
9c2c8a3129 arm: mxs: Adjust the load address of U-Boot and SPL for HAB
When using HAB, there are additional special requirements on the placement of
U-Boot and the U-Boot SPL in memory. To fullfill these, this patch moves the
U-Boot binary a little further from the begining of the DRAM, so the HAB CST
and IVT can be placed in front of the U-Boot binary. This is necessary, since
both the U-Boot and the IVT must be contained in single CST signature. To
make things worse, the IVT must be concatenated with one more entry at it's
end, that is the length of the entire CST signature, IVT and U-Boot binary
in memory. By placing the blocks in this order -- CST, IVT, U-Boot, we can
easily align them all and then produce the length field as needed.

As for the SPL, on i.MX23/i.MX28, the SPL size is limited to 32 KiB, thus
we place the IVT at 0x8000 offset, CST right past IVT and claim the size
is correct. The HAB library accepts this setup.

Finally, to make sure the vectoring in SPL still works even after moving
the SPL from 0x0 to 0x1000, we add a small function which copies the
vectoring code and tables to 0x0. This is fine, since the vectoring code
is position independent.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2014-03-31 18:28:50 +02:00
Hannes Petermaier
96de041ed9 board: enable 32kHz RTC OSC at B&R boards
Since RTC-Clock is needed on all B&R boards, the OSC will be enabled
wihtin SPL-stage.

Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2014-03-31 11:19:41 -04:00
Stephen Warren
352580870c ARM: tegra: make all I2C ports open-drain
I2C protocol requires open-drain IOs. Fix the Dalmore and Venice2 pinmux
tables to configure the IOs correctly. Without this, Tegra may actively
drive the lines high while an external device is actively driving the
lines low, which can only lead to bad things.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2014-03-26 15:20:56 -07:00
Albert ARIBAUD
ab6423cae0 Merge branch 'u-boot/master' into 'u-boot-arm/master'
Trivial merge conflict, needed to manually remove
local_info as per commit 41364f0f.

Conflicts:
	board/samsung/common/board.c
2014-03-25 10:53:15 +01:00
Simon Glass
2c072c958b sandbox: config: Enable cros_ec emulation and related items
Enable the Chrome OS EC emulation for sandbox along with LCD, sound
expanded GPIOs and a few other options to make this work correctly.

Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:50 -06:00
Simon Glass
6e16d90aca sandbox: Add implementation of spi_setup_slave_fdt()
This function is needed when CONFIG_OF_SPI is defined.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:50 -06:00
Simon Glass
ab839dc3e6 sandbox: Add options to clean up temporary files
When jumping from one sandbox U-Boot to another in sandbox, the RAM buffer
is preserved in the jump by using a temporary file. Add an option to tell
the receiving U-Boot to remove this file when it is no longer needed.

Similarly the old U-Boot image is left behind in this case. We cannot delete
it immediately since gdb cannot then find its debug symbols. Delete it just
before exiting.

Together these changes ensure that temporary files are removed both for
memory and U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:49 -06:00
Simon Glass
ffb87905cb sandbox: Allow Ctrl-C to work in sandbox
It is useful for Cltl-C to be handled by U-Boot as it is on other boards.
But it is also useful to be able to terminate U-Boot with Ctrl-C.

Add an option to enable signals while in raw mode, and make this the
default. Add an option to leave the terminal cooked, which is useful for
redirecting output.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:49 -06:00
Simon Glass
20f86a0aea sandbox: Deal with conflicting getenv() for SDL
Unfortunately SDL requires getenv() to operate, since it wants to figure out
the display type. U-Boot has its own getenv() and they conflict. As a
work-around use #define to resolve the conflict.

A better but more complex solution might be to rename some U-Boot symbols
at link time. SDL audio is not functional at present, likely due to a related
issue.

Note: Vic Yank wrote a script for this, filed in crbug.com/271125.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:49 -06:00
Simon Glass
a77bf70978 sound: Move Samsung-specific code into its own file
The i2s code is in fact Samsung-specific, but there might be other
implementation. Move this code into its own file. This makes it slightly
more obviously how to adjust the code to support another SoC, when someone
takes this task on.

Also drop non-FDT support, since it isn't used on Exynos 5.

Tested-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:49 -06:00
Simon Glass
7d95f2a329 sandbox: Add LCD driver
Add a simple LCD driver which uses SDL to display the image. We update the
image regularly, while still providing for reasonable performance.

Adjust the common lcd code to support sandbox.

For command-line runs we do not want the LCD to be displayed, so add a
--show_lcd option to enable it.

Tested-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:49 -06:00
Simon Glass
c34c0246a3 sandbox: Add a simple sound driver
Add a sound driver for sandbox, which uses SDL.

Tested-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:48 -06:00
Simon Glass
bbc09bf27e sandbox: Add SDL library for LCD, keyboard, audio
SDL (Simple DirectMedia Layer - see www.libsdl.org) is a library which
provides simple graphics and sound features. It works under X11 and also
with a simple frame buffer interface. It is ideally suited to sandbox
U-Boot since it fits nicely with the low-level feature set required by
U-Boot. For example, U-Boot has its own font drawing routines, its own
keyboard processing and just needs raw sound output.

We can use SDL to provide emulation of these basic functions for sandbox.
This significantly expands the testing that is possible with sandbox.

Add a basic SDL library which we will use in future commits.

Tested-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:48 -06:00
Simon Glass
bda7773f04 sandbox: Add -j option to indicate a jump from a previous U-Boot
In order to support the 'go' command we allow the jumping U-Boot to pass its
filename to the new U-Boot image. This can then be used to delete that image
if required.

Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:48 -06:00
Simon Glass
47f5fcfb41 sandbox: Add os_jump_to_image() to run another executable
For some tests it is useful to be able to run U-Boot again but pass on the
same memory contents. Add a function to achieve this.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:48 -06:00
Simon Glass
b2a668b523 cros_ec: Implement I2C pass-through
The Chrome EC has a feature where you can access its I2C buses through a
pass-through arrangement. Add a command to support this, and export the
function for it also.

Reviewed-by: Vadim Bendebury <vbendeb@google.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:48 -06:00
Simon Glass
86bf601d04 sandbox: Plumb in Chrome OS EC emulation
Add board code to set up the Chrome OS EC on startup.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:48 -06:00
Simon Glass
df93d90aea cros_ec: sandbox: Add Chrome OS EC emulation
Add a simple emulation of the Chrome OS EC for sandbox, so that it can
perform various EC tasks such as keyboard handling.

Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:47 -06:00
Simon Glass
2ab83f0d75 cros_ec: Correct comparison between signed and unsigned numbers
Due to signed/unsigned comparison, '< sizeof(struct)' does not do the right
thing, since if ec_command() returns a -ve number we will consider this be
success.

Adjust all comparisons to avoid this problem.

This error was found with sandbox, which gives a segfault in this case. On
ARM we may instead silently fail.

We should also consider turning on -Wsign-compare to catch this sort of thing
in future.

Reviewed-by: Andrew Chew <achew@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
Tested-by: Andrew Chew <achew@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
2014-03-17 20:05:47 -06:00
Randall Spangler
a607028331 cros_ec: spi: Add support for EC protocol version 3
Protocol version 3 will be attempted first; if the EC doesn't support
it, u-boot will fall back to the old protocol version (2).

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:47 -06:00
Simon Glass
2d8ede58ca cros_ec: Add base support for protocol v3
Protocol v2 was shipped with snow, link and spring. Protocol v3 is for
pit and is targetted at SPI operation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:47 -06:00
Randall Spangler
e8c1266236 cros_ec: Clean up multiple EC protocol support
Version 1 protocols (without command version) were already no longer
supported in cros_ec.c.  This removes some dead code from the
cros_ec_i2c driver.

Version 2 protcols (with command version) are now called
protocol_version=2, instead of cmd_version_is_supported=1.

A subsequent change will introduce protocol version 3 for SPI.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:47 -06:00
Simon Glass
836bb6e827 cros_ec: Sync up with latest Chrome OS EC version
The EC messages have been expanded and some parts have been renamed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:47 -06:00
Simon Glass
1c266b9214 cros_ec: Move #ifdef to permit flash region access
Flash region access is not tied to having commands, so adjust the #ifdef
to reflect this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:46 -06:00
Simon Glass
e0dd81e3aa cros_ec: Support systems with no EC interrupt
Some systems do not have an EC interrupt. Rather than assuming that the
interrupt is always present, and hanging forever waiting for more input,
handle the missing interrupt. This works by reading key scans only until
we get an identical one. This means the EC keyscan FIFO is empty.

Tested-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:46 -06:00
Vadim Bendebury
4ff9b461a8 cros_ec: Drop old EC version support from EC driver
There is no need to support old style EC moving forward. Ultimately we
should get rid of the check_version() API. For now just return error
in case the EC does not seem to support the new API.

Reviewed-by: Vadim Bendebury <vbendeb@google.com>
Tested-by: Vadim Bendebury <vbendeb@google.com>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:46 -06:00
Simon Glass
d7f25f35f4 cros_ec: Add a function for decoding the Chrome OS EC flashmap
In order to talk to the EC properly we need to be able to understand the
layout of its internal flash memory. This permits emulation of the EC
for sandbox, and also software update in a system with a real EC.

Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:46 -06:00
Vadim Bendebury
41364f0fbe cros_ec: Move EC interface into common library
Add a common library for obtaining access to the Chrome OS EC. This is
used by boards which need to talk to the EC.

Reviewed-by: Vadim Bendebury <vbendeb@google.com>
Tested-by: Vadim Bendebury <vbendeb@google.com>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:46 -06:00
Simon Glass
006e73b9ca cros_ec: Add a function for reading a flash map entry
A flash map describes the layout of flash memory in terms of offsets and
sizes for each region. Add a function to read a flash map entry from the
device tree.

Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
2014-03-17 20:05:46 -06:00