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ARM: tegra: rename MASK_BITS_29_28 to MASK_BITS_31_28

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The only place where the MASK_BITS_* values are used is in
adjust_periph_pll(), which interprets the value 4 (old MASK_BITS_29_28,
new MASK_BITS_31_28) as being associated with mask OUT_CLK_SOURCE4_MASK,
i.e. bits 31:28. Rename the MASK_BITS_ macro to reflect how it's actually
implemented.

Note that no Tegra clock register actually uses all of bits 31:28 as
the mux field. Rather, bits 30:28, 29:28, or 28 are used. However, in
those cases, nothing is stored in the bits above the mux field, so it's
safe to pretend that the mux field extends all the way to the end of the
register. As such, the U-Boot clock driver is currently a bit lazy, and
doesn't distinguish between 31:28, 30:28, 29:28 and 28; it just lumps
them all together and pretends they're all 31:28. This patch doesn't
cause this issue; it was pre-existing. Hopefully, future patches will
clean this up.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This commit is contained in:
Stephen Warren 2014-01-24 10:16:18 -07:00 committed by Tom Warren
parent 0b01b53aa5
commit 5916a36ee9
3 changed files with 12 additions and 3 deletions
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2
arch/arm/cpu/tegra114-common/clock.c
View file

@ -103,7 +103,7 @@ static enum clock_id clock_source[CLOCK_TYPE_COUNT][CLOCK_MAX_MUX+1] = {
MASK_BITS_31_29},
{ CLK(PERIPH), CLK(CGENERAL), CLK(SFROM32KHZ), CLK(OSC),
CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
MASK_BITS_29_28}
MASK_BITS_31_28}
};
/*

2
arch/arm/cpu/tegra30-common/clock.c
View file

@ -102,7 +102,7 @@ static enum clock_id clock_source[CLOCK_TYPE_COUNT][CLOCK_MAX_MUX+1] = {
MASK_BITS_31_29},
{ CLK(PERIPH), CLK(CGENERAL), CLK(SFROM32KHZ), CLK(OSC),
CLK(NONE), CLK(NONE), CLK(NONE), CLK(NONE),
MASK_BITS_29_28}
MASK_BITS_31_28}
};
/*

11
arch/arm/include/asm/arch-tegra/clock.h
View file

@ -20,10 +20,19 @@ enum clock_osc_freq {
CLOCK_OSC_FREQ_COUNT,
};
/*
* Note that no Tegra clock register actually uses all of bits 31:28 as
* the mux field. Rather, bits 30:28, 29:28, or 28 are used. However, in
* those cases, nothing is stored in the bits about the mux field, so it's
* safe to pretend that the mux field extends all the way to the end of the
* register. As such, the U-Boot clock driver is currently a bit lazy, and
* doesn't distinguish between 31:28, 30:28, 29:28 and 28; it just lumps
* them all together and pretends they're all 31:28.
*/
enum {
MASK_BITS_31_30 = 2, /* num of bits used to specify clock source */
MASK_BITS_31_29,
MASK_BITS_29_28,
MASK_BITS_31_28,
};
#include <asm/arch/clock-tables.h>