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0b01b53aa5
The enum used to define the set of register bits used to represent a clock's input mux, MUX_BITS_*, is defined separately for each SoC at present. Move this definition to a common location to ease fixing up some issues with the definition, and the code that uses it. Signed-off-by: Tom Warren <twarren@nvidia.com> [swarren, extracted from a larger patch by Tom] Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> |
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| arm | ||
| avr32 | ||
| blackfin | ||
| m68k | ||
| microblaze | ||
| mips | ||
| nds32 | ||
| nios2 | ||
| openrisc | ||
| powerpc | ||
| sandbox | ||
| sh | ||
| sparc | ||
| x86 | ||
| .gitignore | ||