Commit graph

388 commits

Author SHA1 Message Date
Trent Piepho
a5d212a263 mpc8xxx: LCRR[CLKDIV] is sometimes five bits
On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits
instead of four.

In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems.  It
should be safe as the fifth bit was defined as reserved and set to 0.

Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV.

Signed-off-by: Trent Piepho <tpiepho@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Jon Loeliger <jdl@freescale.com>
2008-12-19 18:20:25 -06:00
Peter Tyser
9427ccde03 85xx: Add PORDEVSR_PCI1 define
Add define used to determine if PCI1 interface is in PCI or PCIX mode.

Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-12-04 03:15:43 -06:00
Peter Tyser
a2cd50ed6e 85xx: Add CPU 2 errata workaround to all 8548 boards
All mpc8548-based boards should implement the suggested workaround
to CPU 2 errata. Without the workaround, its possible for the
8548's core to hang while executing a msync or mbar 0 instruction
and a snoopable transaction from an I/O master tagged to make
quick forward progress is present.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2008-12-03 22:46:42 -06:00
Dave Liu
e57f0fa133 85xx: the DDR tlb is missed for the !CONFIG_SPD_EEPROM case
we need TLB entry for DDR at !SPD case.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2008-12-03 22:46:05 -06:00
Dave Liu
9b0ad1b1c7 85xx: remove the unused ddr_enable_ecc in the board file
The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2008-12-03 22:44:48 -06:00
Selvamuthukumar
9b827cf172 Align end of bss by 4 bytes
Most of the bss initialization loop increments 4 bytes
at a time. And the loop end is checked for an 'equal'
condition. Make the bss end address aligned by 4, so
that the loop will end as expected.

Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-11-18 23:13:16 +01:00
Becky Bruce
3f510db522 mpc8641: fix address-cells default in old .dts detection
address-cells defaults to 2, not 1; so in the unlikely
event that it isn't specified, this patch is required
for correct operation.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-11 09:44:10 -06:00
Becky Bruce
d52082b12c mpc8641: Try to detect old .dts files
Since we've changed the memory map of the board, be nice and
add some checking to try to catch out-of-date .dts files.  We do
this by checking the CCSRBAR location in the .dts and comparing
it to the CCSRBAR location in u-boot.  If they don't match, a
warning msg is printed.  This isn't foolproof, but it's simple and
will catch most of the cases where an out-of-date .dts is present,
including all of the cases where a new u-boot is used with an old
standard MPC8641 .dts file as supplied with Linux.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-10 10:10:05 -06:00
Becky Bruce
3111d32c49 mpc8641: Support 36-bit physical addressing
This patch creates a memory map with all the devices
in 36-bit physical space, in addition to the 32-bit map.
The CCSR relocation is moved (again, sorry) to
allow for the physical address to be 36 bits - this
requires translation to be enabled.  With 36-bit physical
addressing enabled, we are no longer running with VA=PA
translations.  This means we have to distinguish between
the two in the config file.  The existing region name is
used to indicate the virtual address, and a _PHYS variety
is created to represent the physical address.

Large physical addressing is not enabled by default.
Set CONFIG_PHYS_64BIT in the config file to turn this on.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-10 10:10:05 -06:00
Becky Bruce
c759a01a00 mpc8641: Change 32-bit memory map
The memory map on the 8641hpcn is modified to look more like
the 85xx boards; this is a step towards a more standardized
layout going forward. As part of this change, we now relocate
the flash.

The regions for some of the mappings were far larger than they
needed to be.  I have reduced the mappings to match the
actual sizes supported by the hardware.

In addition I have removed the comments at the head
of the BAT blocks in the config file, rather than updating
them.  These get horribly out of date, and it's a simple
matter to look at the defines to see what they are set to
since everything is right here in the same file.

Documentation has been changed to reflect the new map, as this
change is user visible, and affects the OS which runs post-uboot.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-10 10:10:04 -06:00
Becky Bruce
170deacb1d mpc8641: Drop imaginary second flash bank, map 8MB
There's a lot of setup and foo for the second flash
bank.  The problem is, this board doesn't actually have one.
Clean this up.  Also, the flash is 8M in size.  Get rid
of the confusing aliased overmapping, and just map 8M.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-10 10:10:03 -06:00
Jon Loeliger
33211469f7 Merge commit 'wd/master' 2008-11-10 10:04:51 -06:00
Wolfgang Denk
c06d9bbbeb Merge branch 'master' of git://git.denx.de/u-boot-coldfire 2008-11-09 00:01:42 +01:00
Becky Bruce
4c77de3f14 86xx: Make dram_size a phys_size_t
It's currently a long and should be phys_size_t.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-03 11:05:01 -06:00
Becky Bruce
af5d100e8d mpc8641: Make PCI and RIO mutually exclusive, fix non-PCI build
You can't actually have both, and with some coming changes to
change the memory map for the board and support 36-bit physical,
we need the extra BAT that is being consumed by having both.

I also make non-PCI configs build cleanly, for the sake of sanity.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-03 11:04:59 -06:00
Becky Bruce
98693b85d4 mpc8641: Stop supporting non-PCI_PNP configs
We don't actually ever do this, remove the code so we
can stop maintaining it.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-11-03 11:04:59 -06:00
TsiChung Liew
e4f69d1bd2 ColdFire: Fix M5329EVB and M5373EVB nand issue
Fix compilation issue caused by a few mismatches.
Provide proper nand chip select enable/disable in
nand_hwcontrol() rather than in board_nand_init()
just enable once. Remove redundant local nand driver
functions - nand_read_byte(), nand_write_byte() and
nand_dev_ready() to use common nand driver.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-11-03 09:45:59 -07:00
TsiChung Liew
536e7dac16 ColdFire: Add MCF5301x CPU and M53017EVB support
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-11-03 09:45:58 -07:00
TsiChung Liew
a21d0c2cc9 ColdFire: Add SBF support for M52277EVB
Add serial boot support

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-11-03 09:45:58 -07:00
TsiChung Liew
b202816c61 ColdFire: Use CFI driver for M5272C3
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-11-03 09:45:58 -07:00
TsiChung Liew
6e80f5aa09 ColdFire: Remove platforms mii.c file
Will use mcfmii.c driver in drivers/net rather than
keep creating new mii.c for each future platform.
Remove EB+MCF-EV123, cobra5272, idmr, M5235EVB,
M5271EVB, M5272C3, M5275EVB, M5282EVB, M5329EVB,
M5373EVB, M54451EVB, M54455EVB, M547xEVB, and M548xEVB's
mii.c

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-11-03 09:45:58 -07:00
TsiChung Liew
ac2331aee9 ColdFire: Remove linker file
Each different build for M54455EVB and M5235EVB will
create a u-boot.lds linker file. It is redundant to
keep the u-boot.lds

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-11-03 09:45:58 -07:00
Wolfgang Denk
3cbd823116 Coding Style cleanup, update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-11-02 16:14:22 +01:00
Jason Jin
c57fc28947 NAND: Add NAND support for MPC8536DS board
This patch defines 1M TLB&LAW size for NAND on MPC8536DS, assigns 0xffa00000
for CONFIG_SYS_NAND_BASE and adds other NAND supports in config file.
It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image.

Singed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-10-31 13:14:31 -05:00
Wolfgang Denk
a7faab9d11 Merge branch 'master' of git://git.denx.de/u-boot-mpc86xx 2008-10-30 20:57:46 +01:00
Dave Liu
5ba1ef5074 86xx: remove the second DDR LAW setting for mpc8641hpcn
The DDR1 LAW will precedence the DDR2 LAW, so remove
the second DDR LAW.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
2008-10-30 10:30:18 -05:00
Dave Liu
137a2dfd11 86xx: remove the unused ddr_enable_ecc in the board file
The DDR controller of 86xx processors have the ECC data init
feature, and the new DDR code is using the feature, we don't
need the way with DMA to init memory again.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Kumar Gala <kumar.gala@freescale.com>
2008-10-30 10:27:44 -05:00
Haiying Wang
c013b74975 NAND: Add support for MPC8572DS board
This patch defines 1M TLB&LAW size for NAND on MPC8572DS, assigns
0xffa00000 for CONFIG_SYS_NAND_BASE and adds other NAND supports in
config file.

It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image, to
make room for the increased code size with NAND enabled.

Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-10-29 13:08:17 -05:00
Haiying Wang
4e190b03aa Make Freescale local bus registers available for both 83xx and 85xx.
- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
  can be shared by both 83xx and 85xx
- Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
  files which use lbus83xx_t.
- Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
  85xx can share them.

Signed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-10-29 11:12:53 -05:00
Kumar Gala
c2083e0e11 86xx: Convert all fsl_pci_init users to new APIs
Converted MPC8610HCPD, MPC8641HPCN, and SBC8641D to use
fsl_pci_setup_inbound_windows() and ft_fsl_pci_setup().

With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
2008-10-24 17:35:48 -05:00
Kumar Gala
2dba0dea98 85xx: Convert all fsl_pci_init users to new APIs
Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS,
MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows()
and ft_fsl_pci_setup().

With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
2008-10-24 17:35:12 -05:00
Anton Vorontsov
3bf1be3c0c mpc83xx: add support for switching between USB Host/Function for MPC837XEMDS
With this patch u-boot can fixup the dr_mode and phy_type properties
for the Dual-Role USB controller.

While at it, also remove #ifdefs around includes, they are not needed.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-10-21 18:40:01 -05:00
Anton Vorontsov
00f7bbae92 mpc83xx: fix PCI scan hang on the standalone MPC837xE-MDS boards
The MPC837xE-MDS board's CPLD can auto-detect if the board is on the PIB,
standalone or acting as a PCI agent. User's Guide says:

- When the CPLD recognizes its location on the PIB it automatically
  configures RCW to the PCI Host.
- If the CPLD fails to recognize its location then it is automatically
  configured as an Agent and the PCI is configured to an external arbiter.

This sounds good. Though in the standalone setup the CPLD sets PCI_HOST
flag (it's ok, we can't act as PCI agents since we receive CLKIN, not
PCICLK), but the CPLD doesn't set the ARBITER_ENABLE flag, and without
any arbiter bad things will happen (here the board hangs during any config
space reads).

In this situation we must disable the PCI. And in case of anybody really
want to use an external arbiter, we provide "pci_external_aribter"
environment variable.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-10-21 18:34:14 -05:00
Anton Vorontsov
1da83a63d8 mpc83xx: add SGMII riser module support for the MPC8378E-MDS boards
This involves configuring the SerDes and fixing up the flags and
PHY addresses for the TSECs.

For Linux we also fix up the device tree.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-10-21 18:34:08 -05:00
Anton Vorontsov
55c531984d mpc83xx: fix serdes setup for the MPC8378E boards
MPC837xE specs says that SerDes1 has:

— Two lanes running x1 SGMII at 1.25 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.

And for SerDes2:

— Two lanes running x1 PCI Express at 2.5 Gbps;
— One lane running x2 PCI Express at 2.5 Gbps;
— Two lanes running x1 SATA at 1.5 or 3.0 Gbps.

The spec also explicitly states that PEX options are not valid for
the SD1.

Nevertheless MPC8378 RDB and MDS boards configure the SD1 for PEX,
which is wrong to do.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-10-21 18:33:25 -05:00
Anton Vorontsov
5c2ff323a9 mpc83xx: mpc8360emds: rework LBC SDRAM setup
Currently 64M of LBC SDRAM are mapped at 0xF0000000 which makes
it difficult to use (b/c then the memory is discontinuous and
there is quite big memory hole between the DDR/SDRAM regions).

This patch reworks LBC SDRAM setup so that now we dynamically
place the LBC SDRAM near the DDR (or at 0x0 if there isn't any
DDR memory).

With this patch we're able to:

- Boot without external DDR memory;
- Use most "DDR + SDRAM" setups without need to support for
  sparse/discontinuous memory model in the software.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-10-21 18:31:07 -05:00
Kumar Gala
1836881190 85xx: Fix compile warning in mpc8536ds.c
mpc8536ds.c: In function 'is_sata_supported':
mpc8536ds.c:615: warning: unused variable 'devdisr'

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-10-21 11:27:08 +02:00
Wolfgang Denk
8ed44d91c8 Cleanup: fix "MHz" spelling
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-10-21 11:25:39 +02:00
Jason Jin
2e26d837f1 Enabled the Freescale SGMII riser card on 8536DS
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
2008-10-18 21:54:08 +02:00
Liu Yu
7e183cad0c Enabled the Freescale SGMII riser card on 8572DS
This patch based on Andy's work.
Including command 'pixis_set_sgmii' support.

Signed-off-by: Liu Yu <yu.liu@freescale.com>
2008-10-18 21:54:07 +02:00
Liu Yu
bff188baf9 Make pixis_set_sgmii more general to support MPC85xx boards.
The pixis sgmii command depend on the FPGA support on the board, some 85xx
boards support SGMII riser card but did not support this command, define
CONFIG_PIXIS_SGMII_CMD for those boards which support the sgmii command.

Not like 8544, 8572 has 4 eTsec so that the other two's pixis bits
are not supported by 8544. Therefor, define PIXIS_VSPEED2_MASK and
PIXIS_VCFGEN1_MASK in header file for both boards.

Signed-off-by: Liu Yu <yu.liu@freescale.com>
2008-10-18 21:54:07 +02:00
Ed Swarthout
86be510f7b mpc8572 additional end-point mode
mpc8572 supports all pcie controllers as end-points with cfg_host_agent=0.
Include host_agent == 0 decode for end-point determination.

This is not needed for the ds reference board since pcie3 will be a host
in order to connect to the uli chip.  Include it here as a reference for
other mpc8572 boards.

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2008-10-18 21:54:05 +02:00
Ed Swarthout
f7fecc3e25 pixis do not print long help if not configured
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
2008-10-18 21:54:05 +02:00
Haiying Wang
c21617fd26 Add DDR options setting on MPC8641HPCN board
* Add board specific parameter table to choose correct cpo, clk_adjust,
write_data_delay based on board ddr frequency and n_ranks.

* Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2008-10-18 21:54:05 +02:00
Haiying Wang
4ca06607d6 Add ddr interleaving suppport for MPC8572DS board
* Add board specific parameter table to choose correct cpo, clk_adjust,
write_data_delay, 2T based on board ddr frequency and n_ranks.

* Set odt_rd_cfg and odt_wr_cfg based on the dimm# and CS#.

* Set memory controller interleaving mode to bank interleaving, and disable
bank(chip select) interleaving mode by default, because the default on-board
DDR DIMMs are 2x512MB single-rank.

* Change CONFIG_ICS307_REFCLK_HZ from 33333333 to 33333000.

Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2008-10-18 21:54:05 +02:00
Haiying Wang
dfb49108e4 Pass dimm parameters to populate populate controller options
Because some dimm parameters like n_ranks needs to be used with the board
frequency to choose the board parameters like clk_adjust etc. in the
board_specific_paramesters table of the board ddr file, we need to pass
the dimm parameters to the board file.

* move ddr dimm parameters header file from /cpu to /include directory.
* add ddr dimm parameters to populate board specific options.
* Fix fsl_ddr_board_options() for all the 8xxx boards which call this function.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2008-10-18 21:54:04 +02:00
Kumar Gala
7c0d4a7508 85xx: Improve flash remapping on MPC8572DS & MPC8536DS
Changing the flash from cacheable to cache-inhibited was taking a significant
amount of time due to the fact that we were iterating over the full 256M of
flash.  Instead we can just flush the L1 d-cache and invalidate the i-cache.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-10-18 21:54:04 +02:00
Jean-Christophe PLAGNIOL-VILLARD
6d0f6bcf33 rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-10-18 21:54:03 +02:00
Heiko Schocher
374b903829 Fix compiler warning in lib_ppc/board.c
Fix compiler warning introduced by commit 0f8cbc18

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-10-15 10:38:14 +02:00
Jason Jin
0f8cbc1829 Do not init SATA when disabled on 8536DS.
SGMII and SATA share the serdes on MPC8536 CPU, When SATA disabled and the
driver still try to access the SATA registers, the cpu will hangup.
This patch try to fix this by reading the serdes status before the SATA
initialize.

Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2008-10-14 17:57:27 +02:00
Nikita V. Youshchenko
ec4d8c1c1d fsl_diu: fix alignment error that caused malloc corruption
When aligning malloc()ed screen_base, invalid offset was added.
This not only caused misaligned result (which did not cause hardware
misbehaviour), but - worse - caused screen_base + smem_len to
be out of malloc()ed space, which in turn caused breakage of
futher malloc()/free() operation.

This patch fixes screen_base alignment.

Also this patch makes memset() that cleans framebuffer to be executed
on first initialization of diu, not only on re-initialization. It looks
correct to clean the framebuffer instead of displaying random garbage;
I believe that was disabled only because that memset caused breakage
of malloc/free described above - which no longer happens with the fix
described above.

Signed-off-by: Nikita V. Youshchenko <yoush@debian.org>
2008-10-14 15:29:37 +02:00
Wolfgang Denk
1f7bab0832 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2008-10-12 23:12:44 +02:00
Rafal Czubak
e46c7bfb8b FSL: Fix get_cpu_board_revision() return value.
get_cpu_board_revision() returned board revision based on information stored
in global static struct eeprom. It should instead use one from local struct
board_eeprom, to which the data is actually read from EEPROM. The bug led to
system hang after printing L1 cache information on U-Boot startup. The problem
was observed on MPC8555CDS system and possibly affects other Freescale MPC85xx
boards using CFG_I2C_EEPROM_CCID.

The change has been successfully tested on MPC8555CDS system.

Signed-off-by: Rafal Czubak <rcz@semihalf.com>
2008-10-08 13:19:12 -05:00
Anton Vorontsov
d26154c9a6 mpc83xx: spd_sdram: fix ddr sdram base address assignment bug
The spd_dram code shifts the base address, then masks 20 bits, but
forgets to shift the base address back. Fix this by just masking the
base address correctly.

Found this bug while trying to relocate a DDR memory at the base != 0.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-09-24 09:58:33 -05:00
Jean-Christophe PLAGNIOL-VILLARD
0e8d158664 rename CFG_ENV macros to CONFIG_ENV
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:06 +02:00
Jean-Christophe PLAGNIOL-VILLARD
5a1aceb068 rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASH
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:04 +02:00
Jean-Christophe PLAGNIOL-VILLARD
0cf4fd3cf8 rename environment.c in env_embedded.c to reflect is functionality
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-09-10 22:48:01 +02:00
Timur Tabi
e8d18541c6 Update Freescale 85xx boards to sys_eeprom.c
The new sys_eeprom.c supports both the old CCID EEPROM format and the new NXID
format, and so it obsoletes board/freescale/common/cds_eeprom.c.  Freescale
86xx boards already use sys_eeprom.c, so this patch migrates the remaining
Freescale 85xx boards to use it as well.  cds_eeprom.c is deleted.

Signed-off-by: Timur Tabi <timur@freescale.com>
2008-09-09 10:13:35 +02:00
Ben Warren
10efa024b8 Moved initialization of EEPRO100 Ethernet controller to board_eth_init()
Affected boards:
	db64360
	db64460
	katmai
	taihu
	taishan
	yucca
	cpc45
	cpu87
	eXalion
	elppc
	debris
	kvme080
	mpc8315erdb
	integratorap
	ixdp425
	oxc
	pm826
	pm828
	pm854
	pm856
	ppmc7xx
	sc3
	sc520_spunk
	sorcery
	tqm8272
	tqm85xx
	utx8245

Removed initialization of the driver from net/eth.c
Also, wrapped contents of pci_eth_init() by CONFIG_PCI.

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:19 -07:00
Ben Warren
ccdd12f83e Moved initialization of TSI108 Ethernet controller to board_eth_init()
Affected boards:
	mpc7448hpc2

Removed initialization of the driver from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:16 -07:00
Ben Warren
0b252f50ae Moved initialization of RTL8139 Ethernet controller to board_eth_init()
Affected boards:
	hidden_dragon
	MPC8544DS
	MPC8610HPCN
	R2DPLUS
	TB0229

Removed initialization of the driver from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:16 -07:00
Ben Warren
89973f8a82 Introduce netdev.h header file and remove externs
This addresses all drivers whose initializers have already
been moved to board_eth_init()/cpu_eth_init().

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:16 -07:00
Andy Fleming
5a8a163ac3 Add pixis_set_sgmii command
The 8544DS and 8572DS platforms support an optional SGMII riser card to
expose ethernet over an SGMII interface.  Once the card is in, it is also
necessary to configure the board such that it uses the card, rather than
the on-board ethernet ports.  This can either be done by flipping dip switches
on the motherboard, or by modifying registers in the pixis.  Either way
requires a reboot.

This adds a command to allow users to choose which ports are routed through
the SGMII card, and which through the onboard ports.  It also allows users
to revert to the current switch settings.

This code does not work on the 8572, as the PIXIS is different.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:15 -07:00
Andy Fleming
216f2a7156 Add SGMII support for the 8544 DS
The 8544 DS has an optional SGMII Riser card, which uses different PHY
addresses.  Check if we are in SGMII mode, and invoke the SGMII Riser
setup code if so.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:15 -07:00
Andy Fleming
652f7c2eef Add support for Freescale SGMII Riser Card
The 8544DS and 8572DS systems have an optional SGMII riser card which
exposes new ethernet ports which are connected to the eTSECs via an
SGMII interface.  The SGMII PHYs for this board are offset from the standard
PHY addresses, so this code modifies the passed in tsec_info structure to
use the SGMII PHYs on the card, instead.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-09-02 21:18:15 -07:00
TsiChung Liew
f78ced3028 ColdFire: Multiple fixes for MCF5445x platforms
Add FEC pin set and mii reset in __mii_init(). Change
legacy flash vendor from 2 to AMD LEGACY (0xFFF0),
change cfi_offset to 0, and change CFG_FLASH_CFI to
CONFIG_FLASH_CFI_LEGACY. Correct M54451EVB and
M54455EVB env settings in configuration file.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-28 09:16:54 -06:00
Wolfgang Denk
0ba6bfef06 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2008-08-28 00:26:52 +02:00
Kumar Gala
9490a7f1a9 mpc85xx: Add support for the MPC8536DS reference board
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Dejan Minic <minic@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:54 -05:00
Kumar Gala
129ba616b3 mpc85xx: Add support for the MPC8572DS reference board
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:53 -05:00
Kumar Gala
1167a2fd56 FSL DDR: Convert MPC8544DS to new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:50 -05:00
Jon Loeliger
e6f5b35b41 FSL DDR: Convert MPC8568MDS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:50 -05:00
Jon Loeliger
e31d2c1e2b FSL DDR: Convert MPC8548CDS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:50 -05:00
Jon Loeliger
aa11d85cf3 FSL DDR: Convert MPC8541CDS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:50 -05:00
Jon Loeliger
2b40edb10d FSL DDR: Convert MPC8555ADS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:49 -05:00
Jon Loeliger
8b625114e8 FSL DDR: Convert MPC8560ADS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:49 -05:00
Kumar Gala
9617c8d49a FSL DDR: Convert MPC8540ADS to new DDR code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 11:43:48 -05:00
Ben Warren
65d3d99c28 Moved initialization of ULI526X Ethernet driver to board code.
The only board using this driver is the Freescale MPC8610HPCD board.
Removed initialization for the driver from net/eth.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-08-26 22:17:45 -07:00
Jon Loeliger
39aa1a7348 FSL DDR: Convert MPC8610HPCD to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:06:03 +02:00
Kumar Gala
6a8e569293 FSL DDR: Convert MPC8641HPCN to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 02:06:02 +02:00
Randy Vinson
20220d22b9 mpc7448hpc2: Fix PCI I/O space mapping.
PCI I/O space is currently mapped 1:1 at 0xFA000000. Linux requires
PCI I/O space to start at 0 on the PCI bus. This patch maps PCI I/O
space such that 0xFA000000 in the processor's address space maps to 0
on the PCI I/O bus.

Signed-off-by Randy Vinson <rvinson@mvista.com>
Acked-by: Roy Zang <tie-fei.zang@freescale.com>
2008-08-26 23:23:49 +02:00
Ira W. Snyder
447ad5768a MPC8349EMDS: Add PCI Agent (PCISLAVE) support
Add the ability for the MPC8349EMDS to run in PCI Agent mode, acting as a
PCI card rather than a host computer.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-08-25 17:04:36 -05:00
Ira W. Snyder
162338e1fc MPC8349EMDS: use 83XX_GENERIC_PCI setup code
Change the MPC8349EMDS board to use the generic PCI initialization code
for the mpc83xx cpu.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-08-25 17:04:24 -05:00
Kim Phillips
ce0eb70333 Merge branch 'next' 2008-08-25 17:02:10 -05:00
Kumar Gala
fcd69a1a57 Clean up usage of icache_disable/dcache_disable
There is no point in disabling the icache on 7xx/74xx/86xx parts and not
also flushing the icache.  All callers of invalidate_l1_instruction_cache()
call icache_disable() right after.  Make it so icache_disable() calls
invalidate_l1_instruction_cache() for us.

Also, dcache_disable() already calls dcache_flush() so there is no point
in the explicit calls of dcache_flush().

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-19 00:57:28 +02:00
TsiChung Liew
4cb4e654ca ColdFire: Multiple fixes for M5282EVB
Incorrect CFG_HZ value, change 1000000 to 1000.
Rename #waring to #warning. RAMBAR1 uses twice
in start.S, rename the later to FLASHBAR. Insert
nop for DRAM setup. And, env_offset in linker file.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:31:56 -06:00
TsiChung Liew
10db3a17a2 ColdFire: Move m5282evb from board to board/freescale
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:31:56 -06:00
TsiChung Liew
56df091d39 ColdFire: Move m5272c3 from board to board/freescale
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:31:56 -06:00
TsiChung Liew
659e9bad62 ColdFire: Move m5271evb from board to board/freescale
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:31:56 -06:00
TsiChung Liew
05316f8ece ColdFire: Add M54451EVB platform support for MCF5445x
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:31:56 -06:00
TsiChung Liew
9f75155145 ColdFire: Implement SBF feature for M5445EVB
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:31:55 -06:00
TsiChung Liew
b2d022d1ac ColdFire: Use CFI Flash driver for M54455EVB
Remove non-common flash driver in
board/freescale/m54455evb/flash.c. The non-cfi flash will
use CONFIG_FLASH_CFI_LEGACY to configure the flash
attribute.

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:30:10 -06:00
TsiChung Liew
6d33c6acfa ColdFire: Add M5253DEMO platform support for MCF5253
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:30:10 -06:00
TsiChung Liew
d361307e73 ColdFire: Fix M5253EVB dram bring up issue
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-14 12:30:10 -06:00
Wolfgang Denk
28ac671910 Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2008-08-14 11:26:22 +02:00
Scott Wood
f64cb652a8 m5373evb: Update NAND driver to new API.
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-13 17:53:48 -05:00
Jean-Christophe PLAGNIOL-VILLARD
f5acb9fd9b mx31: move freescale's mx31 boards to vendor board dir
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2008-08-13 01:40:09 +02:00
Scott Wood
e4c0950854 NAND boot: MPC8313ERDB support
Note that with older board revisions, NAND boot may only work after a
power-on reset, and not after a warm reset.  I don't have a newer board
to test on; if you have a board with a 33MHz crystal, please let me know
if it works after a warm reset.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:31 -05:00
William Juul
cfa460adfd Update MTD to that of Linux 2.6.22.1
A lot changed in the Linux MTD code, since it was last ported from
Linux to U-Boot. This patch takes U-Boot NAND support to the level
of Linux 2.6.22.1 and will enable support for very large NAND devices
(4KB pages) and ease the compatibility between U-Boot and Linux
filesystems.

This patch is tested on two custom boards with PPC and ARM
processors running YAFFS in U-Boot and Linux using gcc-4.1.2
cross compilers.

MAKEALL ppc/arm has some issues:
 * DOC/OneNand/nand_spl is not building (I have not tried porting
   these parts, and since I do not have any HW and I am not familiar
   with this code/HW I think its best left to someone else.)

Except for the issues mentioned above, I have ported all drivers
necessary to run MAKEALL ppc/arm without errors and warnings. Many
drivers were trivial to port, but some were not so trivial. The
following drivers must be examined carefully and maybe rewritten to
some degree:
 cpu/ppc4xx/ndfc.c
 cpu/arm926ejs/davinci/nand.c
 board/delta/nand.c
 board/zylonite/nand.c

Signed-off-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Stig Olsen <stig.olsen@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2008-08-12 11:31:15 -05:00
Kumar Gala
c11528083e mpc85xx: workaround old binutils bug
The recent change to move the .bss outside of the image gives older
binutils (ld from eldk4.1/binutils-2.16) some headache:

ppc_85xx-ld: u-boot: Not enough room for program headers (allocated 3, need 4)
ppc_85xx-ld: final link failed: Bad value

We workaround it by being explicit about the program headers and not
assigning the .bss to a program header.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-10 22:41:12 +02:00
TsiChung Liew
35d3bd3cc3 Fix compilation error for MCF5275
Rename OBJ to COBJ in board/platform/Makefile

Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-08-01 12:33:59 +02:00
Kumar Gala
f0ff885ca6 mpc85xx: Update linker scripts for Freescale boards
* Move to using absolute addressing always.  Makes the scripts a bit more
  portable and common
* Moved .bss after the end of the image.  These allows us to have more
  room in the resulting binary image for code and data.
* Removed .text object files that aren't really needed
* Make sure _end is 4-byte aligned as the .bss init code expects this.
  (Its possible that the end of .bss isn't 4-byte aligned)

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-31 11:33:23 +02:00
Anton Vorontsov
021f6df6e9 83xx: mpc8315erdb: fix silly thinko in fdt_tsec1_fixup
The thinko was quite silly indeed, I messed with !ptr. Normally this
would trigger some fault, but in U-Boot NULL pointer is equal to phys
0, so the code was working still, just didn't actually test mpc8315erdb
environment variable value. Heh.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-07-16 14:16:44 -05:00
Anton Vorontsov
25f5f0d49a 83xx: mpc8315erdb: add support for switching between ULPI/UTMI USB PHYs
Freescale ships MPC8315E-RDB boards either with TSEC1 and USB UTMI
support, or without TSEC1 but with USB ULPI PHY support in addition.
With this patch user can specify desired USB PHY.

Also, it seems that we can't distinguish the two boards in software, so
user have to set `mpc8315erdb' environment variable to either 'tsec1'
(TSEC1 enabled) or `ulpi' (board with ULPI PHY, TSEC1 disabled), so that
Linux will not probe for TSEC1.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-07-16 14:16:44 -05:00
Wolfgang Denk
699f051255 Prepare v1.3.4-rc1: Code cleanup, update CHANGELOG, sort Makefile
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-15 22:22:44 +02:00
Wolfgang Denk
508548371e Merge branch 'master' of git://git.denx.de/u-boot-mpc86xx 2008-07-15 21:39:07 +02:00
Timur Tabi
e2d31fb345 Update Freescale sys_eeprom.c to handle CCID formats
Update the sys_eeprom.c file to handle both NXID and CCID EEPROM formats.  The
NXID format replaces the older CCID format, but it's important to support both
since most boards out there still use the CCID format.  This change is in
preparation for using one file to handle both formats.  This will also unify
EEPROM support for all Freescale 85xx and 86xx boards.

Also update the 86xx board header files to use the standard CFG_I2C_EEPROM_ADDR
instead of ID_EEPROM_ADDR.

Signed-off-by: Timur Tabi <timur@freescale.com>
2008-07-15 10:59:27 -05:00
Kumar Gala
630d9bfcb5 MPC8544DS: Add ATI Video card support
Add support for using a PCIe ATI Video card on PCIe2.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14 20:21:11 -05:00
Kumar Gala
e5852787f0 MPC8544DS: Report board id, board version and fpga version.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14 20:15:22 -05:00
Andy Fleming
ab5cda9f88 Remove LBC_CACHE_BASE from 8544 DS
The 8544 DS doesn't have any cacheable Local Bus memories set up.  By mapping
space for some anyway, we were allowing speculative loads into unmapped space,
which would cause an exception (annoying, even if ultimately harmless).
Removing LBC_CACHE_BASE, and using LBC_NONCACHE_BASE for the LBC LAW solves the
problem.

Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-07-14 11:21:33 -05:00
Wolfgang Denk
0740ac26f4 Merge branch 'master' of git://git.denx.de/u-boot-coldfire 2008-07-13 14:44:04 +02:00
Wolfgang Denk
bde6358762 Fix some more printf() format issues.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-11 22:56:11 +02:00
Wolfgang Denk
184f1b404a Fixed some out-of-tree build issues
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-11 22:55:31 +02:00
TsiChung Liew
ab4860b255 ColdFire: Fix power up issue for MCF5235
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
2008-07-11 10:45:58 -06:00
Wolfgang Denk
9b55a25369 Fix some more print() format errors.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-11 01:16:00 +02:00
Jon Loeliger
859f24350e Merge commit 'wd/master' 2008-07-10 12:05:32 -05:00
Matvejchikov Ilya
0e6989b9fa FDT memory and pci node fixes for MPC8260ADS
Signed-off-by: Matvejchikov Ilya <matvejchikov@gmail.com>
2008-07-09 23:57:59 +02:00
Wolfgang Denk
c8a3b109f0 Cleanup out-or-tree building for some boards (.depend)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02 23:49:18 +02:00
Wolfgang Denk
a30cc5a340 Cleanup: fix out-of-tree building for some boards
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02 23:38:50 +02:00
Wolfgang Denk
461fa68d20 Cleanup: replace hard-wired $(AR) 'crv' settings by $(ARFLAGS)
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-07-02 23:00:14 +02:00
Ben Warren
f8cc312bbe Move conditional compilation of MPC8XXX SPI driver to Makefile
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2008-07-01 21:02:11 +02:00
Wolfgang Grandegger
b4fe1a7109 MPC8360ERDK: adapt NAND interface for the re-written FSL NAND UPM driver
This patch is based on the following patch sent a few minutes ago:
"NAND FSL UPM: driver re-write using the hwcontrol callback"
It is untested, of course. Anton, could you please give it a try.

Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Acked-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2008-06-19 22:54:45 +02:00
Kumar Gala
a036b04436 MPC8610HPCD: Report board id, board version and fpga version.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-19 08:32:18 -05:00
Kumar Gala
7de8c21f14 MPC8641HPCN: Report board id, board version and fpga version.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-19 08:32:13 -05:00
Becky Bruce
9973e3c614 Change initdram() return type to phys_size_t
This patch changes the return type of initdram() from long int to phys_size_t.
This is required for a couple of reasons: long int limits the amount of dram
to 2GB, and u-boot in general is moving over to phys_size_t to represent the
size of physical memory.  phys_size_t is defined as an unsigned long on almost
all current platforms.

This patch *only* changes the return type of the initdram function (in
include/common.h, as well as in each board's implementation of initdram).  It
does not actually modify the code inside the function on any of the platforms;
platforms which wish to support more than 2GB of DRAM will need to modify
their initdram() function code.

Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc
MPC8641HPCN.

Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-12 08:50:18 +02:00
Wolfgang Denk
cdeb62e20d Merge branch 'master' of git://www.denx.de/git/u-boot-fdt 2008-06-11 22:30:47 +02:00
Wolfgang Denk
5ea67393b8 Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx
Conflicts:

	include/asm-ppc/fsl_lbc.h

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-06-11 21:33:16 +02:00
Kumar Gala
859a86a25c 85xx/86xx: Move to dynamic mgmt of LAWs
With the new LAW interface (set_next_law) we can move to letting the
system allocate which LAWs are used for what purpose.  This makes life
a bit easier going forward with the new DDR code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Jon Loeliger <jdl@freescale.com>
Acked-by: Becky Bruce <becky.bruce@freescale.com>
2008-06-11 01:52:23 -05:00
Kumar Gala
ddde74a159 85xx: remove dummy board_early_init_f
A number of board ports have empty version of board_early_init_f
for no reason since we control its via CONFIG_BOARD_EARLY_INIT_F.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-11 00:36:02 -05:00
Kumar Gala
978e81604c 85xx: Remove unused and unconfigured memory test code.
Remove unused and unconfigured DDR test code from FSL 85xx boards.
Besides, other common code exists.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-06-11 00:35:52 -05:00
Gerald Van Baren
fec6d9ee7c Remove the deprecated CONFIG_OF_FLAT_TREE
Use CONFIG_OF_LIBFDT instead to support flattened device trees.  It is
cleaner, has better functionality, and is better supported.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2008-06-09 21:13:35 -04:00
Gerald Van Baren
589c04271d Convert mpc7448hpc2 to CONFIG_OF_LIBFDT
This was configured to use the deprecated CONFIG_OF_FLAT_TREE, change
to CONFIG_OF_LIBFDT.

WARNING: This conversion is untested because I do not have a board to
test it on.

NOTE: The FDT blob (DTS) must have an /aliases/ethernet0 and (optionally)
/aliases/ethernet1 property for the ethernet to work.

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2008-06-09 21:13:24 -04:00
Jon Loeliger
1a247ba7fa Merge commit 'wd/master' 2008-06-06 10:48:31 -05:00
Haavard Skinnemoen
d255bb0e78 SPI API improvements
This patch gets rid of the spi_chipsel table and adds a handful of new
functions that makes the SPI layer cleaner and more flexible.

Instead of the spi_chipsel table, each board that wants to use SPI
gets to implement three hooks:
  * spi_cs_activate(): Activates the chipselect for a given slave
  * spi_cs_deactivate(): Deactivates the chipselect for a given slave
  * spi_cs_is_valid(): Determines if the given bus/chipselect
    combination can be activated.

Not all drivers may need those extra functions however. If that's the
case, the board code may just leave them out (assuming they know what
the driver needs) or rely on the linker to strip them out (assuming
--gc-sections is being used.)

To set up communication parameters for a given slave, the driver needs
to call spi_setup_slave(). This returns a pointer to an opaque
spi_slave struct which must be passed as a parameter to subsequent SPI
calls. This struct can be freed by calling spi_free_slave(), but most
driver probably don't want to do this.

Before starting one or more SPI transfers, the driver must call
spi_claim_bus() to gain exclusive access to the SPI bus and initialize
the hardware. When all transfers are done, the driver must call
spi_release_bus() to make the bus available to others, and possibly
shut down the SPI controller hardware.

spi_xfer() behaves mostly the same as before, but it now takes a
spi_slave parameter instead of a spi_chipsel function pointer. It also
got a new parameter, flags, which is used to specify chip select
behaviour. This may be extended with other flags in the future.

This patch has been build-tested on all powerpc and arm boards
involved. I have not tested NIOS since I don't have a toolchain for it
installed, so I expect some breakage there even though I've tried
fixing up everything I could find by visual inspection.

I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
DataFlash drivers posted as a follow-up. I'd like some help testing
other boards that use the existing SPI API.

But most of all, I'd like some comments on the new API. Is this stuff
usable for everyone? If not, why?

Changed in v4:
  - Build fixes for various boards, drivers and commands
  - Provide common struct spi_slave definition that can be extended by
    drivers
  - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
  - Make default bus and mode build-time configurable
  - Override default SPI bus ID and mode on mx32ads and imx31_litekit.

Changed in v3:
  - Add opaque struct spi_slave for controller-specific data associated
    with a slave.
  - Add spi_claim_bus() and spi_release_bus()
  - Add spi_free_slave()
  - spi_setup() is now called spi_setup_slave() and returns a
    struct spi_slave
  - soft_spi now supports four SPI modes (CPOL|CPHA)
  - Add bus parameter to spi_setup_slave()
  - Convert the new i.MX32 SPI driver
  - Convert the new MC13783 RTC driver

Changed in v2:
  - Convert the mpc8xxx_spi driver and the mpc8349emds board to the
    new API.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Tested-by: Guennadi Liakhovetski <lg@denx.de>
2008-06-03 20:28:50 +02:00
York Sun
a48ff68d23 Replace DPRINTF with debug
Remove DPRINTF macro and replace it with generic debug macro.

Signed-off-by: York Sun <yorksun@freescale.com>
2008-05-21 00:54:36 +02:00
York Sun
3b80c5f574 Move pixel clock setting to board file
The clock divider has different format in 5121 and 8610. This patch moves it to
board specific code.

Signed-off-by: York Sun <yorksun@freescale.com>
2008-05-21 00:54:36 +02:00
Wolfgang Denk
53677ef18e Big white-space cleanup.
This commit gets rid of a huge amount of silly white-space issues.
Especially, all sequences of SPACEs followed by TAB characters get
removed (unless they appear in print statements).

Also remove all embedded "vim:" and "vi:" statements which hide
indentation problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-05-21 00:14:08 +02:00
Jon Loeliger
2c289e320d mpc86xx: Removed unused and unconfigured memory test code.
Besides, other common code exists.

Signed-off-by: Jon Loeliger <jdl@freescale.com>
2008-05-19 09:47:25 -05:00
Andy Fleming
66f5fa9263 85xx: Limit CPU2 workaround to parts that have the errata
Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
2008-05-07 16:54:31 -05:00
Kumar Gala
4d77f5102d MPC8610HPCD: Drop -O2 from the build flags
Make the flags use -Os like all other boards

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-05-03 20:49:10 +02:00
Kumar Gala
45239cf415 85xx/86xx: Rename ext_refrec to timing_cfg_3 to match docs
All the 85xx and 86xx UM describe the register as timing_cfg_3
not as ext_refrec.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-29 11:44:29 -05:00
Ed Swarthout
f97abbfb47 MPC8544DS: decode pcie3 end-point configuration correctly.
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-04-26 00:25:30 +02:00
Jason Wessel
3d36be0300 Remove all the search paths from the .lds files.
The cross compiler is responsible for providing the correct libraries
and the logic to find the linking libraries.

Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
2008-04-17 23:57:32 -07:00
Wolfgang Denk
1aeed8d71a Coding Style cleanup; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2008-04-13 09:59:26 -07:00
Dave Liu
5fb5a689d8 mpc83xx: Fix the bug of serdes initialization
Currently the serdes will not be initializated due to the
partid's error.

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-04-11 17:46:18 -05:00
Jean-Christophe PLAGNIOL-VILLARD
1ac4f320bf mpc837xerdb: Fix warning: implicit declaration of function 'fdt_fixup_dr_usb'
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-04-11 17:46:17 -05:00
Wolfgang Denk
2c78febd11 Merge branch 'master' of git://www.denx.de/git/u-boot-coldfire 2008-04-08 00:10:17 +02:00
TsiChung Liew
bae61eefe1 ColdFire: Add dspi and serial flash support for MCF5445x
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
2008-03-31 15:10:29 -06:00
Matthew Fettke
545c8e0a7c ColdFire: Added M5275EVB support.
Signed-off-by: Matthew Fettke <mfettke@videon-central.com>
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
2008-03-31 15:10:11 -06:00
TsiChung Liew
77878f16ce ColdFire: Fix second memory Chipselect for M5475EVB
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Acked-by: John Rigby <jrigby@freescale.com>
2008-03-31 15:17:10 -05:00
Michael Barkowski
5b2793a3f3 mpc8323erdb: fix EEPROM page size and get MAC from EEPROM
This patch fixes eeprom page size so that you can now write more than
64 bytes at a time.

It also makes the board take MAC addresses, if found, from EEPROM.

User should place up to 4 addresses at offset 0x7f00, for
eth{,1,2,3}addr.  Any unused addresses should be zero.  This group of
four six-byte values should have it's CRC at the end.  crc32 and
eeprom commands can be used to accomplish this.

If CRC fails, MAC addresses come from the environment.  If CRC
succeeds, the environment is overwritten at startup.

Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2008-03-28 16:02:27 -05:00