Commit graph

5193 commits

Author SHA1 Message Date
Tam Nguyen
c8eaebb426 ARM: dts: renesas: Enable sysinfo on R-Car V3H Condor/Condor-I
Add new sysinfo IDs for R-Car V3H Condor/Condor-I .

Enable support for sysinfo on R-Car V3H Condor/Condor-I. The sysinfo is
used e.g. to access and decode board-specific information and then in
turn used by board-info to print those information.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com>
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[Marek: Drop compatible from I2C node, this is in r8a77980.dtsi already.
        Drop status = "okay" from EEPROM node.
	Add dts: tag.
	Update the commit message, note the new sysinfo IDs.
	Fix Kconfig EEPROM address to be 0x50 and match the DT, sync config.]
2023-03-10 17:46:09 +01:00
Ashok Reddy Soma
9b669ef059 arm64: dts: zynqmp: Enable nand-on-flash-bbt in DT by default
By default enable nand-on-flash-bbt DT flag, so that driver always refers
to the bad block table(bbt) present on the flash device.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230224050709.30014-5-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09 13:15:00 +01:00
Ashok Reddy Soma
9207c48491 arm64: dts: zynqmp: Fix nand dt node
DC3 nand node is not correct, it is showing all partitions under
controller node directly. Create two sub nand nodes with partitions for
each.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20230224050709.30014-4-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09 13:15:00 +01:00
Michal Simek
dd0ebfe8a4 arm64: zynqmp: Remove comment about gem spec in kv260
The latest SOM specification doesn't enforce certain MIO lines allocated
for ethernet or ethernet controller itself. That's why remove comment about
it which is likely there from early version of specification.
Also removed the same comment from pinctrl node. It is clear that it has to
be defined for different carrier cards.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9406377bf2c391ac0200670511bd6b0edb097c96.1676880543.git.michal.simek@amd.com
2023-03-09 13:15:00 +01:00
Ilias Apalodimas
89f0f14fe2 arm64: zynqmp: Add an OP-TEE node to the device tree
Since the zynqmp boards can run upstream OP-TEE, and having the DT node
present doesn't cause any side effects add it in case someone tries to
load OP-TEE.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Link: https://lore.kernel.org/r/20230216133921.866786-1-ilias.apalodimas@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09 13:15:00 +01:00
Michal Simek
cfa39857de ARM: zynq: Comment interrupt names IRQs for pl330
pl330 DT yaml description doesn't define interrupt-names property that's
why comment it but keep it as comment.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8e5a921c16efe09030fda036340186c11dd990bf.1672908030.git.michal.simek@amd.com
2023-03-09 13:15:00 +01:00
Krzysztof Kozlowski
89c3a5151c ARM: dts: zynq-7000: drop useless 'dma-channels/requests' properties
The pl330 DMA controller provides number of DMA channels and requests
through its registers, so duplicating this information (with a chance of
mistakes) in DTS is pointless.  Additionally the DTS used always wrong
property names which causes DT schema check failures - the bindings
documented 'dma-channels' and 'dma-requests' properties without leading
hash sign.

Reported-by: Rob Herring <robh@kernel.org>
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20220430121902.59895-2-krzysztof.kozlowski@linaro.org
2023-03-09 13:15:00 +01:00
Krzysztof Kozlowski
4837ff416d ARM: dts: xilinx: align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-31-krzysztof.kozlowski@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09 13:15:00 +01:00
Michal Simek
5331845db4 ARM: zynq: Use recommended dma-controller name instead of dmac
Use standard name for dma controller. Issue is reported by dtbs_check as
dmac@f8003000: $nodename:0: 'dmac@f8003000' does not match
'^dma-controller(@.*)?$'

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5637d7e3464fbc1b2b269a7df35e24edc2c8d4ac.1672908080.git.michal.simek@amd.com
2023-03-09 13:15:00 +01:00
Michael Grzeschik
06ba3c252f arm64: zynqmp: Enable hs termination flag for USB dwc3 controller
Since we need to support legacy phys with the dwc3 controller,
we enable this quirk on the zynqmp platforms.

Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Link: https://lore.kernel.org/r/20221023215649.221726-1-m.grzeschik@pengutronix.de
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09 13:15:00 +01:00
Krzysztof Kozlowski
b4b2f7bb5f arm64: dts: xilinx: align LED node names with dtschema
The node names should be generic and DT schema expects certain pattern:

  xilinx/zynqmp-zcu100-revC.dtb: leds: 'vbus-det' does not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221125144136.477171-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09 13:15:00 +01:00
Michal Simek
a09d9278a5 xilinx: dts: Remove cdns,zynq-gem
cdns prefix was deprecated and replaced by xlnx one in upstream Linux. Also
U-Boot driver has been updated to support new compatible string that's why
it is time to remove it and deprecate it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-03-09 13:14:59 +01:00
Devarsh Thakkar
885198536d am62a7: dts: Enable full 4GB LPDDR4
AM62A7-SK board has 4GB LPDDR4 Micron MT53E2G32D4DE-046 AUT:B part
but only 2GB was enabled early.

Enable full 4GB memory by updating the latter 2GB memory region
which gets mapped to 0x0880000000 i.e. DDR16SS0_SDRAM as referred in
Table 2-1. AM62A Common SoC Memory of AM62Ax TRM [1].

[1] : https://www.ti.com/lit/zip/spruj16
Logs: https://gist.github.com/devarsht/e85b6af89c01ddadb3a62f3e5f196af8

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
2023-03-06 17:06:17 -05:00
Kunihiko Hayashi
051451ad83 ARM: dts: uniphier: Sync DT with Linux v6.2
Synchronize devicetree sources with Linux v6.2.

- Use GIC interrupt definitions
- Add reg properties in USB-glue and SoC-glue node
- Fix node names to follow the generic names list in DT specification
- Add L2 cache and AHCI nodes
- Update nand and pcie nodes
- And some trivial fixes

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Marek Vasut <marex@denx.de>
2023-03-06 17:05:40 -05:00
Kunihiko Hayashi
e800263d56 ARM: dts: uniphier: Switch USB node to the original
UniPhier DT applies its own USB node for U-Boot due to the USB driver
constrains. After solving this issue, u-boot allows the original USB node.

After switching USB node, synchronization of USB node with Linux becomes
possible.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Marek Vasut <marex@denx.de>
2023-03-06 17:05:40 -05:00
Andre Przywara
8e2c0ee3ba sunxi: dts: arm64: update devicetree files from Linux v6.2-rc2
Sync the devicetree files from the Linux kernel repo, v6.2-rc2.
This is covering the 64-bit SoCs, from arch/arm64/boot/dts/allwinner.

This enables GPU power management in the kernel for the H6, enables
Bluetooth on the Pinebook, and adds USB to the H616 devices (just
for newer Linux kernels at the moment, U-Boot support is pending).

As before, this omits the non-backwards compatible changes to the R_INTC
controller, to remain compatible with older kernels.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-03-05 23:33:14 +00:00
Andre Przywara
6621cc85f7 sunxi: dts: arm: update devicetree files from Linux v6.2-rc2
Sync the devicetree files from the Linux kernel repo, v6.2-rc2.
This is covering the 32-bit SoCs, from arch/arm/boot/dts.

This enables some new devices for the F1C100s family, though this is of
little relevance to U-Boot itself.
The H3 gains the "phys" property for the first USB controller, which
prevents an error message when U-Boot's USB stack comes up, and allows
using this port in host mode.

As before, this omits the non-backwards compatible changes to the R_INTC
controller, to remain compatible with older kernels.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-03-05 23:33:13 +00:00
Tom Rini
b0eda49bc9 First set of u-boot-at91 fixes for the 2023.04 cycle
-----BEGIN PGP SIGNATURE-----
 
 iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAmP+97wcHGV1Z2VuLmhy
 aXN0ZXZAY29sbGFib3JhLmNvbQAKCRAesx4CDqwvyExpB/wLQVjeBM+sEcABzT52
 c7qtAvtgl/UbPedYyMz2YorL5BcHsdmBbGfSzBISEc8kLdtAVMTKAaqvN7msaJFX
 MwPIZAXWd8cPM0EA7wSyjYDGOvcEzGWF7oxSbeq+j7M2kibvsQLGW7iaY5cjFIzx
 QPQ19T2tyX3jrsy8dxCsPivB70vB/3lqiEmCZX2UddsjxrL6Vt2H3k6O+/Ler5wS
 /nJIzKLDPc+aDZSv+aevDlJZi1eGkpTHldNaHXqdYILzvnXIQmA6kP0mWPZ9g6wZ
 s6ed1N5VeiS4j6oH5Woj3nDKny7P3AKSd9+c/eXfbtdia2D0yBHtiHQauIwNPCd3
 wAcH
 =/Vn2
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-at91-fixes-2023.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91

First set of u-boot-at91 fixes for the 2023.04 cycle:

This fixes set include one clock index fix for sama7g5 and two board
configuration alignments for pm9g45.
2023-03-01 09:39:18 -05:00
Eugen Hristev
3bf8e40807 board: rockchip: add Radxa ROCK5B Rk3588 board
ROCK 5B is a Rockchip RK3588 based SBC (Single Board Computer) by Radxa.

There are tree variants depending on the DRAM size : 4G, 8G and 16G.

Specification:

    Rockchip Rk3588 SoC
    4x ARM Cortex-A76, 4x ARM Cortex-A55
    4/8/16GB memory LPDDR4x
    Mali G610MC4 GPU
    MIPI CSI 2 multiple lanes connector
    eMMC module connector
    uSD slot (up to 128GB)
    2x USB 2.0, 2x USB 3.0
    2x HDMI output, 1x HDMI input
    Ethernet port
    40-pin IO header including UART, SPI, I2C and 5V DC power in
    USB PD over USB Type-C
    Size: 85mm x 54mm

Kernel commits:
a1d3281450ab ("arm64: dts: rockchip: Add rock-5b board")
6fb13f888f2a ("arm64: dts: rockchip: Update sdhci alias for rock-5b")

Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:29 +08:00
Jonas Karlman
3a539e0862 rockchip: rk3588: Read cpuid from otp
Read cpuid from otp and set ethaddr for RK3588.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:29 +08:00
Jonas Karlman
2eedb6d93f rockchip: rk3568: Read cpuid from otp
The cpuid on RK3568 is located at 0xa instead of 0x7 as all other SoCs.
Add and use a CFG_CPUID_OFFSET to define this offset.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:28 +08:00
Jagan Teki
15b2d1fb72 board: rockchip: Add Edgeble Neural Compute Module 6
Neural Compute Module 6(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RK3588 from Edgeble AI.

General features:
- Rockchip RK3588
- up to 32GB LPDDR4x
- up to 128GB eMMC
- 2x MIPI CSI2 FPC

On module WiFi6/BT5 is available in the following Neu6 variants.

Neural Compute Module 6(Neu6) IO board is an industrial form factor
ready-to-use IO board from Edgeble AI.

IO board offers plenty of peripherals and connectivity options and
this patch enables basic eMMC and UART which is enough to successfully
boot Linux.

Neu6 needs to mount on top of this IO board in order to create a
complete Edgeble Neural Compute Module 6(Neu6) IO platform.

Boot log for the record,

DDR Version V1.08 20220617
LPDDR4X, 2112MHz
channel[0] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[1] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[2] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
channel[3] BW=16 Col=10 Bk=8 CS0 Row=16 CS1 Row=16 CS=2 Die BW=16 Size=2048MB
Manufacturer ID:0x6
CH0 RX Vref:31.7%, TX Vref:21.8%,21.8%
CH1 RX Vref:30.7%, TX Vref:22.8%,23.8%
CH2 RX Vref:30.7%, TX Vref:22.8%,22.8%
CH3 RX Vref:30.7%, TX Vref:21.8%,21.8%
change to F1: 528MHz
change to F2: 1068MHz
change to F3: 1560MHz
change to F0: 2112MHz
out

U-Boot SPL 2023.01-00952-g1d1785a516-dirty (Jan 30 2023 - 19:53:55 +0530)
Trying to boot from MMC1
INFO:    Preloader serial: 2
NOTICE:  BL31: v2.3():v2.3-391-g856309329:derrick.huang
NOTICE:  BL31: Built : 14:15:50, Jul 18 2022
INFO:    ext 32k is not valid
INFO:    GICv3 without legacy support detected.
INFO:    ARM GICv3 driver initialized in EL3
INFO:    system boots from cpu-hwid-0
INFO:    idle_st=0x21fff, pd_st=0x11fff9, repair_st=0xfff70001
INFO:    dfs DDR fsp_params[0].freq_mhz= 2112MHz
INFO:    dfs DDR fsp_params[1].freq_mhz= 528MHz
INFO:    dfs DDR fsp_params[2].freq_mhz= 1068MHz
INFO:    dfs DDR fsp_params[3].freq_mhz= 1560MHz
INFO:    BL31: Initialising Exception Handling Framework
INFO:    BL31: Initializing runtime services
WARNING: No OPTEE provided by BL2 boot loader, Booting device without OPTEE initialization. SMC`s destined for OPTEE will return SMC_UNK
ERROR:   Error initializing runtime service opteed_fast
INFO:    BL31: Preparing for EL3 exit to normal world
INFO:    Entry point address = 0xa00000
INFO:    SPSR = 0x3c9

U-Boot 2023.01-00952-g1d1785a516-dirty (Jan 30 2023 - 19:53:55 +0530)

Model: Edgeble Neu6A IO Board
DRAM:  7.5 GiB (effective 3.7 GiB)
Core:  71 devices, 15 uclasses, devicetree: separate
MMC:   mmc@fe2c0000: 0
Loading Environment from nowhere... OK
In:    serial@feb50000
Out:   serial@feb50000
Err:   serial@feb50000
Model: Edgeble Neu6A IO Board
Net:   No ethernet found.
Hit any key to stop autoboot:  0
=>

Add support for Edgeble Neu6 Model A IO Board.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:28 +08:00
Jagan Teki
95c8656b72 ARM: dts: rockchip: rk3588s-u-boot: Add sdmmc node
Booting from SDMMC is one of the fast and easy booting methods
for initial support of any SoC to upstream more features. 

This patch is trying to add the sdmmc node for rk3588 and added
as u-boot specific node in -u-boot.dtsi as upstream Linux is not
supporting yet.

As soon as Linux supports it, a sync of the Linux device tree
would eventually drop this node. 

Clock properties as added according to the rockchip mmc driver
but the actual definition might add scmi clocks into 0 and 1
indexes. This is due to scmi clock are not supporting in upstream
U-Boot. Properly addition of scmi clock would eventually follow
sdmmc clock definition of Linux once they upstreamed.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2023-02-28 18:07:28 +08:00
Jagan Teki
2a8481ec16 ARM: dts: rockchip: Add rk3588-u-boot.dtsi
Add u-boot,dm-spl and u-boot,dm-pre-reloc related properties
for Rockchip RK3588 SoC to boot the SPL.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:28 +08:00
Jagan Teki
5457e15272 arm64: dts: rockchip: rk3588: Add Edgeble Neu6 Model A IO
Neural Compute Module 6(Neu6) IO board is an industrial form factor
ready-to-use IO board from Edgeble AI.

IO board offers plenty of peripherals and connectivity options and
this patch enables basic eMMC and UART which is enough to successfully
boot Linux.

Neu6 needs to mount on top of this IO board in order to create a
complete Edgeble Neural Compute Module 6(Neu6) IO platform.

commit <a5079a534554> ("arm64: dts: rockchip: rk3588: Add Edgeble Neu6
Model A IO")

Add support for Edgeble Neu6 Model A IO Board.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:28 +08:00
Jagan Teki
a0e94b877c arm64: dts: rockchip: rk3588: Add Edgeble Neu6 Model A SoM
Neural Compute Module 6(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RK3588 from Edgeble AI.

General features:
- Rockchip RK3588
- up to 32GB LPDDR4x
- up to 128GB eMMC
- 2x MIPI CSI2 FPC

On module WiFi6/BT5 is available in the following Neu6 variants.

Neu6 needs to mount on top of associated Edgeble IO boards for
creating complete platform solutions.

Enable eMMC for now to boot Linux successfully.

commit <3d9a2f7e7c5e> ("arm64: dts: rockchip: rk3588: Add Edgeble Neu6
Model A SoM")

Add support for Edgeble Neu6 Model A SoM.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:28 +08:00
Jagan Teki
515773ba9d arm64: dts: rockchip: Add base DT for rk3588 SoC
This initial version supports CPU, dma, interrupts, timers, UART and
SDHCI (everything necessary to boot Linux on this system on chip) as
well as Ethernet, I2C, PWM and SPI.

The DT is split into rk3588 and rk3588s, which is a reduced version
(i.e. with less peripherals) of the former.

commit <9fb232e9911f> (" arm64: dts: rockchip: Add base DT for rk3588
SoC")
commit <d68a97d501f8> ("arm64: dts: rockchip: Add rk3588 pinctrl data")

Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:28 +08:00
Chris Morgan
e92754e20c arm64: dts: rockchip: add gpio-ranges property to gpio nodes
Add gpio-ranges property to GPIO nodes so that the bank ID can
be correctly derived for each GPIO bank.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:27 +08:00
Chris Morgan
e2df30c6c6 arm64: dts: rockchip: Sync rk356x from Linux main
Sync rk3566 and rk3568 from the mainline Linux kernel (6.2-rc2 as of
this writing).

Note that this will rename the rk3568-evb to rk3568-evb1-v10.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:27 +08:00
Chris Morgan
02cbda2b72 dts: rockchip: px30: add gpio-ranges property to gpio nodes
Add the gpio-ranges property to each GPIO node for use in deriving
the correct bank ID. Note that invoking "gpio status -a" no longer
causes the board to hit a "Synchronous Abort".

Fixes: 537b1a2774 ("rockchip: add px30 devicetrees")

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:27 +08:00
Jagan Teki
3abfd33e57 arm64: dts: rk356x-u-boot: Drop combphy1 assigned-clocks/rates
combphy1 is failing to probe due to unhandled assigned-clocks and
assigned-clocks-rates.

=> usb start
starting USB...
Bus usb@fd000000: Failed to get PHY1 for usb@fd000000
Port not available.
Bus usb@fd800000: USB EHCI 1.00

There is no real requirement for them in U-Boot to handle, hence
mark them as deleted-properties for the  probe to success

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:27 +08:00
Jagan Teki
3dd126155c board: rockchip: Add Radxa Compute Module 3 IO Board
Radxa Compute Module 3(CM3) IO board an application board from Radxa
and is compatible with Raspberry Pi CM4 IO form factor.

Radxa CM3 needs to mount on top of this IO board in order to create
complete Radxa CM3 IO board platform.

Add support for Radxa CM3 IO Board defconfig and -u-boot.dtsi

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2023-02-28 18:07:27 +08:00
Jagan Teki
3356c67d1f arm64: dts: rockchip: rk3566: Add Radxa Compute Module 3 IO
Radxa Compute Module 3(CM3) IO board an application board from Radxa
and is compatible with Raspberry Pi CM4 IO form factor.

Specification:
- 1x HDMI,
- 2x MIPI DSI
- 2x MIPI CSI2
- 1x eDP
- 1x PCIe card
- 2x SATA
- 2x USB 2.0 Host
- 1x USB 3.0
- 1x USB 2.0 OTG
- Phone jack
- microSD slot
- 40-pin GPIO expansion header
- 12V DC

Radxa CM3 needs to mount on top of this IO board in order to create
complete Radxa CM3 IO board platform.

linux-next commit for the same,

commit <8f19828844f2> ("arm64: dts: rockchip: Fix compatible for Radxa
CM3")

Add support for Radxa CM3 IO Board.

Co-developed-by: FUKAUMI Naoki <naoki@radxa.com>
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Co-developed-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:26 +08:00
Jagan Teki
63391b198a arm64: dts: rockchip: rk3566: Add Radxa Compute Module 3
Radxa Compute Module 3(CM3) is one of the modules from a series
System On Module based on the Radxa ROCK 3 series and is compatible
with Raspberry Pi CM4 pinout and form factor.

Specification:
- Rockchip RK3566
- up to 8GB LPDDR4
- up to 128GB high performance eMMC
- Optional wireless LAN, 2.4GHz and 5.0GHz IEEE 802.11b/g/n/ac wireless,
  BT 5.0, BLE with onboard and external antenna.
- Gigabit Ethernet PHY

Radxa CM3 needs to mount on top of this IO board in order to create
complete Radxa CM3 IO board platform.

Since Radxa CM3 is compatible with Raspberry Pi CM4 pinout so it is
possible to mount Radxa CM3 on top of the Rasberry Pi CM4 IO board.

linux-next commit for the same,

commit <8f19828844f2> ("arm64: dts: rockchip: Fix compatible for Radxa
CM3")

Add support for Radxa CM3.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Co-developed-by: FUKAUMI Naoki <naoki@radxa.com>
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2023-02-28 18:07:26 +08:00
Akash Gajjar
6cd6ed9da5 arm64: dts: rockchip: rk3308: Add Radxa ROCK Pi S support
Add Radxa ROCK 3 Model A support. sync rk3308-rock-pi-s.dts from
Linux 6.2.0-rc7.

ROCK Pi S is RK3308 based SBC from radxa.com. ROCK Pi S has a,
- 256MB/512MB DDR3 RAM
- SD, NAND flash (optional on board 1/2/4/8Gb)
- 100MB ethernet, PoE (optional)
- Onboard 802.11 b/g/n wifi + Bluetooth 4.0 Module
- USB2.0 Type-A HOST x1
- USB3.0 Type-C OTG x1
- 26-pin expansion header
- USB Type-C DC 5V Power Supply

Linux commit commit for the same,
<2e04c25b1320> ("arm64: dts: rockchip: add ROCK Pi S DTS support")

Signed-off-by: Akash Gajjar <gajjar04akash@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:26 +08:00
Akash Gajjar
b44c54f600 arm64: dts: rockchip: rk3568: Add Radxa ROCK 3 Model A board support
Add Radxa ROCK 3 Model A support. sync rk3568-rock-3a.dts from Linux 6.2.0-rc7

Board Specifications
- Rockchip RK3568
- 2/4/8GB LPDDR4 3200MT/s
- eMMC socket, SD card slot
- GbE LAN
- PCIe 3.0/2.0
- M.2 Connector
- 3.5mm Audio jack with mic
- HDMI 2.0, MIPI DSI/CSI
- USB 3.0 Host/OTG, USB 2.0 Host
- 40-pin GPIO expansion ports
- USB Type C PD 2.0, 9V/2A, 12V/2A, 15V/2A, 20V/2A

Refer Linux commit <22a442e6586c>
("arm64: dts: rockchip: add basic dts for the radxa rock3 model a")

Signed-off-by: Akash Gajjar <gajjar04akash@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:26 +08:00
Jonas Karlman
4773e9d5ed rockchip: Use an external TPL binary on RK3568
Rockchip SoCs typically use U-Boot TPL to initialize DRAM, then jumps
back to BootRom to load next stage, U-Boot SPL, into DRAM. BootRom then
jumps to U-Boot SPL to continue the normal boot flow.

However, there is no support to initialize DRAM on RK35xx SoCs using
U-Boot TPL and instead an external TPL binary must be used to generate a
bootable u-boot-rockchip.bin image.

Add CONFIG_ROCKCHIP_EXTERNAL_TPL to indicate that an external TPL should
be used. Build U-Boot with ROCKCHIP_TPL=/path/to/ddr.bin to generate a
bootable u-boot-rockchip.bin image for RK3568.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Eugen Hristev <eugen.hristev@collabora.com>
2023-02-28 18:07:26 +08:00
Jonas Karlman
f0498b2be2 rockchip: dts: rk3328: fix sdram params
The rk3328 sdram driver read sdram parameters from the devicetree into a
struct rk3328_sdram_params using dev_read_u32_array.

After commit 5ab30c3176 ("ram: rockchip: Update ddr pctl regs for px30")
changed the size of struct ddr_pctl_regs, a member of struct
rk3328_sdram_params, U-Boot TPL can no longer initialize DRAM on RK3328.

Add ten u32 to the sdram parameter array in devicetree to align with
this size change. This fixes DRAM initialization on RK3328.

Fixes: 5ab30c3176 ("ram: rockchip: Update ddr pctl regs for px30")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # roc-rk3328-cc
2023-02-28 18:07:26 +08:00
Christian Kohlschütter
2492ba8a3b arm: dts: rockchip: rk3399: nanopi-r4s: Provide smbios sysinfo
Provide human-readable manufacturer and product names for the
FriendlyELEC NanoPi R4S.

Enable CONFIG_SYSINFO and CONFIG_SYSINFO_SMBIOS by default.

Signed-off-by: Christian Kohlschütter <christian@kohlschutter.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-02-28 18:07:26 +08:00
Mihai Sain
1415cdac77 ARM: dts: at91: sama7g5: fix clock id for ebi node
The PMC_MCK1 clock id for the ebi node is 23.

Fixes: 746b738224 ("ARM: dts: at91: sama7g5/sama7g5ek: align with Linux DT")
Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com>
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
2023-02-28 10:38:19 +02:00
Tom Rini
5b197eee33 Prepare v2023.04-rc3
-----BEGIN PGP SIGNATURE-----
 
 iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmP9LHYACgkQFHw5/5Y0
 tyw3Ogv+IhcqqlK1MpF6me6j0nyZpl5Vc29J+ghO8xPr/nzEhlcq8HUcBdM8QaEd
 3oMkD6m6HsZMWjrz/eWM5Oa742j/yqfbr+6H7NwFutyNOQ/aIrCoD9fbAzszd2ii
 fANFn0vftOApnqn0dHXqodam31+MrOWnffcz2jyJXvhwcFxYDcv5yboFsFA5GVtA
 5l3ko8PGaRp/RwNAqMlEWX3DgXWKjglIo+yiyntJqh3HJ+t3BMlwIrhq1NdWQxPk
 M3K5znl836bb10ULXeItGMtdlPviqRKzqqgy6HgVU/66qaoJUFzdL0kyydWqR/Zv
 5XrFvvyYT9go3IA6mnZmNsO4/L/lEUEOXRsQWoPxW/QROuNtltuEpxwjmg+pDLlr
 9uV/ZdEGtHj/fEPEs6BdslnrQmGGA0akzBh85jcofE8Lm7+7RB1uIj9hUrOub4Qr
 DKQHUORVmu3qVOQgK03VIHBg43figMCEU4voZbuFeVUdXC6FQHpQrxSxL7uemrvW
 Cg8/Hyrc
 =PwNP
 -----END PGP SIGNATURE-----

Merge tag 'v2023.04-rc3' into next

Prepare v2023.04-rc3
2023-02-27 17:28:21 -05:00
Svyatoslav Ryhel
23d24df34c ARM: tegra: Fix Tegra PWM parent clock
Default parent clock for the PWM on Tegra is a 32kHz clock and
is unable to support the requested PWM period.

Fix PWM support on Tegra20, Tegra30, Tegra114, Tegra124 and Tegra210 by
updating the parent clock for the PWM to be the PLL_P.

This commit is equivalent to Linux kernel commit:
https://lore.kernel.org/all/20221010100046.6477-1-jonathanh@nvidia.com/

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF T30
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101 T20
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # ASUS TF201 T30
Tested-by: Thierry Reding <treding@nvidia.com> # T30 and T124
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Tom <twarren@nvidia.com>
2023-02-23 12:55:36 -07:00
Paweł Anikiel
48c172c2f8 arm: dts: chameleonv3: Add 270-2 variant
Add devicetree for chameleonv3 with the 270-2I2-D11E variant of the
Mercury+ AA1 module

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-02-22 00:28:39 +01:00
Paweł Anikiel
9c107ab42b arm: dts: chameleonv3: Rename chameleonv3.dts to .dtsi
This file is included by the different chameleonv3 variants. Change the
name to .dtsi.

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-02-22 00:28:39 +01:00
Paweł Anikiel
1d222089f0 arm: dts: chameleonv3: Override chameleonv3 bitstream names
Set the bitstream name per Chameleon variant. This allows the same
boot filesystem with all bitstream variants to be used on different
boards.

Signed-off-by: Paweł Anikiel <pan@semihalf.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-02-22 00:28:39 +01:00
Simon Glass
8c103c33fb dm: dts: Convert driver model tags to use new schema
Now that Linux has accepted these tags, move the device tree files in
U-Boot over to use them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-14 09:43:26 -07:00
Tom Rini
d7bcd6ee40 Merge tag 'i2c-updates-for-v2023.04' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c updates for v2023.04

- add new i2c driver ast2600 from Ryan Chen

- i2c-cdns: make read fifo-depth configurable through device tree
  from Pei Yue Ho

- mxc i2c driver: print base address in hex, not in decimal
  from Fabio
2023-02-13 09:57:35 -05:00
Tony Dinh
dd15284b74 arm: kirkwood: Enable uart0 dm-pre-reloc for Pogoplug V4 board
When DM_SERIAL is enabled, the device-tree tag u-boot,dm-pre-reloc is
required for this board to boot over UART with kwboot. Enable this in
kirkwood-pogoplug-series-4-u-boot.dtsi.

Added by Stefan while applying:
Please note that it's not fully understood, why this property really
is needed. Here a link to the discussion about this:

https://lore.kernel.org/r/20230201080210.ypz4nrj4y2igwxz3@pali/

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-02-13 10:15:04 +01:00
Tony Dinh
b21f87a5a5 arm: mvebu: Add support for Synology DS116 (Armada 385)
Synology DS116 is a NAS based on Marvell Armada 385 SoC.

Board Specification:

- Marvel MV88F6820 Dual Core at 1.8GHz
- 1 GiB DDR3 RAM
- 8MB Macronix mx25l6405d SPI flash
- I2C
- 2x USB 3.0
- 1x GBE LAN port (PHY: Marvell 88E1510)
- 1x SATA (6 Gbps)
- 3x LED
- PIC16F1829 (connected to uart1)
- GPIO fan
- serial console

Note that this patch depends on the add-support for Thecus N2350 patch:
https://patchwork.ozlabs.org/project/uboot/patch/20230201231306.7010-1-mibodhi@gmail.com/

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
2023-02-13 10:14:50 +01:00
Tony Dinh
3fdd09f90f arm: mvebu: Add support for Thecus N2350 (Armada 385) board
Thecus N2350 is a NAS based on Marvell Armada 385 SoC.

Specification:

- Processor: Marvel MV88F6820 Dual Core at 1GHz
- 1 GiB DDR4 RAM
- 4MB Macronix mx25l3205d SPI flash
- 512MB Hynix H27U4G8F2DTR-BC NAND flash
- I2C
- 2x USB 3.0
- 1x GBE LAN port (PHY: Marvell 88E1510)
- 2x SATA (hot swap slots)
- 3x buttons
- 10x LEDS
- serial console

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-02-13 10:14:50 +01:00
Ryan Chen
87f5b5d683 arm: aspeed: dtsi: add reg for i2c
The i2c driver have global register that i2c bus use
ofnode_get_parent to get parent register address.

Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2023-02-13 09:57:58 +01:00
Jade Lovelace
a5e490f14e socfpga: fix the serial console on DE1-SoC
Previously, the TX LED would flash but nothing would appear on the
serial port, and the board would appear dead with a build of the
socfpga_cyclone5_defconfig. I have verified that adding the frequency to
the uart will fix the serial console on my board.

Thanks to @ehoffman on the Rocketboards forum:
https://forum.rocketboards.org/t/cyclonev-programming-fpga-from-u-boot/2230/30

Signed-off-by: Jade Lovelace <lists@jade.fyi>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-02-12 15:47:19 -05:00
Dzmitry Sankouski
2ea062265f dts: add missing linux,code in gpio-keys
gpio-keys linux driver enforces user to specify linux,code.
Add missing linux,code before implementing button input support.

- arch/arm/dts/rk3288-popmetal.dtsi -> KEY_POWER
- arch/arm/dts/rk3288-tinker.dtsi -> KEY_POWER
- arch/arm/dts/am3517-evm-ui.dtsi -> KEY_RECORD
- sandbox/dts/sandbox.dtsi -> BTN_1
- sandbox/dts/sandbox.dts -> BTN_1

Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-02-10 12:50:01 -05:00
Sumit Garg
baf0677b74 dts: qcs404-evb: Add I2C controller nodes
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Sumit Garg
de8f42c93a dts: qcs404-evb: Add ethernet controller node
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Sumit Garg
56443285f2 pinctrl-snapdragon: Get rid of custom drive-strength values
Use standard pinconf drive-strength values from Linux DT bindings rather
than ones based on custom u-boot header. These changes are in direction
to make u-boot DTs for Qcom SoCs to be compatible with standard Linux
DT bindings.

Also, add support for pinconf bias-pull-up.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Sumit Garg
0d6def46e0 qcs404-evb: Enable msm_gpio driver support
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
2023-02-10 12:50:00 -05:00
Roger Quadros
4599bb7d79 arm: dts: k3-am64: Fix CPSW3G ethernet
As MDIO driver does not support Driver Model, the
pinctrl settings in the MDIO node will not
be applied resulting in PHY not being detected.

To workaround this we add the MDIO pinctrl in
the CPSW3G node in the -u-boot.dtsi file.

Add the missing MDIO and RGMII pinctrl nodes in
k3-am642-r5-evm.dts

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-02-06 13:04:53 -05:00
Roger Quadros
f85631d06f arm: dts: k3-am6: Fix "EEPROM not available" error
We need to enable i2c0 so u-boot can read from EEPROM.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-02-06 13:04:53 -05:00
Roger Quadros
ffefc72083 arm: dts: k3-am64: sync with Linux DT files
Sync AM64 DT files with Linux v6.2-rc4

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-02-06 13:04:53 -05:00
Tim Harvey
c3d9736d54 board: gw_ventana: enable MV88E61XX DSA support
Add MV88E61XX DSA support:
 - update dt to provide internal MDIO bus and port handles.
   U-Boot requires a more restrictive subset of the dt bindings
   required by Linux for the sake of simplifying code
 - update defconfig to remove old driver and enable new one
 - replace mv88e61xx_hw_reset weak override with board_phy_config support
   for register configuration that is outside the scope of the DSA driver

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
2023-02-02 14:44:53 -05:00
Marek Vasut
71d2a5e5ef ARM: dts: rmobile: Synchronize DTs with Linux 6.1.7
Synchronize R-Car device trees with Linux 6.1.7,
commit 21e996306a6afaae88295858de0ffb8955173a15 .

The following script has been used for the synchronization:

$ for i in $(cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) ; do
	if [ -e /linux-2.6/arch/arm64/boot/dts/renesas/$i ] ; then
		cp /linux-2.6/arch/arm64/boot/dts/renesas/$i arch/arm/dts/ ;
	elif [ -e /linux-2.6/arch/arm/boot/dts/$i ] ; then
		cp /linux-2.6/arch/arm/boot/dts/$i arch/arm/dts/
	else
		echo "NOT FOUND: $i"
	fi
done
$ git add $( ( cd arch/arm/dts/ ; ls -1 r8a* | grep -v 'u-boot.dts' ; sed -n '/#include/ s@.*"\(.*\)"@\1@p' $(ls -1 r8a* | grep -v 'u-boot.dts')) | tr " " "\n" | sed 's@^@arch/arm/dts/@g' )

Move the include/dt-bindings/{clk,clock}/versaclock.h header used by
the renesas boards to match Linux 6.1.y as well.

Keep arch/arm/dts/r8a774c0-u-boot.dtsi sdhi3 node as it is now used
by the arch/arm/dts/r8a774c0-cat874.dts board.

Pick s@spi-flash@flash@ change in arch/arm/dts/r8a779a0-falcon-u-boot.dts
from "ARM: dts: Synchronize R-Car V3U DTs with Linux 5.18.3" .

Adjust R8A77990 Ebisu CONFIG_SYS_MMC_ENV_DEV from 2 to 0 to reflect
the card enumeration in ebisu.dtsi /aliases DT node .

Adjust R8A7795 and R8A7796 ULCB CONFIG_SYS_MMC_ENV_DEV from 1 to 0 to
reflect the card enumeration in ulcb.dtsi /aliases DT node .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Tam Nguyen <tam.nguyen.xa@renesas.com> # r8a779a0-falcon-u-boot.dts
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> # r8a779a0-falcon-u-boot.dts
2023-02-02 01:49:19 +01:00
Tom Rini
3592a61fa8 For 2023.04
-----------
 
 - several conversion to DM_SERIAL and DM_I2C
 - fixes for Toradex boards
 - PSCI
 
 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/14965
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQS2TmnA27QKhpKSZe309WXkmmjvpgUCY9oyZQ8cc2JhYmljQGRl
 bnguZGUACgkQ9PVl5Jpo76aRSACfTkUWr+8n4hmllhry2c8K+gCM2QMAnRMK0o8U
 4eUOumy6t5bFeUO69n5W
 =y7+C
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-imx-20230201' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

For 2023.04
-----------

- several conversion to DM_SERIAL and DM_I2C
- fixes for Toradex boards
- PSCI

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/14965
2023-02-01 09:30:52 -05:00
Oleksandr Suvorov
f42c0726fd arm: dts: imx8mn-u-boot: use versioned ddr4 firmware
NXP tested imx8mn-ddr4 with firmware version 201810 only. Use this
version for all imx8mn targets with DRAM DDR4.

Fixes: 93c4c0e4dd ("arm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi")

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-31 19:44:23 +01:00
Michael Trimarchi
6dac63adca engicam: imx6: migrate to DM_SERIAL
Add the needed DT overrides and configs to enable UART in SPL.

Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Tested-by: Suniel Mahesh <sunil@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-31 19:44:23 +01:00
Tim Harvey
3041e094e4 board: gateworks: venice: poll I2C lines to wait for GSC firmware
In some situations the GSC firmware where the EEPROM containing the
model and DRAM configuration may not be ready by the time the SoC
is ready to talk to it over I2C.

Instead of a hard delay, poll the I2C lines to wait until they are
released to avoid the I2C drivers 'Arbitation lost' error message.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-31 18:08:23 +01:00
Tim Harvey
a4dc847b60 arm: dts: imx8m*-venice-*: add I2C GPIO bus recovery support
Add I2C GPIO bus recovery support by adding scl-gpios and sda-gpios for the
various I2C busses on Gateworks Venice boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-31 18:08:23 +01:00
Tim Harvey
4e2e2f8984 arm64: dts: imx8m{m, n}-venice-gw7902: add gpio pins for new board revision
Add gpio pins present on new board revision:
 * LTE modem support (imx8mm-gw7902 only)
  - lte_pwr#
  - lte_rst
  - lte_int
 * M2 power enable
  - m2_pwr_en
 * off-board 4.0V supply
  - vdd_4p0_en

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2023-01-31 18:08:23 +01:00
Tom Rini
095d909cf1 - jethub j100: add rescue boot from microSD
- move meson sm command to cmd/meson and add efusedump sub-command
 - switch dwc2 otg to DM for G12A, GXL & AXG
 - Add new boards:
  - Odroid Go Ultra
  - Odroid-N2L
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmPY1OsACgkQd9zb2sjI
 SdEo4w//WU0siViTHkco8GH7eZDrRKbsxgMZpmjih2gblDKfxmMPYFFtciXPH3wg
 isBu+qfLFtTIg5oEvwS42G4RzNQPV8HDcpc7Md/3n3GtxF1l/dCo0nvfIi9PsuLB
 x1GYAJ5yphgOC85DB55Gnq7sj7L2/7z6dd/HFGO691+3Bcbq8RH6DDZ0MNZpiiUK
 Ns43u+A6Ydc2/fpX9U7X2wf7CoEk77qWmiN2N1egVIeRsBallPxs/DPNLI2q7AGZ
 OGY+M3lVynRlNJULdgljqvVm1/KjlsVGHRwDAFD7Gl6HhGymxhXJJuNTh+le4ruw
 f5KLpUI9mEEmST6NfKqj+8Ozd3q8c1EHD0baKupIeTaherWi/sD9DpnMli4efrUj
 CkrBPqgxScxauuYAbMjRmKJgICRzNMJAsKX57q8s0TjhWyAfoTKIPWHUpSjAeDRE
 1pWblV0WZWFErMmdHllINFtFYl+XBCi/1qp2t8AYA06DPnBrY2s/eY9pxih0G7nB
 tzNkqWTwMAJ7PYOzDA7mv80n2Q2zjqJV55dzjRRehA3XSuP920qFVMVShSYv28O6
 fh8t84rdqfvFMSnQy6zHaxGEJIwaH9C6aFM8MGak2WLI1EYLIxVi79qf+T3iMbdj
 gkKvt5m4kF7Ul8nB/7Az7nNH1JdHgVRXLIzo+lam4AdYccONvVI=
 =cmt7
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-amlogic-20230131' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- jethub j100: add rescue boot from microSD
- move meson sm command to cmd/meson and add efusedump sub-command
- switch dwc2 otg to DM for G12A, GXL & AXG
- Add new boards:
 - Odroid Go Ultra
 - Odroid-N2L
2023-01-31 10:15:39 -05:00
Max Krummenacher
d3655bbb13 ARM: arm: colibri-imx6ull-emmc: fix emmc access
Synchronizing the device tree with linux introduced a regression.
The U-Boot specific dtsi mustn't override the alias settings for
the eMMC/SD interfaces.

Without this U-Boot cannot access the eMMC and boot the kernel.

Fixes: c21b61bff1 ("colibri-imx6ull/-emmc: synchronise device tree with linux")
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
2023-01-31 16:02:05 +01:00
Marek Vasut
9694c0532a arm: dts: imx8m: Require ATF BL31 blob only if not PSCI provider
In case U-Boot itself if the PSCI provider on i.MX8M, do not
require the ATF BL31 blob, as at that point the blob is useless
and would interfere with U-Boot operation.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-31 15:46:39 +01:00
Detlev Casanova
0b32bc4831 imx6q-sabrelite: Re-add mmc aliases
In commit d0399a46e7, the device tree was
synchronized from linux and the aliases were dropped.

They need to be kept so that the mmc cards are in the right order.
Without the aliases, u-boot reports:
MMC:   FSL_SDHC: 2, FSL_SDHC: 3

With the aliases, u-boot reports:
MMC:   FSL_SDHC: 0, FSL_SDHC: 1

The upstream linux device tree does not contain the same aliases than
u-boot (It keeps the devices order with /dev/mmcblk2 and /dev/mmcblk3).
Because this board has been using different aliases in u-boot
and linux, a imx6q-sabrelite-u-boot.dtsi file is added to be
automatically included in imx6q-sabrelite.dts.

This way, linux and u-boot each keep their own aliases and there
is no breakage on current installations.

This should never be done for new boards as we want to keep linux and
u-boot with the same aliases as much as possible.
This patch is only necessary to avoid breaking existing setups.

Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-31 15:46:39 +01:00
Peng Fan
1224dd8b15 imx: mx6sxsabreauto: select DM_SERIAL
Select DM_SERIAL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-01-31 12:11:34 +01:00
Peng Fan
2108db6c92 imx: mx6sllevk: select DM_SERIAL
Select DM_SERIAL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-01-31 12:11:34 +01:00
Peng Fan
3a6d7ef389 imx: mx6ull/z_14x14_evk: clean up UART iomux
After DM_SERIAL, and set pinctrl_uart1 as pre-reloc, no need initialize
iomux at board file.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-01-31 12:11:33 +01:00
Ye Li
0e28622779 ARM: dts: imx8ulp-evk: Fix iomuxc issue
The property fsl,mux_mask is deleted by commit ed7bda5 (imx8ulp:
synchronise device tree with linux). This causes the pinctrl
driver not work on 8ULP, so fail to print any log.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2023-01-30 23:23:02 +01:00
Ying-Chun Liu (PaulLiu)
624c9dea92 dts: imx8mp-rsb3720: modify configrations to load fip into memory
The changes of commit 6a21c69521 ("arm: dts: imx8mp: add of-list
support to common imx8mp-u-boot.dtsi") breaks the loading of the fip.
This commit fixes the break by modify the configuration properly.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 23:23:02 +01:00
Ying-Chun Liu (PaulLiu)
8b7036e6aa dts: imx8mp: assign binman_configuration label to config-SEQ
assign a label for config-SEQ so that the board dts can modify
the configuration more easily.

Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP i.MX U-Boot Team <uboot-imx@nxp.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 23:23:02 +01:00
Fabio Estevam
d12618b927 imx8mm-phg: Add board support
Add the board support for the i.MX8MM Cloos PHG board.

This board uses a imx8mm-tqma8mqml SoM from TQ-Group.

imx8mm-phg.dts and imx8mm-tqma8mqml.dtsi are taken
directly from Linux 6.2-rc3.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2023-01-30 23:23:02 +01:00
Frieder Schrempf
6e91c06a73 arm64: dts: imx8mm-kontron: Add RTC aliases
Add aliases for the RTCs on the board and on the SoC. This ensures that
the primary RTC is always the one on the board that has a buffered supply
and maximum accuracy.

This is a direct port of the pending commit from linux-next.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 23:23:02 +01:00
Fabio Estevam
d939c5e0f5 imx6qdl-sabresd: Pass mmc alias
Originally, the mmc aliases node was present in imx6qdl-sabresd.dtsi.

After the sync with Linux in commit d0399a46e7 ("imx6dl/imx6qdl:
synchronise device trees with linux"), the aliases node is gone as
the upstream version does not have it.

This causes a regression in which the SD card cannot be found anymore.

Fix it by passing the alias node in the u-boot.dtsi file to
restore the original behaviour where the SD card (esdhc3) was
mapped to mmc1.

Fixes: d0399a46e7 ("imx6dl/imx6qdl: synchronise device trees with linux")
Reported-by: Carlos Rafael Giani <dv@pseudoterminal.org>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-01-30 23:23:01 +01:00
Jagan Teki
1a45a031d7 Revert "rockchip: Only call binman when TPL available"
This reverts commit f5315dd629.

[why]
TPL is not mandatory for not all Rockchip SoCs, some SoCs like
RK356x, and RK3588 still use mainline u-boot without TPL as
their ddr init programs are accessed via binaries provided by
Rockchip instead of ddr source code.

Marking TPL build makes it not able to build u-boot.itb on
RK356x targets so revert this so that it can build an SPL build
that would support all across Rockchip platforms.

Suggested-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Tested-by: Anand Moon <linux.amoon@gmail.com>  # CM3
2023-01-30 15:33:36 -05:00
Andrejs Cainikovs
352c402397 apalis-imx8: add emmc/mmc card pinctrl's for different speeds
Add pinctrl's for high speed eMMC and MMC cards.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 21:02:27 +01:00
Dario Binacchi
6629e15904 arm: dts: imx8mn-u-boot: fix DDR3 only support
In case the CONFIG_IMX8M_LPDDR4 and CONFIG_IMX8M_DDR4 options are both
disabled (i. e. BSH boards), binmain fails because DDR4 bin files are
missing.

Fixes: 93c4c0e4dd ("arm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi")
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-01-30 20:56:23 +01:00
Neil Armstrong
8f5e9de121 ARM: meson: Add support for Odroid-N2L
ODROID-N2L is a variant SBC in small form factor and some peripherals
are removed from ODROID-N2PLUS based on S922X SoC.

- On-board ethernet is removed
- On-board RTC is removed
- USB 3.0 hub is removed, so one USB 2.0 and one USB 3.0 host ports
  are available
- Huge heatsink is replaced with 40x40mm heatsink, 5V active heatsink
  is recommended or a tall passive sink is optional
- 3.5mm earjack is removed
- IR remote receiver is removed
- MIPI DSI port is added

It doesn't use the odroid-n2 board support since ADC revision
collides with Odroid-N2+ and since it doesn't have on-board ethernet
no need to load the MAC address from eFuses.

Link: https://lore.kernel.org/r/20230126-u-boot-odroid-n2l-v1-2-c60f695e0f6c@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-30 14:24:17 +01:00
Neil Armstrong
5017e305ee ARM: dts: Import Odroid-N2L support
Import Odroid-N2L support posted at [1] and merged for Linux v6.3-rc1.

[1] https://lore.kernel.org/all/20230122-topic-odroid-n2l-upstream-initial-v2-0-8d3fea6d403d@linaro.org/

Link: https://lore.kernel.org/r/20230126-u-boot-odroid-n2l-v1-1-c60f695e0f6c@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-30 14:24:17 +01:00
Sinthu Raja
ca04b7da6d arm: dts: k3-am68-sk: Add r5 specific dt support
Add initial support for AM68 SK device tree that runs on R5.

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2023-01-27 12:51:27 -05:00
Sinthu Raja
cc07b6c346 arm: dts: Add support for A72 specific AM68 Starter Kit Base Board
The SK architecture comprises of baseboard and a SOM board. The
AM68 Starter Kit's baseboard contains most of the actual connectors,
power supply etc. The System on Module (SoM) is plugged on to the base
board. Therefore, add support for peripherals brought out in the base
board.

Schematics: https://www.ti.com/lit/zip/SPRR463

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2023-01-27 12:51:27 -05:00
Sinthu Raja
3499deaf28 arm: dts: Add initial support for AM68 Starter Kit System on Module
AM68 Starter Kit (SK) is a low cost, small form factor board designed
for TI’s AM68 SoC. TI’s AM68 SoC comprises of dual core A72, high
performance vision accelerators, hardware accelerators, latest C71x
DSP, high bandwidth real-time IPs for capture and display. The SoC is
power optimized to provide best in class performance for industrial
applications.

        AM68 SK supports the following interfaces:
        * 16 GB LPDDR4 RAM
        * x1 Gigabit Ethernet interface
        * x1 USB 3.1 Type-C port
        * x2 USB 3.1 Type-A ports
        * x1 PCIe M.2 M Key
        * 512 Mbit OSPI flash
        * x2 CSI2 Camera interface (RPi and TI Camera connector)
        * 40-pin Raspberry Pi GPIO header

SK's System on Module (SoM) contains the SoC, PMIC, DDR and OSPI flash.
Therefore, add support for the components present on the SoM.

Schematics: https://www.ti.com/lit/zip/SPRR463
TRM: http://www.ti.com/lit/pdf/spruj28

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2023-01-27 12:51:27 -05:00
Jim Liu
04bd6c8997 ARM: dts: npcm8xx: add npcm845 function node
Add functaion node list as below:
1. i2c
2. gmac
3. otp
4. aes
5. sha
6. rng
7. serial

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2023-01-27 12:51:26 -05:00
Tom Rini
9ddbd70ff9 Xilinx chnages for v2023.04-rc1
makefile:
 - Add multi_dtb_fit dependency
 
 clk:
 - Handle error cases
 
 microblaze:
 - Disable falcon mode and cleanup code around
 
 xilinx:
 - Enable regular expression matching in board_fit_config_name_match()
 - Fix FRU handling for 0xC1 format
 - Fix Xilinx legacy format eeprom parsing
 
 zynqmp:
 - Some DT updates/cleanups
 - Fix IDcode for xck24
 - Remove empty mini config files
 - Add support for k24
 
 versal:
 - Remove empty mini config files
 
 versal_net:
 - Setup timer when runs in EL3
 - Build u-boot.elf for mini configurations
 
 zynq-gem:
 - Add support for new compatible strings
 - Remove support for Avnet Ultrazedev SOM
 - Handle SGMII with PCS phy
 
 spi:
 - Add support for gigadevice parts
 
 misc:
 - Remove CONFIG_TARGET_VENUS ifdef
 - Add missing headers to remove sparse warnings
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQbPNTMvXmYlBPRwx7KSWXLKUoMIQUCY9PmzwAKCRDKSWXLKUoM
 IYWxAJwNgiXtFT17pBy+1M0JvSWgyvWF3QCfTQG2Krnw0+d65PF5A7UFTDL7SZM=
 =cMrc
 -----END PGP SIGNATURE-----

Merge tag 'xilinx-for-v2023.04-rc1' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx chnages for v2023.04-rc1

makefile:
- Add multi_dtb_fit dependency

clk:
- Handle error cases

microblaze:
- Disable falcon mode and cleanup code around

xilinx:
- Enable regular expression matching in board_fit_config_name_match()
- Fix FRU handling for 0xC1 format
- Fix Xilinx legacy format eeprom parsing

zynqmp:
- Some DT updates/cleanups
- Fix IDcode for xck24
- Remove empty mini config files
- Add support for k24

versal:
- Remove empty mini config files

versal_net:
- Setup timer when runs in EL3
- Build u-boot.elf for mini configurations

zynq-gem:
- Add support for new compatible strings
- Remove support for Avnet Ultrazedev SOM
- Handle SGMII with PCS phy

spi:
- Add support for gigadevice parts

misc:
- Remove CONFIG_TARGET_VENUS ifdef
- Add missing headers to remove sparse warnings
2023-01-27 10:15:39 -05:00
Jonas Karlman
7e215ad05f rockchip: Use atf as firmware and move u-boot to loadables in FIT
The FIT generated after the switch to using binman is using different
values for firmware and loadables properties compared to the old script.

With the old script:
 firmware = "atf-1";
 loadables = "u-boot", "atf-2", ...;

After switch to binman:
 firmware = "u-boot";
 loadables = "atf-1", "atf-2", ...;

This change result in SPL jumping directly into U-Boot proper instead of
initializing TF-A.

With this patch the properties change back to:
 firmware = "atf-1";
 loatables = "u-boot", "atf-2", ...;

Fixes: e0c0efff2a ("rockchip: Support building the all output files in binman")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-26 10:47:45 -07:00
Jonas Karlman
99e3a2cd4e rockchip: Add sha256 hash to FIT images
Add sha256 hash to FIT images when CONFIG_SPL_FIT_SIGNATURE=y.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-26 10:47:45 -07:00
Jonas Karlman
5ad03fc77d rockchip: Align FIT image data to SD/MMC block length
SPL load FIT images by reading the data aligned to block length.
Block length aligned image data is read directly to the load address.
Unaligned image data is written to an offset of the load address and
then the data is memcpy to the load address.

This adds a small overhead of having to memcpy unaligned data, something
that normally is not an issue.

However, TF-A may have a segment that should be loaded into SRAM, e.g.
vendor TF-A for RK3568 has a 8KiB segment that should be loaded into the
8KiB PMU SRAM. Having the image data for such segment unaligned result
in segment being written to and memcpy from beyond the SRAM boundary, in
the end this results in invalid data in SRAM.

Aligning the FIT and its external data to MMC block length to work
around such issue.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-26 10:47:45 -07:00
Michal Simek
2fe2be2d27 arm64: zynqmp: Add support for Kria K24 SOM
SOM itself from PS point of view is using the same configuration as K26
that's why reuse that files and only change compatible strings.

The reason for creating own set of files is just in case when versions
start to diverge because of HW change, supply chain issue, etc.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/61f877ec0b480c5bd368a1211fc73ff7465016bd.1674043915.git.michal.simek@amd.com
2023-01-24 13:59:33 +01:00
Michal Simek
8489b6d2e3 arm64: zynqmp: Fill model name for SOM CCs
When U-Boot do DTB reselection origin model for SOM is used and from log it
is not visible if DTB was switched or not. That's why add model directly to
CC (carrier card) to show new model if reselection was successful.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/49ba1007218496c48d287454e84a5b8c08abc692.1674043452.git.michal.simek@amd.com
2023-01-24 13:58:49 +01:00
Andre Przywara
3baa0fbe6b sunxi: f1c100s: Drop no-MMC hack
When support for the Allwinner F1C100s SoC was originally introduced,
its DT lacked any MMC nodes, which upset our sunxi-u-boot.dtsi overlay,
when it tried to add an alias to the SD card.  To quickly fix this back
then, we guarded that alias with a preprocessor macro.

Now the F1C100s family has gained MMC nodes, so we don't need the
special treatment anymore. Just remove this guard.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
2023-01-21 01:32:23 +00:00
Neil Armstrong
640192d04f ARM: meson: add support for Odroid Go Ultra
This adds initial support for the Hardkernel Odroid Go Ultra.

The Odroid Go Ultra is a portable gaming device with the following
characteristics:
- Amlogic S922X SoC
- RK817 & RK818 PMICs
- 2GiB LPDDR4
- On board 16GiB eMMC
- Micro SD Card slot
- 5inch 854×480 MIPI-DSI TFT LCD
- Earphone stereo jack, 0.5Watt 8Ω Mono speaker
- Li-Polymer 3.7V/4000mAh Battery
- USB-A 2.0 Host Connector
- x16 GPIO Input Buttons
- 2x ADC Analog Joysticks
- USB-C Port for USB2 Device and Charging

The following are not yet handled:
- Battery RK818 Gauge and Charging
- 5inch 854×480 MIPI-DSI TFT LCD

Link: https://lore.kernel.org/r/20230119-u-boot-odroid-go-ultra-v1-2-f96bab9db396@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-20 16:27:40 +01:00
Neil Armstrong
2acbc33b3d ARM: dts: sync Amlogic ARM64 DT from v6.2-rc1
This syncs the Amlogic G12A, G12B & SM1 base DT + the
Odroid Go Ultra DT from Linux v6.2-rc1 from commmit [1].

[1] 1b929c02afd3 ("Linux 6.2-rc1")

Link: https://lore.kernel.org/r/20230119-u-boot-odroid-go-ultra-v1-1-f96bab9db396@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-01-20 16:27:40 +01:00
Simon Glass
e0c0efff2a rockchip: Support building the all output files in binman
Add the required binman images to replace the Makefile rules which are
currently used. This includes subsuming:

   - tpl/u-boot-tpl-rockchip.bin if TPL is enabled
   - idbloader.img if either or both of SPL and TPL are enabled
   - u-boot.itb if SPL_FIT is enabled
   - u-boot-rockchip.bin if SPL is used, either using u-boot.itb when
     SPL_FIT is enabled or u-boot.img when it isn't

Note that the intermediate files are dropped with binman, since it
producing everything in one pass. This means that
tpl/u-boot-tpl-rockchip.bin is not created, for example.

Note that for some 32-bit rk3288 boards, rockchip-optee.dtsi is included.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18 14:55:39 -07:00
Simon Glass
4170dd9ec0 rockchip: Use multiple-images for rk3399
Enable multiple-images so we can generate more than one image. Also
add a comment for the end of the #if block.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18 11:50:01 -07:00
Quentin Schulz
c925be73a0 rockchip: add support for PX30 Ringneck SoM on Haikou Devkit
The PX30-µQ7 (Ringneck) is a system-on-module featuring the Rockchip
PX30 in a micro Qseven-compatible form-factor.

PX30-µQ7 features:
        * CPU: quad-core Cortex-A35
        * DRAM: 2GB dual-channel
        * eMMC: onboard eMMC
        * SD/MMC
        * TI DP83825I 10/100Mbps PHY
        * USB:
                * USB2.0 dual role port
                * 3x USB2.0 host via onboard USB2.0 hub
        * Display: MIPI-DSI
        * Camera: MIPI-CSI
        * onboard 2.4GHz WiFi + Bluetooth module
        * Companion Controller: on-board additional microcontroller
	  (STM32 Cortex-M0 or ATtiny):
                * RTC
                * fan controller
                * CAN (only STM32)

The non-U-Boot DTS files are imported from Linux v6.2-rc2.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2023-01-16 18:01:11 +08:00
Quentin Schulz
2c9f077064 arm64: dts: rockchip: sync px30 DTSI with Linux kernel v6.1
Sync the px30 dtsi from Linux kernel v6.1.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2023-01-16 18:01:11 +08:00
Peter Robinson
5a42fd0258 rockchip: Add initial support for the PINE64 Pinephone Pro
The Pinephone Pro is another device by PINE64. It's closely related
to the Pinebook Pro of which this initial support is derived from.

Specification:
- A variant of the Rockchip RK3399
- A 6 inch 720*1440 DSI display
- Front and rear cameras
- Type-C interface with alt mode display (DP 1.2) and PD charging
- 4GB LPDDR4 RAM
- 128GB eMMC
- mSD card slot
- An AP6255 module for 802.11ac WiFi and Bluetooth 5
- Quectel EG25-G 4G/LTE modem

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-16 18:01:11 +08:00
Peter Robinson
30a6d14a97 arm64: dts: rk3399: Add upstream Pinephone Pro dts
Initial support for the PinePhone Pro has now landed upstream in
Linux 6.1 RC1 so sync the dts from 6.2-rc1 for initial support.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2023-01-16 18:01:11 +08:00
Jagan Teki
b8f1ca9540 board: rockchip: Add Edgeble Neu2 IO Board
Neural Compute Module 2(Neu2) IO board is an industrial form factor
IO board from Edgeble AI.

General features:
- microSD slot
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, RS232, CAN
- Micro Phone array
- Speaker
- RTC battery slot
- 40-pin expansion

Neu2 needs to mount on top of this IO board in order to create complete
Edgeble Neural Compute Module 2(Neu2) IO platform.

Add support for it.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2023-01-16 18:01:11 +08:00
Jagan Teki
43e89241f3 ARM: dts: rockchip: Add rv1126-u-boot.dtsi
Add u-boot,dm-spl and u-boot,dm-pre-reloc related properties
for Rockchip RV1126 SoC.

Both eMMC and SD boot are tested in Edgeble Neu2 SoM.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Jagan Teki
0736dad4ed ARM: dts: rockchip: rv1126: Add Edgeble Neural Compute Module 2(Neu2) IO
Neural Compute Module 2(Neu2) IO board is an industrial form factor
evaluation board from Edgeble AI.

General features:
- microSD slot
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, RS232, CAN
- Micro Phone array
- Speaker
- RTC battery slot
- 40-pin expansion

Neu2 needs to mount on top of this IO board in order to create complete
Edgeble Neural Compute Module 2(Neu2) IO platform.

Add support for it.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2023-01-16 18:01:11 +08:00
Jagan Teki
d12471c7be ARM: dts: rockchip: rv1126: Add Edgeble Neural Compute Module 2(Neu2)
Neural Compute Module 2(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RV1126 from Edgeble AI.

General features:
- Rockchip RV1126
- 2/4GB LPDDR4
- 8/16/32GB eMMC
- 2x MIPI CSI2 FPC connector
- Fn-link 8223A-SR WiFi/BT

Industrial grade (-40 °C to +85 °C) version of the same class of module
called Neu2k powered with Rockchip RV1126K.

Neu2 needs to mount on top of Edgeble IO boards for creating complete
platform solutions.

Add support for it.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2023-01-16 18:01:11 +08:00
Jagan Teki
2204a8c90a ARM: dts: rockchip: Add Rockchip RV1126 SoC
RV1126 is a high-performance vision processor SoC for IPC/CVR,
especially for AI related application.

It is based on quad-core ARM Cortex-A7 32-bit core which integrates
NEON and FPU. There is a 32KB I-cache and 32KB D-cache for each core
and 512KB unified L2 cache. It has build-in NPU supports INT8/INT16
hybrid operation and computing power is up to 2.0TOPs.

This patch add basic core dtsi support.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
2023-01-16 18:01:11 +08:00
Jagan Teki
3fc0dee585 ARM: dts: rockchip: Add Rockchip RV1126 pinctrl
Add pinctrl definitions for Rockchip RV1126.

Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:11 +08:00
Quentin Schulz
ccaa55fb6e rockchip: puma-rk3399: sync DTS with Linux kernel next-20221114
This synchronizes the Device Trees related to Puma RK3399 SoM with Linux
kernel next-20221114 to include two important changes pertaining to
eMMC and SD card instability.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-01-16 18:01:10 +08:00
Hai Pham
0fe4366c9a ARM: renesas: condor: switch eMMC bus to 1V8
The eMMC card has two supplies, VCC and VCCQ. The VCC supplies the NAND
array and the VCCQ supplies the bus. On Condor, the VCC is connected to
3.3V rail, while the VCCQ is connected to 1.8V rail. Adjust the pinmux
to match the bus, which is always operating in 1.8V mode.

Based on Linux commit 69efe4bbeda50745 ("arm64: dts: renesas: condor:
Switch eMMC bus to 1V8") from Wolfram Sang

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
2023-01-14 14:10:12 +01:00
Marek Vasut
3405cfa29d ARM: dts: renesas: condor: Enable SPI NOR fast-read
This board requires SPI NOR fast-read, otherwise the SPI NOR
access returns corrupted data. Enable the fast-read explicitly
in DT as it has been disabled in the MTD subsystem by commit
d008190920 ("mtd: spi-nor: Mask out fast read if not requested in DT")

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2023-01-14 14:10:12 +01:00
Patrick Delaunay
6e391c7d5f ARM: dts: stm32: Add timer interrupts on stm32mp15
The timer units in the stm32mp15x CPUs have interrupts, depending on the
timer flavour either one "global" or four dedicated ones. Add the irqs
to the timer units on stm32mp15x.

Sync the DT Files with linux kernel v6.1 and with commit a9b70102253ce
("ARM: dts: stm32: Add timer interrupts on stm32mp15")

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:30:52 +01:00
Patrick Delaunay
126aa470d6 ARM: dts: stm32mp15: fix typo in stm32mp15xx-dkx.dtsi
Remove unnecessary space in device tree stm32mp15xx-dkx.dtsi.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:30:52 +01:00
Patrick Delaunay
d1d56638c4 ARM: dts: stm32mp15: remove clksrc include in SCMI dtsi file
The include file stm32mp1-clksrc.h is not necessary for the SCMI STM32MP15
dtsi files as the clock tree is not defined in the U-Boot SCMI device tree;
these SCMI device tree only support TFABOOT with stm32mp15_defconfig,
SPL with the basic boot defconfig is not supported.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:30:52 +01:00
Fabrice Gasnier
214d6e7e68 ARM: dts: stm32: add support for USB2514B onboard hub on stm32mp157c-ev1
Add support for USB2514B onboard hub on stm32mp157c EV1 board. The HUB
is supplied by a 3v3 PMIC regulator.

[backport from linux ad9591b01d24]
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-01-12 16:19:53 +01:00
Fabrice Gasnier
79da4074dd ARM: dts: stm32: update vbus-supply of usbphyc_port0 on stm32mp157c-ev1
phy-stm32-usbphyc bindings uses a connector node with vbus-supply
property.

[backport from linux 43e55d778a6b]
Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-01-12 16:08:43 +01:00
Luca Ceresoli
66b39c1a8c arm64: zynqmp: remove Avnet UltraZed-EV Starter Kit
Nobody seems interested and able to keep this board supported, and
xilinx_zynqmp_virt_defconfig is supposed to be enough for any zynqmp board.

See the discussion at: https://lore.kernel.org/u-boot/CAPnjgZ3hHbyiFf=_Lp-Wz_XOWBkV-3vK4Q3xp=7bcERw-spNpA@mail.gmail.com/T/#m76d726f1ab3f7074c8105c9a2af2110ac7d18708

Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
Link: https://lore.kernel.org/r/20230111082554.1930782-1-luca.ceresoli@bootlin.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-01-11 10:43:39 +01:00
Sjoerd Simons
39248d3260 arm: dts: k3-am625-sk: Enable first ethernet port
The K3 am625 sk EVM has two ethernet ports; Enable the first one for
usage in u-boot.

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
2023-01-10 15:39:06 -05:00
Michal Simek
67ac851488 arm64: zynqmp: Remove unused snps,refclk_fladj property
The commit c55ac51a55 ("usb: dwc3: Program GFLADJ") hopefully fixed
issues around fladj logic. This DT property was used in Xilinx stack only
that's why remove because it is not needed anymore.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9bdbd1156b19e28cdebeca29149268b0579a8b6a.1670855257.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Harini Katakam
fd5f2718d3 arm64: zynqmp: Enable TI phy reset via GPIO
Add DT property to support reset of TI PHY connected to GEM.
This is present in RevA DT but needs to be extended RevB/1.0/1.1
versions which are built on top.

Fixes: 2b1db7b18c ("arm64: zynqmp: Wire GEM reset gpio")
Signed-off-by: Harini Katakam <harini.katakam@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7b093616ddea269043cbbb1e3806644d5a4b23be.1670854455.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Harini Katakam
4664a63cc7 arm64: zynqmp: Describe TI phy as ethernet phy ID on ZCU102 RevB & up
TI phy requires a reset before PHY address detection to make sure
correct strapping via MIO is detected. Facilitate the same using
ethernet-phy-id compatible string. GPIO reset entry will be added in
a separate commit.
This support is present in RevA but needs to be extended to RevB/1.0/1.1
versions which are built on top.

Fixes: 13622c7a9d ("arm64: zynqmp: Describe TI phy as ethernet-phy-id")
Signed-off-by: Harini Katakam <harini.katakam@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6d500a83a787316353d4b26c75d1b51d29e3730e.1670854455.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Michal Simek
ef440787da arm64: zynqmp: Remove unused USB DT properties
xlnx,usb-polarity, xlnx,usb-reset-mode and snps,mask_phy_reset are not
documented in dt binding and also there is no code associated with them
that's why remove them.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/369139fafa1745252ef687e31aebf6bcc2080a32.1670853972.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Michal Simek
a30a3ec888 arm64: zynqmp: Remove id from usb node name
There is no reason to have number in usb node name. This is also sync up
patch with upstream kernel.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7b13db34031af88a5738d2ec2e05d2498ea8c869.1670590595.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Michal Simek
b1d3e7fd9a arm64: zynqmp: Align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).
It is based on kernel commit (228e8a88b1915a2b467c83d8d0976605f1272fae).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ae23999097553acb21dfca9288a913bb8b24587a.1670590595.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Michal Simek
8dfdb6958b arm64: zynqmp: Fix AMS device tree node
Aligned node description with the Linux kernel. Node has been added by
kernel commit (271c1fa01c2307cf74f4656390d6299991119c3e).

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/74188b64cf615100345d058e026cb0d2de0e089b.1670590595.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Michal Simek
e6a01d5102 arm64: zynqmp: Added GEM reset definitions
The Cadence GEM/MACB driver now utilizes the platform-level reset on the
ZynqMP platform. Add reset definitions to the ZynqMP platform device
tree to allow this to be used.
Linux upstream commit (e461bd6f43f4e568f7436a8b6bc21c4ce6914c36).

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/14e3637735dbc626659e96d142f04a63398362f8.1670590595.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Michal Simek
2a5f7fd30c arm64: zynqmp: Sync #dma-cells property location
Sync property location with Linux kernel done by Linux commit
(1ff2d58e60c8093e9be935b1f191341c0cda957a).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e09ad90ea610a81528ef5ecbc931bc9791b1c653.1670590595.git.michal.simek@amd.com
2023-01-10 08:15:54 +01:00
Tom Rini
cebdfc22da Merge branch 'next'
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-09 11:30:08 -05:00
Tom Rini
b82f12b642 First set of u-boot-at91 features for the 2023.04 cycle
-----BEGIN PGP SIGNATURE-----
 
 iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAmO2mnEcHGV1Z2VuLmhy
 aXN0ZXZAbWljcm9jaGlwLmNvbQAKCRAesx4CDqwvyBAOB/4y7e9y0jdKSWDwMdZj
 enXK/U/GREFyuiSdadil0aJl9WfayjwZkh7uHSTj4pi9ApNivfoqsL7WZYpJxhRD
 WlpNhs3TZ70i8CgKUosdzcpquAQZUZhg6iV5DCObrK6yNJRGOXLIwMOd+vw/Xz6/
 YTGqzivEDMBuH/9HLuC0m+26PEpff8nenNEjC2k8ssG26ojLz7oCQh2HoHcSgNRc
 HkEYlFJ/Le8kM8Ak2F3ebmsfgMTnFrRVwV1BsZa5vO0BrMYgJCORsl7Cnfcw6/2N
 LEHG7kwlSorJeETn/gkLiZ+NyqzU+oFH0jGRZ5Ciqg1qcCO3k9yBMgWQzd7nTL6C
 5oZA
 =Ocdd
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-at91-2023.04-a' of https://source.denx.de/u-boot/custodians/u-boot-at91 into next

First set of u-boot-at91 features for the 2023.04 cycle:

This feature set includes the new DM-based NAND flash driver (old non-DM
driver is still kept for backwards compatibility), and the move to DM
NAND flash driver for sam9x60ek board. Feature set also includes
devicetree alignment for sama7g5 with Linux, devicetree alignment on USB
with Linux for all boards (sama5, sam9x60), chip id for sama7g5, minor
configs and tweaks.
2023-01-06 11:53:26 -05:00
Adam Ford
edd9c891d2 arm: dts: rz-g2-beacon-u-boot: Fix QSPI Regression
The QSPI is accessed via the RPC-IF, but the compatible flags
previously used a different name.  This compatibel name was changed
which broke the ability to access the QSPI.  Fix this by removing
the custom naming reference.

Fixes: 68083b897b ("renesas: Fix RPC-IF compatible values")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2023-01-06 08:14:19 -05:00
Fabio Estevam
f8548ce0e0 imx7d-pico: Fix the name of the u-boot.dtsi file
Since commit 2f96d4dd95 ("imx7s/d: synchronise device trees with linux")
the imx7d-pico board no longer boots.

The reason is that prior to the above commit there was an explicit
inclusion of arch/arm/dts/imx7d-pico-u-boot.dtsi inside imx7d-pico.dtsi.

After the syncing with the Linux upstream dtsi, this u-boot.dtsi inclusion
is gone and the board fails to boot.

U-Boot uses the imx7d-pico-pi.dtb file, so rename the u-boot.dtsi to
imx7d-pico-pi-u-boot.dtsi which gets included automatically by U-Boot
standard make logic and makes the board boot again.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2023-01-06 08:14:19 -05:00
Sergiu Moga
e4ad98d67b ARM: dts: sama5d27_wlsom1_ek: Add pinctrl nodes for USB DT nodes
Add the pinctrl nodes required by the USB related DT nodes.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Sergiu Moga
20bc95f8c8 ARM: dts: sama5d2_icp: Add pinctrl nodes for USB related DT nodes
Add the pinctrl subnodes required by the USB related DT nodes.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Sergiu Moga
3cd06bfa96 ARM: dts: sama7g5ek: Add pinctrl, gpio and phy properties for USB
Add the required pinctrl, gpio and phy properties required by the
USB DT nodes of the sama7g5ek boards. Since these have not yet been
defined in upstream Linux, place them in the U-Boot specific DT file.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Sergiu Moga
851960e591 ARM: dts: sama7g5: Add USB and UTMI DT nodes
Define the USB and UTMI DT nodes for the sama7g5 SoC's. Since these have
not yet been defined in upstream Linux, place them in the U-Boot specific
DT file.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-01-05 10:04:57 +02:00
Sergiu Moga
205ecbdccd ARM: dts: sam9x60ek: Add pinctrl and gpio properties for USB
Add the required pinctrl and gpio properties required by the USB DT
nodes of the sam9x60ek boards.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Sergiu Moga
445ff8bb5a ARM: dts: sam9x60_curiosity: Add pinctrl and gpio properties for USB
Add the required pinctrl and gpio properties needed by the USB DT nodes
of the sam9x60_curiosity boards.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
2023-01-05 10:04:57 +02:00
Sergiu Moga
3631be3ed6 ARM: dts: sam9x60: Add OHCI and EHCI DT nodes
Add the OHCI and EHCI DT nodes for the sam9x60 SoC's.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-01-05 10:04:57 +02:00
Mihai Sain
ee43b1e744 ARM: dts: at91: sam9x60: add sdhci1 node and pinctrl
Add node for sdhci1 controller and its pinctrl.

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
2023-01-03 10:58:15 +02:00
Stefan Bosch
c8ba27f760 arm: s5p4418: dm_serial: add uarts to dts
Add S5P4418 UARTs and appropriate pinctrl to dts. Add UART to
s5p4418-nanopi2.dts.

Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
2023-01-02 16:06:08 -05:00
Dai Okamura
872413bb0a arm: uniphier: use DM_TIMER of arm a9 global timer
All uniphier v7 SoCs have cortex-a9 and use cortex-a9 global timer
in a simple implementation. Now DM_TIMER of it is available
on 35751c7f3f ("timer: sti: convert sti-timer to arm a9 global timer"),
so let's switch to it.

The old driver reads the lower 32bits of counter field
and sets the prescaler as 50 with PERIPHCLK(=50MHz),
so the global timer works as a 32-bit 1MHz timer.

The DM_TIMER uses the whole 64bits with no prescaler,
so the global timer works as a 64-bit PERIPHCLK timer.

CONFIG_SYS_HZ_CLOCK is set as the default PERIPHCLK frequency,
if there is no 'clocks' property in devicetree.

Signed-off-by: Dai Okamura <okamura.dai@socionext.com>
2023-01-02 16:01:39 -05:00
Rob Herring
bd8851c5b4 dts: synquacer: Drop unused and undocumented GPIO 'base' property
The 'base' GPIO controller property is unused in u-boot and Linux. It is
also not documented in the binding. So drop it.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-01-02 14:10:23 -05:00
Rob Herring
36ee37632c dts: synquacer: Drop unused and undocumented SPI properties
'active_clk_edges' and 'chipselect_num' SPI controller properties are
unused in u-boot and Linux. They are also not documented in the binding.
So drop them.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
2023-01-02 14:10:23 -05:00
Rob Herring
00723684e4 dts: synquacer: Fix idle-states 'entry-method' value
The correct value for 'entry-method' in the idle-states binding is 'psci',
not 'arm,psci'. It hasn't mattered because it isn't used by the OS.

Signed-off-by: Rob Herring <robh@kernel.org>
2023-01-02 14:05:44 -05:00
Rob Herring
563f238b67 dts: synquacer: Fix "arm, armv7-timer-mem" node address sizes
The "arm,armv7-timer-mem" schema defines the address sizes for child
nodes to be 32-bit as there's no need for 64-bit offsets and sizes of
the child 'frame' nodes.

Signed-off-by: Rob Herring <robh@kernel.org>
2023-01-02 14:05:44 -05:00
Rob Herring
cc891c41f2 dts: synquacer: Use generic node names
DT node names should follow generic names defined in the DT spec. These
are also now checked by dtschema tools.

Signed-off-by: Rob Herring <robh@kernel.org>
2023-01-02 14:05:44 -05:00
Rob Herring
6136c85ed0 dts: synquacer: Drop CPU 'arm,armv8' compatibles
'arm,armv8' compatible is for software models only. so drop it from cpu
nodes.

Signed-off-by: Rob Herring <robh@kernel.org>
2023-01-02 14:05:43 -05:00
Christian Gmeiner
e93efaf9cc arm: dts: ti: k3-am64-mcu: Add pinctrl
Add the definition of the pinctrl for the MCU domain.

Same as kernel commit 500e6dfbb465531150ac6e2ff0856dd357ddc8a4

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
2023-01-02 14:05:43 -05:00
Tom Rini
14f43797d0 Prepare v2023.01-rc4
-----BEGIN PGP SIGNATURE-----
 
 iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmOgaw0ACgkQFHw5/5Y0
 tyxIeQv8DfAAB8hN+wWeDhQAJBXBLvV+RrocGJ2lpuWN0DUgT955l0zSjP4eD5I/
 sSsT8iJ15obkbWHq61V9W81Velw5qR+gHW9IAzFKiQBfvdcdfgWFeme9fWp/gqxn
 vvPc2sULA9utkc+kQ+qJy2hmTM7I0ZbKzUwTXSv+Tp9on3vlc0quKSHiZ1EvHNww
 8tW13d1r+Be+CC+GVPrhJojfKBcYVJhW21rJMgb4JdfGNWKmpUpF6fUzHe0wiy2P
 HSnScr44E099t9RDZabw0V1fEgQqxIAmL1qQamXf9ddLZQM9Sq63lygTtGsqg61+
 qeHCZVjPg9cXayGfRVesH8sko3vW+IPuo0Q6Ox0vAyRSyzTpOcTuzn3RcMrq+mfu
 ZRF32aFJKVvAI3xesOj1aCBBYjl4POiHA8i3yeP9KcjqW3So0aphDtxp1idgwOZl
 kIxuC4ItWyF7xoyng/7RWwr2VjcKSyw58stRjfV+WNcByV4+ud1A59vsgZOqO49m
 0bLx5dGu
 =EX/F
 -----END PGP SIGNATURE-----

Merge tag 'v2023.01-rc4' into next

Prepare v2023.01-rc4

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-21 13:09:01 -05:00
Eugen Hristev
8374617637 ARM: dts: at91: sama5d2: fix wrong interrupt-cells property
The PMC node is not an interrupt provider, so it must not have
interrupt-cells.

This fixes the warning (on newer DTC):
arch/arm/dts/sama5d2.dtsi:82.22-602.6: Warning (interrupt_provider): /ahb/apb/pmc@f0014000: '#interrupt-cells' found, but node is not an interrupt provider

Fixes: 2c4b2dd289 ("ARM: at91/dt: Add device tree for SAMA5D2 Xplained")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2022-12-20 11:59:07 +02:00
Eugen Hristev
4df35b38d1 ARM: dts: at91: sama7g5/sama7g5ek: align DT with kernel 6.1
Align the DT with current Linux 6.1 tree, wherever possible.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2022-12-20 11:59:07 +02:00
Michal Suchanek
216928c772 rockchip: Pinebook Pro: Do not initialize i2c before relocation
The i2c locks up when initialized before relocation, and it stays broken
in Linux as well breaking the ability to boot Linux.

The i2c bus and pmic was not actually used in pre-reloc before
commit ad607512f5 ("power: pmic: rk8xx: Support sysreset shutdown method")

The cause is not known.

This is board-specific, other boards that do not add the option to
include the i2c bus in pre-reloc DT are not affected.

Signed-off-by: Michal Suchanek <msuchanek@suse.de>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-12-19 10:56:12 +08:00
Quentin Schulz
c74f6e748b rockchip: puma: fix GPT table corruption when saving U-Boot environment
The GPT table is taking the first 34 sectors, which amounts to 0x4400
bytes. Saving the environment below this address in storage will corrupt
the GPT table.

While technically the table ends at 0x4400, some tools (e.g. bmaptool)
are rounding everything to the logical block size (0x1000), so it is
safer to make it point to 0x5000 so that the environment could still
persist when flashing a sparse image with bmaptool or similar tools.

Obviously, the default 0x4000 environment size does not work anymore, so
let's set it to 0x3000 so it does fill the gap between the GPT table
(rounded to 0x1000) and the start of the idbloader.img.

Fixes: 56f580d3eb ("rockchip: dts: rk3399-puma: put environment (in MMC/SD configurations) before SPL")
Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-12-19 10:56:12 +08:00
Johan Jonker
58eb6675da arm: dts: rockchip: rk3128: fix clocks, compatible and phys
Fix rk3128 clocks, compatible and phys, so that they match the bindings.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
2022-12-19 10:56:12 +08:00
Johan Jonker
565d77b4c0 arm: dts: rockchip: rk3128: fix DT node names
The rk3128 DT node names should be generic.
Rename them to the pattern defined in the DT bindings.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
2022-12-19 10:56:12 +08:00
Johan Jonker
b919d43af5 arm: dts: rockchip: move all rk3128 u-boot specific properties in separate dtsi files
Move all rk3128 u-boot specific properties in separate dtsi files.
Sort emmc node.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-12-19 10:56:12 +08:00
Johan Jonker
c643468849 arm: dts: rockchip: rk3128: bulk convert gpios to their constant counterparts
Bulk convert rk3128 DT gpios to their constant counterparts.

sed -i -f script.sed rk3128.dtsi
sed -i -f script.sed rk3128-evb.dts

================================

/rockchip,pins *=/bcheck
b # to end of script
:append-next-line
N
:check
/^[^;]*$/bappend-next-line
s/<RK_GPIO\([0-9]\) /<\1 /g
s/<\([^ ][^ ]*  *\)0 /<\1RK_PA0 /g
s/<\([^ ][^ ]*  *\)1 /<\1RK_PA1 /g
s/<\([^ ][^ ]*  *\)2 /<\1RK_PA2 /g
s/<\([^ ][^ ]*  *\)3 /<\1RK_PA3 /g
s/<\([^ ][^ ]*  *\)4 /<\1RK_PA4 /g
s/<\([^ ][^ ]*  *\)5 /<\1RK_PA5 /g
s/<\([^ ][^ ]*  *\)6 /<\1RK_PA6 /g
s/<\([^ ][^ ]*  *\)7 /<\1RK_PA7 /g
s/<\([^ ][^ ]*  *\)8 /<\1RK_PB0 /g
s/<\([^ ][^ ]*  *\)9 /<\1RK_PB1 /g
s/<\([^ ][^ ]*  *\)10 /<\1RK_PB2 /g
s/<\([^ ][^ ]*  *\)11 /<\1RK_PB3 /g
s/<\([^ ][^ ]*  *\)12 /<\1RK_PB4 /g
s/<\([^ ][^ ]*  *\)13 /<\1RK_PB5 /g
s/<\([^ ][^ ]*  *\)14 /<\1RK_PB6 /g
s/<\([^ ][^ ]*  *\)15 /<\1RK_PB7 /g
s/<\([^ ][^ ]*  *\)16 /<\1RK_PC0 /g
s/<\([^ ][^ ]*  *\)17 /<\1RK_PC1 /g
s/<\([^ ][^ ]*  *\)18 /<\1RK_PC2 /g
s/<\([^ ][^ ]*  *\)19 /<\1RK_PC3 /g
s/<\([^ ][^ ]*  *\)20 /<\1RK_PC4 /g
s/<\([^ ][^ ]*  *\)21 /<\1RK_PC5 /g
s/<\([^ ][^ ]*  *\)22 /<\1RK_PC6 /g
s/<\([^ ][^ ]*  *\)23 /<\1RK_PC7 /g
s/<\([^ ][^ ]*  *\)24 /<\1RK_PD0 /g
s/<\([^ ][^ ]*  *\)25 /<\1RK_PD1 /g
s/<\([^ ][^ ]*  *\)26 /<\1RK_PD2 /g
s/<\([^ ][^ ]*  *\)27 /<\1RK_PD3 /g
s/<\([^ ][^ ]*  *\)28 /<\1RK_PD4 /g
s/<\([^ ][^ ]*  *\)29 /<\1RK_PD5 /g
s/<\([^ ][^ ]*  *\)30 /<\1RK_PD6 /g
s/<\([^ ][^ ]*  *\)31 /<\1RK_PD7 /g
s/<\([^ ][^ ]*  *[^ ][^ ]*  *\)0 /<\1RK_FUNC_GPIO /g
s/<\([^ ][^ ]*  *[^ ][^ ]*  *\)RK_FUNC_\([1-9]\) /<\1\2 /g

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-12-19 10:56:12 +08:00
Johan Jonker
4d89330b8a rockchip: rk3128-cru: sync the clock dt-binding header from Linux
In order to update the DT for rk3128
sync the clock dt-binding header.
This is the state as of v6.0 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2022-12-19 10:56:12 +08:00
Kever Yang
f5315dd629 rockchip: Only call binman when TPL available
Rockchip platform use TPL to do the DRAM initialize for all the SoCs,
if TPL is not available, means no available DRAM init program, and the
u-boot-rockchip.bin is not functionable.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I2299f1eddce5aa7d5fb1a3fb4d8aeaa995b397fa
2022-12-19 10:55:58 +08:00
Jim Liu
8debdf1417 ARM: dts: npcm7xx: add npcm750 gpio node compatible name
Add npcm750 gpio node compatible name

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-12-12 14:03:12 -05:00
Jim Liu
74bf4899b5 ARM: dts: npcm8xx: add npcm845 function node
1. add usb phy
2. add ehci ohci sdhci
3. add pinctrl node
4. add fiu node

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2022-12-12 14:03:12 -05:00
Andreas Kemnade
3419416a3a omap4: make musb probeable by simple bus
Like other peripherals important for booting,
do not rely on ti-sysc compatibility alone

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
2022-12-12 14:03:12 -05:00
Dhruva Gole
8994ac365a arm: dts: Add OSPI support for AM62-SK
Add OSPI Support such that this device can boot up using OSPI Flash.
Also can use the flash for other purposes if required from uboot.

Signed-off-by: Dhruva Gole <d-gole@ti.com>
2022-12-09 14:12:53 -05:00
Dhruva Gole
8bd8a5d022 arm: dts: k3-am62x: sync dt with linux kernel
Sync the DT Files with linux kernel (tag v6.0.3)

Signed-off-by: Dhruva Gole <d-gole@ti.com>
2022-12-09 14:12:53 -05:00
Bryan Brattlof
6bdfa69155 arm: dts: introduce am62a7 u-boot dtbs
Introduce the base dts files needed for u-boot or to augment the
linux dtbs for use in the u-boot-spl and u-boot binaries

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
2022-12-09 14:10:28 -05:00
Bryan Brattlof
253802912a arm: dts: introduce am62a7 dtbs from linux kernel
Introduce the basic am62a7 SoC dtbs from the v6.1-rc3 tag of the linux
kernel along with the new am62a specific pinmux definition that we will
use to generate the dtbs for the u-boot-spl and u-boot binaries

Co-developed-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
2022-12-09 14:10:28 -05:00
Tom Rini
8f17040877 - Drop MMCI interrupt-names in STM32H743, STM32MP15 and STM322MP13 DT
DHSOM:
   - Enable assorted ST specific commands
   - Add version variable
   - Add boot counter
 STM32MP13:
   - Add sdmmc cd-gpios for STM32MP135F-DK
   - Add clock & reset support
 STM32 ADC:
   - Split channel init into several routines
   - Add support of generic channels binding
 -----BEGIN PGP SIGNATURE-----
 
 iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmOQvIUcHHBhdHJpY2Uu
 Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/pgRHD/42Dhlm8qyeBM+mFp/C
 vtGLkXHof7Iec48uGfMh2qhb4tMWpH9jQSF/iK8GERlaBJesNTuDLG2y9e411f5x
 OfnXeoT1vxlxARo/3D9ESvR8q1/6wRWYWYQ7W08yVmMakLjF2ojky1h0mgvJj1x0
 yzFdZVfrlx3XtP0opC8h2NtfVAa2fq8L6fx6r7nFKhPd6PSlDBeyiW/5fC/EyTLW
 Sqn7/POrOCgpWSuStcosWNkHNldupi7Dv0zGh0XWEfAv/XBqR0LD6KAEwUygsY4i
 zGKtfZeOrwAhKMeA2MhMyM8oW7gNPw8Xia74a5vqVv1qFrd6arCUfvhTn/4T6Kyt
 dtc93i7XR0bYumYaEb5DLeqge6QEIIjVb36g0c/njWI8AerOsnRKhUpuhF6Y58LU
 RM4y8MYWY0bsTsSCCHhKIm/DPR/iA4m076Obdy+iRRNG4c4fg8/EfcUsXaoHvmap
 Bi1edpFmMh92Uv3sdgkMHS1j9Vo8gvnCRujEUiPvSFHmrMWo1OW8xVoIPgNCdMYF
 IkmTbAelRK8MSgFy2DLBbMeOTMZN1VFTdzVxBRLP4DXNZQWx2gcHrVLAjzYnMpsG
 YvSHz+pJJ8q8Bt8fTl0DCF8R+99DTB8j0o8MDQxo4a02njoNtcvDbeCkdT2ddzPX
 s4WhBkfgBWNv1tYBVNscEr0aTw==
 =DkkE
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20221207' of https://source.denx.de/u-boot/custodians/u-boot-stm

- Drop MMCI interrupt-names in STM32H743, STM32MP15 and STM322MP13 DT

DHSOM:
  - Enable assorted ST specific commands
  - Add version variable
  - Add boot counter
STM32MP13:
  - Add sdmmc cd-gpios for STM32MP135F-DK
  - Add clock & reset support
STM32 ADC:
  - Split channel init into several routines
  - Add support of generic channels binding
2022-12-08 11:25:08 -05:00
Balamanikandan Gunasundar
70cbf2f097 ARM: dts: at91: sam9x60ek: Enable NAND support
Enable the EBI and NAND flash controller. Define the pinctrl and
partition table

Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
2022-12-08 18:06:27 +02:00
Balamanikandan Gunasundar
2d35bf2420 ARM: dts: at91: sam9x60: Add nodes for EBI and NAND
Add new bindings for EBI and NAND controller

Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
2022-12-08 18:06:27 +02:00
Tom Rini
341ba8d94b Second set of u-boot-at91 fixes for the 2023.01 cycle
-----BEGIN PGP SIGNATURE-----
 
 iQFQBAABCgA6FiEEqxhEmNJ6d7ZdeFLIHrMeAg6sL8gFAmORqHQcHGV1Z2VuLmhy
 aXN0ZXZAbWljcm9jaGlwLmNvbQAKCRAesx4CDqwvyF4qCACQZLl0WPPGOABtlJdB
 7a5bZUwjeQdwES78Mx7N4pYAldafv+yBbzDHg/8fp3zS70xuMgqHmmDHgQ7GinvX
 lOpFaWpxDTOkEOCn6+2x90mNpCh0siuCptUyaHfQ+B5L3leXqb3DTJuBLQyMbjAE
 bhGjImPfZY+KdPY3VTkIK0fIZJD+/woysTSA5RCC8JmIUEHgPnOxes47gRCyKoug
 sznMzYO5gGP7jpA9p1QXOLLiiAENQ+DxiCUdQDrDHm0PxTk8YQbhEiF0Svm476FL
 hLuuuccCOzY1obCm9z70dDOhvmkH7tKHs02Es00nGEk2X+ZrI0oG0FtH4Z7CcZKF
 WcWV
 =PJWw
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-at91-fixes-2023.01-b' of https://source.denx.de/u-boot/custodians/u-boot-at91

Second set of u-boot-at91 fixes for the 2023.01 cycle:

This is a single tiny fix that allows the correct name for one pin on
sama7g5 device. People with DT coming from Linux will have build errors
without this if they add NAND device.
2022-12-08 08:27:50 -05:00
Marek Vasut
666b1a712d ARM: dts: stm32: Drop MMCI interrupt-names
The pl18x MMCI driver does not use the interrupt-names property,
the binding document has been updated to recommend this property
be unused, remove it.
Backport of Marek's Linux patch:
https://lore.kernel.org/linux-arm-kernel/20221013221242.218808-3-marex@denx.de/

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-12-07 17:04:08 +01:00
Yann Gautier
3068bb60c6 ARM: dts: stm32: add sdmmc cd-gpios for STM32MP135F-DK
On STM32MP135F-DK, the SD card detect GPIO is GPIOH4.
Backport of the Linux patch:
https://lore.kernel.org/linux-arm-kernel/20220921160334.3227138-1-yann.gautier@foss.st.com/

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2022-12-07 17:03:35 +01:00
Gabriel Fernandez
2c8d548f4e arm: dts: stm32mp13: add support of RCC driver
Adds support of Clock and Reset drivers for STM32MP13 platform.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2022-12-07 16:49:35 +01:00
Tom Rini
aa6e94deab global: Move remaining CONFIG_SYS_SDRAM_* to CFG_SYS_SDRAM_*
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2022-12-05 16:06:07 -05:00
Michal Simek
6a664a7bd4 ARM: zynq: Add missing twd timer for mini configurations
The commit b7e0750d88 ("zynq: Convert arm twd timer to DM driver")
switched timer to DM but missing to add nodes to all mini configurations.
Based on it missing timer end up in non functional system where any delay
doesn't work.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/2020fc7e3d4760e890265485b3c7e18eb1caf8be.1669724598.git.michal.simek@amd.com
2022-12-05 08:55:55 +01:00
Paul Barker
b9829e9846 am335x-sancloud-bbe: Add -u-boot.dtsi files
The SanCloud BBE requires the same dtb nodes to be present in the SPL as
the AM335x EVM.

The SanCloud BBE Lite also requires the SPI flash node and all
dependencies to be present in the SPL to support SPI boot.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2022-12-02 08:39:00 -05:00
Paul Barker
8328022d05 am335x-sancloud-bbe-lite: SPI flash is JEDEC compatible
Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2022-12-02 08:39:00 -05:00
Paul Barker
78b9afd2c3 am335x-evm: Enable required dtb nodes in SPL
For successful boot when CONFIG_SPL_OF_CONTROL=y, we need to ensure that
the board EEPROM on i2c0, the uart0 serial port and the relevant boot
device (mmc1 or mmc2) can be accessed in the SPL. We also need to
preserve the parent nodes for each required dtb node.

Signed-off-by: Paul Barker <paul.barker@sancloud.com>
2022-12-02 08:39:00 -05:00
Mihai Sain
94256dc610 ARM: dts: at91: sama7g5: fix signal name of pin PD8
The signal name of pin PD8 with function D is A22_NANDCLE
as it is defined in the datasheet.

Fixes: 558378a4cd ("ARM: mach-at91: add support for new SoC sama7g5")
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
2022-12-02 09:48:49 +02:00
Tom Rini
d5d9f32579 - Implement setbrg op to meson serial device
- Re-add the old PHY reset binding for nanopi-k2
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEPVPGJshWBf4d9CyLd9zb2sjISdEFAmN9DUIACgkQd9zb2sjI
 SdE1zBAAhTdTj1XXUhYRTG78UmcGEvm0Xz8om/Ej9dnIOZiZ1BvhU9XkLF1/qE4T
 0Z0rmhHtFETB7G+TiToHncUqtH5F6R8hSB2+RaChQtTjLmAeYquUFJva5ysFlnhp
 SkwS4fHx7WwEK2/ZD/FlXCWJE98Q1NdsJmIGDvPc6OwIMLlo2IA9C+Ct0ZLHQf7p
 ipgppxVZrqD0qxosPGRraUE2O2MvZRQu3pKdn4BAbZv4X+HrwI7+rv0zyAPRZBUA
 qJjOfpgzqDUqSGgSdGvqHIDbpm3PfzttDjr3W3PnVl3tYFjOXDekdGpQTV+Uvhy2
 1LCpLNYGShInmVrl5X3UGpGzPLodNTfCrz7kqc689nohoyR+/og4jpvctkH5jpek
 Vwi2uTjTHXDqgl6J7S1mExY0x17IR2cfpH5HBSZEmpmuKX53KZHFe1Qbd6QOyBK2
 SUUJO3mQ6zEoMGMTv+XrnBo9hwNNJTh02O1IqQypYxWnSodmAYZ9VYhK3iCx5pXp
 hBfnRzwA63DKvzS5r3IjzubKjDCyWnL4S9Gd5VczcAwwJlgddSgv6+aZd2qJpiVK
 YafUxeR0sCYVs9ccD7WY7Wkb0NivND0BevdEjNEri3KDAlsZuzkbYACHDE3HYzp+
 8pHUrbpxsuxd7MDUiHUTCALwbv5mFDtCfq9S/nCTlmS0OB3aEjY=
 =yEaP
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-amlogic-20221122' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- Implement setbrg op to meson serial device
- Re-add the old PHY reset binding for nanopi-k2
2022-11-23 10:05:26 -05:00
Christian Hewitt
e0638f1d09 arm64: dts: meson: nanopi-k2: readd PHY reset properties
The sync of device-tree/bindings in 11a48a5a18c6 ("Linux 5.6-rc2") causes
Ethernet to break on some GXBB boards; the PHY seems to need proper reset
timing to function in u-boot and Linux. Re-add the old PHY reset binding
for dwmac until we support new bindings in the PHY node. This borrows the
same fix applied to the Odroid C2 board [0].

[0] https://lists.denx.de/pipermail/u-boot/2021-April/446658.html

Fixes: dd5f2351e9 ("arm64: dts: meson: sync dt and bindings from v5.6-rc2")
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Link: https://lore.kernel.org/r/20221025143205.14470-1-christianshewitt@gmail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2022-11-22 18:53:21 +01:00
Ashok Reddy Soma
3655dd22a4 arm64: versal: Add octal spi flash mini u-boot configuration
Add configuration file for mini u-boot configuration which runs on a
smaller footprint from on chip memory(OCM). This configuration has
required CONFIG's enabled to support octal spi flash and uses DCC terminal
for console output. Add required dts for octal spi flash mini u-boot
configuration.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20221116141155.14788-4-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-22 15:02:07 +01:00
Ashok Reddy Soma
3c53ebdd5c arm64: versal: Add qspi flash mini u-boot configuration
Add configuration file for mini u-boot configuration which runs on a
smaller footprint from on chip memory(OCM). This configuration has
required CONFIG's enabled to support qspi flash and uses DCC terminal
for console output. Add required dts files for qspi mini configuration.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Link: https://lore.kernel.org/r/20221116141155.14788-2-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-11-22 15:02:07 +01:00
Michal Simek
38920451c7 arm64: zynqmp: Describe TI phy as ethernet-phy-id with reset on zcu106
zcu106 also connects ethernet phy reset via tca6416 chip as is done on
other evaluation boards. That's why describe this connection to make sure
that ethernet phy is reset before it's use.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/21ccd672b799b5858021f6059098a1247c311fae.1668596358.git.michal.simek@amd.com
2022-11-22 15:02:07 +01:00
Christian Kohn
96dcde487e ARM: zynq: DT: Enable all FCLKs by default
The fclk-enable property is set to 0 which disables all FCLKs.
Enable all FCLKs so they can be used as clock sources in the
programmable logic.

Signed-off-by: Christian Kohn <christian.kohn@xilinx.com>
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b1308dc1f14f8eb24662019f7376c959e5e763b8.1665567031.git.michal.simek@amd.com
2022-11-22 15:02:07 +01:00
Stefano Babic
8fc220d0a6 Revert "imx: imx8: apalis: switch to binman"
This reverts commit b8072ae848.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Reported-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-11-21 09:23:00 -05:00
Fabio Estevam
c9713c1551 imx8-u-boot: Fix SPL guard option
We should guard the SPL nodes against CONFIG_SPL_BUILD to fix
the following build error when the blobs are absent:

binman: Fail open first container file mx8qm-ahab-container.img

Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-11-12 14:13:49 +01:00
Stefano Babic
cca660c2bd Convert mx8 u-boot.dtsi to CONFIG_TEXT_BASE
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-11-09 17:12:32 +01:00
Oliver Graute
b8072ae848 imx: imx8: apalis: switch to binman
Switch to use binman to pack images

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2022-11-09 17:12:32 +01:00
Oliver Graute
bdadc140a1 imx: imx8x: colibri: switch to binman
Switch to use binman to pack images

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2022-11-09 17:12:32 +01:00
Oliver Graute
dcbc4ae9d6 imx: imx8qxp: giedi switch to binman
Switch to use binman to pack images

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2022-11-09 17:12:32 +01:00
Oliver Graute
4aa738823c imx: imx8qm: imx8qm_mek switch to binman
Switch to use binman to pack images

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2022-11-09 17:12:32 +01:00
Oliver Graute
61c57b614e imx: imx8qxp: imx8qxp_mek switch to binman
Switch to use binman pack images

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-11-09 17:12:32 +01:00
Oliver Graute
5a878c9472 imx: imx8qm: cgtqmx8: switch to binman
Switch to use binman to pack images

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2022-11-09 17:12:32 +01:00
Oliver Graute
55be8433d5 imx: imx8qm-rom7720: switch to binman
Switch to use binman to pack images

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
2022-11-09 17:12:32 +01:00
Fabio Estevam
f827f84d3f wandboard: Pass mmc aliases
Originally, the mmc aliases node was present in imx6qdl-wandboard.dtsi.

After the sync with Linux in commit d0399a46e7 ("imx6dl/imx6qdl:
synchronise device trees with linux"), the aliases node is gone as
the upstream version does not have it.

This causes a regression in which the SD card cannot be found anymore:

Since commit  the aliases node has been removed
U-Boot 2022.10-00999-gcca41ed3d63f-dirty (Nov 03 2022 - 22:07:38 -0300)

CPU:   Freescale i.MX6QP rev1.0 at 792 MHz
Reset cause: POR
DRAM:  2 GiB
Core:  62 devices, 17 uclasses, devicetree: separate
PMIC:  PFUZE100 ID=0x10
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
Loading Environment from MMC... MMC: no card present
*** Warning - No block device, using default environment

Fix it by passing the alias node in the u-boot.dtsi file to
restore the original behaviour where the SD card (esdhc3) was
mapped to mmc0.

Fixes: d0399a46e7 ("imx6dl/imx6qdl: synchronise device trees with linux")
Signed-off-by: Fabio Estevam <festevam@denx.de>
2022-11-09 17:12:31 +01:00
Marcel Ziswiler
dbd5ca2e46 imx8mm: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8m{m,n,p}-venice-*
2022-11-08 17:35:00 +01:00