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board: rockchip: Add Radxa Compute Module 3 IO Board
Radxa Compute Module 3(CM3) IO board an application board from Radxa and is compatible with Raspberry Pi CM4 IO form factor. Radxa CM3 needs to mount on top of this IO board in order to create complete Radxa CM3 IO board platform. Add support for Radxa CM3 IO Board defconfig and -u-boot.dtsi Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
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18
arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
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arch/arm/dts/rk3566-radxa-cm3-io-u-boot.dtsi
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2021 Rockchip Electronics Co., Ltd
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*/
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#include "rk356x-u-boot.dtsi"
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/ {
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chosen {
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stdout-path = &uart2;
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};
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};
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&uart2 {
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clock-frequency = <24000000>;
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bootph-all;
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status = "okay";
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};
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@ -5,6 +5,11 @@ F: board/rockchip/evb_rk3568
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F: include/configs/evb_rk3568.h
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F: configs/evb-rk3568_defconfig
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RADXA-CM3
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M: Jagan Teki <jagan@amarulasolutions.com>
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S: Maintained
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F: configs/radxa-cm3-io-rk3566_defconfig
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ROCK-3A
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M: Akash Gajjar <gajjar04akash@gmail.com>
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S: Maintained
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66
configs/radxa-cm3-io-rk3566_defconfig
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configs/radxa-cm3-io-rk3566_defconfig
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CONFIG_ARM=y
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CONFIG_SKIP_LOWLEVEL_INIT=y
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CONFIG_COUNTER_FREQUENCY=24000000
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_TEXT_BASE=0x00a00000
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_NR_DRAM_BANKS=2
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CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
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CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
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CONFIG_DEFAULT_DEVICE_TREE="rk3566-radxa-cm3-io"
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CONFIG_ROCKCHIP_RK3568=y
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CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
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CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
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CONFIG_SPL_MMC=y
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CONFIG_SPL_SERIAL=y
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CONFIG_SPL_STACK_R_ADDR=0x600000
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CONFIG_TARGET_EVB_RK3568=y
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CONFIG_SPL_STACK=0x400000
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CONFIG_DEBUG_UART_BASE=0xFE660000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_SYS_LOAD_ADDR=0xc00800
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CONFIG_DEBUG_UART=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-radxa-cm3-io.dtb"
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_DISPLAY_BOARDINFO_LATE=y
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CONFIG_SPL_MAX_SIZE=0x20000
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CONFIG_SPL_PAD_TO=0x7f8000
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CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
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CONFIG_SPL_BSS_START_ADDR=0x4000000
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CONFIG_SPL_BSS_MAX_SIZE=0x4000
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# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
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CONFIG_SPL_STACK_R=y
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CONFIG_SPL_ATF=y
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CONFIG_CMD_GPT=y
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CONFIG_CMD_MMC=y
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# CONFIG_CMD_SETEXPR is not set
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# CONFIG_SPL_DOS_PARTITION is not set
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_OF_LIVE=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SPL_SYSCON=y
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CONFIG_SPL_CLK=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_MISC=y
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CONFIG_SUPPORT_EMMC_RPMB=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_MMC_SDHCI=y
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CONFIG_MMC_SDHCI_SDMA=y
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CONFIG_MMC_SDHCI_ROCKCHIP=y
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_PWM_ROCKCHIP=y
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CONFIG_SPL_RAM=y
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CONFIG_BAUDRATE=1500000
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYSRESET=y
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CONFIG_ERRNO_STR=y
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