- Introduced dedicated switches for building 440 and 405 images required
for 440-specific machine instructions like 'rfmci' etc.
- Exception vectors moved to the proper location (_start moved away from
the critical exception handler space, which it occupied)
- CriticalInput now serviced (with default handler)
- MachineCheck properly serviced (added a dedicated handler and return
subroutine)
- Overall cleanup of exceptions declared with STD_EXCEPTION macro (unused,
unhandled and those not relevant for 4xx were eliminated)
- Eliminated Linux leftovers, removed dead code
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The board config array CFG_440_GPIO_TABLE for the ppc440 GPIO setup
is extended with the default GPIO output state (level).
Signed-off-by: Stefan Roese <sr@denx.de>
Now program_tlb() allows to program a TLB (or multiple) with
different virtual and physical addresses. With this change, now one
physical region (e.g. SDRAM) can be mapped 2 times, once with caches
diabled and once with caches enabled.
Signed-off-by: Stefan Roese <sr@denx.de>
Set the correct value in GPIOx_TCR when configuring the gpio
with CFG_440_GPIO_TABLE.
Signed-off-by: Benoit Monin <bmonin@adeneo.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds NAND booting support for the AMCC Acadia eval board.
Please make sure to configure jumper J7 to position 2-3 when booting
from NOR, and to position 1-2 when booting for NAND.
I also added a board command to configure the I2C bootstrap EEPROM
values. Right now only 267MHz is support for booting either via NOR
or NAND FLASH. Here the usage:
=> bootstrap 267 nor ;to configure the board for 267MHz NOR booting
=> bootstrap 267 nand ;to configure the board for 267MHz NNAND booting
Signed-off-by: Stefan Roese <sr@denx.de>
The attached patch is mainly cosmetic, allowing u-boot to
display the correct bootstrap option letter according to the
datasheets.
The original patch was extended with 405EZ support by Stefan
Roese.
Signed-off-by: Benoit Monin <bmonin@adeneo.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds NAND booting support for the AMCC Bamboo eval board.
Since the NAND-SPL boot image is limited to 4kbytes, this version
only supports the onboard 64MBytes of DDR. The DIMM modules can't be
supported, since the setup code for I2C DIMM autodetection and
configuration is too big for this NAND bootloader.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds hardware ECC support to the NDFC driver. It also
changes the register access from using the "simple" in32/out32
functions to the in_be32/out_be32 functions, which make sure
that the access is correctly synced. This is the only recommended
access to SoC registers in the current Linux kernel.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for 405 PPC's to the 4xx NAND driver
ndfc.c. This is in preparation for the new AMCC 405EZ.
Signed-off-by: Stefan Roese <sr@denx.de>
Now 405EZ ports also show upon bootup from which boot device
they are configured to boot:
U-Boot 1.2.0-gd3832e8f-dirty (Apr 18 2007 - 07:47:05)
CPU: AMCC PowerPC 405EZ Rev. A at 199.999 MHz (PLB=133, OPB=66, EBC=66 MHz)
Bootstrap Option E - Boot ROM Location EBC (32 bits)
16 kB I-Cache 16 kB D-Cache
Board: Acadia - AMCC PPC405EZ Evaluation Board
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes changes the i2c_init(...) function to use the function
get_OPB_freq() rather than calculating the OPB speed by
sysInfo.freqPLB/sysInfo.pllOpbDiv. The get_OPB_freq() function is
specific per processor. The prior method was not and so was calculating
the wrong speed for some PPC4xx processors.
Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Fix a bug in the auto calibration routine. This driver now runs
more reliable with the tested modules. It's also tested with
167MHz PLB frequency (667MHz DDR2 frequency) on the Katmai.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds some 4xx GPIO functions. It also moves some of the
common code and defines into a common 4xx GPIO header file.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the new AMCC 405EZ PPC. It is in
preparation for the AMCC Acadia board support.
Please note that this Acadia/405EZ support is still in a beta stage.
Still lot's of cleanup needed but we need a preliminary release now.
Signed-off-by: Stefan Roese <sr@denx.de>
The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR
inititializition. This includes DDR auto calibration and support
for different DIMM modules, instead of the fixed setup used in
the earlier version.
This patch also enables the cache in FLASH for the startup
phase of U-Boot (while running from FLASH). After relocating to
SDRAM the cache is disabled again. This will speed up the boot
process, especially the SDRAM setup, since there are some loops
for memory testing (auto calibration).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes a problem that occurs when 2 DIMM's are
used. This problem was first spotted and fixed by Gerald Jackson
<gerald.jackson@reaonixsecurity.com> but this patch fixes the
problem in a little more clever way.
This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.
As this feature is new to the "old" 44x SPD DDR driver, it
has to be enabled via the CONFIG_PROG_SDRAM_TLB define.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch updates the recently added Katmai board support. The biggest
change is the support of ECC DIMM modules in the 440SP(e) SPD DDR2
driver.
Please note, that still some problems are left with some memory
configurations. See the driver for more details.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the DDR2 controller used on the
440SP and 440SPe. It is tested on the Katmai (440SPe) eval
board and works fine with the following DIMM modules:
- Corsair CM2X512-5400C4 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5/512 (512MByte per DIMM)
- Kingston ValueRAM KVR667D2N5K2/2G (1GByte per DIMM)
This patch also adds the nice functionality to dynamically
create the TLB entries for the SDRAM (tlb.c). So we should
never run into such problems with wrong (too short) TLB
initialization again on these platforms.
Signed-off-by: Stefan Roese <sr@denx.de>
Since the existing 4xx SPD SDRAM initialization routines for the
405 SDRAM controller and the 440 DDR controller don't have much in
common this patch splits both drivers into different files.
This is in preparation for the 440 DDR2 controller support (440SP/e).
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for multiple I2C busses on the PPC4xx
platforms. Define CONFIG_I2C_MULTI_BUS in the board config file
to make use of this feature.
It also merges the 405 and 440 i2c header files into one common
file 4xx_i2c.h.
Also the 4xx i2c reset procedure is reworked since I experienced
some problems with the first access on the 440SPe Katmai board.
Signed-off-by: Stefan Roese <sr@denx.de>
Previously the strapping DCR/SDR was read to determine if the internal PCI
arbiter is enabled or not. This strapping bit can be overridden, so now
the current status is read from the correct DCR/SDR register.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch fixes a problem with an incorrect setup for the refresh
timer of the 44x DDR controller in the file cpu/ppc4xx/sdram.c
Signed-off-by: Stefan Roese <sr@denx.de>
This code will optimize the DDR2 controller setup on a board specific
basis.
Note: This code doesn't work right now on the NAND booting image for the
Sequoia board, since it doesn't fit into the 4kBytes for the SPL image.
Signed-off-by: Stefan Roese <sr@denx.de>
Patch below corrects the setting of the zmiifer register, it was
overwritting the register rather than ORing the settings.
Signed-off-by: Neil Wilson <NWilson@airspan.com>
Signed-off-by: Stefan Roese <sr@denx.de>
and adapted board configs TQM5200 and yosemite accordingly. This commit
also makes the maximum number of root hub ports configurable
(CFG_USB_OHCI_MAX_ROOT_PORTS).
Fixed cpu/ppc4xx/start.S for 440EPx Errata: further corrects PPC440EPx
errata 1.12: 440_33 by moving patch up in code.
Signed-off-by: Jeff Mann <mannj@embeddedplanet.com>
Signed-off-by: Stefan Roese <sr@denx.de>
- Add support for PPC440EPx & PPC440GRx
- Add support for PPC440EP(x)/GR(x) NAND controller
in cpu/ppc4xx directory
- Add NAND boot functionality for Sequoia board,
please see doc/README.nand-boot-ppc440 for details
- This Sequoia NAND image doesn't support environment
in NAND for now. This will be added in a short while.
Patch by Stefan Roese, 07 Sep 2006
Modifications are based on the linux kernel approach and
support two use cases:
1) Add O= to the make command line
'make O=/tmp/build all'
2) Set environement variable BUILD_DIR to point to the desired location
'export BUILD_DIR=/tmp/build'
'make'
The second approach can also be used with a MAKEALL script
'export BUILD_DIR=/tmp/build'
'./MAKEALL'
Command line 'O=' setting overrides BUILD_DIR environent variable.
When none of the above methods is used the local build is performed and
the object files are placed in the source directory.
AMCC suggested to set the PMU bit to 0 for best performace on
the PPC440 DDR controller.
Please see doc/README.440-DDR-performance for details.
Patch by Stefan Roese, 28 Jul 2006
The TB5200 ("Tinybox") is a small baseboard for the TQM5200 module
integrated in a little aluminium case.
Patch by Martin Krause, 8 Jun 2006
Some code cleanup
405 SDRAM: - The SDRAM parameters can now be defined in the board
config file and the 405 SDRAM controller values will
be calculated upon bootup (see PPChameleonEVB).
When those settings are not defined in the board
config file, the register setup will be as it is now,
so this implementation should not break any current
design using this code.
Thanks to Andrea Marson from DAVE for this patch.
440 DDR: - Added function sdram_tr1_set to auto calculate the
TR1 value for the DDR.
- Added ECC support (see p3p440).
Patch by Stefan Roese, 17 Mar 2006
On PPC44x platforms, the startup message generated in "cpu.c" only
comprised the ppc type and revision but not additional informations
like speed etc. Those speed infos where printed in the board specific
code. This new implementation now prints all CPU infos in the common
cpu specific code. No board specific code is needed anymore and
therefore removed from all current 44x implementations.
Patch by Stefan Roese, 27 Nov 2005
- Added onboard PPC440 DDR autodetection in cpu/ppc/sdram.c
- CFG_FLASH_QUIET_TEST added to use the common CFI driver
for bank autodetection
Patch by Stefan Roese, 22 Nov 2005
Second serial port on 440GX now defined as a system device.
Add 'Short Etch' code for Cicada PHY within 440gx_enet.c
Patch by Travis B. Sawyer, 12 Jul 2005
Check return value of malloc in 440gx_enet.c
Patch by Travis B. Sawyer, 18 Jul 2005
Initialize allocated dev and private hw structures
after their respective allocation in 440gx_enet.c
* Patch by Steven Scholz, 10 Jun 2005:
Fix byteorder problems with second argument of "bootm" with
standalone images;
- update the pxa-regs.h file for PXA27x chips
- add PXA27x based ADSVIX board
- add support for MMC on PXA27x processors
* Patch by Andrew E. Mileski, 28 Nov 2004:
Fix PPC4xx SPD SDRAM detection bug
* Patch by Hiroshi Ito, 26 Nov 2004:
Fix logic of "test -z" and "test -n" commands
* Cleanup confusing use of CONFIG_ETH*ADDR - ust his only to
pre-define a MAC address; use CONFIG_HAS_ETH* to enable support for
additional ethernet addresses.
* Cleanup drivers/i82365.c - avoid duplication of code
* Fix bogus "cannot span across banks" flash error message
* Add support for CompactFlash for the CPC45 Board.
- Added I2C support for ML300.
- Added support for ML300 to read out its environment information
stored on the EEPROM.
- Added support to use board specific parameters as part of
U-Boot's environment information.
- Updated MLD files to support configuration for new features
above.
* Patches by Travis Sawyer, 5 Aug 2004:
- Remove incorrect bridge settings for eth group 6
- Add call to setup bridge in ppc_440x_eth_initialize
- Fix ppc_440x_eth_init to reset the phy only if its the
first time through, otherwise, just check the phy for the
autonegotiated speed/duplex. This allows the use of netconsole
- only print the speed/duplex the first time the phy is reset.
(JFFS2 speed enhancements) because of using non-public
data (PHYS_FLASH_SECT_SIZE)
* Patch by Travis Sawyer, 23 Apr 2004:
Fix VSC/CIS 8201 phy descrambler interoperability timing due to
errata from Vitesse Semiconductor.
- Fix Gigabit Ethernet support for 440GX
- Add Gigabit Ethernet Support to MII PHY utilities
* Patch by Brad Kemp, 12 Mar 2004:
Fixes for drivers/cfi_flash.c:
- Better support for x8/x16 implementations
- Added failure for AMD chips attempting to use CFG_FLASH_USE_BUFFER_WRITE
- Added defines for AMD command and address constants
* Patch by Leon Kukovec, 12 Mar 2004:
Fix get_dentfromdir() to correctly handle deleted dentries
* Patch by George G. Davis, 11 Mar 2004:
Remove hard coded network settings in TI OMAP1610 H2
default board config
* Patch by George G. Davis, 11 Mar 2004:
add support for ADS GraphicsClient+ board.
- Add support for the SSV ADNP/ESC1 (Nios Softcore)
* Patch by George G. Davis, 9 Mar 2004:
fix recent build failure for SA1100 target
* Patch by Travis Sawyer, 09 Mar 2004:
Support native interrupt mode for the IBM440GX.
Previously it was running in 440GP compatibility mode.
Ocotea:
- Add IBM PPC440GX Ref Platform support (Ocotea)
Original code by Paul Reynolds <PaulReynolds@lhsolutions.com>
Adapted to U-Boot and 440GX port
440gx_enet.c:
- Add gracious handling of all Ethernet Pin Selections for 440GX
- Add RGMII selection for Cicada CIS8201 Gigabit PHY
ppc440.h:
- Add needed bit definitions
- Fix formatting
* Patch by Carl Riechers, 1 Mar 2004:
Add PPC440GX prbdv0 divider to fix memory clock calculation.
* Patch by Stephan Linz, 27 Feb 2004
- avoid problems for targets without NFS download support
Add support for the Xilinx ML300 platform
* Patch by Stephan Linz, 17 Feb 2004:
Fix watchdog support for NIOS
* Patch by Josh Fryman, 16 Feb 2004:
Fix byte-swapping for cfi_flash.c for different bus widths
* Patch by Jon Diekema, 14 Jeb 2004:
Remove duplicate "FPGA Support" notes from the README file
- update board/emk tree; use common flash driver
- Corrected tested bits in machine check exception in cpu/mpc5xxx/traps.c
[adapted for other PPC CPUs -- wd]
- Added support for the M48T08 on the EVAL5200 board in rtc/mk48t59.c
* Patch by Jon Diekema, 13 Feb 2004:
Call show_boot_progress() whenever POST "FAILED" is printed.
* Patch by Nishant Kamat, 13 Feb 2004:
Add support for TI OMAP1610 H2 Board
Fixes for cpu/arm926ejs/interrupt.c
(based on Richard Woodruff's patch for arm925, 16 Oct 03)
Fix for a timer bug in OMAP1610 Innovator
Add support for CS0 (ROM)/CS3 (Flash) boot in OMAP1610 Innovator and H2
* Patches by Stephan Linz, 12 Feb 2004:
- add support for NIOS timer with variable period preload counter value
- prepare POST framework support for NIOS targets
* Patch by Denis Peter, 11 Feb 2004:
add POST support for the MIP405 board
* Cleanup compiler warnings
* Fix problem with side effects in macros in include/usb.h
* Patch by David Benson, 13 Nov 2003:
bug 841358 - fix TFTP download size limit
* Fixing bug 850768:
improper flush_cache() in load_serial()
* Fixing bug 834943:
MPC8540 - missing volatile declarations
* Patch by Stephen Williams, 09 Feb 2004:
Add support for Xilinx SystemACE chip:
- New files common/cmd_ace.c and include/systemace.h
- Hook systemace support into cmd_fat and the partition manager
* Patch by Travis Sawyer, 09 Feb 2004:
Add bi_opbfreq & bi_iic_fast to 440GX bd_info as needed for Linux
o 440GX:
- Fix PCI Indirect access for type 1 config cycles with ppc440.
- Add phymode for 440 enet
- fix pci pre init
o XPedite1K:
- Change board_pre_init to board_early_init_f
- Add user flash to bus controller setup
- Fix pci pre init
- Fix is_pci_host to check GPIO for monarch bit
- Force xpedite1k to pci conventional mode (via #define option)
* Patch by Brad Kemp, 4 Feb 2004:
- handle the machine check that is generated during the PCI scans
on 82xx processors.
- define the registers used in the IMMR by the PCI subsystem.
* Patch by Pierre Aubert, 03 Feb 2004:
cpu/mpc5xxx/start.S: copy MBAR into SPR311
* Patch by Jeff Angielski, 03 Feb 2004:
Fix copy & paste error in cpu/mpc8260/pci.c
* Patch by Reinhard Meyer, 24 Jan 2004:
Fix typo in cpu/mpc5xxx/pci_mpc5200.c
Allow bzip2 compression for small memory footprint boards
* Patch by Brad Kemp, 21 Jan 2004:
Add support for CFI flash driver for both the Intel and the AMD
command sets.
* Patch by Travis Sawyer, 20 Jan 2004:
Fix pci bridge auto enumeration of sibling p2p bridges.
* Patch by Tolunay Orkun, 12 Jan 2004:
Add some delays as needed for Intel LXT971A PHY support
* Patches by Stephan Linz, 09 Jan 2004:
- avoid warning: unused variable `piop' in board/altera/common/sevenseg.c
- make DK1C20 board configuration related to ASMI conform to
documentation
Add support for IBM PPC440GX. Multiple EMAC Ethernet devices,
select MDI port based on enabled EMAC device.
Add support for XES Inc <http://www.xes-inc.com> XPedite1000 440GX
base PrPMC board.
* Minor code cleanup (coding style)
* Patch by Reinhard Meyer, 30 Dec 2003:
- cpu/mpc5xxx/fec.c: added CONFIG_PHY_ADDR, added CONFIG_PHY_TYPE,
- added CONFIG_PHY_ADDR to include/configs/IceCube.h,
- turned debug print of PHY registers into a function (called in two places)
- added support for EMK MPC5200 based modules
* Fix MPC8xx PLPRCR_MFD_SHIFT typo
* Add support for TQM866M modules
* Fixes for TQM855M with 4 MB flash (Am29DL163 = _no_ mirror bit flash)
* Fix a few compiler warnings
add support for mvblue (mvBlueLYNX and mvBlueBOX) boards
* Patch by Pavel Bartusek, 21 Nov 2003:
set ZMII bridge speed on 440
* Patch by Anders Larsen, 17 Nov 2003:
Fix mismatched #ifdef / #endif in include/asm-arm/arch-pxa/hardware.h
Move most of the timer interrupt related PPC code to ppc_lib/interrupts.c
* Patch by Anders Larsen, 17 Sep 2003:
Bring ARM memory layout in sync with the documentation:
stack and malloc-heap are now located _below_ the U-Boot code
recent tools
* Add checksum verification to 'imls' command
* Add bd_info fields needed for 4xx Linux I2C driver
* Patch by Martin Krause, 4 Nov. 2003:
Fix error in cmd_vfd.c (TRAB board: "vfd /1" shows now only one Bitmap)
* Print used network interface when CONFIG_NET_MULTI is set
applications: instead of using (PPC-specific) system calls we now
use a jump table; please see doc/README.standalone for details
* Patch by Dave Westwood, 24 Jul 2003:
added support for Unity OS (a proprietary OS)
- remove trailing white space, trailing empty lines, C++ comments, etc.
- split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)
* Patches by Kenneth Johansson, 25 Jun 2003:
- major rework of command structure
(work done mostly by Michal Cendrowski and Joakim Kristiansen)
Modifications for Atmel AT91RM9200DK ARM920T based development kit
- Add Atmel DataFlash support for reading and writing.
- Add possibility to boot a Linux from DataFlash with BOOTM command.
- Add Flash detection on Atmel AT91RM9200DK
(between Atmel AT49BV1614 and AT49BV1614A flashes)
- Replace old Ethernet PHY layer functions
- Change link address
* Patch by Frank Smith, 9 Jun 2003:
use CRIT_EXCEPTION for machine check on 4xx
* Patch by Detlev Zundel, 13 Jun 2003:
added implementation of the "carinfo" command in cmd_immap.c
- Added support for custom keyboards, initialized by defining a
board-specific drv_keyboard_init as well as defining CONFIG_KEYBOARD .
- Added support for the RBC823 board.
- cpu/mpc8xx/lcd.c now automatically calculates the
Horizontal Pixel Count field.
* Fix alignment problem in BOOTP (dhcp_leasetime option)
[pointed out by Nicolas Lacressonnire, 2 Jun 2003]
* Patch by Mark Rakes, 14 May 2003:
add support for Intel e1000 gig cards.
* Patch by Nye Liu, 3 Jun 2003:
fix critical typo in MAMR definition (include/mpc8xx.h)
* Fix requirement to align U-Boot image on 16 kB boundaries on PPC.
* Patch by Klaus Heydeck, 2 Jun 2003
Minor changes for KUP4K configuration
instead CFG_MONITOR_LEN is now only used to determine _at_compile_
_time_ (!) if the environment is embedded within the U-Boot image,
or in a separate flash sector.
* Cleanup CFG_DER #defines in config files (wd maintained only)
Fix problem with only partially cleared .bss segment
* Patch by Rune Torgersen, 12 May 2003:
get PCI to work on a MPC8266ADS board; incorporate change to
cpu/mpc8260/pci.c to enable overrides of PCI memory parameters
- minimal setup for CardBus bridges
- add EEPROM read/write support in the CS8900 driver
- add support for the builtin I2C controller in the Samsung s3c24x0 chips
- add support for MPL's VCMA9 (Samsung s3c2410 based) board
* Patch by Steven Scholz, 04 Feb 2003:
add support for RTC DS1307
* Patch by Reinhard Meyer, 5 Feb 2003:
fix PLPRCR/SCCR init sequence on 8xx to allow for
changes of EBDF by software
* Patch by Vladimir Gurevich, 07 Feb 2003:
"API-compatibility patch" for 4xx I2C driver
- fix bug in BOOTP code (must use NetCopyIP)
- update of CSB226 port
- clear BSS segment on XScale
- added support for i2c_init_board() function
- update to the Innokom plattform
* Extend support for redundand environments for configurations where
environment size < sector size
Add support for Motorola MPC8266ADS board
* Patch by Kyle Harris, 19 Feb 2003:
patches for the Intel lubbock board:
memsetup.S - general cleanup (based on Robert's csb226 code)
flash.c - overhaul, actually works now
lubbock.c - fix init funcs to return proper value
* Patch by Kenneth Johansson, 26 Feb 2003:
- Fixed off by one in RFTA calculation.
- No need to abort when LDF is lower than we can program it's only
minimum timing so clamp it to what we can do.
- Takes function pointer to function for reading the spd_nvram. Usefull
for faking data or hardcode a module without the nvram.
- fix other user for above change
- fix some comments.
* Patches by Brian Waite, 26 Feb 2003:
- fix port for evb64260 board
- fix PCI for evb64260 board
- fix PCI scan
* Patch by Reinhard Meyer, 1 Mar 2003:
Add support for EMK TOP860 Module
* Patch by Yuli Barcohen, 02 Mar 2003:
Add SPD EEPROM support for MPC8260ADS board
Fix misc problems with AmigaOne support
* Patch by Chris Hallinan, 3 Dec 2002:
minor cleanup to the MPC8245 EPIC driver
* Patch by Pierre Aubert , 28 Nov 2002
Add support for external (SIU) interrupts on MPC8xx
* Patch by Pierre Aubert , 28 Nov 2002
Fix nested syscalls bug in standalone applications
* Patch by David Mller, 27 Nov 2002:
fix output of "pciinfo" command for CardBus bridge devices.
* Fix bug in TQM8260 board detection - boards got stuck when board ID
was not readable
