mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-10 15:14:43 +00:00
Coding style cleanup
This commit is contained in:
parent
8d4ac79436
commit
511d0c72b8
28 changed files with 79 additions and 81 deletions
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@ -2,6 +2,8 @@
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Changes since U-Boot 1.1.4:
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======================================================================
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* Coding style cleanup
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* Add support for EP82xxM boards
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Patch by Aaron Sells, 20 Jun 2006
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@ -1,7 +1,7 @@
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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#
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# (C) Copyright 2001
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# Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
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#
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@ -1,7 +1,7 @@
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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#
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# (C) Copyright 2001
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# Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
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#
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@ -4,7 +4,7 @@
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*
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* (C) Copyright 2006
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* Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
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* Alain Saurel, AMCC/IBM, alain.saurel@fr.ibm.com
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* Alain Saurel, AMCC/IBM, alain.saurel@fr.ibm.com
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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@ -123,12 +123,12 @@ int board_early_init_f(void)
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/* setup NAND FLASH */
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mfsdr(SDR0_CUST0, sdr0_cust0);
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sdr0_cust0 = SDR0_CUST0_MUX_NDFC_SEL |
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sdr0_cust0 = SDR0_CUST0_MUX_NDFC_SEL |
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SDR0_CUST0_NDFC_ENABLE |
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SDR0_CUST0_NDFC_BW_8_BIT |
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SDR0_CUST0_NDFC_ARE_MASK |
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(0x80000000 >> (28 + CFG_NAND_CS));
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mtsdr(SDR0_CUST0, sdr0_cust0);
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mtsdr(SDR0_CUST0, sdr0_cust0);
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return 0;
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}
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@ -216,38 +216,38 @@ int misc_init_r(void)
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#ifdef CONFIG_440EPX
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if (act == NULL || strcmp(act, "hostdev") == 0) {
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/* SDR Setting */
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mfsdr(SDR0_PFC1, sdr0_pfc1);
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mfsdr(SDR0_USB0, usb2d0cr);
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mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
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mfsdr(SDR0_USB2H0CR, usb2h0cr);
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mfsdr(SDR0_PFC1, sdr0_pfc1);
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mfsdr(SDR0_USB0, usb2d0cr);
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mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
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mfsdr(SDR0_USB2H0CR, usb2h0cr);
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK;
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL; /*0*/
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK;
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_16BIT_30MHZ; /*1*/
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK;
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_16BIT_30MHZ; /*1*/
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK;
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS; /*0*/
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS; /*0*/
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK;
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST; /*1*/
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST; /*1*/
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK;
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST; /*1*/
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST; /*1*/
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/* An 8-bit/60MHz interface is the only possible alternative
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when connecting the Device to the PHY */
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usb2h0cr = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK;
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usb2h0cr = usb2h0cr | SDR0_USB2H0CR_WDINT_16BIT_30MHZ; /*1*/
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usb2h0cr = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK;
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usb2h0cr = usb2h0cr | SDR0_USB2H0CR_WDINT_16BIT_30MHZ; /*1*/
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/* To enable the USB 2.0 Device function through the UTMI interface */
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usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK;
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usb2d0cr = usb2d0cr | SDR0_USB2D0CR_USB2DEV_SELECTION; /*1*/
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/* To enable the USB 2.0 Device function through the UTMI interface */
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usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK;
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usb2d0cr = usb2d0cr | SDR0_USB2D0CR_USB2DEV_SELECTION; /*1*/
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sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK;
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sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_USB2D_SEL; /*0*/
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sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK;
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sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_USB2D_SEL; /*0*/
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mtsdr(SDR0_PFC1, sdr0_pfc1);
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mtsdr(SDR0_USB0, usb2d0cr);
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mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
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mtsdr(SDR0_USB2H0CR, usb2h0cr);
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mtsdr(SDR0_PFC1, sdr0_pfc1);
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mtsdr(SDR0_USB0, usb2d0cr);
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mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
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mtsdr(SDR0_USB2H0CR, usb2h0cr);
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/*clear resets*/
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udelay (1000);
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@ -264,11 +264,11 @@ int misc_init_r(void)
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK;
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL; /*0*/
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK;
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS; /*0*/
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS; /*0*/
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK;
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST; /*1*/
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST; /*1*/
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK;
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST; /*1*/
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST; /*1*/
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mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
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udelay (1000);
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@ -287,33 +287,33 @@ int misc_init_r(void)
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/*-------------------PATCH-------------------------------*/
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/* SDR Setting */
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mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
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mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
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mfsdr(SDR0_USB2H0CR, usb2h0cr);
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mfsdr(SDR0_USB0, usb2d0cr);
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mfsdr(SDR0_PFC1, sdr0_pfc1);
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK;
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL; /*0*/
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK;
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK;
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_8BIT_60MHZ; /*0*/
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK;
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PUREN; /*1*/
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PUREN; /*1*/
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK;
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_DEV; /*0*/
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_DEV; /*0*/
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usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK;
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_DEV; /*0*/
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usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_DEV; /*0*/
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usb2h0cr = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK;
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usb2h0cr = usb2h0cr | SDR0_USB2H0CR_WDINT_8BIT_60MHZ; /*0*/
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usb2h0cr = usb2h0cr | SDR0_USB2H0CR_WDINT_8BIT_60MHZ; /*0*/
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usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK;
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usb2d0cr = usb2d0cr | SDR0_USB2D0CR_EBC_SELECTION; /*0*/
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usb2d0cr = usb2d0cr | SDR0_USB2D0CR_EBC_SELECTION; /*0*/
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sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK;
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sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_EBCHR_SEL; /*1*/
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sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_EBCHR_SEL; /*1*/
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mtsdr(SDR0_USB2H0CR, usb2h0cr);
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mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
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mtsdr(SDR0_USB2H0CR, usb2h0cr);
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mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
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mtsdr(SDR0_USB0, usb2d0cr);
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mtsdr(SDR0_PFC1, sdr0_pfc1);
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@ -958,7 +958,6 @@ int is_pci_host(struct pci_controller *hose)
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return 1;
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}
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int yucca_pcie_card_present(int port)
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{
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u16 reg;
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@ -1084,8 +1083,6 @@ void yucca_setup_pcie_fpga_endpoint(int port)
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(endpoint | in_be16((u16 *)FPGA_REG1C)));
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}
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static struct pci_controller pcie_hose[3] = {{0},{0},{0}};
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void pcie_setup_hoses(void)
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@ -1,7 +1,7 @@
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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#
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# (C) Copyright 2002
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# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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# Marius Groeger <mgroeger@sysgo.de>
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@ -1,7 +1,7 @@
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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#
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# (C) Copyright 2001
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# Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
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#
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@ -1,7 +1,7 @@
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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#
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# (C) Copyright 2001
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# Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
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#
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|
|
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@ -1,7 +1,7 @@
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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#
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# Copyright (C) 2004 Arabella Software Ltd.
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# Yuli Barcohen <yuli@arabellasw.com>
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#
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@ -1,7 +1,7 @@
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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#
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# Copyright 2004 Picture Elements, Inc.
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# Stephen Williams <steve@icarus.com>
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#
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@ -1,4 +1,4 @@
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#
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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|
|
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@ -1,7 +1,7 @@
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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#
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# (C) Copyright 2002
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# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
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#
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@ -46,7 +46,7 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
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* swapping is necessary within each 16 bit wide flash 'word'.
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*
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* This driver's task is to handle both flash devices: 32 bit TQM5200B
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* flash chip and 16 bit NIOS cpu flash chip. In the below
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* flash chip and 16 bit NIOS cpu flash chip. In the below
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* flash_addr_table table we use least significant address bit to mark
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* 16 bit flash bank and two sets of routines *_32 and *_16 to handle
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* specifics of both flashes.
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@ -1,7 +1,7 @@
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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#
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# Copyright 2004 Freescale Semiconductor, Inc.
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#
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# See file CREDITS for list of people who contributed to this
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@ -661,8 +661,8 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
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* So, in case of Monochrome BMP we should align widths
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* on a byte boundary and convert them from Bit to Byte
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* units.
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* Probably, PXA250 and MPC823 process 1bpp BMP images in
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* their own ways, so make the converting to be MCC200
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* Probably, PXA250 and MPC823 process 1bpp BMP images in
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* their own ways, so make the converting to be MCC200
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* specific.
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*/
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#if defined(CONFIG_MCC200)
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@ -25,7 +25,7 @@
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ifneq ($(OBJTREE),$(SRCTREE))
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ifeq ($(CURDIR),$(SRCTREE))
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dir :=
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dir :=
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else
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dir := $(subst $(SRCTREE)/,,$(CURDIR))
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endif
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@ -1,7 +1,7 @@
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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#
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# (C) Copyright 2002
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# Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
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#
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@ -32,7 +32,7 @@
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*
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* Based on (well, mostly copied from) the code from the 2.4 kernel by
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* Dale Farnsworth <dfarnsworth@mvista.com> and Kent Borg.
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*
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*
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* Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
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* Copyright (C) 2003 Montavista Software, Inc
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*/
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@ -1,7 +1,7 @@
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#
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# (C) Copyright 2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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#
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# Copyright 2004 Freescale Semiconductor, Inc.
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#
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# See file CREDITS for list of people who contributed to this
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@ -65,8 +65,8 @@ static void ndfc_hwcontrol(struct mtd_info *mtdinfo, int cmd)
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static void ndfc_write_byte(struct mtd_info *mtdinfo, u_char byte)
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{
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struct nand_chip *this = mtdinfo->priv;
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ulong base = (ulong) this->IO_ADDR_W;
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struct nand_chip *this = mtdinfo->priv;
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ulong base = (ulong) this->IO_ADDR_W;
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if (hwctl & 0x1)
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out8(base + NDFC_CMD, byte);
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@ -78,16 +78,16 @@ static void ndfc_write_byte(struct mtd_info *mtdinfo, u_char byte)
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static u_char ndfc_read_byte(struct mtd_info *mtdinfo)
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{
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struct nand_chip *this = mtdinfo->priv;
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ulong base = (ulong) this->IO_ADDR_W;
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struct nand_chip *this = mtdinfo->priv;
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ulong base = (ulong) this->IO_ADDR_W;
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return (in8(base + NDFC_DATA));
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}
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static int ndfc_dev_ready(struct mtd_info *mtdinfo)
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{
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struct nand_chip *this = mtdinfo->priv;
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ulong base = (ulong) this->IO_ADDR_W;
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struct nand_chip *this = mtdinfo->priv;
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ulong base = (ulong) this->IO_ADDR_W;
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while (!(in32(base + NDFC_STAT) & NDFC_STAT_IS_READY))
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;
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@ -110,8 +110,8 @@ static int ndfc_dev_ready(struct mtd_info *mtdinfo)
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*/
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static void ndfc_read_buf(struct mtd_info *mtdinfo, uint8_t *buf, int len)
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{
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struct nand_chip *this = mtdinfo->priv;
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ulong base = (ulong) this->IO_ADDR_W;
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struct nand_chip *this = mtdinfo->priv;
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ulong base = (ulong) this->IO_ADDR_W;
|
||||
uint32_t *p = (uint32_t *) buf;
|
||||
|
||||
for(;len > 0; len -= 4)
|
||||
|
@ -120,8 +120,8 @@ static void ndfc_read_buf(struct mtd_info *mtdinfo, uint8_t *buf, int len)
|
|||
|
||||
static void ndfc_write_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len)
|
||||
{
|
||||
struct nand_chip *this = mtdinfo->priv;
|
||||
ulong base = (ulong) this->IO_ADDR_W;
|
||||
struct nand_chip *this = mtdinfo->priv;
|
||||
ulong base = (ulong) this->IO_ADDR_W;
|
||||
uint32_t *p = (uint32_t *) buf;
|
||||
|
||||
for(; len > 0; len -= 4)
|
||||
|
@ -130,8 +130,8 @@ static void ndfc_write_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len
|
|||
|
||||
static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len)
|
||||
{
|
||||
struct nand_chip *this = mtdinfo->priv;
|
||||
ulong base = (ulong) this->IO_ADDR_W;
|
||||
struct nand_chip *this = mtdinfo->priv;
|
||||
ulong base = (ulong) this->IO_ADDR_W;
|
||||
uint32_t *p = (uint32_t *) buf;
|
||||
|
||||
for(; len > 0; len -= 4)
|
||||
|
|
|
@ -173,9 +173,9 @@
|
|||
|
||||
/**************************************************************************/
|
||||
_start_440:
|
||||
/*--------------------------------------------------------------------+
|
||||
| 440EPX BUP Change - Hardware team request
|
||||
+--------------------------------------------------------------------*/
|
||||
/*--------------------------------------------------------------------+
|
||||
| 440EPX BUP Change - Hardware team request
|
||||
+--------------------------------------------------------------------*/
|
||||
#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
|
||||
sync
|
||||
nop
|
||||
|
|
|
@ -39,7 +39,7 @@ DECLARE_GLOBAL_DATA_PTR;
|
|||
#if !defined(CONFIG_CONS_INDEX)
|
||||
#if defined (CONFIG_SERIAL_MULTI)
|
||||
/* with CONFIG_SERIAL_MULTI we might have no console
|
||||
* on these devices
|
||||
* on these devices
|
||||
*/
|
||||
#else
|
||||
#error "No console index specified."
|
||||
|
@ -238,7 +238,7 @@ serial_putc(const char c)
|
|||
#endif
|
||||
|
||||
#if defined(CONFIG_SERIAL_MULTI)
|
||||
static inline void
|
||||
static inline void
|
||||
serial_putc_raw_dev(unsigned int dev_index,const char c)
|
||||
{
|
||||
_serial_putc_raw(c,dev_index);
|
||||
|
@ -310,7 +310,7 @@ serial_setbrg(void)
|
|||
#if defined(CONFIG_SERIAL_MULTI)
|
||||
|
||||
DECLARE_ESERIAL_FUNCTIONS(1);
|
||||
struct serial_device eserial1_device =
|
||||
struct serial_device eserial1_device =
|
||||
INIT_ESERIAL_STRUCTURE(1,"eserial0","EUART1");
|
||||
DECLARE_ESERIAL_FUNCTIONS(2);
|
||||
struct serial_device eserial2_device =
|
||||
|
|
|
@ -104,4 +104,3 @@ include $(SRCTREE)/rules.mk
|
|||
sinclude $(obj).depend
|
||||
|
||||
#########################################################################
|
||||
|
||||
|
|
|
@ -110,7 +110,7 @@ typedef volatile unsigned char vu_char;
|
|||
#endif /* DEBUG */
|
||||
|
||||
#define BUG() do { \
|
||||
printf("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __FUNCTION__); \
|
||||
printf("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __FUNCTION__); \
|
||||
panic("BUG!"); \
|
||||
} while (0)
|
||||
#define BUG_ON(condition) do { if (unlikely((condition)!=0)) BUG(); } while(0)
|
||||
|
|
|
@ -29,7 +29,7 @@ COBJS = bzlib.o bzlib_crctable.o bzlib_decompress.o \
|
|||
bzlib_randtable.o bzlib_huffman.o \
|
||||
crc32.o ctype.o display_options.o ldiv.o \
|
||||
string.o vsprintf.o zlib.o
|
||||
|
||||
|
||||
SRCS := $(COBJS:.o=.c)
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
|
||||
|
|
|
@ -34,7 +34,7 @@ extern int jump_to_uboot(ulong addr);
|
|||
|
||||
static int nand_is_bad_block(struct mtd_info *mtd, int block)
|
||||
{
|
||||
struct nand_chip *this = mtd->priv;
|
||||
struct nand_chip *this = mtd->priv;
|
||||
int page_addr = block * CFG_NAND_PAGE_COUNT;
|
||||
|
||||
/* Begin command latch cycle */
|
||||
|
@ -73,7 +73,7 @@ static int nand_is_bad_block(struct mtd_info *mtd, int block)
|
|||
|
||||
static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
|
||||
{
|
||||
struct nand_chip *this = mtd->priv;
|
||||
struct nand_chip *this = mtd->priv;
|
||||
int page_addr = page + block * CFG_NAND_PAGE_COUNT;
|
||||
int i;
|
||||
|
||||
|
|
|
@ -108,7 +108,7 @@ endif
|
|||
include $(TOPDIR)/config.mk
|
||||
|
||||
# now $(obj) is defined
|
||||
SRCS := $(addprefix $(obj),$(OBJ_LINKS:.o=.c)) $(OBJ_FILES:.o=.c)
|
||||
SRCS := $(addprefix $(obj),$(OBJ_LINKS:.o=.c)) $(OBJ_FILES:.o=.c)
|
||||
BINS := $(addprefix $(obj),$(BIN_FILES))
|
||||
|
||||
#
|
||||
|
|
|
@ -31,7 +31,7 @@ BINS = gdbsend gdbcont
|
|||
COBJS = gdbsend.o gdbcont.o error.o remote.o serial.o
|
||||
|
||||
OBJS := $(addprefix $(obj),$(COBJS))
|
||||
SRCS := $(COBJS:.o=.c)
|
||||
SRCS := $(COBJS:.o=.c)
|
||||
BINS := $(addprefix $(obj),$(BINS))
|
||||
|
||||
#
|
||||
|
|
Loading…
Reference in a new issue