Commit graph

731 commits

Author SHA1 Message Date
Oleh Kravchenko
3675ac081a Add out4.ru O4-iMX-NANO board
Board designed for quick prototyping and has one microSD port,
2 Ethernet ports, 2 USB ports, I2C, SPI, CAN, RS-485, GPIO,
UART interfaces, and 2 RGB LEDs.

Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
Cc: Stefano Babic <sbabic@denx.de>
2021-06-09 13:32:42 +02:00
Giulio Benetti
0d90dec182 ARM: IMXRT: introduce is_imxrt*() macros and get_cpu_rev()
We need those macros to instruct drivers on how to behave for SoC specific
quirks, so let's add it as done for other i.MX SoCs.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:03:33 +02:00
Giulio Benetti
55ad612306 arm: imxrt: soc: make mpu regions generic
This mpu handling works for every i.MXRT SoC that we have, so let's
generalize imxrt1050_region_config to imxrt_region_config.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09 13:01:33 +02:00
Marek Behún
e8bb990fe7 ARM: imx8m: fix imx_eqos_txclk_set_rate() type mismatch for LTO
When building imx8mp_evk_defconfig with LTO, the compiler complains
about type mismatch of function imx_eqos_txclk_set_rate() in file
  drivers/net/dwc_eth_qos.c:845:12
which contains a weak definition of this function, vs file
  arch/arm/mach-imx/imx8m/clock_imx8mm.c
which contains an implementation.

Change the type of this function in the implementation to fix this.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-24 14:21:30 -04:00
Marek Behún
86c5e21013 ARM: make gd a function call for LTO and set via set_gd()
On ARM, the gd pointer is stored in registers r9 / x18. For this the
-ffixed-r9 / -ffixed-x18 flag is used when compiling, but using global
register variables causes errors when building with LTO, and these
errors are very difficult to overcome.

Richard Biener says [1]:
  Note that global register vars shouldn't be used with LTO and if they
  are restricted to just a few compilation units the recommended fix is
  to build those CUs without -flto.

We cannot do this for U-Boot since all CUs use -ffixed-reg flag.

It seems that with LTO we could in fact store the gd pointer differently
and gain performance or size benefit by allowing the compiler to use
r9 / x18. But this would need more work.

So for now, when building with LTO, go the clang way, and instead of
declaring gd a global register variable, we make it a function call via
macro.

[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68384

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24 14:21:30 -04:00
Ilko Iliev
7666cccf4f ARM:imx:imx8mq-cm: Add support for Ronetix iMX8MQ-CM
Supported peripherals: Ethernet, eMMC, Serial.

U-Boot SPL 2021.04-00911-g5fa1e2ffeb-dirty (Apr 23 2021 - 09:11:14
+0200)
Normal Boot
Trying to boot from MMC2

U-Boot 2021.04-00911-g5fa1e2ffeb-dirty (Apr 23 2021 - 09:11:14 +0200)

CPU:   Freescale i.MX8MQ rev2.1 at 1000 MHz
Reset cause: POR
Model: Ronetix iMX8M-CM SoM
DRAM:  1 GiB
WDT:   Started with servicing (60s timeout)
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Net:
Warning: ethernet@30be0000 (eth0) using random MAC address -
42:0d:e7:78:da:53
eth0: ethernet@30be0000
Hit any key to stop autoboot:  0
u-boot=>

Signed-off-by: Ilko Iliev <iliev@ronetix.at>
2021-05-02 12:46:54 +02:00
Ilko Iliev
fdd2f359e4 imx: Add support for Ronetix's iMX7-CM board
Console boot log:

U-Boot SPL 2021.04-00836-ga6232e065d-dirty (Apr 16 2021 - 15:16:35 +0200)
Trying to boot from MMC1

U-Boot 2021.04-00836-ga6232e065d-dirty (Apr 16 2021 - 15:16:35 +0200)

CPU:   Freescale i.MX7D rev1.3 1000 MHz (running at 792 MHz)
CPU:   Commercial temperature grade (0C to 95C) at 44C
Reset cause: POR
Model: Ronetix iMX7-CM Board
Board: iMX7-CM
DRAM:  512 MiB
PMIC:  PFUZE3000 DEV_ID=0x30 REV_ID=0x11
MMC:   FSL_SDHC: 0, FSL_SDHC: 2
Loading Environment from MMC... OK
In:    serial
Out:   serial
Err:   serial
Net:
Warning: ethernet@30be0000 (eth0) using random MAC address - fe:be:37:01:5a:3f
eth0: ethernet@30be0000
Hit any key to stop autoboot:  0

Signed-off-by: Ilko Iliev <iliev@ronetix.at>
2021-05-02 12:46:54 +02:00
Tim Harvey
35fc3713a3 imx: mkimage_fit_atf: fix file size reporting
instead using ls and awk to determine file size use stat instead.
This fixes an invalid size reporting for user or group names that have
spaces in them.

This adds a dependency on the stat application which is part of
the coreutils package which also includes ls.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-05-02 12:46:54 +02:00
Ying-Chun Liu (PaulLiu)
53b516c58d arm: imx8m: add support for Compulab iot-gate-imx8 (imx8mm-cl-iot-gate)
Add initial support for Compulab iot-gate-imx8 board (imx8mm-cl-iot-gate).
The initial support includes:
 - MMC
 - eMMC
 - I2C
 - FEC
 - Serial console

Signed-off-by: Kirill Kapranov <kirill.kapranov@compulab.co.il>
Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il>
Signed-off-by: Valentin Raevsky <valentin@compulab.co.il>
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Peter Robinson <pbrobinson@gmail.com>
2021-05-02 12:46:54 +02:00
Jagan Teki
7e0daa924a board: imx8mm: Add Engicam i.Core MX8M Mini C.TOUCH 2.0
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.

Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector

i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.

i.Core MX8M Mini needs to mount on top of this Carrier board for
creating complete i.Core MX8M Mini C.TOUCH 2.0 board.

Linux dts commit details:

commit <a142252061ff> ("arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini
C.TOUCH 2.0")

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-05-02 12:46:54 +02:00
Jagan Teki
e3409a4cb7 board: imx8mm: Add Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.

Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out

i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam.

i.Core MX8M Mini needs to mount on top of this Evaluation board for
creating complete i.Core MX8M Mini EDIMM2.2 Starter Kit.

Linux dts commit details:

commit <051c08eea682> ("arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini
EDIMM2.2 Starter Kit")

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2021-05-02 12:46:54 +02:00
Tom Rini
4bbcec08eb arm: Remove mx6dlarm2 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Jason Liu <jason.hui.liu@nxp.com>
Cc: Ye Li <ye.li@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:03:55 -04:00
Tom Rini
178d70b5b3 arm: Remove cgtqmx6eval board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:03:55 -04:00
Tom Rini
defd0dcfb9 arm: Remove titanium board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:03:55 -04:00
Tom Rini
80b386abe3 arm: Remove ts4800 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Lucile Quirion <lucile.quirion@savoirfairelinux.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:03:55 -04:00
Tom Rini
4d24862848 arm: Remove mx53evk board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Jason Liu <jason.hui.liu@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:03:30 -04:00
Tom Rini
397a43dc56 arm: Remove pfla02 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:03:30 -04:00
Tom Rini
a0cacddcaf arm: Remove zc5202 and zc5601 boards
These boards have not been converted to CONFIG_DM_MMC by the deadline.
Remove them.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:03:29 -04:00
Tom Rini
ddfc004009 arm: Remove xpress board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:02:03 -04:00
Tom Rini
96f599009a arm: Remove platinum_picon board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:01:10 -04:00
Tom Rini
56124508ce arm: Remove secomx6quq7 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 08:00:45 -04:00
Tom Rini
be3dec48b0 arm: Remove ts4600 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:59:35 -04:00
Tom Rini
0fa6bafa89 arm: Remove sc_sps_1 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:59:34 -04:00
Tom Rini
b40186fc7e arm: Remove SANSA_FUZE_PLUS board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:59:34 -04:00
Tom Rini
539fba2c10 arm: Remove xfi3 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:59:30 -04:00
Tom Rini
c861d21cba arm: Remove ot1200 board
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  In order to
convert to using the DWC SATA driver under DM further migrations are
required.

Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2021-04-10 07:57:42 -04:00
Tom Rini
d8d3b77fc2 arm: Remove dms-ba16 board
This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI.  The
deadline for this conversion was the v2019.07 release.  The use of CONFIG_AHCI
requires CONFIG_DM.  The deadline for this conversion was v2020.01.  Remove
this board.

Cc: Akshay Bhat <akshaybhat@timesys.com>
Cc: Ken Lin <Ken.Lin@advantech.com.tw>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-04-10 07:57:29 -04:00
Max Krummenacher
2fc93e5baf imx: bootaux fix elf loading
This reverts the arch/arm/mach-imx/imx_bootaux.c changes of commit
805b3cac1e. The loader function name was changed so that it does
not clash with the generically available function in lib/elf.c.

imx-bootaux loads an elf file linked for an auxilary core. Thus the
loader function requires address translation from the auxilary core's
address space to where those are mapped into U-Boot's address space.

So the elf loader is specific and must not be replaced with a generic
loader which doesn't provide the address translation functionality.

Fixes commit 805b3cac1e ("lib: elf: Move the generic elf
loading/validating functions to lib")

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2021-04-08 23:59:50 +02:00
Marek Vasut
09d86eab14 ARM: imx: Add OCRAM_S into iMX8M MMU tables
The OCRAM_S is regular memory, just like the OCRAM, add it to the MMU
tables so it can be used and cached.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2021-04-08 20:29:53 +02:00
Peng Fan
1e4ed2d69d imx8mp-evk: switch to use binman
Use binman to pack images

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 20:29:53 +02:00
Peng Fan
d6afc6b3a0 imx8mn-evk: switch to use binman
Use binman to pack images.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 20:29:53 +02:00
Peng Fan
353dfe4b43 imx8mn-ddr4-evk: switch to use binman
Use binman to pack images

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 20:29:53 +02:00
Peng Fan
8996e6b7c6 imx8mm_evk: switch to use binman to pack images
Use binman to pack images

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 20:29:53 +02:00
Clement Faure
69f542ca2b imx8: Add DEK blob encapsulation
Add DEK encapsulation support for imx8. The DEK blob is generated by the
SECO through the SCFW API.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 20:29:52 +02:00
Clement Faure
56d2050f40 imx8m: Add DEK blob encapsulation for imx8m
Add DEK blob encapsulation support for IMX8M through "dek_blob" command.
On ARMv8, u-boot runs in non-secure, thus cannot encapsulate a DEK blob
for encrypted boot.
The DEK blob is encapsulated by OP-TEE through a trusted application call.
U-boot sends and receives the DEK and the DEK blob binaries through OP-TEE
dynamic shared memory.

To enable the DEK blob encapsulation, add to the defconfig:
CONFIG_SECURE_BOOT=y
CONFIG_FAT_WRITE=y
CONFIG_CMD_DEKBLOB=y

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 20:29:52 +02:00
Clement Le Marquis
613cf239ed imx: caam: new u-boot command to set PRIBLOB bitfield from CAAM SCFGR register to 0x3
It is highly recommended to set the PRIBLOB bitfield to 0x3 once your
encrypted boot image has booted up, this prevents the generation of new
blobs that can be used to decrypt an encrypted boot image. The PRIBLOB is
a sticky type bit and cannot be changed until the next power on reset.

Add the set_priblob_bitfield U-Boot command to prevent the generation of
new blobs.

Signed-off-by: Clement Le Marquis <clement.lemarquis@nxp.com>
Acked-by: Ye Li <Ye.Li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 20:29:52 +02:00
Aymen Sghaier
940d36d5d1 crypto: caam: Add CAAM support to i.MX8M platforms
This patch enable CAAM support for i.MX8M platforms.

Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Franck LENORMAND
b543800241 caam: enable support for iMX7ULP
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Ye Li
e149b98c11 imx: cmd_dek: Enable DEK only for chips supporting CAAM
Since cmd_dek is using CAAM JR, so enable the CMD_DEK only when
HAS_CAAM is set

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Ye Li
41b230bf29 iMX8M: Add support to enable CONFIG_IMX_HAB
Add some SOC level codes and build configurations to use HAB lib for
CONFIG_IMX_HAB (secure boot), like adding the SEC_CONFIG fuse, enable
fuse driver, CAAM clock function, and add CAAM secure RAM to MMU table.

The FSL_CAAM is temporally not enabled for iMX8M when CONFIG_IMX_HAB is set,
because we don't need the CAAM driver for SPL.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Breno Lima
e449e2d405 imx: hab: Fix build warnings in 32-bit targets
When building 32-bit targets with CONFIG_SECURE_BOOT and DEBUG enabled
the following warnings are displayed:

arch/arm/mach-imx/hab.c:840:41: warning: format '%lx' expects argument \
of type 'long unsigned int', but argument 3 has type 'uint32_t \
{aka unsigned int}' [-Wformat=]
   printf("HAB check target 0x%08x-0x%08lx fail\n",
                                     ~~~~^
                                     %08x
          ddr_start, ddr_start + bytes);

arch/arm/mach-imx/hab.c:845:45: warning: format '%x' expects argument \
of type 'unsigned int', but argument 3 has type 'ulong \
{aka long unsigned int}' [-Wformat=]
  printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr);
                                            ~^
                                            %lx

Fix warnings by providing the correct data type.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Breno Lima
58f75efeaf mx7ulp: hab: Add hab_status command for HABv4 M4 boot
When booting in low power or dual boot modes the M4 binary is
authenticated by the M4 ROM code.

Add an option in hab_status command so users can retrieve M4 HAB
failure and warning events.

=> hab_status m4

   Secure boot disabled

   HAB Configuration: 0xf0, HAB State: 0x66
   No HAB Events Found!

Add command documentation in mx6_mx7_secure_boot.txt guide.

As HAB M4 API cannot be called from A7 core the code is parsing
the M4 HAB persistent memory region. The HAB persistent memory
stores HAB events, public keys and others HAB related information.

The HAB persistent memory region addresses and sizes can be found
in AN12263 "HABv4 RVT Guidelines and Recommendations".

Reviewed-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Breno Lima
f217470b39 imx: hab: Check if IVT header is HABv4
The HABv4 implementation in ROM checks if HAB major version
in IVT header is 4.x.

The current implementation in hab.c code is only validating
HAB v4.0 and HAB v4.1 and may be incompatible with newer
HABv4 versions.

Modify verify_ivt_header() function to align with HABv4
implementation in ROM code.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Utkarsh Gupta
cd8355664d imx: hab: Display All HAB events via hab_status command
Add ability for hab_status command to show All HAB events and not just
HAB failure events

Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Breno Lima
1d756add3c imx: hab: Enable hab.c to authenticate additional images in open configuration
Currently it's not possible to authenticate additional boot images in HAB
open configuration.

The hab.c code is checking if the SEC_CONFIG[1] fuse is programmed prior
to calling the hab_authenticate_image() API function. Users cannot check
if their additional boot images has been correctly signed prior to closing
their device.

Enable hab.c to authenticate additional boot images in open mode so HAB
events can be retrieved through get_hab_status() function.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Ye Li
1dc295148a hab: Change calling to ROM API failsafe
Modify to use hab_rvt_failsafe function for failsafe ROM API, not
directly call its ROM address. This function will wrap the sip call for iMX8M
platforms.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Utkarsh Gupta
fe8acf556c imx: HAB: Validate IVT before authenticating image
Calling csf_is_valid() with an un-signed image may lead to data abort
as the CSF pointer could be pointing to a garbage address when accessed
in HAB_HDR_LEN(*(const struct hab_hdr *)(ulong)ivt_initial->csf).

Authenticate image from DDR location 0x80800000...
Check CSF for Write Data command before authenticating image
data abort
pc : [<fff5494c>]          lr : [<fff54910>]
reloc pc : [<8780294c>]    lr : [<87802910>]
sp : fdf45dc8  ip : 00000214     fp : 00000000
r10: fffb6170  r9 : fdf4fec0     r8 : 00722020
r7 : 80f20000  r6 : 80800000     r5 : 80800000  r4 : 00720000
r3 : 17a5aca3  r2 : 00000000     r1 : 80f2201f  r0 : 00000019
Flags: NzcV  IRQs off  FIQs off  Mode SVC_32
Resetting CPU ...

resetting ...

To avoid such errors during authentication process, validate IVT structure
by calling validate_ivt function which checks the following values in an IVT:

IVT_HEADER = 0x4X2000D1
ENTRY != 0x0
RES1 = 0x0
DCD = 0x0       /* Recommended */
SELF != 0x0     /* Absoulute address of IVT */
CSF != 0x0
RES2 = 0x0

This commit also checks if Image's start address is 4 byte aligned.

commit "0088d127 MLK-14945 HAB: Check if IVT valid before authenticating image"
removed as this patch addresses the issue.

Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Peng Fan
507da978fa imx: HAB: Update hab codes to support ARM64 and i.MX8M
There are some changes to support ARM64 i.MX8M platform in this patches:
1. The hab_rvt base and function vectors are different as i.MX6/7

2. Need to bypass an workaround for i.MX6 to fix problem in MMU.

3. The x18 register needed save & restore before calling any HAB API. According
   to ARM procedure call spec, the x18 is caller saved when it is used as
   temporary register. So calling HAB API may scratch this register, and
   cause crash once accessing the gd pointer.

   On ARMv7, the r9 is callee saved when it is used as variable register. So
   no need to save & restore it.

4. Add SEC_CONFIG fuse for iMX8M

When current EL is not EL3, the direct calling to HAB will fail because
CAAM/SNVS can't initialize at non-secure mode. In this case, we use
SIP call to run the HAB in ATF.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Ye Li
c428ca80c2 imx: hab: Add function to authenticate kernel image
When loading kernel image, the image size is parsed from header, so it
does not include the CSF and IVT.

Add back the authenticate_image function to wrap the imx_hab_authenticate_image
with calculating IVT offset and full image size.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Breno Lima
55086e196e imx: Avoid hardcoded Job Ring Max size
Prior instantiating RNG we have to ensure if the CAAM job rings are
available. Avoid hardcoded job ring max size and use the definition at
fsl_sec.h

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Breno Lima
6d7b270337 imx: Ensure CAAM clock is enabled prior getting out_jr_size
Prior calling sec_in32() we have to ensure CAAM clock is enabled, the
function sec_in32() is reading CAAM registers and if CAAM clock is disabled
the system will hang.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Breno Lima
8c497e148c imx: Avoid hardcoded output ring size register offset (ORSR)
The CAAM output ring size register offset is currently defined in fsl_sec.h
as FSL_CAAM_ORSR_JRa_OFFSET, use this definition to avoid hardcoded value in
i.MX common code.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Breno Lima
30e39ac7c9 imx: imx7 Support for Manufacturing Protection
This code was originally developed by Raul Cardenas <raul.casas@nxp.com>
and modified to be applied in U-Boot imx_v2017.03.

More information about the initial submission can be seen
in the link below:
https://lists.denx.de/pipermail/u-boot/2016-February/245273.html

i.MX7D has an a protection feature for Manufacturing process.
This feature uses asymmetric encryption to sign and verify
authenticated software handled between parties. This command
enables the use of such feature.

The private key is unique and generated once per device.
And it is stored in secure memory and only accessible by CAAM.
Therefore, the public key generation and signature functions
are the only functions available for the user.

The manufacturing-protection authentication process can be used to
authenticate the chip to the OEM's server.

Command usage:

Print the public key for the device.
- mfgprot pubk

Generates Signature over given data.
- mfgprot sign <data_address> <data_size>

Signed-off-by: Raul Ulises Cardenas <raul.casas@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Ye Li
ea2b26fb12 iMX8MQ: Recognize the B2 revision
i.MX8MQ B2 is using same value in OCOTP_READ_FUSE_DATA like B1, so
we have to check the ROM verision to distinguish the revision.

As we have checked the B1 rev for sticky bits work around in
secure boot. So it won't apply on B2.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Peng Fan
c0e2f76b69 imx8m: soc: update fuse path
Update fuse path to disable modules correctly.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Ye Li
4e83c05722 imx8m: Update thermal and PMU kernel nodes for dual/single cores
For dual core and single core iMX8M parts, the thermal node and PMU node
in kernel DTB also needs update to remove the refers to deleted core nodes.
Otherwise both driver will fail to work.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Ye Li
c4f78cbf0e imx8mn: Add support for 11x11 UltraLite part number
There are 3 part numbers for 11x11 i.MX8MNano with different core number
configuration: UltraLite Quad/Dual/Solo

Comparing with i.MX8MN Lite parts, they have MIPI DSI disabled. So
checking the MIPI DSI disable fuse to recognize these parts.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Ye Li
98bcdf1635 imx8mn: Add low drive mode support for DDR4/LPDDR4 EVK
Add dedicated defconfigs for iMX8MN low drive mode which set the VDD_SOC
and VDD_DRAM to 0.8v, DDR at 1600MTS (800Mhz clock) and GPU at 200Mhz.

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Peng Fan
4e805c197b imx8mn: Add LPDDR4 EVK board support
Add support for iMX8MN LPDDR4 EVK board which uses 2GB LPDDR4 and
PCA9450B PMIC.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-04-08 09:18:29 +02:00
Tom Rini
22fc991daf Prepare v2021.04-rc4
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Merge tag 'v2021.04-rc4' into next

Prepare v2021.04-rc4
2021-03-15 12:15:38 -04:00
Tim Harvey
03bf8436a3 board: gateworks: imx8mm: Add Gateworks Venice board support
Add initial support for Gateworks Venice product family based on the
i.MX 8M Mini SoC

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-03-03 14:15:02 +01:00
Harald Seiler
35b65dd8ef reset: Remove addr parameter from reset_cpu()
Historically, the reset_cpu() function had an `addr` parameter which was
meant to pass in an address of the reset vector location, where the CPU
should reset to.  This feature is no longer used anywhere in U-Boot as
all reset_cpu() implementations now ignore the passed value.  Generic
code has been added which always calls reset_cpu() with `0` which means
this feature can no longer be used easily anyway.

Over time, many implementations seem to have "misunderstood" the
existence of this parameter as a way to customize/parameterize the reset
(e.g.  COLD vs WARM resets).  As this is not properly supported, the
code will almost always not do what it is intended to (because all
call-sites just call reset_cpu() with 0).

To avoid confusion and to clean up the codebase from unused left-overs
of the past, remove the `addr` parameter entirely.  Code which intends
to support different kinds of resets should be rewritten as a sysreset
driver instead.

This transformation was done with the following coccinelle patch:

    @@
    expression argvalue;
    @@
    - reset_cpu(argvalue)
    + reset_cpu()

    @@
    identifier argname;
    type argtype;
    @@
    - reset_cpu(argtype argname)
    + reset_cpu(void)
    { ... }

Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-02 14:03:02 -05:00
Marek Vasut
7034478a2f ARM: imx: Include u-boot.img in u-boot-with-spl.imx if OF_SEPARATE=y
The u-boot-with-spl.imx is a concatenation of SPL and u-boot.uim.
The u-boot.uim is u-boot.bin wrapped in uImage. In case OF_SEPARATE
is enabled, the u-boot.bin does not contain control DT for U-Boot,
and so u-boot.uim does not contain the DT, and so u-boot-with-spl.imx
does not contain the DT, and a system where u-boot-with-spl.imx is
written to offset 1024B to the start of storage no longer boots, as
it is missing DT.

In case OF_SEPARATE is enabled, u-boot.img contains both u-boot.bin
and the necessary DTs. Therefore, use u-boot.img instead of u-boot.uim
to generate u-boot-with-spl.imx when OF_SEPARATE is enabled.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Christoph Niedermaier <cniedermaier@dh-electronics.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
2021-03-01 16:51:11 +01:00
Marek Vasut
076dc92ac6 ARM: imx: Do not hard-code MX8M MMU table DRAM entry offset
Instead of hard-coding the offset of DRAM entries in MMU table all over
the code, auto-detect the offset. This removes error-prone code which
would break e.g. in case the MMU table is modified.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-03-01 10:21:36 +01:00
Sean Anderson
1ce6e10c61 ARM: mx6: Add function to set serial#
The serial number OTP is similar to the imx7 version, except that the
register names are different. This also sets serial# directly, instead of
providing board_get_serial.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2021-03-01 10:21:36 +01:00
Tom Rini
93ef93b60b arm: Remove sksimx6 board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2021-02-25 11:59:53 -05:00
Tom Rini
53ad2db946 arm: Remove mx53smd board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-02-25 11:59:06 -05:00
Tom Rini
1c4bd238b5 arm: Remove mx53ard board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-02-25 11:59:05 -05:00
Tom Rini
2610bf14b5 arm: Remove mx25pdk board
This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.

Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-02-25 11:59:05 -05:00
Igor Opaniuk
2147a16983 dm: i2c: use CONFIG_IS_ENABLED macro for DM_I2C/DM_I2C_GPIO
Use CONFIG_IS_ENABLED() macro, which provides more convenient
way to check $(SPL)DM_I2C/$(SPL)DM_I2C_GPIO configs
for both SPL and U-Boot proper.

CONFIG_IS_ENABLED(DM_I2C) expands to:
- 1 if CONFIG_SPL_BUILD is undefined and CONFIG_DM_I2C is set to 'y',
- 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_DM_I2C is set to 'y',
- 0 otherwise.

All occurences were replaced automatically using these bash cmds:
$ find . -type f -exec sed -i
     's/ifndef CONFIG_DM_I2C/if !CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
    's/ifdef CONFIG_DM_I2C/if CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
    's/defined(CONFIG_DM_I2C)/CONFIG_IS_ENABLED(DM_I2C)/g' {} +
$ find . -type f -exec sed -i
    's/ifndef CONFIG_DM_I2C_GPIO/if !CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
    's/ifdef CONFIG_DM_I2C_GPIO/if CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +
$ find . -type f -exec sed -i
    's/defined(CONFIG_DM_I2C_GPIO)/CONFIG_IS_ENABLED(DM_I2C_GPIO)/g' {} +

Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-02-21 06:08:00 +01:00
Alexandru Gagniuc
efc4ad0bc7 spl: fit: Drop 'length' argument to board_spl_fit_post_load()
The size is derived from the FIT image itself. Any alignment
requirements are machine-specific and known by the board code. Thus
the total length can be derived from the FIT image and knowledge of
the platform. The 'length' argument is redundant. Remove it.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CC: Matt Porter <mporter@konsulko.com>
2021-02-17 17:12:45 -05:00
Tom Rini
2ae80437fb Merge branch '2021-02-02-drop-asm_global_data-when-unused'
- Merge the patch to take <asm/global_data.h> out of <common.h>
2021-02-15 10:16:45 -05:00
Tom Rini
8444860ca0 arm: Remove apx4devkit board
This board has not been converted to CONFIG_DM_MMC by the deadline of
v2019.04, which is almost two years ago.  In addition there are other DM
migrations it is also missing.  Remove it.

Cc: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Lauri Hintsala <lauri.hintsala@silabs.com<mailto:lauri.hintsala@silabs.com>>
Signed-off-by: Tom Rini <trini@konsulko.com<mailto:trini@konsulko.com>>
2021-02-15 10:11:37 -05:00
Simon Glass
401d1c4f5d common: Drop asm/global_data.h from common header
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include <asm/global_data.h> at all, so
remove that include.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-02-02 15:33:42 -05:00
Marek Vasut
4f37aa9579 ARM: imx: add i.MX8MN lpddr4 image cfg file
Add cfg file for i.MX8MN LPDDR4

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2021-01-23 14:01:59 +01:00
Adam Ford
8e95883e46 imx: Add support for i.MX8MN Beacon EmbeddedWorks devkit.
Beacon EmbeddedWorks is releasing a devkit based on the i.MX8M
Nano SoC consisting of baseboard + SOM.

The kit is based on the same design as the Beacon dev kit with
the i.MX8M Mini.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 14:01:49 +01:00
Teresa Remmet
c661c511e9 board: phytec: imx8mp: Add PHYTEC phyCORE-i.MX8MP support
Add initial support PHYTEC phyCORE-i.MX8MP SOM.

    Supported features:
     - 2GB LPDDR4 RAM
     - eMMC
     - external SD
     - debug UART2
     - watchdog

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2021-01-23 11:30:32 +01:00
Ye Li
8cd2017981 imx: timer: Modify GPT timer driver for mx7
Modify the GPT common platform driver for mx7 which only use 24Mhz
OSC as clock source.

Note: at default, the mx7d will use system counter as timer. The GPT
is disabled.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Peng Fan
d4e84f24a6 imx8m: add QSPI boot dev
When boot type could not be detected from rom sw info,
read sbmr1 to detect, here we only use it to detect FLEXSPI
boot, because ROM not update it in rom sw info.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Ye Li
acc403cb2c imx6: Remove AHCI device before boot OS
Since we remove SATA device before boot OS, when AHCI is enabled, update
the codes to remove AHCI device.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Ye Li
79e0217a8e imx: Fix market segment fuse offset on iMX8MP
iMX8MP has shifted market segment fuse one bit from 0x440 [7:6] to [6:5],
correct it in imx common codes.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Han Xu
42a49754e2 nandbcb: nand support for i.MX8MP
Add NAND boot support for i.MX8MP by adding i.MX8MP in nandbcb support
list, reading boot_search_count from fuse.

i.MX8MN NAND boot is same as i.MX8MP, fix some issues as well.

Signed-off-by: Han Xu <han.xu@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Ye Li
233b0b070e imx: nandbcb: Fix potential overflow in nandbcb_set_boot_config
Fix Coverity Issue 9006656. In nandbcb_set_boot_config, an integer overflow
occurs, with the result converted to a wider integer type.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Ye Li
983f5e0391 imx: nandbcb: Fix potential overflow in fill_dbbt_data
Fix Coverity Issue 9006658. In fill_dbbt_data, an integer overflow occurs,
with the result converted to a wider integer type

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Ye Li
f637c40dd7 imx: nandbcb: Fix resource leak in read_fcb
Fix Coverity Issue 9006657. In read_fcb, leak of memory to system
resource "fcb_raw_page". Adjust the sequence to check the mtd bad
block prior than allocation of "fcb_raw_page", also check the NULL
return of allocation.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Ye Li
fc11dc112d imx: nandbcb: Fix resource leak
Fix Coverity Issue 9006655. In write_fcb, leak of memory to resource
"fcb_raw_page". Since we have initialized the "ret" to 0, should return
the value of ret.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Ye Li
9dd599a7a4 nandbcb: Fix uninitialized variable
Fix Coverity Issue 9006654. In write_fcb, use of an uninitialized
variable "ret".

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Peng Fan
4557f43a10 imx8m: lowlevel_init: tune alignment
The minimum alignment is 16 bytes, so use align 4 is enough.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:31 +01:00
Peng Fan
846b77e7df imx: imx8mn_ddr4_evk: Use CONFIG_TARGET_IMX8MN_DDR4_EVK for DDR4 EVK board
use CONFIG_TARGET_IMX8MN_DDR4_EVK for DDR4 EVK board, we will use
CONFIG_TARGET_IMX8MN_EVK for LPDDR4 EVK board.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-01-23 11:30:30 +01:00
Tom Rini
b11f634b1c Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
 dtoc: Tidy up and add more tests
 ns16550 code clean-up
 x86 and sandbox minor fixes for of-platdata
 dtoc prepration for adding build-time instantiation
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Merge tag 'dm-pull-5jan21' of git://git.denx.de/u-boot-dm into next

Driver model: make some udevice fields private
Driver model: Rename U_BOOT_DEVICE et al.
dtoc: Tidy up and add more tests
ns16550 code clean-up
x86 and sandbox minor fixes for of-platdata
dtoc prepration for adding build-time instantiation
2021-01-05 22:34:43 -05:00
Tom Rini
720620e691 Prepare v2021.01-rc5
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Merge tag 'v2021.01-rc5' into next

Prepare v2021.01-rc5

Signed-off-by: Tom Rini <trini@konsulko.com>
2021-01-05 16:20:26 -05:00
Simon Glass
20e442ab2d dm: Rename U_BOOT_DEVICE() to U_BOOT_DRVINFO()
The current macro is a misnomer since it does not declare a device
directly. Instead, it declares driver_info record which U-Boot uses at
runtime to create a device.

The distinction seems somewhat minor most of the time, but is becomes
quite confusing when we actually want to declare a device, with
of-platdata. We are left trying to distinguish between a device which
isn't actually device, and a device that is (perhaps an 'instance'?)

It seems better to rename this macro to describe what it actually is. The
macros is not widely used, since boards should use devicetree to declare
devices.

Rename it to U_BOOT_DRVINFO(), which indicates clearly that this is
declaring a new driver_info record, not a device.

Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05 12:26:35 -07:00
Heinrich Schuchardt
e6abe163bf imx: mx7: clock: use correct format strings
Use %u and not %d for unsigned values.
Print kHz and not khz.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-12-26 14:56:09 +01:00
Clément Péron
7d6a36a48d imx: ahab: allow to bypass confirmation for ahab_close cmd
Calling ahab_close cmd force the user to interact for confirmation.

This is not user-friendly when using this cmd during factory process.

Allow the user to pass '-y' option to bypass this confirmation.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Oliver Graute <oliver.graute@kococonnector.com>
2020-12-26 14:56:09 +01:00
Simon Glass
caa4daa2ae dm: treewide: Rename 'platdata' variables to just 'plat'
We use 'priv' for private data but often use 'platdata' for platform data.
We can't really use 'pdata' since that is ambiguous (it could mean private
or platform data).

Rename some of the latter variables to end with 'plat' for consistency.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13 16:51:08 -07:00
Marcel Ziswiler
2f36a693e3 imx8: allow overriding memory layout
Introduce weak function board_mem_get_layout() which allows overriding
the memory layout from board code in runtime, useful for handling
different SKU versions.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Igor Opaniuk
a51fdba3fa board: toradex: add apalis-imx8x 2gb wb it v1.1a module support
This commit adds initial support for the Toradex Apalis iMX8X 2GB WB
IT V1.1A System on Module support [1].

Boot log:
U-Boot 2020.10-02940-g894aebb7e8-dirty (Oct 22 2020 - 09:43:57 +0300)
CPU:   NXP i.MX8QXP RevB A35 at 1200 MHz at 30C
DRAM:  2 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In:    serial@5a070000
Out:   serial@5a070000
Err:   serial@5a070000
Model: Toradex Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT V1.1A,
Serial# 06617018
Net:   eth0: ethernet@5b040000 [PRIME]
Hit any key to stop autoboot:  0

Functionality wise the following is known to be working:
  - eMMC and MMC/SD card
  - Ethernet (*)
  - GPIOs
  - I2C

Unfortunately, there is no USB functionality for the i.MX 8QXP as of
yet.

* With the SCU FW from the latest Toradex BSP 5.0.0 (SCU FW 1.5.1)
ETH PHY encounters bring up problems after reset, this will be fixed
soon on SCU FW side.

[1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8x
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Tim Harvey
bc479b2118 imx8m: fix cache setup for dynamic sdram size
the mem_map structure containing the size of SDRAM is used in various
cache functions in cache_v8.c thus we need to update it with the
sdram size the board is configured with as well. Without this
the cache functions do not get setup properly and can hang
in the case where a board reports more SDRAM than defined in
PHYS_SDRAM_SIZE.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2020-12-06 15:31:37 +01:00
Oliver Graute
b15cd88b22 imx: ahab: fix implicit declaration warning
Fix the following warning:

arch/arm/mach-imx/imx8/ahab.c:105:3: warning: implicit declaration of function ‘flush_dcache_range’ [-Wimplicit-function-declaration]
   flush_dcache_range(s, e);
   ^~~~~~~~~~~~~~~~~~

Include cpu_func.h header which declares the flush_dcache_range()
function.

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2020-12-06 15:31:36 +01:00
Oliver Graute
492b728f9f imx: ahab: fix compiler warnings in debug
arch/arm/mach-imx/imx8/ahab.c: In function ‘authenticate_os_container’:
arch/arm/mach-imx/imx8/ahab.c:96:9: warning: format ‘%x’ expects argument of type
‘unsigned int’, but argument 9 has type ‘ulong {aka long unsigned int}’ [-Wformat=]
   debug("img %d, dst 0x%x, src 0x%x, size 0x%x\n",

Fix those by using "%lu" specified.

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2020-12-06 15:31:36 +01:00