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https://github.com/AsahiLinux/u-boot
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arm: Remove sc_sps_1 board
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
This commit is contained in:
Tom Rini
parent
b40186fc7e
commit
0fa6bafa89
8 changed files with 0 additions and 382 deletions
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@ -46,9 +46,6 @@ config TARGET_MX28EVK
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bool "Support mx28evk"
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select BOARD_EARLY_INIT_F
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config TARGET_SC_SPS_1
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bool "Support sc_sps_1"
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config TARGET_TS4600
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bool "Support TS4600"
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@ -63,7 +60,6 @@ config SYS_SOC
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source "board/freescale/mx28evk/Kconfig"
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source "board/liebherr/xea/Kconfig"
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source "board/ppcag/bg0900/Kconfig"
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source "board/schulercontrol/sc_sps_1/Kconfig"
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source "board/technologic/ts4600/Kconfig"
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endif
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@ -1,15 +0,0 @@
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if TARGET_SC_SPS_1
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config SYS_BOARD
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default "sc_sps_1"
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config SYS_VENDOR
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default "schulercontrol"
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config SYS_SOC
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default "mxs"
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config SYS_CONFIG_NAME
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default "sc_sps_1"
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endif
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@ -1,6 +0,0 @@
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SC_SPS_1 BOARD
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M: Marek Vasut <marek.vasut@gmail.com>
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S: Maintained
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F: board/schulercontrol/sc_sps_1/
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F: include/configs/sc_sps_1.h
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F: configs/sc_sps_1_defconfig
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@ -1,10 +0,0 @@
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# SPDX-License-Identifier: GPL-2.0+
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#
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# (C) Copyright 2000-2012
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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ifndef CONFIG_SPL_BUILD
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obj-y := sc_sps_1.o
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else
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obj-y := spl_boot.o
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endif
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@ -1,99 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* SchulerControl GmbH, SC_SPS_1 module
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*
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* Copyright (C) 2012 Marek Vasut <marex@denx.de>
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* on behalf of DENX Software Engineering GmbH
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*/
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#include <common.h>
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#include <init.h>
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#include <net.h>
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#include <asm/global_data.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux-mx28.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/sys_proto.h>
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#include <linux/mii.h>
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#include <miiphy.h>
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#include <netdev.h>
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#include <errno.h>
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* Functions
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*/
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int board_early_init_f(void)
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{
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/* IO0 clock at 480MHz */
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mxs_set_ioclk(MXC_IOCLK0, 480000);
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/* IO1 clock at 480MHz */
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mxs_set_ioclk(MXC_IOCLK1, 480000);
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/* SSP0 clock at 96MHz */
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mxs_set_sspclk(MXC_SSPCLK0, 96000, 0);
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/* SSP2 clock at 96MHz */
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mxs_set_sspclk(MXC_SSPCLK2, 96000, 0);
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#ifdef CONFIG_CMD_USB
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mxs_iomux_setup_pad(MX28_PAD_AUART1_CTS__USB0_OVERCURRENT);
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mxs_iomux_setup_pad(MX28_PAD_AUART2_TX__GPIO_3_9 |
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MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL);
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gpio_direction_output(MX28_PAD_AUART2_TX__GPIO_3_9, 1);
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#endif
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return 0;
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}
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int board_init(void)
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{
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/* Adress of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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return 0;
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}
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int dram_init(void)
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{
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return mxs_dram_init();
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}
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#ifdef CONFIG_CMD_MMC
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int board_mmc_init(struct bd_info *bis)
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{
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return mxsmmc_initialize(bis, 0, NULL, NULL);
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}
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#endif
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#ifdef CONFIG_CMD_NET
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int board_eth_init(struct bd_info *bis)
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{
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struct mxs_clkctrl_regs *clkctrl_regs =
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(struct mxs_clkctrl_regs *)MXS_CLKCTRL_BASE;
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int ret;
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ret = cpu_eth_init(bis);
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clrsetbits_le32(&clkctrl_regs->hw_clkctrl_enet,
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CLKCTRL_ENET_TIME_SEL_MASK,
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CLKCTRL_ENET_TIME_SEL_RMII_CLK | CLKCTRL_ENET_CLK_OUT_EN);
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ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
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if (ret) {
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printf("FEC MXS: Unable to init FEC0\n");
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return ret;
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}
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ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE);
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if (ret) {
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printf("FEC MXS: Unable to init FEC1\n");
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return ret;
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}
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return ret;
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}
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#endif
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@ -1,148 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* SchulerControl GmbH, SC_SPS_1 module setup
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*
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* Copyright (C) 2012 Marek Vasut <marex@denx.de>
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* on behalf of DENX Software Engineering GmbH
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*/
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#include <common.h>
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#include <config.h>
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#include <asm/io.h>
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#include <asm/arch/iomux-mx28.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/sys_proto.h>
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#define MUX_CONFIG_LED (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_NOPULL)
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#define MUX_CONFIG_SSP0 (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_PULLUP)
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#define MUX_CONFIG_SSP2 (MXS_PAD_3V3 | MXS_PAD_4MA | MXS_PAD_PULLUP)
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#define MUX_CONFIG_ENET (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
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#define MUX_CONFIG_EMI (MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL)
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const iomux_cfg_t iomux_setup[] = {
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/* -- Strick 3 -- */
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/* FEC Ethernet */
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MX28_PAD_ENET0_MDC__ENET0_MDC | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_MDIO__ENET0_MDIO | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_TX_CLK__GPIO_4_5, /* ENET INT */
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MX28_PAD_ENET0_COL__ENET1_TX_EN | MUX_CONFIG_ENET,
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MX28_PAD_ENET0_CRS__ENET1_RX_EN | MUX_CONFIG_ENET,
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MX28_PAD_ENET_CLK__CLKCTRL_ENET | MUX_CONFIG_ENET,
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/* -- Strick 4 -- */
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/* EMI */
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MX28_PAD_EMI_ODT0__EMI_ODT0 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_CASN__EMI_CASN | MUX_CONFIG_EMI,
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MX28_PAD_EMI_RASN__EMI_RASN | MUX_CONFIG_EMI,
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MX28_PAD_EMI_WEN__EMI_WEN | MUX_CONFIG_EMI,
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MX28_PAD_EMI_CE0N__EMI_CE0N | MUX_CONFIG_EMI,
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MX28_PAD_EMI_BA0__EMI_BA0 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_BA1__EMI_BA1 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_BA2__EMI_BA2 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_A00__EMI_ADDR0 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_A01__EMI_ADDR1 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_A02__EMI_ADDR2 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_A03__EMI_ADDR3 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_A04__EMI_ADDR4 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_A05__EMI_ADDR5 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_A06__EMI_ADDR6 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_A07__EMI_ADDR7 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_A08__EMI_ADDR8 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_A09__EMI_ADDR9 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_A10__EMI_ADDR10 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_A11__EMI_ADDR11 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_A12__EMI_ADDR12 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_DQM0__EMI_DQM0 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_DQM1__EMI_DQM1 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_DQS0__EMI_DQS0 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_DQS1__EMI_DQS1 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_D00__EMI_DATA0 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_D01__EMI_DATA1 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_D02__EMI_DATA2 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_D03__EMI_DATA3 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_D04__EMI_DATA4 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_D05__EMI_DATA5 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_D06__EMI_DATA6 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_D07__EMI_DATA7 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_D08__EMI_DATA8 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_D09__EMI_DATA9 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_D10__EMI_DATA10 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_D11__EMI_DATA11 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_D12__EMI_DATA12 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_D13__EMI_DATA13 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_D14__EMI_DATA14 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_D15__EMI_DATA15 | MUX_CONFIG_EMI,
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MX28_PAD_EMI_CKE__EMI_CKE | MUX_CONFIG_EMI,
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MX28_PAD_EMI_CLK__EMI_CLK | MUX_CONFIG_EMI,
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MX28_PAD_EMI_DDR_OPEN__EMI_DDR_OPEN | MUX_CONFIG_EMI,
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MX28_PAD_EMI_DDR_OPEN_FB__EMI_DDR_OPEN_FEEDBACK | MUX_CONFIG_EMI,
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/* -- Strick 5 -- */
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/* MMC0 */
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MX28_PAD_SSP0_DATA0__SSP0_D0 | MUX_CONFIG_SSP0,
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MX28_PAD_SSP0_DATA1__SSP0_D1 | MUX_CONFIG_SSP0,
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MX28_PAD_SSP0_DATA2__SSP0_D2 | MUX_CONFIG_SSP0,
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MX28_PAD_SSP0_DATA3__SSP0_D3 | MUX_CONFIG_SSP0,
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MX28_PAD_SSP0_CMD__SSP0_CMD | MUX_CONFIG_SSP0,
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MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
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(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL),
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MX28_PAD_SSP0_SCK__SSP0_SCK |
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(MXS_PAD_3V3 | MXS_PAD_12MA | MXS_PAD_NOPULL),
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/* SPI2 (for flash) */
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MX28_PAD_SSP2_SCK__SSP2_SCK | MUX_CONFIG_SSP2,
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MX28_PAD_SSP2_MOSI__SSP2_CMD | MUX_CONFIG_SSP2,
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MX28_PAD_SSP2_MISO__SSP2_D0 | MUX_CONFIG_SSP2,
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MX28_PAD_SSP2_SS0__SSP2_D3 |
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(MXS_PAD_3V3 | MXS_PAD_8MA | MXS_PAD_PULLUP),
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/* -- Strick 6 -- */
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/* I2C */
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MX28_PAD_I2C0_SCL__I2C0_SCL,
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MX28_PAD_I2C0_SDA__I2C0_SDA,
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/* AUART0 */
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MX28_PAD_AUART0_TX__AUART0_TX,
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MX28_PAD_AUART0_RX__AUART0_RX,
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/* MEGA interface */
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/* Debug UART */
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MX28_PAD_PWM0__DUART_RX,
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MX28_PAD_PWM1__DUART_TX,
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/* LED */
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MX28_PAD_GPMI_D00__GPIO_0_0 | MUX_CONFIG_LED,
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MX28_PAD_GPMI_D03__GPIO_0_3 | MUX_CONFIG_LED,
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MX28_PAD_GPMI_D06__GPIO_0_6 | MUX_CONFIG_LED,
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};
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void board_init_ll(const uint32_t arg, const uint32_t *resptr)
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{
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mxs_common_spl_init(arg, resptr, iomux_setup, ARRAY_SIZE(iomux_setup));
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}
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void mxs_adjust_memory_params(uint32_t *dram_vals)
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{
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dram_vals[0x74 >> 2] = 0x0f02010a;
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}
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@ -1,43 +0,0 @@
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CONFIG_ARM=y
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CONFIG_ARCH_MX28=y
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CONFIG_SYS_TEXT_BASE=0x40002000
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CONFIG_SPL_GPIO_SUPPORT=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_NR_DRAM_BANKS=1
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CONFIG_ENV_SIZE=0x4000
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CONFIG_ENV_OFFSET=0x40000
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CONFIG_SPL_TEXT_BASE=0x00001000
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CONFIG_TARGET_SC_SPS_1=y
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CONFIG_SPL_SERIAL_SUPPORT=y
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CONFIG_SPL=y
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CONFIG_BOOTDELAY=3
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyAMA0,115200"
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_ARCH_MISC_INIT=y
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CONFIG_BOARD_EARLY_INIT_F=y
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# CONFIG_SPL_FRAMEWORK is not set
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_USB=y
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_FAT=y
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CONFIG_ENV_IS_IN_MMC=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_VERSION_VARIABLE=y
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CONFIG_MXS_GPIO=y
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CONFIG_MMC_MXS=y
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CONFIG_PHYLIB=y
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CONFIG_PHY_SMSC=y
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CONFIG_MII=y
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CONFIG_CONS_INDEX=0
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CONFIG_USB=y
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CONFIG_USB_EHCI_HCD=y
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CONFIG_USB_STORAGE=y
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CONFIG_OF_LIBFDT=y
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@ -1,57 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* SchulerControl GmbH, SC_SPS_1 module config
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*
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* Copyright (C) 2012 Marek Vasut <marex@denx.de>
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* on behalf of DENX Software Engineering GmbH
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*/
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#ifndef __CONFIGS_SC_SPS_1_H__
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#define __CONFIGS_SC_SPS_1_H__
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/* System configuration */
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#define CONFIG_MACH_TYPE MACH_TYPE_SC_SPS_1
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/* U-Boot Commands */
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/* Memory configuration */
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#define PHYS_SDRAM_1 0x40000000 /* Base address */
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#define PHYS_SDRAM_1_SIZE 0x40000000 /* Max 1 GB RAM */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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/* Environment */
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/* Environment is in MMC */
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/* FEC Ethernet on SoC */
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#ifdef CONFIG_CMD_NET
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#define CONFIG_FEC_MXC
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#endif
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/* USB */
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#ifdef CONFIG_CMD_USB
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#define CONFIG_EHCI_MXS_PORT0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
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#endif
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/* Booting Linux */
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#define CONFIG_BOOTFILE "uImage"
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#define CONFIG_BOOTCOMMAND "bootm"
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#define CONFIG_LOADADDR 0x42000000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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/* Extra Environment */
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||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"update_sd_firmware_filename=u-boot.sd\0" \
|
||||
"update_sd_firmware=" /* Update the SD firmware partition */ \
|
||||
"if mmc rescan ; then " \
|
||||
"if tftp ${update_sd_firmware_filename} ; then " \
|
||||
"setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \
|
||||
"setexpr fw_sz ${fw_sz} + 1 ; " \
|
||||
"mmc write ${loadaddr} 0x800 ${fw_sz} ; " \
|
||||
"fi ; " \
|
||||
"fi\0"
|
||||
|
||||
/* The rest of the configuration is shared */
|
||||
#include <configs/mxs.h>
|
||||
|
||||
#endif /* __CONFIGS_SC_SPS_1_H__ */
|
||||
Loading…
Add table
Reference in a new issue