Commit graph

24231 commits

Author SHA1 Message Date
Bruce Suen
fd9851e0f4 mtd: spi-nor-ids: add support for xtx XT55Q02G
Add support for XTX XT55Q02G(1.8V,2Gbit).

Signed-off-by: Bruce Suen <bruce_suen@163.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-14 23:53:16 +05:30
Igor Prusov
0f2c632b8c mtd: spinand: add support for ESMT F50x1G41LB
Adaptation of Linux commit d74c36480a67

This patch adds support for ESMT F50L1G41LB and F50D1G41LB.
It seems that ESMT likes to use random JEDEC ID from other vendors.
Their 1G chips uses 0xc8 from GigaDevice and 2G/4G chips uses 0x2c from
Micron. For this reason, the ESMT entry is named esmt_c8 with explicit
JEDEC ID in variable name.

Datasheets:
https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50L1G41LB(2M).pdf
https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50D1G41LB(2M).pdf

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Martin Kurbanov <mmkurbanov@sberdevices.ru>
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Tested-by: Martin Kurbanov <mmkurbanov@sberdevices.ru>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-14 23:50:00 +05:30
Vaishnav Achath
961c3e9f12 mtd: spi-nor-core: Implement spi_nor_read_sfdp_dma_unsafe() for sfdp parse
During SFDP header parse and BFPT parse, structures in stack are used
to perform spi_nor_read_sfdp() which expects a dma-safe buffer.

This commit introduces spi_nor_read_sfdp_dma_unsafe() to wrap
spi_nor_read_sfdp() using a kmalloc'ed bounce buffer which is
the same implementation in Linux (drivers/mtd/spi-nor/sfdp.c).

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-14 23:47:13 +05:30
Tom Rini
11e1cc7aae Merge tag 'u-boot-imx-next-20231214' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
- Add TPM support for venice boards
- Add networking support for imx93-evk
- Enable TCP, IPv6, wget for DHCOM and Data Modul boards
- Enable fastboot support for Toradex boards
- Allow pico-imx7d to boot from SD
- Enable fastboot for beacon imx8m beacon boards, disabled
  SYS_CONSOLE_IS_IN_ENV
- Fix mxsboot to prevent NAND blocks being reported as bad
- Add imx8mm PWM clock support
- Several devicetree syncs with the kernel
- Add support for i.MX8MP Polyhex Debix Model A SBC
- Reworked ddr_load_train_firmware() to get a 50ms boot time improvement
2023-12-14 07:37:02 -05:00
Simon Glass
9578dd856a fdt: Check for a valid fdt in oftree_ensure()
Check the header before starting to use it, since this could provide
very confusing later, when ofnode calls start to fail.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-12-13 18:39:05 -05:00
Heinrich Schuchardt
c659ac7cca acpi: move acpi_get_rsdp_addr() to acpi/acpi_table.h
Function acpi_get_rsdp_addr() is needed on all architectures which
write ACPI tables. Move the definition from the x86 include to an
architecture independent one.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-12-13 18:39:05 -05:00
Tom Rini
9565771076 Merge patch series "bootm: Refactoring to reduce reliance on CMDLINE (part A)"
To quote the author:

It would be useful to be able to boot an OS when CONFIG_CMDLINE is
disabled. This could allow reduced code size.

Standard boot provides a way to handle programmatic boot, without
scripts, so such a feature is possible. The main impediment is the
inability to use the booting features of U-Boot without a command line.
So the solution is to avoid passing command arguments and the like to
code in boot/

A similar process has taken place with filesystems, for example, where
we have (somewhat) separate Kconfig options for the filesystem commands
and the filesystems themselves.

This series starts the process of refactoring the bootm logic so that
it can be called from standard boot without using the command line.
Mostly it removes the use of argc, argv and cmdtbl from the internal
logic.

Some limited tidy-up is included, but this is kept to smaller patches,
rather than trying to remove all #ifdefs etc. Some function comments
are added, however.

A simple programmatic boot is provided as a starting point.

This work will likely take many series, so this is just the start.

Size growth with this series for firefly-rk3288 (Thumb2) is:

       arm: (for 1/1 boards) all +23.0 rodata -49.0 text +72.0

This should be removed by:

   https://source.denx.de/u-boot/custodians/u-boot-dm/-/issues/11

but it is not included in this series as it is already large enough.

No functional change is intended in this series.

Changes in v3:
- Add a panic if programmatic boot fails
- Drop RFC tag

Changes in v2:
- Add new patch to adjust position of unmap_sysmem() in boot_get_kernel()
- Add new patch to obtain command arguments
- Fix 'boot_find_os' typo
- Pass in the command name
- Use the command table to provide the command name, instead of "bootm"
2023-12-13 11:51:53 -05:00
Simon Glass
8632b36b96 command: Introduce functions to obtain command arguments
Add some functions which provide an argument to a command, or NULL if
the argument does not exist.

Use the same numbering as argv[] since it seems less confusing than the
previous idea.

Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Tom Rini <trini@konsulko.com>
2023-12-13 11:51:24 -05:00
Tom Rini
bfe3c7b93b Merge patch series "some LED patches"
To quote the author:

I wanted to add support for ti,lp5562, and found an old submission
from Doug. While trying to modify that to work in current U-Boot, I
found a problem with the "move label handling to core" patches.

Patch 1 is a prerequisite for the ti,lp5562 driver, which turned out
to be needed by Christian as well.

Patch 2 is an attempt at (quick-)fixing the mentioned "move label
handling to core" problem. The real fix consists of changing remaining
drivers to not bind the same driver to the top node as to the child
nodes, but I can't test those other drivers.

Patch 3 introduces a helper which should allow removing some
boilerplate in most individual drivers, and 4,5 apply that in the gpio
and pwm drivers. Converting remaining drivers is trivial, but left out
for now.

Finally patch 6 is the reworked lp5562 driver. While I've changed it
to match existing DT bindings (with the goal of making it work with
our .dts that is known to work with the linux driver), most of the
logic is unchanged from Doug's original patch, so he is still listed
as author.

Changes in v2: Interchange order of patches 1 and 2, add a few R-bs,
and try to trim down the commit message in patch 2.
2023-12-13 11:35:17 -05:00
Doug Zobel
f9dc67d18e led: add TI LP5562 LED driver
Driver for the TI LP5562 4 channel LED controller. Supports
independent on/off control of all 4 channels. Supports LED_BLINK on 3
independent channels: blue/green/red. The white channel can blink, but
shares the blue channel blink rate.

Heavily based on patch originally from Doug Zobel [1].

I have modified it so it matches the DT bindings in the linux tree,
and also follows the linux driver implementation more closely. This
should address Tom's concerns, and also matches my goal of making the
U-Boot driver work with our existing .dts which is known to work in
linux.

As our boards only have the R,G,B outputs connected, I have not
actually tested how the white channel behaves, but the R,G,B work
exactly as expected.

[1] https://lore.kernel.org/u-boot/1547150757-1561-1-git-send-email-douglas.zobel@climate.com/

Cc: Doug Zobel <douglas.zobel@climate.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2023-12-13 11:35:16 -05:00
Rasmus Villemoes
d45e712f88 led: led_pwm: use led_bind_generic() helper
Use the helper led_bind_generic() to reduce code duplication.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-12-13 11:35:15 -05:00
Rasmus Villemoes
82eb8e5171 led: led_gpio: use led_bind_generic() helper
Use the helper led_bind_generic() to reduce code duplication.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
2023-12-13 11:35:15 -05:00
Rasmus Villemoes
3bf0515a07 led: introduce led_bind_generic()
All existing drivers in drivers/led/ contain a .bind method that does
exactly the same thing, with just the actual driver name
differing. Create a helper so all those individual methods can be
changed to one-liners.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2023-12-13 11:35:13 -05:00
Rasmus Villemoes
067e4ce35b led-uclass: do not create fallback label for top-level node
Many existing drivers, and led-uclass itself, rely on uc_plat->label
being NULL for the device representing the top node, as opposed to the
child nodes representing individual LEDs. This means that the drivers
whose .probe methods rely on this were broken by commit 83c63f0d11
("led: Move OF "label" property parsing to core"), and also that the top
node wrongly shows up with 'led list'.

Binding the same driver to the top node as to the individual child
nodes is arguably wrong, and the approach of using a UCLASS_NOP driver
for the top node is probably better - this has for example been done in
commit 0107469780 ("led: gpio: Use NOP uclass driver for top-level
node") and commit 910b01c27c ("drivers: led: bcm6753: do not use null
label to find the top")

Until remaining affected drivers are fixed, we can use a heuristic
that only sets the label to the fallback value derived from the node
name if the node does not have a "compatible" property - i.e., if it
has been bound to the LED driver explicitly via
device_bind_driver_to_node(). This is similar to what commit
e3aa76644c ("led: gpio: Check device compatible string to determine
the top level node") did for gpio_led, but that fix was then supplanted
by commit 0107469780 ("led: gpio: Use NOP uclass driver for top-level
node")

Fixes: 83c63f0d11 ("led: Move OF "label" property parsing to core")
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2023-12-13 11:34:53 -05:00
Rasmus Villemoes
5bf61f918d led-uclass: honour ->label field populated by driver's own .bind
If the driver's own .bind method has populated uc_plat->label, don't
override that. This is necessary for an upcoming driver for ti,lp5562,
where the DT binding unfortunately says to use "chan-name" and not
"label".

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2023-12-13 11:34:49 -05:00
Venkatesh Yadav Abbarapu
4f340244b9 clk: zynqmp: enable topsw_lsbus clock
Display port is using topsw_lsbus clock, it is failing
while enabling the clock, so enable the topsw_lsbus clock.

Signed-off-by: Sreekanth Sunnam <sreekanth.sunnam@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231204084515.9488-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13 16:48:15 +01:00
Alexander Gendin
b68d2865f1 drivers: misc: Kconfig: Fix SPL_FS_LOADER prompt
Both FS_LOADER and SPL_FS_LOADER have the same menu prompt.
To avoid confusion, make prompt for SPL_FS_LOADER different.

Signed-off-by: Alexander Gendin <agendin@matrox.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-12-13 09:57:02 -05:00
Nicolas Heemeryck
cb1d68b143 clk: imx8mn: add pwm clocks
Based on Linux kernel 6.7-rc4, add necessary clocks for the PWM
controllers.

Signed-off-by: Nicolas Heemeryck <nicolas.heemeryck@devialet.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-13 10:03:46 -03:00
Fabio Estevam
7e3d6ec9bf phy: phy-imx8mq-usb: Remove .exit operation
Currently, when running "ums 0 mmc 2" and breaking it via
CTRL + C, the following message is seen:

u-boot=> ums 0 mmc 1
UMS: LUN 0, dev mmc 1, hwpart 0, sector 0x0, count 0x1dacc00
CTRL+C - Operation aborted
clk usb_phy_root_clk already disabled

The USB PHY clock is disabled twice: first it gets disabled
inside imx8mq_usb_phy_power_off(), then it is disabled again
inside imx8mq_usb_phy_exit().

Let the USB PHY clock be disabled only once inside
imx8mq_usb_phy_power_off() by removing the .exit operation.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-13 09:52:53 -03:00
Sébastien Szymanski
f935716935 net: phy: realtek: Add support for RTL8211F(D)(I)-VD-CG
Add support for the RTL8211F(D)(I)-VD-CG PHY present on the i.MX93 EVK
board.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2023-12-13 09:48:38 -03:00
Sébastien Szymanski
9e1f79bd69 net: dwc_eth_qos: add i.MX93 support
Add support for DWC EQoS MAC on i.MX93.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2023-12-13 09:48:03 -03:00
Shawn Guo
b614ddb5d3 ddr: imx: Save the FW loading if it hasn't changed
Function ddr_load_train_firmware() is called 4 times in a loop by
ddr_cfg_phy(). The first 3 calls are all '1D' type and just loading the
same FWs.  Let's add a type check and save 2 of them.  This helps to
reduce DDRPHY training time from 269 ms down to 212 ms, and thus speed
up boot time ~ 50 ms.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Fabio Estevam <festevam@denx.de>
2023-12-13 08:44:59 -03:00
Tanmay Shah
babee72ff6 mailbox: zynqmp: support mulitple mboxes via device-tree
As of now only one mailbox agent is supported by mailbox driver.
On zynqmp platform there are about 7 mailbox agents which can communicate
over same IPI channel to U-Boot. This patch series introduces new
"zynqmp_ipi_dest" driver which adds one to multi-channel mailbox
support.

Following format in device-tree is expected as per latest bindings:
zynqmp-ipi {
	compatible = "xlnx,zynqmp-ipi-mailbox";

	mbox_1: mailbox@1 {
		/* New compatible for child node */
		compatible = "xlnx,zynqmp-ipi-dest-mailbox";
		...
	};

	...

	mbox_n: mailbox@n {
		compatible = "xlnx,zynqmp-ipi-dest-mailbox";
		...
	}
};

Then mailbox client uses child mailbox node as following:

ipi-dest-1 {
	...
	mboxes = <mbox_1 0>, <mbox_1 1>;
	mbox-names = "tx", "rx";
	...
};

New "zynqmp_ipi_dest" driver is for devices with
"xlnx,zynqmp-ipi-dest-mailbox" compatible string. This driver will take care
of mailbox send recv ops and it replaces previous "zynqmp_ipi" driver.
Now "zynqmp_ipi" driver simply binds each child device with "zynqmp_ipi_dest"
driver.

However, its important to maintain backward comaptibility with previous
bindings where child node does not have compatible string. In such case, new
driver isn't probed by U-Boot during boot and system fails to boot. To
resolve this issue firmware-zynqmp.c driver probes all the IPI parent node
driver which binds each child node device with "zynqmp_ipi_dest" driver.

This makes sure corresponding child driver will be
probed when requested using mbox_get_by_name or mbox_get_by_idx
framework calls.

This way multiple mailbox agents are supported in device-tree without breaking
previous binding support.

Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Link: https://lore.kernel.org/r/20231204215620.63334-4-tanmay.shah@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13 08:58:07 +01:00
Tanmay Shah
e2c3e9c2b1 mailbox: add el3 support only for zynqmp platform
If U-Boot is running in Exception Level 3 then use hardcode
register values for mailbox message passing with PMU.
This is only supported for zynqmp platform.

Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Link: https://lore.kernel.org/r/20231204215620.63334-3-tanmay.shah@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13 08:58:07 +01:00
Tanmay Shah
cfb41b011d mailbox: zynqmp: support smc calls to TF-A
Use SMC calls to TF-A to operate IPI for execution level below 3. For
EL3 use hardcode IPI registers as TF-A isn't available in EL3.
Hence, in EL3 remote and local IPI ids retrieved using xlnx,ipi-id
property are unused.

Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
Link: https://lore.kernel.org/r/20231204215620.63334-2-tanmay.shah@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13 08:58:07 +01:00
Mayuresh Chitale
218539e2e7 drivers: xilinx_spi: Probe fifo_depth at runtime
If the fifo-size DT parameter is not provided then probe the
controller's fifo depth at runtime. This is ported from a patch
in the Linux Xilinx SPI driver.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1422029330-10971-5-git-send-email-ricardo.ribalda@gmail.com
Tested-by: Love Kumar <love.kumar@amd.com>
Link: https://lore.kernel.org/r/20231116164336.140171-4-mchitale@ventanamicro.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13 08:58:06 +01:00
Mayuresh Chitale
954d437d26 drivers: xilinx_spi: Add xfer callback
Add the xfer callback which is used by the MMC_SPI driver and generally by
the dm_spi_xfer callback.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Tested-by: Love Kumar <love.kumar@amd.com>
Link: https://lore.kernel.org/r/20231116164336.140171-3-mchitale@ventanamicro.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13 08:58:06 +01:00
Mayuresh Chitale
4c18d9f6d0 drivers: xilinx_spi: Use udevice in start_tranfer
Modify start_transfer and related functions to take a udevice parameter
as input instead of spi_slave. This is needed so that start_transfer can
be used directly via the xfer callback. Also fix a compiler warning.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Tested-by: Love Kumar <love.kumar@amd.com>
Link: https://lore.kernel.org/r/20231116164336.140171-2-mchitale@ventanamicro.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13 08:58:06 +01:00
Mayuresh Chitale
a62b01ded1 pci: xilinx: Enable MMIO region
The host bridge MMIO region is disabled by default due to which MMIO
accesses cause an exception. Fix it by setting the bridge enable bit.
This change is ported from the linux pcie-xilinx driver.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20231116165103.140968-3-mchitale@ventanamicro.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13 08:58:06 +01:00
Mayuresh Chitale
891b481480 pci: xilinx: Fix "reg" not found error
Fix the driver to use the dev_read_addr_size API to fetch the reg
property from the DT.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Link: https://lore.kernel.org/r/20231116165103.140968-2-mchitale@ventanamicro.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13 08:58:06 +01:00
Mayuresh Chitale
3c6b1fdade net: axi_emac: Use reg property for DMA registers
As per the xlnx,axi-ethernet-1.00.a DT documentation in linux, the AXI
DMA registers can be obtained via the reg property or via a separate
node for the axistream DMA controller. Currently only the latter is
supported, so add support to fetch the DMA controller registers from the
"reg" property.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20231116164024.139934-1-mchitale@ventanamicro.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-12-13 08:58:06 +01:00
Tom Rini
8737914336 Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
- StarFive: Add StarFive watchdog driver
- VisionFive2: Support device tree overlay for VisionFive2 board
- Andes: Fix PLIC-SW setting
- RISC-V: Fix NVMe support by implying NVME_PCI for QEMU
- RISC-V: Fix binman for 64 bit format load address
2023-12-09 14:35:44 -05:00
Jim Liu
b2906f5b61 mtd: spi-nor: add flash model w25q01/02 support
add flash w25q01jv, w25q01jvfim and w25q02jv support

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-09 16:44:24 +05:30
Udit Kumar
c77efca283 spi: cadence_qspi: Select flash subnode at runtime
Currently spi driver gets flash parameter from first subnode.

Few boards have more than one flash with different parameters
and selection of flash is done by on board switch settings.
In such case, uboot needs to be recompiled with updated
device tree to align with board switch settings.

This patch allows to select flash node at runtime.

Boards those are supporting multiple flashes
needs to implement cadence_qspi_get_subnode function and return correct
flash node.

Cc: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-09 16:43:00 +05:30
Godfrey Mwangi
a08f7de39d mtd: spi-nor: Add MT25QU128AB params
Add Micron MT25QU128AB flash.

Signed-off-by: Godfrey Mwangi <godmwan@microsoft.com>
[jagan: fix the commit head]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-09 16:40:48 +05:30
Jit Loon Lim
bf41cb3d30 mtd: spi-nor: Add MT25U01G part number for SPI NOR Flash
MT25QU01 OPN with 4B OPCODE support is currently not supported in
source code and the driver reuses the definition for "n25q00a"
which has the same silicon ID but is a slower part.

Adding mt25u01g definition to the source code to support a faster
read response for MT25QU01 QSPI NOR Flash device.

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
[jagan: fix the id position and commit head]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-09 16:39:03 +05:30
Teik Heng Chong
77f3b5e4ad drivers: mtd: spi: Add support for GD55LB02GEBIR SPI NOR flash
Add Support for GigaDevice GD55LB02GEBIR SPI NOR flash as QSPI
configuration flash

Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2023-12-09 16:36:16 +05:30
Andre Przywara
929f198d07 sunxi: H616: remove default AXP305 selection
The original H616 devices released about three years ago were typically
paired with an X-Powers AXP305 PMIC. Newer devices uses the smaller
AXP313, and there seem to be far more systems with this PMIC around now.

Remove the default AXP305 selection for the H616 SoC from the Kconfig,
and move the PMIC selection into the board defconfig files instead.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-12-06 23:09:17 +00:00
Andre Przywara
9ac57fb3a2 mtd: spi-nor: Add support for zBIT ZB25VQ128
Add support for the zBIT ZB25VQ128 (128M-bit) SPI NOR flash memory chip,
as used on the Xunlong Orange Pi Zero 3 board.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
2023-12-06 23:09:01 +00:00
Jonas Karlman
791e2bf9a8 mtd: spi-nor: Add support for Silicon Kaiser sk25lp128
Add support for Silicon Kaiser sk25lp128 SPI NOR flash found in Pine64
PinePhone Pro and PineTab2.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
2023-12-06 18:04:46 +05:30
William Zhang
672c97b646 spi: bcm63xx-hsspi: Fix compiler warning
When build for arm64 target, comipler reports the following warning:
drivers/spi/bcm63xx_hsspi.c: In function ‘bcm63xx_hsspi_xfer_dummy_cs’:
include/linux/kernel.h:184:17: warning: comparison of distinct pointer
types lacks a cast
  184 |  (void) (&_min1 == &_min2);  \
      |                 ^~
drivers/spi/bcm63xx_hsspi.c:298:22: note: in expansion of macro ‘min’
  298 |   size_t curr_step = min(step_size, data_bytes);

This change fix this warning by casting the data_bytes to size_t.

Fixes: 0e144ec38c ("spi: bcm63xx-hsspi: Add prepend mode support")
Signed-off-by: William Zhang <william.zhang@broadcom.com>
2023-12-06 18:00:50 +05:30
Chanho Park
da26455098 watchdog: Add StarFive Watchdog driver
Add to support StarFive watchdog driver. The driver is imported from
linux kernel's drivers/watchdog/starfive-wdt.c without jh7100 support
because there is no support of jh7100 SoC in u-boot yet.
Howver, this patch has been kept the variant coding style because JH7100
can be added later and have a consistency with the linux driver.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-12-05 16:40:16 +08:00
Chanho Park
8ef2d7926f clk: starfive: jh7110: Add watchdog clocks
Add JH7110_SYSCLK_WDT_APB and JH7110_SYSCLK_WDT_CORE clocks for JH7110
watchdog device.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-12-05 16:40:16 +08:00
Tom Rini
d379150621 Prepare v2024.01-rc4
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Merge tag 'v2024.01-rc4' into next

Prepare v2024.01-rc4

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# gpg: Signature made Mon 04 Dec 2023 01:47:24 PM EST
# gpg:                using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]
2023-12-04 21:39:57 -05:00
Chanho Park
a341a0e01f watchdog: Correct watchdog timeout print message
The wdt_start function takes timeout_ms as a parameter and starts the
watchdog with this value. However, when you output the message, it shows
the default timeout value for the watchdog device.
So this patch fixes that part to output the correct timeout value.

Before -->
StarFive # wdt start 3000
WDT:   Started watchdog@13070000 without servicing  (60s timeout)

After -->
StarFive # wdt start 3000
WDT:   Started watchdog@13070000 without servicing  (3s timeout)

Fixes: c2fd0ca1a8 ("watchdog: Integrate watchdog triggering into the cyclic framework")
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2023-12-04 08:09:09 +01:00
Heinrich Schuchardt
493e0e2577 usb: USB_XHCI_PCI depends on PCI
Compiling with CONFIG_USB_XHCI_PCI and CONFIG_PCI=n results in

    usb/host/xhci-pci.c:48:(.text.xhci_pci_probe+0x44):
    undefined reference to `dm_pci_write_config32

Add the missing Kconfig dependency.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 16:01:59 +01:00
Jonas Karlman
6e91df96dc usb: dwc3-generic: Use combined glue and ctrl node for RK3588
Like Rockchip RK3328 and RK3568, the RK3588 also have a single node to
represent the glue and ctrl for USB 3.0.

Use rk_ops as driver data to select correct ctrl node for RK3588 DWC3.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:12 +01:00
Hector Martin
a14843fdac usb: xhci: Fix DMA address calculation in queue_trb
We need to get the DMA address before incrementing the pointer, as that
might move us onto another segment.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:04 +01:00
Hector Martin
2fd7037122 usb: xhci: Do not panic on event timeouts
Now that we always check the return value, just return NULL on timeouts.
We can still log the error since this is a problem, but it's not reason
to panic.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:04 +01:00
Hector Martin
fb5502be25 usb: xhci: Fail on attempt to queue TRBs to a halted endpoint
This isn't going to work, don't pretend it will and then end up timing
out.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:04 +01:00
Hector Martin
9d88bd4dcf usb: xhci: Recover from halted bulk endpoints
There is currently no codepath to recover from this case. In principle
we could require that the upper layer do this explicitly, but let's just
do it in xHCI when the next bulk transfer is started, since that
reasonably implies whatever caused the problem has been dealt with.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:04 +01:00
Hector Martin
6f64f0ae23 usb: xhci: Allow context state errors when halting an endpoint
There is a race where an endpoint may halt by itself while we are trying
to halt it, which results in a context state error. See xHCI 4.6.9 which
mentions this case.

This also avoids BUGging when we attempt to stop an endpoint which was
already stopped to begin with, which is probably a bug elsewhere but
not a good reason to crash.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:04 +01:00
Hector Martin
2526cd9932 usb: xhci: Better error handling in abort_td()
If the xHC has a problem with our STOP ENDPOINT command, it is likely to
return a completion directly instead of first a transfer event for the
in-progress transfer. Handle that more gracefully.

We still BUG() on the error code, but at least we don't end up timing
out on the event and ending up with unexpected event errors.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:04 +01:00
Hector Martin
8d1e03f984 usb: xhci: Guard all calls to xhci_wait_for_event
xhci_wait_for_event returns NULL on timeout, so the caller always has to
check for that. This addresses immediate explosions in this part
of the code when timeouts happen, but not the root cause for the
timeout.

Signed-off-by: Hector Martin <marcan@marcan.st>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-12-01 14:06:04 +01:00
Tom Rini
4a363dd516 Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra into next
Device tree improvents for Paz00 and DM PMIC convertion of recently
merged Tegra boards.
2023-11-30 09:33:31 -05:00
Andrew Davis
cef52c9cb2 configs: keystone2: Do not include hardware.h
This is a hacky way to have this file included in all source files that
include common.h, instead just include from the files that need it.

Signed-off-by: Andrew Davis <afd@ti.com>
2023-11-29 09:32:15 -05:00
AKASHI Takahiro
654580eee1 xen: pvblock: fix the maximum io size in one operation
The current implementation may cause BUG_ON() in blkfront_aio()
	BUG_ON(n > BLKIF_MAX_SEGMENTS_PER_REQUEST);

In pvblock_iop(), a read/write operation will be split into smaller
chunks of data so that the size in one access (aio_nbytes) is limited
to, at the maximum,
	BLKIF_MAX_SEGMENTS_PER_REQUEST * PAGE_SIZE

But this works only if when the *buffer* passed in to pvblock_io()
is page-aligned. If not, the given data region may stand across
(BLKIF_MAX_SEGMENTS_PER_REQUEST + 1) pages. See the logic in
blkfront_aio():
	start = (uintptr_t)aiocbp->aio_buf & PAGE_MASK;
	end = ((uintptr_t)aiocbp->aio_buf + aiocbp->aio_nbytes +
	       PAGE_SIZE - 1) & PAGE_MASK;
Then this will lead to BUG_ON() above.

This can be fixed by decreasing the maximum size of aio_nbytes.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Fixes: commit 3a739cc6c9 ("xen: pvblock: Implement front-back protocol and do IO")
2023-11-29 09:32:15 -05:00
Alex Bee
d6d8078cb3 timer-uclass: Always use "clock-frequency" property as fallback
Currently the "clock-frequency" DT property is only being considered as an
fallback if either there is no clock driver, the clock driver implements
the request-op correctly or there is no clock defined for the timer at all.

This patch makes "clock-frequency" also being picked as a fallback if
getting the clock-rate fails, since clk_get(_by_index) will return no
error, if a clock driver does not implement the request-op and does also
not support getting the rate of the clock in question.
timer_post_probe will take care if the property does not exist in the DT or
is defined as 0.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
2023-11-29 09:32:15 -05:00
Tom Rini
339d96822e Merge patch series "cmd: add scmi command"
To quote the author:

"Scmi" command will be re-introduced per Michal's request.
The functionality is the same as I put it in my patch set of adding
SCMI base protocol support, but made some tweak to make UT, "ut dm
scmi_cmd," more flexible and tolerable when enabling/disabling a specific
SCMI protocol for test purpose.

Each commit may have some change history inherited from the preceding
patch series.

Test
====
The patch series was tested on the following platforms:
* sandbox
2023-11-28 22:31:09 -05:00
AKASHI Takahiro
9c07c0a4fc firmware: scmi: support protocols on sandbox only if enabled
This change will be useful when we manually test SCMI on sandbox
by enabling/disabling a specific SCMI protocol.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-28 22:31:03 -05:00
Tom Rini
38cc6cdeb1 Merge patch series "Import "string" I/O functions from Linux"
To quote the author:

This series imports generic versions of ioread_rep/iowrite_rep and
reads/writes from Linux. Some cleanup is done to make sure that all
platforms have proper defines for implemented functions and there are no
redefinitions.
2023-11-28 16:19:19 -05:00
Igor Prusov
89994d64ac musb-new: Remove implementation of io.h functions
Since {read,write}s{l, w, b}() functions are now supported in linux/io.h
there is no need to add custom implementation to driver.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-28 16:19:06 -05:00
Igor Prusov
e515a2bb1a treewide: Include linux/io.h instead of asm-generic/io.h
Directly including asm-generic/io.h may break build because it will
cause redefenition of generic io macros if linux/io.h gets included
later, hence replace it with direct include of linux/io.h

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-28 16:19:06 -05:00
Igor Prusov
d26db04db1 spi: meson_spifc_a1: Switch to io{read,write}32_rep()
Use io{read,write}32_rep() functions to sync code with Linux version.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-28 16:19:06 -05:00
Igor Prusov
fa34fbf9a1 asm-generic: Import functions from Linux
Currently {read,write}s{b,w,lq}() functions are available only on some
architectures, and there are no io{read,write}{8,16,32,64}_rep()
functions in u-boot. This patch adds generic versions that may be used
without arch-specific implementation.

Since some of added functions were already added locally in some files,
remove them to avoid redeclaration errors.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-28 16:19:06 -05:00
Tom Rini
66c21738fd Merge patch series "sysinfo: Expand sysinfo with some more banner information"
To quote the author:

The show_board_info() function was adjusted to weak so that it could be
entirely replaced with a board-specific implementation.

The intended way for boards to provide their own information is via a
sysinfo driver. But currently there is no way to show anything other
than the model name.

This series adds support for showing a few more items, in a way that is
easy for boards to extend.

Since there is already a weak checkboard() function, we don't need to
have two levels of weak function here. So this series drops the weak
attribute from show_board_info()

Existing boards will see a slight change in output, in that the model
name will appear first, before any custom output. If that is a problem,
then the solution is to implement a sysinfo driver for the board.
2023-11-28 12:53:14 -05:00
Simon Glass
6f646d13f4 sysinfo: Allow displaying more info on startup
At present only the model name is shown on start. Some boards want to
display more information. Add some more options to allow display of the
manufacturer as well as the version and date of any prior-stage
firmware.

This is useful for coreboot, at least. If other boards have more
information to display, it is easy to add it, now.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-11-28 12:53:04 -05:00
Tom Rini
b2bf18d5e5 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-samsung 2023-11-28 10:05:25 -05:00
Philip Oberfichtner
acae7eb5fe i2c: Bugfix in i2c_get_chip_by_phandle()
The "i2cbcdev" sneaked in when implementing this function for the
bootcounter use case. Obviously the intention was to use prop_name
instead.

Fixes: b483552773 (i2c: Implement i2c_get_chip_by_phandle())

Signed-off-by: Philip Oberfichtner <pro@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2023-11-27 18:54:56 -05:00
Tom Rini
d6e052c615 Merge patch series "ufs: Add a PCI UFS controller support"
To quote the author:

This adds a PCI UFS controller support and enables the support on
QEMU RISC-V for testing.

Requiring QEMU v8.2+.
2023-11-27 16:19:09 -05:00
Bin Meng
5b2d25a2e3 ufs: Handle UFS 3.1 controllers
Extend the version check to handle UFS 3.1 controllers as well.
Tested on QEMU emulated UFS 3.1 controller.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-27 16:18:59 -05:00
Bin Meng
2ec7d657c0 ufs: Add a PCI based UFS controller driver
This adds a simple PCI based UFS controller driver with a QEMU
emulated UFS controller on the PCI bus.

Requiring QEMU v8.2+.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-27 16:18:59 -05:00
Bin Meng
e5c19ce47c ufs: Allow mmio registers on the PCI bus
Check if the UFS controller is on the PCI bus, and get its register
base address accordingly.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2023-11-27 16:18:59 -05:00
Bin Meng
1b3dab2d29 ufs: Add a line feed to the end of some dev_xxx() messages
Add a line feed to improve readability of some dev_xxx() messages.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-27 16:18:59 -05:00
Bin Meng
b2d01681ab ufs: Correct the UFS terminlogy
UFS stands for Universal Flash Storage, not Subsytem.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2023-11-27 16:18:58 -05:00
Sam Protsenko
33e7ca5a9b serial: s5p: Use dev_read_addr_ptr() to get base address
As the address read from device tree is being cast to a pointer, it's
better to use dev_read_addr_ptr() API for getting that address. The more
detailed explanation can be found in commit a12a73b664 ("drivers: use
dev_read_addr_ptr when cast to pointer").

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-27 18:04:11 +09:00
Tom Rini
129d6a0d87 Merge tag 'u-boot-dfu-next-20231124' of https://source.denx.de/u-boot/custodians/u-boot-dfu into next
u-boot-dfu-next-20231124

- Make dfu entity name size configurable in KConfig
- Implement start-stop for UMS (graceful shutdown via eject)
- Improve help messages for cmd/bind
- Improve help message for udc bind failures
2023-11-25 12:34:23 -05:00
Sam Protsenko
a627f2802a serial: s5p: Improve coding style
Just some minor style fixes. No functional change.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-23 15:24:18 +09:00
Sam Protsenko
e79f630dbf serial: s5p: Use named constants for register values
Get rid of magic numbers in s5p_serial_init() when writing to UART
registers. While at it, use BIT() macro for existing constants when
appropriate.

No functional change.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-23 15:24:18 +09:00
Sam Protsenko
5ad21de6ba serial: s5p: Use livetree API to get "id" property
Use dev_read_u8_default() instead of fdtdec_get_int() to read the "id"
property from device tree, as suggested in [1]. dev_* API is already
used in this driver, so there is no reason to stick to fdtdec_* API.
This also fixes checkpatch warning:

    WARNING: Use the livetree API (dev_read_...)

[1] doc/develop/driver-model/livetree.rst

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-23 15:24:18 +09:00
Sam Protsenko
a0615ffc99 serial: s5p: Remove common.h inclusion
It's not really needed here anymore. Remove it, as common.h is going
away at some point.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-23 15:24:18 +09:00
Jim Liu
65660bfe85 serial: npcm: support skip uart clock setting
Skip the uart clock setting if CONFIG_SYS_SKIP_UART_INIT is enabled.
Fix divisor error.

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2023-11-22 19:10:04 -05:00
Vignesh Raghavendra
70b450b56c dma: ti: k3-udma: Introduce DMA support for the am62ax
In preparation for enabling ethernet for the am62ax family of SoCs,
introduce the initial DMA channel settings for the am62ax

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
[bb@ti.com: expanded on commit message]
Signed-off-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-11-22 13:46:33 -05:00
Heinrich Schuchardt
9086e8f04d tpm: remove superfluous check in tpm_tis_send()
Checking if variable chip is NULL after dereferencing it makes no sense.
As discribed in [1] it is not expected that the variable can ever be NULL.

[1] Re: [PATCH] tpm: avoid NULL pointer dereference in tpm_tis_send()
    https://lore.kernel.org/u-boot/YaFwDtKKYRr7qzWc@apalos.home/

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-11-22 10:03:55 +02:00
Miquel Raynal
8a0d07807a usb: udc: Try to clarify an error message
At some point when trying to use USB gadgets, two situations may arise
and lead to a failure. Either the UDC (USB Device Controller) is not
available at all (not described or not probed) or the UDC is already in
use. For instance, as the USB Ethernet gadget remains bound to the UDC,
the use of any other USB gadget (fastboot, dfu, etc) *after* will always
fail with the "couldn't find an available UDC" error.

Let's give a more helpful message by making a difference between the two
cases. Let's also hint people who would get this error and grep it into
the sources a better explanation of what's wrong with their workflow.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20231010090304.49335-4-miquel.raynal@bootlin.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2023-11-21 15:48:38 +01:00
Miquel Raynal
9b63fcaec6 cmd: Change the dependencies between CMD_BIND and USB_GADGET
Today CMD_BIND defaults to 'y' when USB_ETHER is enabled. In practice,
CMD_BIND should default to 'y' when any USB gadget is enabled not only
USB_ETHER. Let's invert the logic of the dependency and use the weak
'imply' keyword to enforce this.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # on vim3
Link: https://lore.kernel.org/r/20231010090304.49335-2-miquel.raynal@bootlin.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2023-11-21 15:48:38 +01:00
Marek Vasut
1041ee64eb usb: gadget: f_mass_storage: Stop ums on START-STOP UNIT SCSI command
Exit the UMS handler loop in case START-STOP UNIT SCSI command is
received. This is sent e.g. by the util-linux eject(1) command and
indicates to the device that it is supposed to spin down the media
and enter low power state.

This effectively adds support for exitting the 'ums' command from
host using 'eject /dev/sdN' that is on par with 'dfu-util -e' .

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20231107001018.55640-1-marex@denx.de
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2023-11-21 15:28:15 +01:00
Jaehoon Chung
f490623309 dfu: add CONFIG_DFU_NAME_MAX_SIZE configuration
Add CONFIG_DFU_NAME_MAX_SIZE to change the proper size.
If name is longer than default size, it can do wrong behavior during updating
image. So it need to change the proper maximum size.

This patch is proviced the solution to change value with configuration.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Link: https://lore.kernel.org/r/20220620111354.448512-1-jh80.chung@samsung.com
[mkorpershoek: fixed build errors for dfu.h includes]
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2023-11-21 15:28:15 +01:00
Simon Holesch
6f68dcd025 usb: fastboot: Add missing newline in pr_err
Add missing newline in pr_err.

Signed-off-by: Simon Holesch <simon@holesch.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20231120002024.32865-2-simon@holesch.de
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2023-11-21 09:19:48 +01:00
Simon Holesch
b272c87925 usb: ci: Fix gadget reinit
The ChipIdea device controller wasn't properly cleaned up when disabled.
So enabling it again left it in a broken state. The problem occurred for
example when the host unbinds the driver and binds it again.

During the first setup, when the out request is queued, the endpoint is
primed (`epprime`). If the endpoint is then disabled, it stayed primed
with the initial buffer. So after the endpoint is re-enabled, the device
controller and device driver were out of sync: the new out request was
in the driver queue head, yet not submitted, but the "complete" function
was still called, since the endpoint was primed with the old buffer.

With the fastboot function this error led to the (rather confusing)
error message "buffer overflow".

Fixed by clearing the primed buffers with the `epflush` (`ENDPTFLUSH`)
register.

Signed-off-by: Simon Holesch <simon@holesch.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20231120002024.32865-1-simon@holesch.de
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2023-11-21 09:19:48 +01:00
Tom Rini
dca7a8958f Prepare v2024.01-rc3
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Merge tag 'v2024.01-rc3' into next

Prepare v2024.01-rc3
2023-11-20 09:19:50 -05:00
Nikita Yushchenko
beeb91aa64 scsi: set dma direction to NONE for TEST UNIT READY
SCSI device scan code was executing TEST UNIT READY command without
explicitly setting dma direction in struct scsi_cmd to NONE, so command
was passed to driver with dma direction set to DMA_FROM_DEVICE,
inherited from older usage.

With WDC SDINDDH6-64G ufs device, that caused TEST UNIT READY to
return error.

Fix that, by explicitly setting dma direction to NONE for
TEST UNIT READY, and restoring it back DMA_FROM_DEVICE for the
following READ CAPACITY.

Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2023-11-20 08:34:08 -05:00
Tom Rini
d5ff806cb5 Merge branch 'master-mmc-clock' of https://source.denx.de/u-boot/custodians/u-boot-sh 2023-11-18 10:25:48 -05:00
Masahisa Kojima
d822255d65 blk: blkmap: add ramdisk creation utility function
User needs to call several functions to create the ramdisk
with blkmap.
This adds the utility function to create blkmap device and
mount the ramdisk.

Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2023-11-18 10:08:08 +02:00
Andre Przywara
45c4b276f0 virtio: rng: gracefully handle 0 byte returns
According to the virtio v1.x "entropy device" specification, a virtio-rng
device is supposed to always return at least one byte of entropy.
However the virtio v0.9 spec does not mention such a requirement.

The Arm Fixed Virtual Platform (FVP) implementation of virtio-rng always
returns 8 bytes less of entropy than requested. If 8 bytes or less are
requested, it will return 0 bytes.
This behaviour makes U-Boot's virtio_rng_read() implementation go into an
endless loop, hanging the system.

Work around this problem by always requesting 8 bytes more than needed,
but only if a previous call to virtqueue_get_buf() returned 0 bytes.

This should never trigger on a v1.x spec compliant implementation, but
fixes the hang on the Arm FVP.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Peter Hoyes <peter.hoyes@arm.com>
2023-11-17 11:58:26 -05:00
Tom Rini
ae7ec8b0be Merge branch '2023-11-16-assorted-updates' into next
- squashfs improvements, remove common.h in some places, assorted code
  fixes, fix a few CONFIG symbol names in Kconfig files, bring in
  linux's <linux/time.h> conversion functions, poplar updates, bcb
  improvements.
2023-11-17 08:38:05 -05:00
Simon Glass
b83fae673a blk: Drop reference to DM_SPL
The intent here is to only allow SPL_LEGACY_BLK if !SPL_DM - i.e. that
when driver model is enabled in SPL, legacy block cannot be used.

However this combination is used by about 240 boards, so we cannot
disallow it, at least not yet.

So just drop the condition.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-11-16 18:59:58 -05:00
Simon Glass
a07408384b dm: core: Correct reference to DM_SPL in SPL_DM_STATS
This does not existing anymore. Update SPL_DM_STATS to use the correct
Kconfig option, which is SPL_DM

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-11-16 18:59:58 -05:00
Dmitrii Merkurev
dfeb4f0d79 cmd: bcb: extend BCB C API to allow read/write the fields
Currently BCB C API only allows to modify 'command' BCB field.
Extend it so that we can also read and modify all the available
BCB fields (command, status, recovery, stage).

Co-developed-by: Cody Schuffelen <schuffelen@google.com>
Signed-off-by: Cody Schuffelen <schuffelen@google.com>
Signed-off-by: Dmitrii Merkurev <dimorinny@google.com>
Cc: Eugeniu Rosca <erosca@de.adit-jv.com>
Cc: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Cc: Sean Anderson <sean.anderson@seco.com>
Cc: Cody Schuffelen <schuffelen@google.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # on vim3
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2023-11-16 18:59:58 -05:00
Dmitrii Merkurev
a654369b49 cmd: bcb: support various block device interfaces for BCB command
Currently BCB command-line, C APIs and implementation only
support MMC interface. Extend it to allow various block
device interfaces.

Signed-off-by: Dmitrii Merkurev <dimorinny@google.com>
Cc: Eugeniu Rosca <erosca@de.adit-jv.com>
Cc: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Cc: Sean Anderson <sean.anderson@seco.com>
Cc: Cody Schuffelen <schuffelen@google.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # on vim3
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2023-11-16 18:59:58 -05:00
Igor Prusov
13248d66ae treewide: use linux/time.h for time conversion defines
Now that we have time conversion defines from in time.h there is no need
for each driver to define their own version.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com> # tegra
Reviewed-by: Eugen Hristev <eugen.hristev@collabora.com> #at91
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org> #qcom geni
Reviewed-by: Stefan Bosch <stefan_b@posteo.net> #nanopi2
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-11-16 18:59:58 -05:00
Igor Prusov
35425507b3 spi: meson_spifc_a1: Use define for time interval
Use USEC_PER_MSEC define for timeout to sync code with Linux version.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
2023-11-16 18:59:58 -05:00
Paul Barker
da35ab68de sysreset: Fix unsupported request return values
The description of the sysreset request method in <sysreset.h> says that
the return value should be -EPROTONOSUPPORT if the requested reset type
is not supported by this device.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-16 18:53:09 -05:00
Sean Anderson
5271e359a4 spl: Only support bl_len when we have to
Aligning addresses and sizes causes overhead which is unnecessary when we
are not loading from block devices. Remove bl_len when it is not needed.

For example, on iot2050 we save 144 bytes with this patch (once the rest of
this series is applied):

add/remove: 0/0 grow/shrink: 0/3 up/down: 0/-144 (-144)
Function                                     old     new   delta
spl_load_simple_fit                          920     904     -16
load_simple_fit                              496     444     -52
spl_spi_load_image                           384     308     -76
Total: Before=87431, After=87287, chg -0.16%

We use panic() instead of BUILD_BUG_ON in spl_set_bl_len because we still
need to be able to compile it for things like mmc_load_image_raw_sector,
even if that function will not be used.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-16 13:49:14 -05:00
Sean Anderson
0c6c83e6a2 spl: Remove dev from spl_load_info
dev and priv serve the same purpose, and are never set at the same time.
Remove dev and convert all users to priv. While we're at it, reorder bl_len
to be last for better alignment.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-16 13:49:13 -05:00
Tom Rini
5e6a112e11 Merge patch series "nand: Add sandbox tests"
To quote the author:

This series tests raw nand flash in sandbox and fixes various bugs discovered in
the process. I've tried to do things in a contemporary manner, avoiding the
(numerous) variations present on only a few boards. The test is pretty minimal.
Future work could test the rest of the nand API as well as the MTD API.

Bloat (for v1) at [1] (for boards with SPL_NAND_SUPPORT enabled). Almost
everything grows by a few bytes due to nand_page_size. A few boards grow more,
mostly those using nand_spl_loaders.c. CI at [2].

[1] https://gist.github.com/Forty-Bot/9694f3401893c9e706ccc374922de6c2
[2] https://source.denx.de/u-boot/custodians/u-boot-clk/-/pipelines/18443
2023-11-16 13:49:13 -05:00
Sean Anderson
8502b5bf20 test: spl: Add a test for NAND
Add a SPL test for the NAND load method. We use some different functions to
do the writing from the main test since things like nand_write_skip_bad
aren't available in SPL.

We disable BBT scanning, since scan_bbt is only populated when not in SPL.
We use nand_spl_loaders.c as it seems to be common to at least a few boards
already. However, we do not use nand_spl_simple.c because it would require
us to implement cmd_ctrl.  The various nand load functions are adapted from
omap_gpmc. However, they have been modified for simplicity/correctness.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-11-16 12:43:49 -05:00
Sean Anderson
bc8e8a4bfa nand: Add sandbox driver
Add a sandbox NAND flash driver to facilitate testing. This driver supports
any number of devices, each using a single chip-select. The OOB data is
stored in-band, with the separation enforced through the API.

For now, create two devices to test with. The first is a very small device
with basic ECC. The second is an 8G device (chosen to be larger than 32
bits). It uses ONFI, with the values copied from the datasheet. It also
doesn't need too strong ECC, which speeds things up.

Although the nand subsystem determines the parameters of a chip based on
the ID, the driver itself requires devicetree properties for each
parameter. We do not derive parameters from the ID because parsing the ID
is non-trivial. We do not just use the parameters that the nand subsystem
has calculated since that is something we should be testing. An exception
is made for the ECC layout, since that is difficult to encode in the device
tree and is not a property of the device itself.

Despite using file I/O to access the backing data, we do not support using
external files. In my experience, these are unnecessary for testing since
tests can generally be written to write their expected data beforehand.
Additionally, we would need to store the "programmed" information somewhere
(complicating the format and the programming process) or try to detect
whether block are erased at runtime (degrading probe speeds).

Information about whether each page has been programmed is stored in an
in-memory buffer. To simplify the implementation, we only support a single
program per erase. While this is accurate for many larger flashes, some
smaller flashes (512 byte) support multiple programs and/or subpage
programs. Support for this could be added later as I believe some
filesystems expect this.

To test ECC, we support error-injection. Surprisingly, only ECC bytes in
the OOB area are protected, even though all bytes are equally susceptible
to error. Because of this, we take care to only corrupt ECC bytes.
Similarly, because ECC covers "steps" and not the whole page, we must take
care to corrupt data in the same way.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-11-16 12:43:49 -05:00
Sean Anderson
333d43f6a3 nand: Allow reinitialization
NAND devices are destroyed in between unit tests. Provide a function to
reinitialize the subsystem at the beginning of each test.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-11-16 12:43:49 -05:00
Sean Anderson
c203482177 nand: Add function to unregister NAND devices
This performs the opposite of nand_register, allowing drivers to unregister
nand devices. This is probably unnecessary for most regular drivers, but we
expect sandbox drivers to get repeatedly bound/unbound, so this will help
avoid dangling pointers.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-11-16 12:43:49 -05:00
Sean Anderson
b37a9208a2 mtd: Add some fallbacks for add/del_mtd_device
This allows using these functions without ifdefs. OneNAND depends on MTD,
so this ifdef was redundant in the first place.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2023-11-16 12:43:49 -05:00
Sean Anderson
b35df87ae5 mtd: Rename SPL_MTD_SUPPORT to SPL_MTD
Rename SPL_MTD_SUPPORT to SPL_MTD in order to match MTD. This allows using
CONFIG_IS_ENABLED to test for MTD support.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-11-16 12:43:48 -05:00
Sean Anderson
38ef64e6ce spl: nand: Set bl_len to page size
Since commit 34793598c8 ("mtd: nand: mxs_nand_spl: Remove the page aligned
access") there are no longer any users of nand_get_mtd. However, it is
still important to know what the page size is so we can allocate a
large-enough buffer. If the image size is not page-aligned, we will go off
the end of the buffer and clobber some memory.

Introduce a new function nand_page_size which returns the page size. For
most drivers it is easy to determine the page size. However, a few need to
be modified since they only keep the page size around temporarily.

It's possible that this patch could cause a regression on some platforms if
the offset is non-aligned and there is invalid address space immediately
before the load address. spl_load_legacy_img does not (except when
compressing) respect bl_len, so only boards with SPL_LOAD_FIT (8 boards) or
SPL_LOAD_IMX_CONTAINER (none in tree) would be affected.

defconfig               CONFIG_TEXT_BASE
======================= ================
am335x_evm              0x80800000
am43xx_evm              0x80800000
am43xx_evm_rtconly      0x80800000
am43xx_evm_usbhost_boot 0x80800000
am43xx_hs_evm           0x80800000
dra7xx_evm              0x80800000
gwventana_nand          0x17800000
imx8mn_bsh_smm_s2       0x40200000

All the sitara boards have DDR mapped at 0x80000000. gwventana is an i.MX6Q
which has DDR at 0x10000000. I don't have the IMX8MNRM handy, but on the
i.MX8M DDR starts at 0x40000000. Therefore all of these boards can handle a
little underflow.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-11-16 12:43:48 -05:00
Sean Anderson
cdc0434ac0 nand: spl_loaders: Only read enough pages to load the image
All other implementations of nand_spl_load_image only read as many pages as
are necessary to load the image. However, nand_spl_loaders.c loads the full
block. Align it with other load functions so that it is easier to
determine how large of a load buffer we need.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2023-11-16 12:43:48 -05:00
Sean Anderson
601b8901e0 nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically
Contrary to what the help message says, this is the number of pages per
block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and
SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to
SYS_NAND_BLOCK_PAGES.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-11-16 12:43:48 -05:00
Sean Anderson
23c2ebe4d4 nand: Don't dereference NULL manufacturer_desc
When no manufacturer is matched, manufacturer_desc is NULL. Avoid
dereferencing it in that case.

Fixes: 4e67c57125 ("mtd,ubi,ubifs: sync with linux v3.15")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2023-11-16 12:43:48 -05:00
Heinrich Schuchardt
2c61c0eb14 dm: Do not enable debug messages by default
CONFIG_DM_WARN has a text indicating that these messages should only
provided when debugging. This implies that the setting must be default no.

We should still create debug messages.

Reported-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-14 20:04:01 -07:00
Patrice Chotard
778f4eaa80 pinctrl: pinctrl_stm32: Add stm32mp2 support
Add stm32mp2 compatible.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-11-13 10:55:38 +01:00
Patrice Chotard
6261cf6abd serial: stm32: Fix AARCH64 compilation warnings
When building with AARCH64 defconfig, we got warnings, fix them
by using registers base address defined as void __iomem * instead of
fdt_addr_t.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-11-13 10:55:38 +01:00
Sam Protsenko
f655090901 clk: exynos: Add header guard for clk-pll.h
The clk-pll.h is going to be included in multiple files soon. Add
missing header guard to prevent possible build errors in future.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Fixes: 166097e877 ("clk: exynos: add clock driver for Exynos7420 Soc")
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-13 16:39:05 +09:00
Sam Protsenko
2227f4c0af serial: s5p: Fix clk_get_by_index() error code check
clk_get_by_index() returns negative number on error. Assigning it to
unsigned int makes the subsequent "ret < 0" check always false, leading
in turn to possible unhandled errors. Change 'ret' variable type to
signed int so the code checks and handles clk_get_by_index() return code
properly.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Fixes: cf75cdf96e ("serial: s5p: use clock api to get clock rate")
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-13 16:20:58 +09:00
Sam Protsenko
11bd2787de watchdog: s5p_wdt: Include missing CPU header
s5p watchdog driver calls samsung_get_base_watchdog() function, but its
prototype is not included. That might lead to build warnings like this:

    drivers/watchdog/s5p_wdt.c: In function 'wdt_stop':
    drivers/watchdog/s5p_wdt.c:16:26:
        warning: implicit declaration of function
        'samsung_get_base_watchdog' [-Wimplicit-function-declaration]
             16 |   (struct s5p_watchdog *)samsung_get_base_watchdog();
                |                          ^~~~~~~~~~~~~~~~~~~~~~~~~

Include asm/arch/cpu.h to fix that issue.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2023-11-13 16:18:01 +09:00
Marek Vasut
70d2c9940e mmc: renesas-sdhi: Disable clock after tuning reset when possible
Currently the renesas_sdhi_reset_tuning() unconditionally leaves SDHI
clock enabled after the tuning reset. This is not always necessary.

After the driver performed tuning reset at the end of probe function,
or in the unlikely case that tuning failed during regular operation,
the SDHI clock can be disabled after the tuning reset. The following
set_ios call would reconfigure the clock as needed.

In case of regular set_ios call which requires a tuning reset, keep
the clock enabled or disabled according to the mmc->clk_disable state.

With this in place, the controllers which have not been accessed via
block subsystem after boot are left in quiescent state. However, if an
MMC device is used e.g. for environment storage, that controller would
be accessed during the environment load and left active, including its
clock which would still be generated. This is due to the design of the
MMC subsystem, which does not deinit a controller after it was started
once, the controller is only deinited in case of mmc rescan, or before
OS boot.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Tested-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Thuan Nguyen Hong <thuan.nguyen-hong@banvien.com.vn>
2023-11-13 04:12:47 +01:00
Andre Przywara
fafedff350 power: regulator: add AXP313 support
The X-Powers AXP313a is a small PMIC with just three buck converters and
three LDOs, one of which is actually fixed (so not modelled here).

Add the compatible string and the respective regulator ranges to allow
drivers to adjust voltages.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-11-12 16:47:16 +00:00
Andre Przywara
d17d051c54 power: pmic: sunxi: add AXP313 SPL driver
On boards using the AXP313 PMIC, the DRAM rail is often not setup
correctly at reset time, so we have to program the PMIC very early in
the SPL, before running the DRAM initialisation.

Add a simple AXP313 PMIC driver that knows about DCDC2(CPU) and
DCDC3(DRAM), so that we can bump up the voltage before the DRAM init.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
2023-11-12 16:47:16 +00:00
Samuel Holland
0070d57c33 pinctrl: sunxi: Avoid using .bss for SPL
sunxi platforms put .bss in DRAM, so .bss is not available in SPL before
DRAM controller initialization. Therefore, this buffer must be placed in
the .data section.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2023-11-12 16:46:46 +00:00
Samuel Holland
d379bcbfaf sunxi: mmc: Sort compatible strings numerically
commit 95168d77d3 ("sunxi: add Allwinner R528/T113 SoC support") added
the new entry out of order.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-11-12 16:46:32 +00:00
Samuel Holland
ca43266562 clk: sunxi: Use the right symbol in the Makefile
CONFIG_ARCH_SUNXI will not be enabled for RISC-V SoCs using this driver.
Use the symbol for the driver itself instead.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2023-11-12 16:46:16 +00:00
Samuel Holland
43b573df33 sunxi: mmc: Move header to the driver directory
The MMC controller driver is (and ought to be) the only user of these
register definitions. Put them in a header next to the driver to remove
the dependency on a specific ARM platform's headers.

Due to the sunxi_mmc_init() prototype, the file was not renamed. None of
the register definitions were changed.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-11-12 16:45:08 +00:00
Samuel Holland
7b252df7ca net: sun8i_emac: Drop DM_GPIO checks
DM_GPIO is always enable in U-Boot proper for ARCH_SUNXI, and this
driver is never enabled in SPL, so the condition is always true.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2023-11-12 16:45:03 +00:00
Andre Przywara
ffb02942fa sunxi: board: simplify early PMIC setup conditions
So far we have a convoluted #ifdef mesh that guards the early AXP PMIC
setup in board.c. That combination of &&, || and negations is very hard
to read, maintain and especially to extend.

Fortunately we have those same conditions already modelled in the
Kconfig file, so they are actually redundant. On top of that the real
reason we have those preprocessor guards in the first place is about the
symbols that are *conditionally* defined: without #ifdefs the build
would break because of them being undefined for many boards.

To simplify this, just change the guards to actually look at the symbols
needed, so CONFIG_AXP_xxx_VOLT instead of CONFIG_AXPyyy_POWER.
This drastically improves the readability of this code, and makes adding
PMIC support a pure Kconfig matter.

Doing this revealed one bug in Kconfig: there is no axp_set_dcdc4() for
the AXP818, even though CONFIG_AXP_DCDC4_VOLT includes that PMIC.
Since the AXP818 wasn't included when calling axp_set_dcdc4() in board.c,
this wasn't an issue, but becomes one now, so also remove the AXP818 from
the DCDC4 Kconfig symbol.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-11-12 12:03:42 +00:00
Tom Rini
bb7121f6aa Merge branch '2023-11-10-assorted-fixes'
- Fix some issues Coverity has reported, update MAINTAINERS file,
  another bootstd fix, typo fix in error message, gitignore fix and
  update TI's URL in many places.
2023-11-10 11:01:51 -05:00
Nishanth Menon
a94a4071d4 tree-wide: Replace http:// link with https:// link for ti.com
Replace instances of http://www.ti.com with https://www.ti.com

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-11-10 11:01:50 -05:00
Tony Dinh
ee2ce29223 bootstd: Skip over bad device during bootflows scanning
During bootstd scanning for bootdevs, if bootdev_hunt_drv() encounters
a device not found error (e.g. ENOENT), let it return a successful status
so that bootstd will continue scanning the next devices, not stopping
prematurely.

Background:

During scanning for bootflows, it's possible for bootstd to encounter a
faulty device controller. Also when the same u-boot is used for another
variant of the same board, some device controller such as SATA might
not exist.

I've found this issue while converting the Marvell Sheevaplug board to
use bootstd. This board has 2 variants, the original Sheevaplug has MMC and
USB only, but the later variant comes with USB, MMC, and eSATA ports. We
have been using the same u-boot (starting with CONFIG_IDE and later with DM
CONFIG_SATA) for both variants. This worked well with the old
envs-scripting booting scheme.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-10 11:01:50 -05:00
AKASHI Takahiro
4808d16333 firmware: scmi: correct a validity check against power domain id
A power domain id on sandbox should be in the range from zero to
ARRAY_SIZE(scmi_pwdom) - 1. Correct the validity check logic.

Addresses-Coverity-ID: 467401 ("Out-of-bounds write")
Addresses-Coverity-ID: 467405 ("Out-of-bounds read")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2023-11-10 10:59:28 -05:00
Tom Rini
d2174dbff1 scsi: Have scsi_init_dev_desc_priv() use memset
When we do not have CONFIG_BOUNCE_BUFFER enabled, inside of
scsi_init_dev_desc_priv we never set the 'bb' field to false, we only
initialize it to true when CONFIG_BOUNCE_BUFFER is set. Given that we
have a number of other fields here we had been explicitly setting to
zero, change to first calling memset to clear the struct and then
initialize only the fields that need non-zero default values.

Addresses-Coverity-ID: 467407 ("Uninitialized variables (UNINIT)")
Fixes: 81bd22e935 ("rockchip: block: blk-uclass: add bounce buffer flag to blk_desc")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-10 10:59:24 -05:00
Tim Lunn
455ad75cb2 rockchip: otp: Add support for RV1126
Extend the otp driver to read rv1126 otp. This driver code was
adapted from the Rockchip BSP stack.

Signed-off-by: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-11-10 10:58:44 -05:00
Tom Rini
b630f8b3ae scsi: Forceably finish migration to DM_SCSI
The migration deadline for moving to DM_SCSI was v2023.04. A further
reminder was sent out in August 2023 to the remaining platforms that had
not migrated already, and that a few more over the line (or configs
deleted).

With this commit we:
- Rename CONFIG_DM_SCSI to CONFIG_SCSI.
- Remove all of the non-DM SCSI code. This includes removing other
  legacy symbols and code and removes some legacy non-DM AHCI code.
- Some platforms that had previously been DM_SCSI=y && SCSI=n are now
  fully migrated to DM_SCSI as a few corner cases in the code assumed
  DM_SCSI=y meant SCSI=y.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-11-07 18:36:06 -05:00
Tom Rini
2dbb4967b6 qe: Add <asm/ppc.h> on PowerPC
This driver needs <asm/ppc.h> when building on PowerPC, add it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-11-07 14:50:51 -05:00
Tom Rini
362d84c6a2 spi: Add <errno.h> to spi-mem-nodm.c
This file uses errno return values in functions, so include <errno.h>
here rather than rely on indirect inclusion.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-11-07 14:50:51 -05:00
Tom Rini
5faf66a2d1 fsl_qe: Drop common.h
In both include/fsl_qe.h and then also remove common.h from the files
which had included fsl_qe.h

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-11-07 14:50:51 -05:00
Tom Rini
2a7ea65037 m68k: Remove CONFIG_FSLDMAFEC
There are no platforms which enable this feature, so remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-11-07 14:50:51 -05:00
Tom Rini
d563bb5d16 clk_k210.c: Clean up how we handle nop
Now that sandbox has <asm/barrier.h> and defines nop() there we should
include that in our driver for clarity and then remove our local nop()
from <k210/pll.h>.

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-11-07 14:49:40 -05:00
AKASHI Takahiro
f1b671511e block: rkmtd: select CONFIG_RANDOM_UUID explicitly
This option is necessary to compile any way.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2023-11-07 14:49:10 -05:00
Tom Rini
3165565e5b fastboot: Depend on CMDLINE
Much of the functionality of fastboot relies on being able to run
commands as defined in the environment. This means it does depend on
CMDLINE being enabled.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-11-07 14:49:10 -05:00
Simon Glass
d83f4e6265 video: Don't require the font command
While it is nice to have the font command, using 'select' makes it
impossible to build the console code without it. Stop using 'select' and
make it default if CONSOLE_TRUETYPE is enabled when asking the command.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2023-11-07 14:48:51 -05:00
Tom Rini
9f8b1508ca dfu: Make DFU_TFTP depend on NETDEVICES
In order to do a DFU update over TFTP we need to have some network
device available, so make this depend on NETDEVICES

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-11-07 14:48:19 -05:00
Tom Rini
a8a53cfa8d virtio: Make VIRTIO_NET depend on NETDEVICES
As VIRTIO_NET is the symbol for enabling network devices, make this
depend on NETDEVICES

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-11-07 14:48:19 -05:00
Ibai Erkiaga
3e89144892 zynqmp: migrate gqspi debug to logging
The following patch migrates the usage of debug and printf functions
to the relevant logging function as per U-Boot DM guidelines.

Additionally some of the debugging statements have been rearanged for
a more meaningfull debug experience.

aarch64-linux-gnu-size reports 229 bytes less when debug is enabled at
file level, while is just 5bytes more when disabled.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@amd.com>
Link: https://lore.kernel.org/r/20231013123739.2757979-1-ibai.erkiaga-elorza@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:09 +01:00
Venkatesh Yadav Abbarapu
20d1836eea spi: cadence_ospi_versal: Add support for 64-bit address
When 64-bit address is passed only lower 32-bit address
is getting updated. Program the upper 32-bit address in the
DMA destination memory address MSBs register.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231011031515.4151-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Venkatesh Yadav Abbarapu
ba9bdfd959 drivers: firmware: Handle error case in the zynqmp_pm_feature
Unhandled error coming from xilinx_pm_request() but return
value is not read back that's why getting sparse warning
as below:
warning: variable 'ret' set but not used [-Wunused-but-set-variable].
In case of error return the "ret" value.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231011025647.17200-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Venkatesh Yadav Abbarapu
188c803d08 mtd: spi-nor: Add spi flash lock config option
Provide an explicit configuration option to disable default "lock"
of any flash chip which supports locking. By disabling the lock
config will save some amount of memory and also don't expose the
lock functionality to the users i.e., via sf protect command.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231003031715.5343-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Algapally Santosh Sagar
bd9ff681bd serial: zynqmp: Fetch baudrate from dtb and update
The baudrate configured in .config is taken by default by serial. If
change of baudrate is required then the .config needs to changed and
u-boot recompilation is required or the u-boot environment needs to be
updated.

To avoid this, support is added to fetch the baudrate directly from the
device tree file and update.
The serial, prints the log with the configured baudrate in the dtb.
The commit c4df0f6f31 ("arm: mvebu: Espressobin: Set default value for
$fdtfile env variable") is taken as reference for changing the default
environment variable.

The default environment stores the default baudrate value, When default
baudrate and dtb baudrate are not same glitches are seen on the serial.
So, the environment also needs to be updated with the dtb baudrate to
avoid the glitches on the serial.

Also add test to cover this new function.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20230921112043.3144726-3-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Algapally Santosh Sagar
8819892bdb configs: Add support in Kconfig and convert for armada boards
Move the DEFAULT_ENV_IS_RW to Kconfig for easier configuration.
Hence, add the CONFIG_DEFAULT_ENV_IS_RW config to the defconfig files
to allow enabling them for armada boards.

Signed-off-by: Algapally Santosh Sagar <santoshsagar.algapally@amd.com>
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/r/20230921112043.3144726-2-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Tom Rini
274f41c653 - fixup to also enabled DFU RAM boot for libretech-ac
- sm fix to bind child sm devices in the device tree
 - add missing A1 clocks for USB stack
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Merge tag 'u-boot-amlogic-20231106' of https://source.denx.de/u-boot/custodians/u-boot-amlogic

- fixup to also enabled DFU RAM boot for libretech-ac
- sm fix to bind child sm devices in the device tree
- add missing A1 clocks for USB stack
2023-11-06 09:47:13 -05:00
Dmitry Rokosov
e9f4f7789c drivers: sm: bind child sm devices in the device tree
One well-known sm child device that provides secure power control is the
Secure Power Controller. This device utilizes SMC calls to communicate
with power domains on the secure monitor side.

Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com>
Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231101140500.9025-3-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-11-06 09:45:47 +01:00
Alexey Romanov
8ec790399a clk: a1: add new clocks for USB stack
Since we sync device tree with Linux, we have to add this
clock definition for USB stack.

Signed-off-by: Alexey Romanov <avromanov@salutedevices.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231101140500.9025-2-avromanov@salutedevices.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2023-11-06 09:45:47 +01:00
Baruch Siach
d44f3d21fe net: designware: add DMA offset awareness
Older DesignWare Ethernet MAC versions that this driver supports can
only work with 32-bit DMA source/destination addresses. Some platforms
have no physical RAM at the lowest 4GB address space. For these
platforms the driver must translate DMA addresses to/from physical
memory addresses.

Call translation routines so that properly configured platforms can use
the DesignWare Ethernet MAC. For platforms using device-tree this
usually means adding dma-ranges property to the bus the device node is
in.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2023-11-05 16:11:38 -05:00
Bin Meng
9e4cabcf43 net: e1000: Drop e1000_eth_ids[]
e1000_eth_ids holds compatible strings for e1000 devices, but it
is meaningless as e1000 is a PCI device and there is no such
compatible string assigned to e1000 by the DT bindings community.

Drop it.

Signed-off-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-05 16:11:38 -05:00
Frank de Brabander
a56e30e65f net: phy: TI DP83869 fix invalid clock delay configuration
Setting the clock delay from the device tree settings
rx-internal-delay-ps and tx-internal-delay-ps was broken:

 - The expected value in the device tree is suppose to be a
   delay in picoseconds, but the driver only allowed an array index.
 - Driver converted this array index to the actual delay in
   picoseconds and tried to apply this in the device register. This
   however is not a valid register value. The actual logic here was
   reversed, it converted an register representation of the delay to
   the device tree delay in picoseconds.

Only when the internal delays were NOT configured in the device tree
and they default value of 7 (=2000ps) was used, a valid value was
loaded in the register.

Signed-off-by: Frank de Brabander <debrabander@gmail.com>
2023-11-05 16:11:38 -05:00
Yang Xiwen
6b5c8d98e2 net: add hifemac_mdio MDIO bus driver for HiSilicon platform
It adds the driver for the internal MDIO bus of HIFEMAC Ethernet
controller.  It's based on the mainstream linux driver.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2023-11-05 16:11:38 -05:00
Yang Xiwen
9d8f78a2a7 net: add hifemac Ethernet driver for HiSilicon platform
It adds the driver for HIFEMAC Ethernet controller found on HiSilicon
SoCs like Hi3798MV200.  It's based on the mainstream linux driver, but
quite a lot of code gets rewritten and cleaned up to adopt u-boot driver
model.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2023-11-05 16:11:38 -05:00
Robert Marko
89943052e4 net: mv88e6xxx: add Clause 45 support
Marvell LinkStreet switches support Clause 45 MDIO on the internal bus.

C45 read or writes require the register address to be written first to
the SMI PHY Data register, and then a special C45 Write Address Register
OP is used on the SMI PHY Register before making a C45 Read Data Register
OP and being able to actually read the register.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2023-11-05 16:11:37 -05:00
Robert Marko
1aecba9c1b net: mv88e6xxx: use generic bitfield macros for MDIO
Driver is currently defining the mask and bit shifting itself,
there is no need for that as U-Boot has generic bitfield macros that help
us achieve the same result but in a cleaner way.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2023-11-05 13:28:40 -05:00
Dylan Hung
607e7fa622 net: ftgmac100: Add reset control
Add optional reset control, especially for the Aspeed SOC. For the
hardware without a reset line, the reset assertion/deassertion will be
skipped.

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2023-11-05 13:28:40 -05:00
Ley Foon Tan
5d260d0800 net: dw_eth_qos: Add 64-bit addressing
Set upper 32bit address for DMA descriptors and buffer address to support
64-bit addressing.

Signed-off-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
2023-11-05 13:28:40 -05:00
Svyatoslav Ryhel
4afdc7a3c6 sysreset: implement PALMAS sysreset functions
PALMAS PMIC family has embedded poweroff function used by some
device to initiane device power off. Implement it as sysreset
driver.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-11-03 17:42:39 -04:00
Svyatoslav Ryhel
8b8a00eaf4 sysreset: implement TPS65910 sysreset functions
TPS65910/TPS65911 PMICs have embedded power control functions
used by some device to initiane device power off. Implement it as
sysreset driver.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-11-03 17:42:14 -04:00
Svyatoslav Ryhel
9d937cdc2c sysreset: implement TPS80031 sysreset functions
TPS80031/TPS80032 PMICs have embedded power control functions
used by some device to initiane device power off. Implement it as
sysreset driver.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-11-03 17:41:54 -04:00
Svyatoslav Ryhel
fa1e72ea3d sysreset: implement MAX77663 sysreset functions
MAX77663 PMIC has embedded poweroff function used by some
device to initiane device power off. Implement it as sysreset
driver.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-11-03 17:40:40 -04:00
Svyatoslav Ryhel
7084f34d0f sysreset: tegra: create arch specific sysreset driver
Tegra uses built in Power Management Controller (PMC) to perform
CPU reset. Code to perform this was located in mach-tegra, so lest
create DM driver to handle this.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-11-03 17:40:11 -04:00
Svyatoslav Ryhel
c23fca8958 power: regulator: tps65911: add regulator support
The driver provides regulator set/get voltage enable/disable
functions for TI TPS5911 PMIC.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-03 12:37:15 -04:00
Svyatoslav Ryhel
8e5c9c5aff power: pmic: tps65910: add TPS65911 PMIC support
Add support to bind the regulators/child nodes with the pmic.
Also adds the pmic i2c based read/write functions to access pmic
registers.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-03 12:37:15 -04:00
Svyatoslav Ryhel
a70a75aa6c power: regulator: tps80031: add regulator support
The driver provides regulator set/get voltage enable/disable
functions for TI TPS80031/TPS80032 PMICs.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-03 12:37:15 -04:00
Svyatoslav Ryhel
51201e49b0 power: pmic: add the base TPS80031 PMIC support
Add support to bind the regulators/child nodes with the pmic.
Also adds the pmic i2c based read/write functions to access pmic
registers.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-03 12:37:15 -04:00
Svyatoslav Ryhel
cc7595a850 power: regulator: max77663: add regulator support
The driver provides regulator set/get voltage
enable/disable functions for MAXIM MAX77663 PMICs.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-11-03 12:37:15 -04:00
Svyatoslav Ryhel
f2ed584994 power: pmic: add the base MAX77663 PMIC support
Add support to bind the regulators/child nodes with the pmic.
Also adds the pmic i2c based read/write functions to access pmic
registers.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-11-03 12:37:15 -04:00
Svyatoslav Ryhel
9b1d277471 power: regulator: palmas: fix ldoln and ldousb detection
dev->driver_data will carry the tail of ldo if there is a number and
if there is no number it will be an error code, anyway it will not be
zero. This results in a wrong ldo regulator detection.

To avoid this check for non-numerical ldo first and then manipulate
dev->driver_data.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-11-03 12:37:15 -04:00
Svyatoslav Ryhel
8ab09b92dc power: pmic: palmas: support TI TPS65913 PMIC
Existing PALMAS PMIC driver is fully compatible with TI TPS65913
PMIC found in many Tegra 4 devices, like Tegra Note 7 and ASUS
TF701T. TPS65913 shares same structure of regulators like TPS659038
so data can be reused.

Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # NVIDIA Tegratab
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-11-03 12:37:15 -04:00
Svyatoslav Ryhel
e1bbc5acef mmc: tegra: get default-tap and default-trim from device tree
Default-tap and default-trim values are used for eMMC setup
mostly on T114+ devices. As for now, those values are hardcoded
for T210 and ignored for all other Tegra generations. Fix this
by passing tap and trim values from dts.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2023-11-03 12:37:15 -04:00
Tom Rini
563142350f Merge tag 'u-boot-dfu-20231103' of https://source.denx.de/u-boot/custodians/u-boot-dfu
u-boot-dfu-20231103

- Fix CRC chunk size in fastboot
- Make size optional for dfu on mmc
2023-11-03 09:52:37 -04:00
Tom Rini
1e044a9bd6 Merge tag 'dm-pull-2nov23' of https://source.denx.de/u-boot/custodians/u-boot-dm
Just various bugfixes, apart from the TI one
2023-11-02 22:38:01 -04:00
Milan P. Stanić
1f46e8af42 cros_ec: spi: disable annoying key echo on console
on Peach-pi console every key press is echoed with message
'cros_ec_command: Returned status 1'

this is not proper fix, just hack to disable this message

Signed-off-by: Milan P. Stanić <mps@arvanta.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-02 22:38:01 -04:00
Tom Rini
97962260cb Merge branch 'master_common_h_cleanup' of https://source.denx.de/u-boot/custodians/u-boot-sh
- Remove common.h usage
2023-11-02 18:32:57 -04:00
Tom Rini
07fe79c93c Merge tag 'i2cfixes-for-v2024-01-rc2' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c updates for v2024.01-rc2

- nuvoton: support standard/fast/fast plus mode
- bootcount: remove legacy i2c driver and implement
  DM based version

Bugfixes:
- designware_i2c: adjust timing calculation
  SPL probing failed on the StarFive VisionFive 2 board
  Heinrich fixed this, by syncing timing calculation with
  linux implementation.
2023-11-02 10:12:33 -04:00
Tom Rini
b0c391ce0c Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
+ CI: Use OpenSBI 1.3.1 release for testing
+ riscv: Support resume after exception
+ rng: Support RNG provided by RISC-V Zkr ISA extension
+ board: starfive VF2: Support jtag
+ board: starfive VF2: Support TRNG driver
+ board: sifive unmatched: Move kernel load address
2023-11-02 09:30:34 -04:00
Paul Barker
32c048bd1d clk: rzg2l: Drop <common.h>
In line with changes elsewhere, drop inclusion of the common header.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2023-11-02 11:30:18 +01:00
Paul Barker
6b49155c84 gpio: rzg2l: Drop <common.h>
In line with changes elsewhere, drop inclusion of the common header.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2023-11-02 11:30:18 +01:00
Paul Barker
d933d43686 mmc: renesas-sdhi: Drop <common.h>
In line with changes elsewhere, drop inclusion of the common header.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2023-11-02 11:30:18 +01:00
Paul Barker
a1b3787ad3 pinctrl: rzg2l: Drop <common.h>
In line with changes elsewhere, drop inclusion of the common header.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2023-11-02 11:30:18 +01:00
Paul Barker
56d65db2fb serial: sh: Drop <common.h>
In line with changes elsewhere, drop inclusion of the common header.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2023-11-02 11:30:18 +01:00
Chanho Park
ebaee701a6 rng: Add StarFive JH7110 RNG driver
Adds to support JH7110 TRNG driver which is based on linux kernel's
jh7110-trng.c. This can support to generate 256-bit random numbers and
128-bit but this makes 256-bit default for convenience.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-11-02 17:45:53 +08:00
Chanho Park
88af85cf92 clk: starfive: jh7110: Add security clocks
Add STGCLK_SEC_HCLK and STGCLK_SEC_MISCAHB clocks for JH7110 TRNG
device.

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-11-02 17:45:53 +08:00
Heinrich Schuchardt
ceec977ba1 rng: Provide a RNG based on the RISC-V Zkr ISA extension
The Zkr ISA extension (ratified Nov 2021) introduced the seed CSR. It
provides an interface to a physical entropy source.

A RNG driver based on the seed CSR is provided. It depends on
mseccfg.sseed being set in the SBI firmware.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-11-02 16:22:06 +08:00
Tom Rini
658caf0bf1 Clock changes for 2024.01-rc2
This contains several fixes for the clock core.
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Merge tag 'clk-2024.01-rc2' of https://source.denx.de/u-boot/custodians/u-boot-clk

Clock changes for 2024.01-rc2

This contains several fixes for the clock core.
2023-11-01 17:49:58 -04:00
Maksim Kiselev
0755db477f clk: use private clk struct in CLK_CCF's enable/disable functions
In clk_enable()/clk_disable() functions, when CCF is activated,
we must pass a private clk struct to enable()/disable() ops functions.
Otherwise, the use of a container_of() construction within these ops
should be banned. Because passing a non-private clk struct to
container_of() results in an out of range error.

At the moment, clk-mux, clk-fixed-factor, clk-gate and possibly other
clocks use container_of() in their enable()/disable() functions.
Therefore, for these functions to work correclty, private clk struct
must be passed.

Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20230905221649.3577929-1-bigunclemax@gmail.com
2023-11-01 15:14:09 -04:00
Eugen Hristev
b6a56f5533 clk: fix count parameter type for clk_release_all
The second parameter for clk_release_all is used as an unsigned
(which makes sense) but the function prototype declares it as an int.
This causes warnings/error like such below:

include/clk.h:422:48: error: conversion to ‘int’ from ‘unsigned int’ may change the sign of the result [-Werror=sign-conversion]
  422 |         return clk_release_all(bulk->clks, bulk->count);

To fix this, changed the type of the count to `unsigned int`

Fixes: 82a8a669b4 ("clk: add clk_release_all()")
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Xavier Drudis Ferran <xdrudis@tinet.cat>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20230619104752.278500-1-eugen.hristev@collabora.com
2023-11-01 15:13:55 -04:00
Nathan Barrett-Morrison
aed6480fad drivers: clk: Adjust temp var data type to properly match that of struct clk_ops
In commit 5c5992cb90 ("clk: Add debugging for return values"), a
temporary storage variable was added around the ops->get_rate() call
inside clk_get_rate(), so that the result could be passed through
log_ret.

This temporary variable was declared as an int, yet when we look in
struct clk_ops, we can see this needs to be a ulong:
ulong (*get_rate)(struct clk *clk);

This was resulting in a signed to unsigned casting error on our
builds, where a clock value of 0xABCDABCD was being incorrectly cast
to 0xFFFFFFFFABCDABCD.

Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20230515195005.1961495-1-nathan.morrison@timesys.com
2023-11-01 15:13:15 -04:00
Heinrich Schuchardt
073bf4a57d bootstd: BOOTDEV_SPI_FLASH requires BOOTSTD
Compiling sandbox_defconfig with CONFIG_BOOTSTD=n fails:

    /usr/bin/ld: drivers/mtd/spi/sf_bootdev.o:
    in function `sf_get_bootflow':
    /drivers/mtd/spi/sf_bootdev.c:43:(.text+0x96):
    undefined reference to `bootmeth_set_bootflow'

Add the missing Kconfig dependency.

Fixes: Fixes: 0c1f4a9fb1 ("bootstd: Add a SPI flash bootdev")
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-01 12:26:44 -04:00
Sean Anderson
21c84bb111 mmc: sdhci: Rework SDHCI_QUIRK_BROKEN_R1B
As noted in commit 3a6383207b ("mmc: sdhci: add the quirk for broken
r1b response"), some MMC controllers don't always set the transfer
complete bit with R1b responses.

According to the SD Host Controller Simplified Specification v4.20,

> In the case of a command pairing with response-with-busy[, Transfer
> Complete] is set when busy is de-asserted. Refer to DAT Line Active
> and Command Inhibit (DAT) in the Present State register.

By polling the DAT Line Active bit in the present state register, we can
detect when we are no longer busy, without waiting for a long timeout.
This results in much faster reads/writes on buggy controllers.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Tested-by: Henrik Grimler <henrik@grimler.se>
2023-11-01 10:01:10 +09:00