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net: ftgmac100: Add reset control
Add optional reset control, especially for the Aspeed SOC. For the hardware without a reset line, the reset assertion/deassertion will be skipped. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
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1 changed files with 12 additions and 0 deletions
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@ -13,6 +13,7 @@
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#include <common.h>
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#include <clk.h>
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#include <reset.h>
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#include <cpu_func.h>
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#include <dm.h>
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#include <log.h>
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@ -91,6 +92,7 @@ struct ftgmac100_data {
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u32 max_speed;
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struct clk_bulk clks;
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struct reset_ctl *reset_ctl;
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/* End of RX/TX ring buffer bits. Depend on model */
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u32 rxdes0_edorr_mask;
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@ -569,6 +571,8 @@ static int ftgmac100_of_to_plat(struct udevice *dev)
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priv->txdes0_edotr_mask = BIT(15);
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}
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priv->reset_ctl = devm_reset_control_get_optional(dev, NULL);
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return clk_get_bulk(dev, &priv->clks);
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}
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@ -594,6 +598,12 @@ static int ftgmac100_probe(struct udevice *dev)
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if (ret)
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goto out;
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if (priv->reset_ctl) {
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ret = reset_deassert(priv->reset_ctl);
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if (ret)
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goto out;
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}
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/*
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* If DM MDIO is enabled, the MDIO bus will be initialized later in
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* dm_eth_phy_connect
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@ -629,6 +639,8 @@ static int ftgmac100_remove(struct udevice *dev)
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free(priv->phydev);
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mdio_unregister(priv->bus);
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mdio_free(priv->bus);
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if (priv->reset_ctl)
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reset_assert(priv->reset_ctl);
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clk_release_bulk(&priv->clks);
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return 0;
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