Commit graph

90013 commits

Author SHA1 Message Date
Sam Protsenko
aff5dddd42 tools: gitignore: Fix tools/generated path
'git status' shows 'tools/generated/' after running the build, which is
wrong. The corresponding .gitignore rule was already added in commit
c623642d29 ("Adjust gitignore for tools/generated/"), but because of
superfluous 'tools/' part it wasn't in effect. Remove incorrect 'tools/'
part to fix it.

While at it, remove tools/ path incorrectly added to the top-level
.gitignore in commit 801c482207 (".gitignore: ignore misc include,
simple-bin, and tools/generated build artifacts"), as it's required in
the comment on the top of .gitignore:

    # NOTE! Don't add files that are generated in specific
    # subdirectories here. Add them in the ".gitignore" file
    # in that subdirectory instead.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Fixes: c623642d29 ("Adjust gitignore for tools/generated/")
Fixes: 801c482207 (".gitignore: ignore misc include, simple-bin, and tools/generated build artifacts")
2023-11-10 11:01:50 -05:00
Tony Dinh
ee2ce29223 bootstd: Skip over bad device during bootflows scanning
During bootstd scanning for bootdevs, if bootdev_hunt_drv() encounters
a device not found error (e.g. ENOENT), let it return a successful status
so that bootstd will continue scanning the next devices, not stopping
prematurely.

Background:

During scanning for bootflows, it's possible for bootstd to encounter a
faulty device controller. Also when the same u-boot is used for another
variant of the same board, some device controller such as SATA might
not exist.

I've found this issue while converting the Marvell Sheevaplug board to
use bootstd. This board has 2 variants, the original Sheevaplug has MMC and
USB only, but the later variant comes with USB, MMC, and eSATA ports. We
have been using the same u-boot (starting with CONFIG_IDE and later with DM
CONFIG_SATA) for both variants. This worked well with the old
envs-scripting booting scheme.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-10 11:01:50 -05:00
Nishanth Menon
a94a4071d4 tree-wide: Replace http:// link with https:// link for ti.com
Replace instances of http://www.ti.com with https://www.ti.com

Signed-off-by: Nishanth Menon <nm@ti.com>
2023-11-10 11:01:50 -05:00
Alexander Gendin
a40f35f069 test: cmd: mbr: Remove unreachable code
Fix an issue reported by Coverity scan, and fix code indentation.

Addresses-Coverity-ID: 467404 ("Control flow issues (DEADCODE)")
Signed-off-by: Alexander Gendin <agendin@matrox.com>
2023-11-10 11:01:10 -05:00
AKASHI Takahiro
4808d16333 firmware: scmi: correct a validity check against power domain id
A power domain id on sandbox should be in the range from zero to
ARRAY_SIZE(scmi_pwdom) - 1. Correct the validity check logic.

Addresses-Coverity-ID: 467401 ("Out-of-bounds write")
Addresses-Coverity-ID: 467405 ("Out-of-bounds read")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2023-11-10 10:59:28 -05:00
Tom Rini
d2174dbff1 scsi: Have scsi_init_dev_desc_priv() use memset
When we do not have CONFIG_BOUNCE_BUFFER enabled, inside of
scsi_init_dev_desc_priv we never set the 'bb' field to false, we only
initialize it to true when CONFIG_BOUNCE_BUFFER is set. Given that we
have a number of other fields here we had been explicitly setting to
zero, change to first calling memset to clear the struct and then
initialize only the fields that need non-zero default values.

Addresses-Coverity-ID: 467407 ("Uninitialized variables (UNINIT)")
Fixes: 81bd22e935 ("rockchip: block: blk-uclass: add bounce buffer flag to blk_desc")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-11-10 10:59:24 -05:00
Tom Rini
eda45ee3cb Merge tag 'u-boot-rockchip-20231110' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
- Add Board: rk3588 Pine64 QuartzPro64;
- Fix rk3066 enter download mode;
- Fix for ringneck-px30 board;
2023-11-10 10:58:56 -05:00
Johan Jonker
8ffa9ed295 rockchip: include: asm: fix entering download mode rk3066
Keep track of the re-entries with help of the lr register.
This binary can be re-used and called from various BROM functions.
Only when it's called from the part that handles SPI, NAND or EMMC
hardware it needs to early return to BROM ones.
In download mode when it handles data on USB OTG and UART0
this section must be skipped.

Unlike newer Rockchip SoC models the rk3066 BROM code does not have built-in
support to enter download mode on return to BROM. This binary must check
the boot mode register for the BOOT_BROM_DOWNLOAD flag and reset if it's set.
It then returns to BROM to the end of the function that reads boot blocks.
From there the BROM code goes into a download mode and waits for data
on USB OTG and UART0.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-11-10 10:58:56 -05:00
Quentin Schulz
c7b4881ca4 rockchip: ringneck-px30: enable SPL_BOARD_INIT
Now that Ringneck requires some board-specific code (namely resetting
the MCU companion controller) to be run during SPL stage, let's enable
SPL_BOARD_INIT.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-11-10 10:58:56 -05:00
Quentin Schulz
6acdd63e87 rockchip: ringneck-px30: always reset STM32 companion controller on boot
It's happened that glitches on the STM32_RST and STM32_BOOT lines have
put the STM32 companion microcontroller into DFU mode making it not boot
its FW, rendering it useless for the user.

Considering that the STM32 companion microcontroller is always reset on
a reboot or power cycle, resetting it once again in U-Boot SPL isn't
going to hurt it any more.

For ATtiny companion microcontroller, the situation is a bit different
because a reboot or power cycle doesn't reset it. Additionally, since it
can only be reset with a UPDI reset on the STM32_RST line, and that is
virtually impossible to mistakenly trigger, the ATtiny is unlikely to be
in unwanted reset or enter reset because U-Boot toggles STM32_RST line.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-11-10 10:58:56 -05:00
Tim Lunn
b01adfe59d rockchip: rv1126: Read cpuid from otp and set ethaddr
Provide configuration to read cpuid and generate a persistent
MAC address in ethaddr

Signed-off-by: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-11-10 10:58:44 -05:00
Tim Lunn
455ad75cb2 rockchip: otp: Add support for RV1126
Extend the otp driver to read rv1126 otp. This driver code was
adapted from the Rockchip BSP stack.

Signed-off-by: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-11-10 10:58:44 -05:00
Tim Lunn
dae79b870a rockchip: dts: fix bootph tags for rv1126
RV1126 fails to boot on 2024.01-rc1.

Commit 9e644284ab ("dm: core: Report bootph-pre-ram/sram node as
pre-reloc after relocation") changed the behaviour of bootph-pre-ram, to
limit nodes to spl phase. This caused rv1126 boards to fail to boot with
the current dts.

This patch updates the pmu/grf nodes to bootph-all tags as they are
needed in all phases. This fixes the boot issue on rv1126 boards.

Signed-off-by: Tim Lunn <tim@feathertop.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-11-10 10:57:58 -05:00
Sam Protsenko
5069436419 MAINTAINERS: Fix Sam Protsenko mail
Sam works for Linaro again. Use his work e-mail address for ANDROID AB
subsystem.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2023-11-10 08:44:02 -05:00
Igor Opaniuk
c205fe979e stm32mp1: read auth stats and boot_partition from tamp
Obtain from TAMP backup register information about image authorization
status and partition id used for booting. Store this info in
environmental variables ("boot_auth" and "boot_part" correspondingly).

Image authorization supported values:
0x0 - No authentication done
0x1 - Authentication done and failed
0x2 - Authentication done and succeeded

These values are stored to TAMP backup register by Trusted Firmware-A [1].

Testing:
STM32MP> print boot_part
boot_part=1
STM32MP> print boot_auth
boot_auth=2

[1] https://git.trustedfirmware.org/TF-A/trusted-firmware-a.git/commit/?h=refs/heads/integration&id=ab2b325c1ab895e626d4e11a9f26b9e7c968f8d8

Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Co-developed-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-11-10 13:34:10 +01:00
Marek Vasut
6d84f6bc75 arm: stm32: Limit u-boot.itb size to 0x160000 bytes on DH STM32MP15 DHSOM
The maximum size of u-boot.itb in SPI NOR on DH STM32MP15 DHSOM is
0x160000 . Define this size in U-Boot config to prevent misconfigured
builds from emitting larger u-boot.itb than the one which fits the
SPI NOR area reserved for the blob.

The SPI NOR layout is as follows:
0x00_0000..0x03_ffff ... SPL 1
0x04_0000..0x07_ffff ... SPL 2
0x08_0000..0x1d_ffff ... U-Boot
0x1e_0000..0x1e_ffff ... Environment 1
0x1f_0000..0x1f_ffff ... Environment 2

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-11-10 13:25:18 +01:00
Marek Vasut
55a3faada7 arm: stm32: Enable TCP, IPv6, wget on DH STM32MP15 DHSOM
Enable support for TCP protocol, wget, and IPv6 on this platform.
The former two allow users download payload into the U-Boot from
a web server, which may be more convenient or easier to set up
than TFTP server. The later is enabled to future proof the IP
stack on this platform.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-11-10 13:25:18 +01:00
Marek Vasut
5846ef86f8 ARM: dts: stm32mp: Repair damage from alignment with v6.3
The patch fixed by this commit renders ST STM32MP15xx EV1 board and
all DHSOM SoM based boards unbootable from SPI NOR. Fix the damage
by updating -u-boot.dtsi to match the stm32mp15-pinctrl.dtsi update.

Fixes: 08002ffd08 ("ARM: dts: stm32mp: alignment with v6.3")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2023-11-10 13:23:02 +01:00
Bhupesh Sharma
68ea9f0bf1 arm: stm32mp: Really fix compilation issue when SYS_DCACHE_OFF and/or SYS_DCACHE_SYS are enabled
While 23e20b2fa6 ("arm: stm32mp: Fix compilation issue when
SYS_DCACHE_OFF and/or SYS_DCACHE_SYS are enabled") tried fixing
this issue, fix it really by adding #if checks for SYS_ICACHE_OFF
and SYS_DCACHE_OFF.

Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2023-11-10 13:12:20 +01:00
Quentin Schulz
c41a6deaf2 rockchip: ringneck-px30: enable i2c command
This is a useful tool to check the presence of a device on a specific
i2c bus, so let's enable it.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2023-11-09 11:19:05 +08:00
Tom Fitzhenry
6761cb5bc2 board: rockchip: add Pine64 QuartzPro64 RK3588 board
QuartzPro64 is a Rockchip RK3588 based SBC by Pine64.

UART and boot over SD/eMMC/RJ45 are tested to work.

Linux commits from next-20231013:
8152d3d070a9 ("arm64: dts: rockchip: Add QuartzPro64 SBC device tree")

Signed-off-by: Tom Fitzhenry <tom@tom-fitzhenry.me.uk>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Cc: Eugen Hristev <eugen.hristev@collabora.com>
Cc: Jonas Karlman <jonas@kwiboo.se>
Cc: Ondrej Jirman <megi@xff.cz>
2023-11-09 11:19:05 +08:00
Tom Rini
e17d174773 Xilinx changes for v2024.01-rc3
xilinx:
 - Disable lock in mini spi configurations
 
 zynq:
 - DTS syncups
 - Kconfig updates
 
 zynqmp:
 - DTS syncups
 - Kconfig fixups
 
 versal:
 - Make 30MHz as default freq for spi
 
 versal net:
 - Enable ADMA for mmc
 
 serial:
 - Read baudrate from DT
 
 spi:
 - Put spi lock under one Kconfig
 - Support 64bit addresses in cadance_ospi
 - zynqmp_gqspi - change logging support
 
 firmware:
 - Handle errors in zynqmp_pm_feature()
 
 include:
 - Sync vsc8531 dt binding with kernel
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Merge tag 'xilinx-for-v2024.01-rc3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

Xilinx changes for v2024.01-rc3

xilinx:
- Disable lock in mini spi configurations

zynq:
- DTS syncups
- Kconfig updates

zynqmp:
- DTS syncups
- Kconfig fixups

versal:
- Make 30MHz as default freq for spi

versal net:
- Enable ADMA for mmc

serial:
- Read baudrate from DT

spi:
- Put spi lock under one Kconfig
- Support 64bit addresses in cadance_ospi
- zynqmp_gqspi - change logging support

firmware:
- Handle errors in zynqmp_pm_feature()

include:
- Sync vsc8531 dt binding with kernel
2023-11-07 10:36:23 -05:00
Mattijs Korpershoek
37229edccc MAINTAINERS: fastboot: add Mattijs
Fastboot has been marked as orphaned since 2021.
Since I'm interested in maintaining this, assign myself.

Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
2023-11-07 08:19:18 -05:00
Mattijs Korpershoek
56fe8f1288 MAINTAINERS: usb gadget: add Mattijs
It seems that Lukasz and Marek could get some help in maintaining the
usb gadget drivers.

Assign myself as maintainer.

Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
2023-11-07 08:19:17 -05:00
Michal Simek
37f500d711 dt-bindings: Remove VSC8531 specific RGMII delay definitions
Based on Linux upstream discussion value enumeration shouldn't be used.
Instead of it delay in pS should be used that's why remove it from the
header.

Link: https://lore.kernel.org/all/YNsm%2F0dmpBgO8mqr@lunn.ch/
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/bbd343474856a67252f3b31d22b3b5a80ad04043.1698851109.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
6504242df3 arm64: zynqmp: Add description for nvmem efuse layout
Based on discussion with DT folks at link below there is not going to be
any name restrictions for child names. That's why add description for
current nvmem layout.

Link: https://lore.kernel.org/lkml/20231013101450.573-3-praveen.teja.kundanala@amd.com/
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/af81299cafc2bd13ed30dcd69bdf6efb5fbb7f68.1698840373.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
1332a781e1 ARM: zynq: Add partition description
Xilinx is using standard mtd partition layout for quite a long time. It is
used for testing purpose on evaluation boards.
Also #address/size-cells shouldn't be present without nodes which should
use them that's why move them from zynq-7000.dtsi to nand/nor nodes
directly.

The patch was tested on zc706 and zedboard(with also increasing max
frequency and rx bus width).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4c3348981bba32d3892194420d78fe8621c47534.1698837725.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
7a64be2ba2 xilinx: Enable SPI_FLASH_MTD by default
Provide access to qspi flash layout via mtd command.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b3c4a3eddb71aab9535b034380d0dbae770828d4.1698837725.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
6e3dbaa0b5 arm64: zynqmp: Comment all smmu entries
SMMU is disabled by default and not all masters can be enabled at the same
time because of limited number of entries. That's why comment all iommu
properties but keep them for reference in DT. In XEN case they should be
added back and Xen should have SMMU enabled by default.
Also add IDs for DP and DPDMA.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e868c27c52ded5d8ef25f75ba394b1ab3b31b80a.1698825657.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
7faa6b9069 arm64: versal-net: Add DTSes for mini qspi/ospi configuration
Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which ospi/qspi can
be that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a99a8d72201a782fc811715942dea97fb5ab583b.1698329087.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
0274447bae arm64: versal: Add DTSes for mini qspi/ospi configuration
Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which ospi/qspi can
be that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9518ab1c4299a45e800b8611172edd78c9243132.1698329087.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
a787618057 ARM: zynq: Add DTSes for mini qspi configurations
Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which qspi can be
that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e7d31a9d9c4a76e171eefc619f31fabd0831a614.1698329087.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
da10dd10e0 ARM: zynq: Add DTSes for mini qspi configurations
Mini U-Boot is running out of OCM and it's only purpose is to program non
volatile memories. There are different configurations which qspi can be
that's why describe them via DT.
DT binding is already approved that's why there is no reason not to add it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/28b3cdd7e91b2b4c3c36d0bf65aa5bac042f248c.1698329087.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
1cd59c571c xilinx: versal: Setup 30MHz as default spi frequency
Align default SPI configuration with ZynqMP/Versal NET.
There is no reason to run on lower frequencies.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c1d6ebd659f3002649b1200c926f8b9ed3132085.1698749448.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Venkatesh Yadav Abbarapu
83cab0b30f arm64: versal-net: enable CONFIG_MMC_SDHCI_ADMA
The Standard Host Controller Interface (SDHCI) specification version
3.00 adds support for Advanced DMA (ADMA) for both 64 and 32 bit
widths of DMA. This significantly improves read and write throughput.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231027030446.4009-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:09 +01:00
Michal Simek
a156b6ce0f arm64: zynqmp: Fix Kconfig entry indentation
Use tabs instead of space for entry indentation which is standard coding
style.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ff28e719de82258c066f1fedae87f88597f367b5.1698302068.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
0d3399dfd8 arm: xilinx: Add missing dual parallel flash description
Describe flash memories based on the latest DT binding.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/cddf2909d0445eba08b998d42ffc31c1fa3132b9.1698045694.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Tejas Bhumkar
820bad0271 arm64: zynqmp: Disable Tri-state for MIO38 Pin
gpio38 is used in SOM's kv260 to reset the Ethernet PHY.
At present, HW reset is not working properly as Tri-state 
is enabled for MIO38, causing inappropriate PHY register reads.

Disabled Tri-state for MIO38 to make HW reset work.

Tri-state disable :
ZynqMP> md 0xFF180208 2
ff180208: 00bfe7a3 00000540

Tri-state enable :
ZynqMP> md 0xFF180208 2
ff180208: 00bfe7e3 00000540

Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Link: https://lore.kernel.org/r/20231020050622.972750-1-tejas.arvind.bhumkar@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:09 +01:00
Ibai Erkiaga
3e89144892 zynqmp: migrate gqspi debug to logging
The following patch migrates the usage of debug and printf functions
to the relevant logging function as per U-Boot DM guidelines.

Additionally some of the debugging statements have been rearanged for
a more meaningfull debug experience.

aarch64-linux-gnu-size reports 229 bytes less when debug is enabled at
file level, while is just 5bytes more when disabled.

Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@amd.com>
Link: https://lore.kernel.org/r/20231013123739.2757979-1-ibai.erkiaga-elorza@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:09 +01:00
Amit Kumar Mahapatra
fdff4b3c48 arm64: dts: zynqmp: make hw-ecc as the default ecc mode
Except for Linux no other component (i.e., u-boot, fsbl or BootRom) of the
software stack supports software ecc engine. So, make hw-ecc as the default
ecc mode.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f47b95616eb40d3a9908ca60df94ec6e873b071c.1697119098.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Venkatesh Yadav Abbarapu
03cc435539 ARM: zynq: Disable the config CONFIG_SPI_FLASH_USE_4K_SECTORS
Lock size for the flashes will be in terms of sector size, so
disable the CONFIG_SPI_FLASH_USE_4K_SECTORS and read it from the
flash itself.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8e5c2bf3b7e5f366c4e261e8055ea254bda53aa9.1697117993.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Venkatesh Yadav Abbarapu
ed1b1dd3bf arm64: zynqmp: Disable the lock option for mini qspi
As mini configs are required only for flashing the images, so
disabling the lock config which will save nearly 6KB of memory.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/374d6b3a46d19b7ee171dfe8071676098db93e25.1697117869.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Piyush Mehta
1bccde607e arm64: zynqmp: remove snps, xhci-stream-quirk property for usb
To sync up with the upstream bulk-stream feature, removed
'snps,xhci-stream-quirk' DT property for usb.

Signed-off-by: Piyush Mehta <piyush.mehta@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1f4ecfe3ea6a4d0d8d8de324f5dffd3efc86656a.1697115523.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
fa6106f989 arm64: zynqmp: Remove address/size-cells from ams node
Remove unused address/size-cells which is also done upstream that's why
this is pretty much sync patch with upstream.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0ca8d8fe245ad7cb665f5333202d83f70acfc11f.1697115523.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
e6b5c01a6c Revert "arm64: zynqmp: Add power domain description for PL"
This reverts commit d59fac2f3f.

This power domain shouldn't be enabled by default. Power domain behavior
should be handled on case by case basis. Adding this property to
zynqmp.dtsi is breaking some suspend/resume cases that's why remove it
from this file.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7ed2a46383c6918fbbaca2d618459b1ee58f865c.1697115523.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
ff31d0330d arm64: zynqmp: Remove xlnx,zynqmp-aes node
AES can be discovered via firmware interface that's why remove node for it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/eaf575a6ca92f8c10cefb447c08c1292025deb74.1697115523.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
f87696afa0 arm64: zynqmp: Use mdio node by vp-x-a2785-00-revA and vpk120-revA
All boards have been converted to use mdio node that's why move ethernet
phys under mdio node too.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6c60f5d29b9d9992bd0130fd263c8ed13cb8166c.1697115523.git.michal.simek@amd.com
2023-11-07 13:47:09 +01:00
Michal Simek
971a772624 arm64: zynqmp: Remove fclk driver
fclk will never go upstream that's why removing this node from DT.
All PL (programmable logic) based IPs should handle clocks self without
using this workaround.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/fbb8665b8a58dbe96349abfe5492a509939e165b.1697098930.git.michal.simek@amd.com
2023-11-07 13:47:08 +01:00
Venkatesh Yadav Abbarapu
20d1836eea spi: cadence_ospi_versal: Add support for 64-bit address
When 64-bit address is passed only lower 32-bit address
is getting updated. Program the upper 32-bit address in the
DMA destination memory address MSBs register.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231011031515.4151-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00
Venkatesh Yadav Abbarapu
ba9bdfd959 drivers: firmware: Handle error case in the zynqmp_pm_feature
Unhandled error coming from xilinx_pm_request() but return
value is not read back that's why getting sparse warning
as below:
warning: variable 'ret' set but not used [-Wunused-but-set-variable].
In case of error return the "ret" value.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Link: https://lore.kernel.org/r/20231011025647.17200-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-11-07 13:47:08 +01:00