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arm: xilinx: Add missing dual parallel flash description
Describe flash memories based on the latest DT binding. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/cddf2909d0445eba08b998d42ffc31c1fa3132b9.1698045694.git.michal.simek@amd.com
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820bad0271
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0d3399dfd8
5 changed files with 15 additions and 7 deletions
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@ -309,10 +309,11 @@
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&qspi {
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bootph-all;
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status = "okay";
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num-cs = <1>;
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num-cs = <2>;
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flash@0 {
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compatible = "n25q128a11", "jedec,spi-nor";
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reg = <0x0>;
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reg = <0>, <1>;
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parallel-memories = /bits/ 64 <0x1000000 0x1000000>; /* 16MB */
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <50000000>;
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@ -61,10 +61,11 @@
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&qspi {
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status = "okay";
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num-cs = <1>;
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num-cs = <2>;
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flash@0 {
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compatible = "n25q128a11", "jedec,spi-nor";
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reg = <0x0>;
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reg = <0>, <1>;
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parallel-memories = /bits/ 64 <0x1000000 0x1000000>; /* 16MB */
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <50000000>;
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@ -71,11 +71,13 @@
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&qspi {
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status = "okay";
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num-cs = <2>;
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flash@0 {
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compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
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reg = <0>, <1>;
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parallel-memories = /bits/ 64 <0x4000000 0x4000000>; /* 64MB */
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x0>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <108000000>;
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@ -67,11 +67,13 @@
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&qspi {
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status = "okay";
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num-cs = <2>;
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flash@0 {
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compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
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reg = <0>, <1>;
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parallel-memories = /bits/ 64 <0x4000000 0x4000000>; /* 64MB */
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x0>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <108000000>;
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@ -67,11 +67,13 @@
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&qspi {
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status = "okay";
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num-cs = <2>;
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flash@0 {
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compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
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reg = <0>, <1>;
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parallel-memories = /bits/ 64 <0x4000000 0x4000000>; /* 64MB */
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x0>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <108000000>;
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