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arm64: zynqmp: Add description for nvmem efuse layout

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Based on discussion with DT folks at link below there is not going to be
any name restrictions for child names. That's why add description for
current nvmem layout.

Link: https://lore.kernel.org/lkml/20231013101450.573-3-praveen.teja.kundanala@amd.com/
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/af81299cafc2bd13ed30dcd69bdf6efb5fbb7f68.1698840373.git.michal.simek@amd.com
This commit is contained in:
Michal Simek 2023-11-01 13:06:15 +01:00
parent 1332a781e1
commit 6504242df3
1 changed files with 49 additions and 0 deletions
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49
arch/arm/dts/zynqmp.dtsi
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@ -214,6 +214,55 @@
soc_revision: soc-revision@0 {
reg = <0x0 0x4>;
};
/* efuse access */
efuse_dna: efuse-dna@c {
reg = <0xc 0xc>;
};
efuse_usr0: efuse-usr0@20 {
reg = <0x20 0x4>;
};
efuse_usr1: efuse-usr1@24 {
reg = <0x24 0x4>;
};
efuse_usr2: efuse-usr2@28 {
reg = <0x28 0x4>;
};
efuse_usr3: efuse-usr3@2c {
reg = <0x2c 0x4>;
};
efuse_usr4: efuse-usr4@30 {
reg = <0x30 0x4>;
};
efuse_usr5: efuse-usr5@34 {
reg = <0x34 0x4>;
};
efuse_usr6: efuse-usr6@38 {
reg = <0x38 0x4>;
};
efuse_usr7: efuse-usr7@3c {
reg = <0x3c 0x4>;
};
efuse_miscusr: efuse-miscusr@40 {
reg = <0x40 0x4>;
};
efuse_chash: efuse-chash@50 {
reg = <0x50 0x4>;
};
efuse_pufmisc: efuse-pufmisc@54 {
reg = <0x54 0x4>;
};
efuse_sec: efuse-sec@58 {
reg = <0x58 0x4>;
};
efuse_spkid: efuse-spkid@5c {
reg = <0x5c 0x4>;
};
efuse_ppk0hash: efuse-ppk0hash@a0 {
reg = <0xa0 0x30>;
};
efuse_ppk1hash: efuse-ppk1hash@d0 {
reg = <0xd0 0x30>;
};
};
zynqmp_pcap: pcap {